Semiconductor substrate, solar cell, photovoltaic module and photovoltaic system

By forming a recessed structure and a pyramid suede structure on the back of the semiconductor substrate, the transmission loss problem of back contact solar cells is solved, and the photoelectric conversion efficiency and current density are improved.

CN223219427UActive Publication Date: 2025-08-12ZHUHAI FUSHAN AIKO SOLAR ENERGY TECH CO LTD +6
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Patent Information

Application Number
CN202422089832.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-27
Publication Date
2025-08-12
Estimated Expiration
2034-08-27

AI Technical Summary

Technical Problem

The back planar structure of the semiconductor substrate with back contact solar cells results in loss of incident light transmission, affecting the photoelectric conversion efficiency.

Method used

A recessed structure is formed on the back of the semiconductor substrate, and the side walls form an angle less than 50° with the horizontal plane. Combined with the pyramid suede structure, multiple reflections and absorption of light are achieved.

Benefits of technology

The transmission loss of incident light is reduced, and the photoelectric conversion efficiency and current density are improved.

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Abstract

The utility model discloses a semiconductor substrate, a solar cell, a photovoltaic assembly and a photovoltaic system, the semiconductor substrate is provided with a front surface and a back surface which are oppositely arranged, and the back surface of the semiconductor substrate is provided with a recessed structure; the side wall of the recessed structure is a plane or a cambered surface, a preset included angle theta is formed between the side wall and the horizontal plane of the semiconductor substrate, and theta is smaller than or equal to 50 degrees. The semiconductor substrate provided by the utility model can reduce the transmission loss of incident light on the back surface of the cell, improves the reflection of the incident light on the back surface of the cell, and finally achieves the improvement of the current density and photoelectric conversion efficiency of the solar cell.
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Description

Technical Field

[0001] The utility model relates to the technical field of solar cells, in particular to a semiconductor substrate, a solar cell, a photovoltaic component and a photovoltaic system. Background Art

[0002] The PN junction and metal contact of a back-contact solar cell are both located on the back of the solar cell. Without the obstruction of the metal grid electrode on the front, this allows for maximum utilization of incident light and minimizes optical losses. Compared to solar cells with obstructed front surfaces, this results in higher short-circuit current and photoelectric conversion efficiency. Further improving the performance of back-contact solar cells remains a challenge. Generally, the back of the semiconductor substrate of a back-contact solar cell forms a planar structure. However, this planar structure causes transmission losses of incident light on the back of the semiconductor substrate, hindering the semiconductor substrate's absorption and conversion of incident light, thereby affecting the improvement of the photoelectric conversion efficiency of back-contact solar cells. Utility Model Content

[0003] The technical problem to be solved by the present invention is to provide a semiconductor substrate that can reduce the transmission loss of incident light on the back of the battery and at the same time improve the reflection of the incident light on the back of the battery, thereby improving the absorption of light by the semiconductor substrate.

[0004] The technical problem to be solved by the present invention is also to provide a solar cell that can significantly improve the battery current density and photoelectric conversion efficiency.

[0005] In order to solve the above technical problems, the utility model provides a semiconductor substrate, wherein the semiconductor substrate has a front surface and a back surface that are oppositely arranged, and the back surface of the semiconductor substrate has a concave structure;

[0006] The sidewall of the recessed structure is a plane or a curved surface, and a preset angle θ is formed between the sidewall and the horizontal plane of the semiconductor substrate, where θ≤50°.

[0007] As an improvement to the above solution, the preset angle θ satisfies: 5°≤θ≤40°.

[0008] As an improvement to the above solution, the recessed structures are irregularly arranged on the back side of the semiconductor substrate to form a velvet structure.

[0009] As an improvement to the above solution, the recessed structure includes a plurality of polygonal pits, and the plurality of polygonal pits are irregularly arranged on the back side of the semiconductor substrate.

[0010] As an improvement to the above solution, the recessed structure includes a plurality of polygonal pits of different shapes, and the plurality of polygonal pits are irregularly arranged on the back side of the semiconductor substrate.

[0011] As an improvement to the above solution, the recessed structure includes a plurality of polygonal pyramids, and the plurality of polygonal pyramids are irregularly arranged on the back side of the semiconductor substrate.

[0012] As an improvement to the above solution, the recessed structure includes a plurality of polygonal pyramids of different shapes, and the plurality of polygonal pyramids are irregularly arranged on the back side of the semiconductor substrate.

[0013] As an improvement of the above solution, the depth of the recessed structure is 0.5 μm to 1.5 μm, and the width of the opening of the recessed structure is 1 μm to 8 μm.

[0014] As an improvement of the above solution, the front surface of the semiconductor substrate has a concave pyramid velvet structure, and a preset angle δ is formed between the sidewall of the pyramid velvet structure and the horizontal plane of the semiconductor substrate, 40°≤δ≤70°.

[0015] As an improvement of the above solution, the depth of the pyramid velvet structure is 1 μm to 5 μm, and the width of the opening is 1 μm to 8 μm.

[0016] Correspondingly, the present invention also provides a solar cell comprising the above-mentioned semiconductor substrate.

[0017] Correspondingly, the present invention also provides a photovoltaic assembly, comprising the above-mentioned solar cell.

[0018] Correspondingly, the present invention also provides a photovoltaic system, including the above-mentioned photovoltaic assembly.

[0019] The implementation of the utility model has the following beneficial effects: by forming a recessed structure with inclined sidewalls on the back of the semiconductor substrate, the transmission loss of the incident light on the back of the battery is reduced. At the same time, the incident light can also be reflected back to the front of the battery through the recessed structure. The light reflected back to the front of the battery is further reflected back to the semiconductor substrate through the pyramid velvet surface on the front. More light generates carriers in the semiconductor substrate, ultimately achieving an improvement in the current density and photoelectric conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic structural diagram of the back side of the semiconductor substrate provided by the present invention;

[0021] Figure 2 This is an electron microscope image of the back side of the semiconductor substrate provided by the present invention;

[0022] Figure 3 It is a structural schematic diagram of the concave structure provided by an embodiment of the utility model;

[0023] Figure 4This is an electron microscope image of the concave structure provided by an embodiment of the present utility model;

[0024] Figure 5 yes Figure 3 Schematic diagram of the size of the concave structure in the middle;

[0025] Figure 6 yes Figure 3 A schematic diagram of the dimensions of another concave structure in FIG.

[0026] Figure 7 yes Figure 3 Schematic diagram of the dimensions of another concave structure in . DETAILED DESCRIPTION

[0027] To make the objectives, technical solutions, and advantages of the present invention more clearly apparent, the present invention will be further described in detail below with reference to the accompanying drawings. It is hereby stated that any directional terms such as "up," "down," "left," "right," "front," "back," "inside," and "outside" that appear or will appear in this document are based solely on the accompanying drawings and are not intended to limit the present invention.

[0028] like Figures 1 to 4 As shown, an embodiment of the present invention provides a semiconductor substrate, wherein the semiconductor substrate 1 has a front surface 11 and a back surface 12 arranged opposite to each other, and the back surface 12 of the semiconductor substrate 1 has a recessed structure 121. The sidewalls 122 of the recessed structure 121 are flat or curved, and a preset angle θ is formed between the sidewalls 122 and the horizontal plane of the semiconductor substrate 1, where θ is ≤ 50°. By forming a recessed structure with inclined sidewalls on the back surface of the semiconductor substrate, the transmission loss of incident light on the back surface of the battery is reduced. At the same time, the incident light can also be reflected back to the front surface of the battery through the recessed structure. The light reflected back to the front surface of the battery is further reflected back to the semiconductor substrate through the velvet structure on the front surface of the battery, significantly improving the battery's absorption of light, ultimately achieving an improvement in the battery's current density and photoelectric conversion efficiency. The semiconductor substrate 1 can be one of a single crystal silicon substrate, a polycrystalline silicon substrate, a microcrystalline silicon substrate, or a silicon carbide substrate.

[0029] In a preferred embodiment, the preset angle θ satisfies the following conditions: 5° ≤ θ ≤ 40°. If θ < 5°, this is not conducive to reducing light transmission loss on the back side of the semiconductor substrate. If θ > 40°, this may adversely affect the subsequent backside coating effect and the placement of metal grid electrodes. More preferably, the preset angle θ satisfies the following conditions: 15° ≤ θ ≤ 30°.

[0030] Compared to a regularly arranged velvet structure, the recessed structures of the present invention are irregularly arranged on the back of the semiconductor substrate to form a velvet structure. This irregularly arranged recessed structure requires less precision in the manufacturing process and is also beneficial for fully reflecting light at different incident angles.

[0031] In one embodiment, the recessed structure includes a plurality of polygonal pits, and the plurality of polygonal pits are irregularly arranged on the back side of the semiconductor substrate. It is understandable that the polygon can be a regular polygon, such as an equilateral triangle, a square, a regular pentagon, a regular hexagon, etc., or an irregular polygon, and the lengths of different sides of the irregular polygon can be equal or unequal. The preparation of the regular polygonal recessed structure is relatively simple, and the length of the irregular polygon can be adjusted accordingly according to the distribution of the incident light, thereby further increasing the reflection of the incident light by the back side of the semiconductor substrate. The polygonal pit can be formed by enclosing a plurality of side walls and a bottom surface, and the shape of each polygonal pit can be the same or different.

[0032] In one embodiment, the recessed structure includes a plurality of polygonal pyramids irregularly arranged on the back surface of the semiconductor substrate. The polygonal pyramids may be formed by a plurality of sidewalls, each having a vertex. The shapes of the polygonal pyramids may be the same or different. Compared to polygonal pits with a bottom surface, the polygonal pyramids can reduce light transmission loss at the bottom surface of the polygonal pit while improving reflection of incident light from the back surface of the semiconductor substrate.

[0033] Specifically, the depth H1 of the recessed structure is 0.5μm to 1.5μm, and is exemplarily 0.6μm, 0.8μm, 1μm, 1.2μm, or 1.4μm, but is not limited thereto. If the depth of the recessed structure is less than 0.5μm, it is difficult to effectively reduce the light transmission loss on the back side of the semiconductor substrate; if the depth of the recessed structure is greater than 1.5μm, it will have an adverse effect on the subsequent arrangement of the back side structure. The width D1 of the opening of the recessed structure is 1μm to 8μm, and is exemplarily 2μm, 4μm, 5μm, 6μm, or 7μm, but is not limited thereto. If the width of the recessed structure is less than 4μm, the recessed structures are arranged too closely, and light may be refracted and reflected multiple times within a single recessed structure, resulting in light absorption loss on the back side of the semiconductor substrate; if the width of the recessed structure is greater than 8μm, the number of recessed structures is too small, which is also not conducive to improving the light absorption rate of the semiconductor substrate.

[0034] In one embodiment, Figure 5 As shown, the sidewall 122 of the recessed structure is a plane, and the angle θ between the plane where the sidewall 122 is located and the horizontal plane where the semiconductor substrate 1 is located is 5° to 40°. Setting the sidewall as a plane can improve the preparation efficiency.

[0035] In another embodiment, Figure 6 and Figure 7As shown, the sidewall 122 of the recessed structure is a curved surface. By setting the sidewall as a curved surface, the area of the sidewall is increased, and the light can be fully reflected on the curved sidewall, and the reflection effect of the incident light on the back side of the semiconductor substrate 1 is further improved.

[0036] When the side wall is a curved surface, in one embodiment, Figure 6 As shown, the arc surface can be formed by the front surface 11 of the semiconductor substrate 1 protruding toward the back surface 12, and the angle θ between the tangent plane of the arc surface at the vertex of the recessed structure and the horizontal plane where the semiconductor substrate is located is 5° to 40°. In another embodiment, as Figure 7 As shown, the arc surface is formed by the back surface 12 of the semiconductor substrate 1 protruding toward the front surface 11, and the angle θ between the cut surface of the arc surface at the opening of the recessed structure 121 and the horizontal plane of the semiconductor substrate is 5° to 40°.

[0037] In addition, if Figure 5 As shown, the front surface 11 of the semiconductor substrate 1 has a concave pyramid velvet structure 111. The angle δ between the sidewalls 112 of the pyramid velvet structure and the horizontal plane of the semiconductor substrate 1 is 40° to 70°. The pyramid velvet structure on the front surface of the semiconductor substrate can further reflect light reflected from the back surface of the semiconductor substrate to the front surface of the semiconductor substrate, thereby improving the light absorption of the semiconductor substrate.

[0038] In one embodiment, the depth H2 of the pyramid texture structure is 1 μm to 5 μm, and is exemplarily 1.5 μm, 2 μm, 2.5 μm, 3 μm, or 4 μm, but is not limited thereto. The width D2 of the opening is 1 μm to 8 μm, and is exemplarily 2 μm, 4 μm, 5 μm, 6 μm, or 7 μm, but is not limited thereto.

[0039] The embodiment of the utility model forms a recessed structure with inclined sidewalls on the back of the semiconductor substrate to reduce the transmission loss of incident light on the back of the cell. At the same time, combined with the pyramid velvet surface on the front of the semiconductor substrate to reflect light, more light generates carriers in the semiconductor substrate, ultimately achieving an improvement in the current density and photoelectric conversion efficiency of the solar cell.

[0040] An embodiment of the present utility model also provides a solar cell, comprising the above-mentioned semiconductor substrate, wherein a first region and a second region are provided on the back side of the semiconductor substrate, a first semiconductor layer and a second semiconductor layer are provided on the first region and the second region respectively, wherein the first semiconductor layer and the second semiconductor layer have different doping types, and a passivation layer is provided on the first semiconductor layer and the second semiconductor layer, wherein the passivation layer is one or more of a polycrystalline silicon film layer, an amorphous silicon film layer, a microcrystalline silicon film layer, an aluminum oxide layer, a silicon nitride layer, and a silicon oxynitride layer, and the photoelectric conversion efficiency of the solar cell is significantly improved.

[0041] The embodiment of the present invention further provides a photovoltaic module, comprising the above-mentioned solar cells. The solar cells can be connected in series to form a battery string to achieve series current confluence output, thereby improving the energy conversion efficiency of the photovoltaic module.

[0042] The embodiment of the present invention also provides a photovoltaic system, including the above-mentioned battery assembly, which can improve the energy conversion efficiency of photovoltaic power generation.

[0043] The present invention will be further described below with reference to specific embodiments:

[0044] Example 1

[0045] This embodiment provides a semiconductor substrate having a recessed pyramid structure on its front surface, with the sidewalls of the pyramid structure forming an angle of 54.74° with the horizontal plane of the semiconductor substrate, a depth of 3.54 μm, and a width of 5.01 μm at the opening. The back surface of the semiconductor substrate of a solar cell has a recessed pyramid velvet structure, with the sidewalls of the pyramid velvet structure forming an angle of 15° with the horizontal plane of the semiconductor substrate, a depth of 0.908 μm, and a width of 6.78 μm at the opening.

[0046] Example 2

[0047] This embodiment provides a semiconductor substrate, which differs from Example 1 in that the back surface of the substrate has a recessed structure. The recessed structures are polygonal pyramids and are irregularly arranged. The sidewalls of the recessed structures protrude from the back surface of the semiconductor substrate to the front surface to form an arcuate surface. The angle between the tangent plane of the arcuate surface at the opening of the recessed structure and the horizontal plane of the semiconductor substrate is 20°. The depth of the recessed structure is 0.908 μm, and the width at the opening is 4.99 μm. All other aspects are the same as in Example 1.

[0048] Example 3

[0049] This embodiment provides a semiconductor substrate, which differs from Example 1 in that the back surface of the substrate has a recessed structure. The recessed structures are polygonal pyramids and are irregularly arranged. The sidewalls of the recessed structures protrude from the front surface to the back surface of the semiconductor substrate to form an arcuate surface. The angle between the cut surface of the arcuate surface at the opening of the recessed structure and the horizontal plane of the semiconductor substrate is 30°. The depth of the recessed structure is 0.909 μm, and the width at the opening is 3.15 μm. All other aspects are the same as in Example 1.

[0050] Comparative Example 1

[0051] This comparative example provides a semiconductor substrate, which differs from Example 1 in that the back surface of the semiconductor substrate is a planar structure.

[0052] Comparative Example 2

[0053] This comparative example provides a semiconductor substrate. This semiconductor substrate differs from Example 1 in that the back surface of the semiconductor substrate has a recessed pyramid structure. The angle between the sidewalls of the pyramid structure and the horizontal plane of the semiconductor substrate is 54°. The depth of the pyramid structure is 1.38 μm, and the width of the opening is 2.00 μm. All other aspects are the same as Example 1.

[0054] Comparative Example 3

[0055] This comparative example provides a semiconductor substrate. This comparative example differs from Example 1 in that the back surface of the semiconductor substrate has a concave pyramid structure. The angle between the sidewalls of the pyramid structure and the horizontal plane of the semiconductor substrate is 40°. The depth of the pyramid structure is 0.910 μm, and the width of the opening is 2.17 μm. All other aspects are the same as Example 1.

[0056] Performance testing

[0057] An anti-reflection layer was prepared on the front side of the semiconductor substrate of Examples 1 to 3 and Comparative Examples 1 to 3, and a doped conductive layer, a passivation layer and an electrode were prepared on the back side to obtain a solar cell and perform performance testing. The projection loss of the incident light on the back side of the semiconductor substrate and the actual photogenerated current density were respectively tested, and the ratio of the projection loss to the maximum theoretical photogenerated current density δ1, and the ratio of the actual photogenerated current density to the maximum theoretical photogenerated current density δ2 were calculated. The results are shown in the following table.

[0058] δ1 δ2 Example 1 3.22% 89.88% Example 2 3.12% 90.09% Example 3 2.68% 87.98% Comparative Example 1 6.12% 87.42% Comparative Example 2 1.46% 86.99% Comparative Example 3 2.23% 87.89%

[0059] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A semiconductor substrate, characterized in that The semiconductor substrate has a front surface and a back surface that are opposite to each other, and the back surface of the semiconductor substrate has a concave structure; The sidewall of the recessed structure is a plane or a curved surface, and a preset angle θ is formed between the sidewall and the horizontal plane of the semiconductor substrate, where θ≤50°.

2. The semiconductor substrate according to claim 1, wherein The preset angle θ satisfies: 5°≤θ≤40°.

3. The semiconductor substrate according to claim 1, wherein The recessed structures are irregularly arranged on the back surface of the semiconductor substrate to form a velvet structure.

4. The semiconductor substrate according to claim 1, wherein The recessed structure includes a plurality of polygonal pits, and the plurality of polygonal pits are irregularly arranged on the back side of the semiconductor substrate.

5. The semiconductor substrate according to claim 4, wherein The recessed structure includes a plurality of polygonal pits of different shapes, and the plurality of polygonal pits are irregularly arranged on the back side of the semiconductor substrate.

6. The semiconductor substrate according to claim 1, wherein The recessed structure includes a plurality of polygonal pyramids, and the plurality of polygonal pyramids are irregularly arranged on the back surface of the semiconductor substrate.

7. The semiconductor substrate according to claim 6, wherein The recessed structure includes a plurality of polygonal pyramids of different shapes, and the plurality of polygonal pyramids are irregularly arranged on the back surface of the semiconductor substrate.

8. The semiconductor substrate according to any one of claims 1 to 7, wherein The depth of the concave structure is 0.5 μm to 1.5 μm, and the width of the opening of the concave structure is 1 μm to 8 μm.

9. The semiconductor substrate according to claim 1, wherein The front surface of the semiconductor substrate has a concave pyramid velvet structure, and a preset angle δ is formed between the sidewall of the pyramid velvet structure and the horizontal plane of the semiconductor substrate, and the angle is 40°≤δ≤70°.

10. The semiconductor substrate according to claim 9, wherein The depth of the pyramid velvet structure is 1 μm to 5 μm, and the width of the opening is 1 μm to 8 μm.

11. A solar cell, characterized in that: The semiconductor substrate comprises the semiconductor substrate according to any one of claims 1 to 10 and a passivation layer, wherein the passivation layer is one or more of a polycrystalline silicon film layer, an amorphous silicon film layer, a microcrystalline silicon film layer, an aluminum oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

12. A photovoltaic module, characterized in that: Comprising the solar cell according to claim 11.

13. A photovoltaic system, characterized in that: Comprising the photovoltaic module according to claim 12.