Electroencephalogram acquisition device and system

Abstract

The utility model discloses an electroencephalogram acquisition device and system, and the device is integrally arranged and comprises a preprocessing module, a low-power-consumption acquisition chip, a low-power-consumption main control chip, a low-power-consumption radio frequency module and a power supply module, the preprocessing module is used for receiving the electroencephalogram signals and filtering high-frequency components in the electroencephalogram signals; the low-power-consumption acquisition chip is used for carrying out multi-channel sampling on the electroencephalogram signals of which the high-frequency components are filtered out; the low-power-consumption main control chip is used for awakening and driving the low-power-consumption acquisition chip to work; the low-power-consumption radio frequency module is used for receiving the sampled electroencephalogram signals, converting the electroencephalogram signals into digital signals and transmitting the digital signals out through the low-power-consumption radio frequency module; and the power supply module is used for supplying power to all electric components of the device. The system is a system comprising a device. All parts of the device are integrally arranged, most parts are low-power-consumption parts, and compared with an existing mainstream electroencephalogram collecting device, the electroencephalogram collecting device is low in power consumption and good in portability.

Description

Technical Field

[0001] The utility model relates to an electroencephalogram (EEG) acquisition device and system, belonging to the field of EEG acquisition equipment. Background Art

[0002] Brain-computer interface technology, based on the complex "brain," aims to develop "brain control" and "brain-controlling" technologies. Through breakthroughs and improvements in hardware form, key technologies, interaction modes, and neural regulation, it aims to achieve efficient collaboration between humans and machines. Currently, mainstream EEG acquisition devices on the market suffer from high power consumption and poor portability. Utility Model Content

[0003] The utility model provides an electroencephalogram (EEG) acquisition device and system, which solve the problems disclosed in the background technology.

[0004] According to one aspect of the present disclosure, there is provided an EEG acquisition device, which is integrated and includes a preprocessing module, a low-power acquisition chip, a low-power main control chip, a low-power radio frequency module and a power supply module; the preprocessing module receives EEG signals and filters out high-frequency components in the EEG signals; the low-power acquisition chip performs multi-channel sampling on the EEG signals from which the high-frequency components have been filtered out; the low-power main control chip wakes up and drives the low-power acquisition chip to work; receives the sampled EEG signals, converts the EEG signals into digital signals, and transmits the digital signals through the low-power radio frequency module; and the power supply module supplies power to all electrical components of the device.

[0005] In some embodiments of the present disclosure, the preprocessing module includes a bidirectional protection diode, a first resistor, a second resistor, a first capacitor and a second capacitor; one end of the first resistor serves as the input end of the preprocessing module and is connected to one end of the bidirectional protection diode, the other end of the bidirectional protection diode is grounded, the other end of the first resistor serves as a connection end of the second resistor and one end of the first capacitor, the other end of the first capacitor is grounded, the other end of the second resistor serves as the output end of the preprocessing module and is connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

[0006] In some embodiments of the present disclosure, the apparatus further comprises an interface set, wherein the output end of each interface in the interface set is connected to the input end of the preprocessing module.

[0007] In some embodiments of the present disclosure, the low-power acquisition chip includes multiple ADS1299 chips, the EEG signal input end of each ADS1299 chip is connected to the output end of the preprocessing module, the digital signal of each ADS1299 chip is connected to the digital signal input end of the low-power main control chip, and the control signal input end of each ADS1299 chip is connected to the control signal output end of the low-power main control chip.

[0008] In some embodiments of the present disclosure, the low-power main control chip is an STM32L071CBT6 chip.

[0009] In some embodiments of the present disclosure, the low-power radio frequency module is a Bluetooth serial port communication module.

[0010] In some embodiments of the present disclosure, the power module includes multiple level converters of different models, the output end of the level converter serves as the output end of the power module, and the input end of the level converter is connected to a battery or a Type-C interface.

[0011] According to another aspect of the present disclosure, there is provided an EEG acquisition system, comprising an EEG signal sensor, an EEG acquisition device and an EEG signal processing terminal; the input end of a preprocessing module of the EEG acquisition device is connected to the EEG signal sensor, and the output end of a low-power radio frequency module of the EEG acquisition device is connected to the EEG signal processing terminal.

[0012] The beneficial effects achieved by the present invention are as follows: all components of the present invention are integrated, and most components are low-power components. Compared with existing mainstream EEG acquisition devices, it has low power consumption and good portability. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is the structural block diagram of the EEG acquisition device;

[0014] Figure 2 This is the circuit diagram of the pre-processing module;

[0015] Figure 3 This is the circuit diagram of the ADS1299 chip;

[0016] Figure 4 This is the circuit diagram of the STM32L071CBT6 chip;

[0017] Figure 5 Circuit diagram for Type C interface power input;

[0018] Figure 6 Circuit diagram for charging / powering the battery;

[0019] Figure 7 The following are circuit diagrams of different types of level converters;

[0020] Figure 8 This is the circuit diagram of the Bluetooth serial communication module;

[0021] Figure 9 This is the structural block diagram of the EEG acquisition system. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is obvious that the embodiments described are only part of the embodiments of the present disclosure, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is in no way intended to limit the present disclosure and its application or use. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0023] Unless otherwise specified, the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure.

[0024] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0025] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0026] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0027] It should be noted that like symbols and letters refer to like items in the following figures, so once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0028] In order to solve the problems of high power consumption and poor portability of existing mainstream EEG acquisition devices, the present disclosure proposes an EEG acquisition device and system.

[0029] Figure 1 This is a schematic diagram of an embodiment of the EEG acquisition device disclosed herein. To facilitate portability, the device is integrated. Specifically, all components of the device are encapsulated in a shell, and necessary external interfaces are provided on the shell, thereby miniaturizing the device.

[0030] The EEG acquisition device may include a preprocessing module, a low-power acquisition chip, a low-power main control chip, a low-power radio frequency module and a power supply module; wherein the preprocessing module, the low-power acquisition chip, the low-power main control chip, and the low-power radio frequency module are connected in sequence, and the power supply module supplies power to all electrical components of the device.

[0031] It should be noted that the pre-processing module is mainly used to receive EEG signals and filter out high-frequency components in the EEG signals.

[0032] The pre-processing module can be a filter that removes high frequencies. In some embodiments, such as Figure 2 As shown, the preprocessing module includes a bidirectional protection diode D1, a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2; one end of the first resistor R1 is respectively used as an input end of the preprocessing module and connected to one end of the bidirectional protection diode D1, and the other end of the bidirectional protection diode D1 is grounded. The other end of the first resistor R1 is used as a connection end of the second resistor R2 and one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded. The other end of the second resistor R2 is respectively used as an output end of the preprocessing module and connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is grounded.

[0033] Figure 2 In the circuit, bidirectional protection diode D1 (ESD401) provides protection against ±24 kV contact discharges, thus forming an electrostatic protection circuit. Two capacitors connected in parallel form a second-order RC filter circuit, which removes high-frequency components. The primary frequency distribution of EEG signals ranges from 0.5 to 100 Hz, with usable information primarily distributed below 50 Hz. A second-order RC filter circuit is used to remove high-frequency components from EEG signals.

[0034] It should be noted that since the device is an integrated setting, an interface set can be installed on the shell, and the output end of each interface in the interface set is connected to the input end of the preprocessing module. Among them, some interfaces are connected to EEG signal sensors, and the remaining interfaces are reserved interfaces to support the expansion of temperature / humidity sensors, motion sensors and other acquisition functions, providing support for the application and verification of multi-form, multi-modal wireless brain-computer interface systems.

[0035] It should be noted that the low-power acquisition chip is used to perform multi-channel sampling of EEG signals that have filtered out high-frequency components. The specific low-power acquisition chip can include multiple ADS1299 chips. The EEG signal input end of each ADS1299 chip is connected to the output end of the preprocessing module, the digital signal of each ADS1299 chip is connected to the digital signal input end of the low-power main control chip, and the control signal input end of each ADS1299 chip is connected to the control signal output end of the low-power main control chip.

[0036] Here we take 16 channels as an example. The low-power acquisition chip includes two ADS1299 chips, each of which performs 8-channel low-noise sampling. Due to its relatively high input impedance and common-mode rejection, it can directly realize EEG signal acquisition.

[0037] The internal functional architecture of the ADS1299 chip is as follows: Figure 3As shown in the figure, the ADS1299 chip primarily consists of a programmable gain EEG signal acquisition and amplification circuit, an ADC, an internal reference, an onboard oscillator, control circuitry, and an SPI interface. The analog front end performs 8-channel low-noise sampling, with high input impedance and common-mode rejection, enabling EEG signal acquisition without the need for additional impedance conversion circuitry. Since the ADS1299 chip is an off-the-shelf chip, its detailed description is omitted here.

[0038] It should be noted that the low-power main control chip is used to wake up and drive the low-power acquisition chip to work; receive the sampled EEG signals, convert the EEG signals into digital signals, and transmit the digital signals through the low-power RF module.

[0039] The low-power main control chip can directly use the STM32L071CBT6 chip, which has the characteristics of low cost, ultra-low power consumption, and high-performance ARM core. The chip provides a variety of analog features, including a 12-bit ADC with hardware oversampling, two ultra-low power comparators, multiple timers, a low-power timer (LPTIM), four general-purpose 16-bit timers and two basic timers, an RTC and a SysTick, which can be used as a time base. In addition, standard and advanced communication interfaces are integrated: up to three I2Cs, two SPIs, one I2S, four USARTs and one low-power UART (LPUART). The power supply range is 1.65 to 3.6 V, and it is available in a temperature range of -40 to +125°C. The comprehensive power-saving mode set allows the design of low-power applications. See the schematic diagram Figure 4 The STM32L071CBT6 chip is an existing chip and will not be described in detail here.

[0040] The main function of the STM32L071CBT6 chip is to wake up the ADS1299 chip, drive the ADS1299 chip to implement functions such as continuous signal reading and stopping, signal format conversion, communication protocol analysis and data sending.

[0041] The workflow of the STM32L071CBT6 chip is an existing mode conversion and signal transmission process, which is not described in detail here. It can be simply described as follows: first initialize, start the ADS1299 chip, reset the registers of the ADS1299 chip, wait for a certain period of time, receive the collected EEG signals, perform analog-to-digital conversion on the EEG signals, and upload the digital signals; after receiving the end command sent by the upstream, control the ADS1299 chip to stop collecting.

[0042] It should be noted that the power module is used to power all electrical components of the device. The power module may include multiple level converters of different models. The output end of the level converter serves as the output end of the power module, and the input end of the level converter is connected to the battery or Type C interface.

[0043] See Figure 5 This is a basic USB Type-C interface connection design with power protection, pull-up resistors, and filtering. It can be used for simple USB Type-C device detection and power management, but data transfer is not enabled in this circuit.

[0044] In the figure, interface J2 is a USB Type-C connector with 16 pins. VBUS is the power supply pin, GND is the ground pin, CC1 and CC2 are configuration channel pins used to detect the insertion direction of the cable and assist in power management, DP1 / DP2 and DM1 / DM2 are USB differential data pair pins for high-speed data transmission, SBU1 / SBU2 are auxiliary channel pins that can be used for audio or video transmission, resistors R8 and R9 are 5.1kΩ pull-up resistors connected between CC1 and CC2 pins and ground respectively. These resistors are used for cable direction identification and power negotiation of the USB Type-C interface, resistor R7 is a 1MΩ resistor connected between ground and capacitor C487 to dissipate residual charge on the capacitor, capacitor C487 is a 100nF capacitor used for filtering, probably to stabilize the voltage of the CC line and prevent noise interference, fuse F2 This is a surface-mount fuse (SMD0603-050) connected to the VBUS power line to protect the circuit from overcurrent. The CC1 and CC2 pins are connected to ground through resistors R8 and R9. This connection is used to detect the insertion direction of the USB plug. When a proper cable connection is detected, the voltage on the CC line is used to determine the USB device role (Host or Device) and the supply voltage. The DM1 / DM2 and DP1 / DP2 pins are used for USB data transmission and are not connected in this design.

[0045] When powered by batteries, lithium batteries are used, specifically 3.7V (9600 mAh) models. Figure 6 The battery charging / power supply circuit primarily manages battery charging and power supply, ensuring safe charging and discharging. When voltage is present on the VBUS input, the charging management chip U21 obtains power from the VCC pin and begins charging the battery. The charging status is indicated by LED D31, controlled by the CHRG pin, while the standby status is indicated by LED D30, controlled by the STDBY pin. The charge current is set using the PROG pin and external resistor R6, while the TEMP pin monitors battery temperature to ensure safe charging. The battery is connected to connector JP10 via the BAT pin, and the VBAT output voltage provides a stable power supply to the battery.

[0046] In the figure, the VCC pin inputs the power supply voltage, specifically provided by VBUS. The BAT pin is connected to the battery and is responsible for charging the battery. The GND pin is connected to the ground line. CE is the chip enable pin, which controls whether the charger is on by a high or low level. CHRG and STDBY indicate the charging status and standby status, respectively, through LED displays. PROG is used to set the charge current. TEMP is used to monitor the battery temperature. Peripheral components: Resistors R4 and R39 are used for LED indication of charging status. LEDs D31 and D30 are used to display charging and standby status. Filter capacitor C496 stabilizes the input voltage. Filter capacitor C3 stabilizes the battery terminal voltage. Pull-up resistor R6 is used to set the charge current. Connector JP10 connects the BAT pin of the charge management chip to the battery to implement battery charging and discharging management.

[0047] See Figure 7 The level converters mainly include TLV70025DDCR, LM2664M6X, and TPS72325DBVR level converters, which convert the DC voltage of lithium batteries (+3.7V) or TypeC (+5V) to +3.3V, +2.5V, -3.7 / -5V, and -2.5V.

[0048] It should be noted that the low-power RF module is a Bluetooth serial communication module. Compared with WiFi transmission, Bluetooth transmission has lower power consumption and is cheaper. It can run for a long time, while WiFi requires frequent connection and disconnection, which can easily lead to battery depletion. Secondly, it can provide a smaller size and can be easily integrated into the device, while WiFi requires an independent module. In addition, Bluetooth provides a more stable connection, especially when connecting over long distances.

[0049] See Figure 8 The Bluetooth serial port communication module is a data transmission module based on Bluetooth Specification V2.0 with EDR Bluetooth protocol (stamp hole package, solderable). It has the advantages of small size and high performance. It is a dual-mode data transmission module based on SPP&BLE Bluetooth protocol, supports BLE5.0, the wireless working frequency band is 2.4GHz ISM, the modulation method is GFSK, the maximum transmit power of the module is 4dBm, the receiving sensitivity is -85dBm, and it fully covers EEG signal acquisition.

[0050] The Bluetooth serial communication module is used for data transmission and operation control. The Bluetooth module U22 is powered by a 3.3V power supply and controls the on and off of an external LED light through its I / O pins. The TXD and RXD pins are used for serial communication with other devices to send and receive data. The optocoupler D34 achieves isolated communication with other circuits to protect against high voltage shocks.

[0051] In Bluetooth module U22, the GND pin is connected to ground, the VCC pin receives power, and is powered by a 3.3V power supply. TXD and RXD are the transmit and receive pins for serial communication, respectively. Pins PB1, PB2, PB3, and PB4 are used for I / O control and connect to LED indicators and other peripherals. Optocoupler D34 isolates the voltage for safe signal transmission. Pull-down resistors R141 and R142 ensure that the LED remains off when unpowered. Filter capacitors C496, C497, and C498 ensure power supply stability. LED indicators D31, D32, and D33 are controlled by the microcontroller's output to indicate the current system status. SW3 controls the circuit's reset and startup. Resistors R140 and R43 associated with the switch control signal stability.

[0052] The working process of the above-mentioned device is as follows: first, the STM32L071CBT6 chip starts EEG acquisition after receiving the acquisition command sent by the EEG signal processing terminal. The EEG signal enters the ADS1299 chip through the EEG sensor and the preprocessing module. The analog front end amplifies the EEG signal and digitizes it to obtain 8-channel EEG data; secondly, while acquiring the signal, the Bluetooth serial port communication module receives the trigger signal and transmits the data for processing; finally, the STM32L071CBT6 chip packages the EEG signal and trigger signal, and sends the data to the EEG signal processing terminal through the Bluetooth serial port communication module.

[0053] All components of the above-mentioned device are integrated, and most of the components are low-power components. Compared with existing mainstream EEG acquisition devices, it has low power consumption and good portability.

[0054] Figure 9 This is a schematic diagram of an embodiment of the EEG acquisition system disclosed herein, which may specifically include an EEG signal sensor, the above-mentioned EEG acquisition device and an EEG signal processing terminal; the input end of the device preprocessing module is connected to the EEG signal sensor, and the output end of the device low-power radio frequency module is connected to the EEG signal processing terminal.

[0055] It should be noted that the EEG signal processing terminal can be a computer, which can be loaded with existing deep learning software to perform decoding analysis, analysis and judgment, emotion recognition, etc. on EEG signals.

[0056] The above system is intended to form an integrated EEG sensing solution for EEG signal recording, transmission and processing, which is an EEG acquisition solution with wireless transmission function, good portability and miniaturization.

[0057] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An electroencephalogram (EEG) acquisition device, characterized in that: The device is integrated and includes a pre-processing module, a low-power acquisition chip, a low-power main control chip, a low-power radio frequency module and a power supply module; Preprocessing module: receives EEG signals and filters out high-frequency components in them; Low-power acquisition chip: performs multi-channel sampling on EEG signals that filter out high-frequency components; Low-power main control chip: wakes up and drives the low-power acquisition chip to work; Receive the sampled EEG signals, convert them into digital signals, and transmit them through a low-power radio frequency module; Power supply module: provides power to all electrical components of the device.

2. The EEG acquisition device according to claim 1, characterized in that: The preprocessing module includes a bidirectional protection diode, a first resistor, a second resistor, a first capacitor and a second capacitor; one end of the first resistor is respectively used as an input end of the preprocessing module and connected to one end of the bidirectional protection diode, the other end of the bidirectional protection diode is grounded, the other end of the first resistor is used as a connection end of the second resistor and one end of the first capacitor, the other end of the first capacitor is grounded, the other end of the second resistor is respectively used as an output end of the preprocessing module and connected to one end of the second capacitor, and the other end of the second capacitor is grounded.

3. The EEG acquisition device according to claim 1, characterized in that: The device further comprises an interface set, wherein the output end of each interface in the interface set is connected to the input end of the pre-processing module.

4. The EEG acquisition device according to claim 1, characterized in that: The low-power acquisition chip includes multiple ADS1299 chips. The EEG signal input end of each ADS1299 chip is connected to the output end of the preprocessing module, the digital signal of each ADS1299 chip is connected to the digital signal input end of the low-power main control chip, and the control signal input end of each ADS1299 chip is connected to the control signal output end of the low-power main control chip.

5. The EEG acquisition device according to claim 1 or 4, characterized in that: The low-power main control chip is the STM32L071CBT6 chip.

6. The EEG acquisition device according to claim 1, characterized in that: The low-power radio frequency module is a Bluetooth serial port communication module.

7. The EEG acquisition device according to claim 1, characterized in that: The power module includes multiple level converters of different models. The output end of the level converter serves as the output end of the power module, and the input end of the level converter is connected to the battery or Type-C interface.

8. An EEG acquisition system, characterized in that: It comprises an EEG signal sensor, the device according to any one of claims 1 to 7, and an EEG signal processing terminal; the input end of the device preprocessing module is connected to the EEG signal sensor, and the output end of the device low-power radio frequency module is connected to the EEG signal processing terminal.

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