Display device

Abstract

There is provided a display device including: a base layer including a display area and a non-display area around the display area; a unit element on the display area and including a light emitting element and an optical sensing element; and a pixel defining layer in which a cell opening including a light emitting opening and a sensing opening is defined. The light-emitting elements in one of the unit elements include a first light-emitting element, a second light-emitting element, a (3-1)-th light-emitting element, and a (3-2)-th light-emitting element for supplying light having different colors from each other. And the number of optical sensing elements in one of the unit elements may be equal to or greater than the total number of 3-1 and 3-2 light emitting elements.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0127354 filed on September 22, 2023, in the Korean Intellectual Property Office, and Korean Patent Application No. 10-2024-0103621 filed on August 5, 2024, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure relates to a display device including an optical sensing element. Background Art

[0004] Electronic devices for providing images to users, such as smartphones, digital cameras, notebook computers, navigation systems, and smart TVs, include display devices for displaying images. The display device may include a display panel for generating images, an input unit such as an input sensor, a camera for capturing external images, and various sensors.

[0005] The input sensor may be located on the display panel and may detect a user's touch. The sensor may include a fingerprint sensor, a proximity sensor, an illumination sensor, etc. Among the sensors, the fingerprint sensor may detect a user's fingerprint on the display panel. Utility Model Content

[0006] The present disclosure provides a display device having an optical sensor with improved sensitivity (resolution).

[0007] One or more embodiments of the present disclosure provide a display device, which includes: a base layer, including a display area and a non-display area around the display area in a plan view; a unit element, at the display area and including a light-emitting element and an optical sensing element; and a pixel defining layer, defining a unit opening, the unit opening including a light-emitting opening for providing light generated by the light-emitting element and a sensing opening respectively overlapping with the optical sensing element, wherein the light-emitting element includes: a first light-emitting element for providing light of a first color; a second light-emitting element for providing light of a second color different from the first color and spaced apart from the first light-emitting element along a first direction; and a 3-1 light-emitting element and a 3-2 light-emitting element for providing light of a third color different from the first color and the second color and spaced apart along a second direction intersecting the first direction, and the number of optical sensing elements in one of the unit elements is equal to or greater than 2.

[0008] The optical sensing element in one of the unit elements may include: a first optical sensing element, between the 3-1 light-emitting element and the 3-2 light-emitting element; and a second optical sensing element, spaced apart from the first optical sensing element along the first direction, and between the first optical sensing element and the second optical sensing element, wherein the light-emitting opening in one of the unit openings includes a first light-emitting opening overlapping with the first light-emitting element, a second light-emitting opening overlapping with the second light-emitting element, a 3-1 light-emitting opening overlapping with the 3-1 light-emitting element, and a 3-2 light-emitting opening overlapping with the 3-2 light-emitting element, and wherein the sensing opening in one of the unit openings includes a first sensing opening overlapping with the first optical sensing element and a second sensing opening overlapping with the second optical sensing element.

[0009] The first sensing openings and the second sensing openings respectively in the unit openings arranged along the first direction may be aligned along the first direction.

[0010] The first sensing openings and the second sensing openings respectively in the unit openings arranged along the second direction may be alternately arranged along the second direction to have a zigzag form.

[0011] The first and second sensing openings may respectively have rectangular shapes including short sides extending in the first direction and long sides extending in the second direction.

[0012] The first light emitting opening and the second light emitting opening may have a hexagonal shape corresponding to an imaginary rectangle extending in a diagonal direction crossing the first and second directions and from which a first portion, one of long sides facing the first sensing opening in the first direction, and a second portion point-symmetrical to the first portion are removed.

[0013] The 3-1st and 3-2nd light emitting openings may have a hexagonal shape corresponding to an imaginary rectangle from which a third portion from which a short side facing the first sensing opening in the second direction and a fourth portion point-symmetrical to the third portion are removed.

[0014] A length of a side of the first light emitting opening facing the first sensing opening in the first direction may be greater than a length of a side of the 3-1st light emitting opening facing the first sensing opening in the second direction.

[0015] The first light-emitting opening may include a first side facing the first sensing opening in the first direction, and a second side facing the 3-1 light-emitting opening in a first diagonal direction intersecting the first direction and the second direction, wherein the second light-emitting opening includes a third side facing the first sensing opening in the first direction, and a fourth side facing the 3-2 light-emitting opening in the first diagonal direction, and wherein a ratio of the second side to the first side is greater than a ratio of the fourth side to the third side.

[0016] A length of a first side of the 3-1st light emitting opening facing the first light emitting opening in a first diagonal direction crossing the first direction and the second direction may be greater than a length of a second side of the 3-1st light emitting opening facing the second light emitting opening in a second diagonal direction crossing the first diagonal direction.

[0017] The 3-1st light emitting opening and the 3-2nd light emitting opening may be line-symmetrical with respect to an imaginary line extending in the first direction.

[0018] The optical sensing element in one of the unit elements may include: a first optical sensing element between the 3-1st light emitting element and the 3-2nd light emitting element; a second optical sensing element spaced apart from the first optical sensing element along the first direction, and the second light emitting element is between the first optical sensing element and the second optical sensing element; a third optical sensing element spaced apart from the first optical sensing element in a first diagonal direction intersecting the first direction and the second direction; and a fourth optical sensing element spaced apart from the third optical sensing element along the second direction, and the second light emitting element is between the third optical sensing element and the fourth optical sensing element, and the fourth optical sensing element is spaced apart from the third optical sensing element in a first diagonal direction intersecting the first direction and the second direction. A pair of diagonal directions intersecting are spaced apart from the first optical sensing element in a second diagonal direction, wherein the light-emitting openings in one of the unit openings include a first light-emitting opening overlapping with the first light-emitting element, a second light-emitting opening overlapping with the second light-emitting element, a 3-1 light-emitting opening overlapping with the 3-1 light-emitting element, and a 3-2 light-emitting opening overlapping with the 3-2 light-emitting element, and wherein the sensing openings in one of the unit openings include a first sensing opening overlapping with the first optical sensing element, a second sensing opening overlapping with the second optical sensing element, a third sensing opening overlapping with the third optical sensing element, and a fourth sensing opening overlapping with the fourth optical sensing element.

[0019] The first sensing openings and the second sensing openings, respectively in the unit openings arranged along the first direction, may be aligned along the first direction.

[0020] The third sensing opening and the fourth sensing opening, respectively in the unit openings arranged along the second direction, are aligned along the second direction.

[0021] The first sensing opening and the second sensing opening may have a rectangular shape including a first side extending in a first direction and a second side extending in a second direction and having a length greater than the first side, wherein the third sensing opening and the fourth sensing opening have a rectangular shape including a third side extending in the first direction and a fourth side extending in the second direction and having a length shorter than the third side.

[0022] The first and second light emitting openings may have an octagonal shape corresponding to an imaginary square from which corners are removed.

[0023] The 3-1 th light emitting opening may have an octagonal shape extending in the second diagonal direction, wherein the 3-2 th light emitting opening has an octagonal shape extending in the first diagonal direction.

[0024] The sensing opening may include a short side extending in a first direction and a long side extending in a second direction, wherein a distance from one long side of one sensing opening to one of the light-emitting openings it faces along the first direction is substantially equal to a distance from one short side of the one sensing opening to another of the light-emitting openings it faces along the second direction.

[0025] The first color may be a blue color, the second color may be a red color, and the third color may be a green color.

[0026] The light-emitting element may include a first electrode at least partially exposed by a light-emitting opening, a second electrode, and a light-emitting layer between the first electrode and the second electrode, wherein the optical sensing element includes a first sensing electrode at least partially exposed by a sensing opening, a second sensing electrode, and a photoelectric conversion layer between the first sensing electrode and the second sensing electrode, and wherein the second electrode and the second sensing electrode are a common layer having an integral shape. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain aspects of the present disclosure. In the drawings:

[0028] Figure 1 is a perspective view of a display device according to one or more embodiments of the present disclosure;

[0029] Figure 2 It shows Figure 1 a diagram of a cross section of the display device shown in ;

[0030] Figure 3 It shows Figure 2 a diagram of a cross section of a display panel shown in ;

[0031] Figure 4 is a block diagram of a display device according to one or more embodiments of the present disclosure;

[0032] Figure 5 It shows Figure 4 An equivalent circuit diagram of any one of the pixels shown in and an optical sensor adjacent to the pixel;

[0033] Figure 6It shows Figure 5 A cross-sectional view of a light-emitting element, a first transistor, a fourth transistor, and a sixth transistor of a pixel shown in FIG;

[0034] Figure 7 It shows Figure 5 a diagram of a cross section of an optical sensing element, a first sensing transistor, and a second sensing transistor of an optical sensor shown in FIG.

[0035] Figure 8A is a diagram illustrating an arrangement state of light emitting openings and sensing openings on a plane according to one or more embodiments of the present disclosure;

[0036] Figure 8B yes Figure 8A A magnified image of a cell area is shown in ;

[0037] Figure 8C yes Figure 8A A magnified image of a cell area is shown in ;

[0038] Figure 8D It is along Figure 8C A sectional view taken along line II';

[0039] Figure 8E It is along Figure 8C A sectional view taken along line II';

[0040] Figure 9A is a diagram illustrating an arrangement state of light emitting openings and sensing openings on a plane according to one or more embodiments of the present disclosure;

[0041] Figure 9B yes Figure 9A A magnified image of a cell area shown in ; and

[0042] Figure 10 A process of obtaining fingerprint information as biometric information using an optical sensor according to one or more embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0043] By referring to the detailed description and drawings of the embodiments, it is possible to more easily understand the aspects of some embodiments of the present disclosure and the methods for realizing them. The described embodiments are provided as examples so that the present disclosure will be thorough and complete and will fully convey aspects of the present disclosure to those skilled in the art. Therefore, redundant, irrelevant or unrelated to the description of the embodiments or unnecessary processes, elements and techniques for fully understanding aspects of the present disclosure by those of ordinary skill in the art may be omitted. Unless otherwise stated, throughout the drawings and written description, the same reference numerals, characters or combinations thereof represent the same elements, and therefore, their repeated descriptions may be omitted.

[0044] The described embodiments may have various modifications and may be implemented in different forms, and should not be interpreted as being limited to the embodiments shown herein. The use of "can," "may," or "may not" when describing an embodiment may correspond to one or more embodiments of the present disclosure. The present disclosure encompasses all modifications, equivalents, and substitutions within the scope of the ideas and techniques of the present disclosure. In addition, each of the features of the various embodiments of the present disclosure may be combined with each other in part or in its entirety, and various interlocks and drives are technically possible. Each embodiment may be implemented independently of one another, or may be implemented together in association.

[0045] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for specific materials, material properties, dimensions, proportions, commonalities between the illustrated elements, and / or any other characteristics, attributes, properties, etc. of the elements.

[0046] Various embodiments are described herein with reference to cross-sectional views that are schematic diagrams of embodiments and / or intermediate structures. Therefore, variations in the shapes of the figures due to, for example, manufacturing techniques and / or tolerances should be expected. Furthermore, the specific structural or functional descriptions disclosed herein are merely exemplary and are used for the purpose of describing embodiments according to the concepts of the present disclosure. Therefore, the embodiments disclosed herein should not be construed as being limited to the shapes of the elements, layers, or regions shown, but should include deviations in shapes due to, for example, manufacturing.

[0047] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0048] For ease of explanation, spatial relative terms such as "below", "below", "down", "downside", "under", "above", "upper", etc. may be used herein to describe the relationship between an element or feature and another (some) element or feature as shown in the drawings. It will be understood that, in addition to the orientation depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or in operation. For example, if the device in the drawings is turned over, the elements described as being "below", "below" or "under" other elements or features will then be oriented "above" the other elements or features. Therefore, the exemplary terms "below" and "under" can include both above and below orientations. The device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when a first part is described as being arranged "on" a second part, this means that the first part is arranged on the upper or lower side of the second part based on the direction of gravity, and is not limited to its upper side.

[0049] In addition, the phrase "in a plan view" means when viewing an object portion from above, and the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section taken by vertically cutting an object portion from the side. The terms "overlap" or "overlapping" mean that a first object can be above or below a second object, or on one side of the second object, and vice versa. In addition, the term "overlap" can include stacking, facing, or facing, extending over, covering, or partially covering, or any other suitable term as will be understood and understood by those of ordinary skill in the art. The expression "non-overlapping" can include meanings such as "spaced apart from," "separated from," or "offset from," as well as any other suitable equivalents as will be understood and understood by those of ordinary skill in the art. The terms "facing" and "facing" can mean that a first object can be directly opposite or indirectly opposite to a second object. In the case where a third object is interposed between the first and second objects, the first and second objects can be understood to be indirectly opposite to each other, but still facing each other.

[0050] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, it may be directly formed on, directly on, directly connected to, or directly coupled to another element, layer, region, or component, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to another element, layer, region, or component, such that one or more intervening elements, layers, regions, or components may be present. Furthermore, this may collectively mean directly coupled or coupled or indirectly coupled or indirectly coupled as well as integrally coupled or integrally coupled or non-integrally coupled or non-integrally coupled. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, it may be directly electrically connected or directly electrically coupled to the other layer, region, and / or component, or one or more intervening layers, regions, or components may be present. The one or more intervening components may include switches, resistors, capacitors, etc. When describing embodiments, unless explicitly described as being directly connected, expressions of connection indicate electrical connection, and "directly connected / directly coupled" or "directly on..." means that one component is directly connected or directly coupled to another component or directly on another component without intervening components.

[0051] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upward direction, but includes forming the part on the side surface or in the downward direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "under" another part, this includes not only the case where the part is "directly under" the other part, but also the case where there is another part between the part and the other part. At the same time, other expressions describing the relationship between components, such as "between...", "directly between..." or "adjacent to..." and "directly adjacent to...", can be interpreted similarly. It will be understood that when an element or layer is referred to as "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intervening elements or layers.

[0052] For the purposes of this disclosure, expressions such as "at least one of" or "any one of" or "one or more of" when preceding a list of elements modify the entire list of elements and do not modify the individual elements in the list. For example, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, any combination of two or more of X, Y, and Z (such as, for example, XYZ, XY, YZ, and XZ), and / or any variations thereof. Similarly, expressions such as "at least one of A and B" can include A, B, or A and B. As used herein, "or" generally means "and / or," and the term "and / or" includes any and all combinations of one or more of the relevant listed items. For example, "A and / or B" can include A, B, or A and B. Similarly, expressions such as "at least one of," "a plurality of," "one of," and other prepositional phrases, when preceding / following a list of elements, modify the entire list of elements and do not modify the individual elements in the list.

[0053] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, areas, layers and / or sections, these elements, components, areas, layers and / or sections should not be limited by these terms. These terms do not correspond to a specific order, position or advantage, and are only used to distinguish one element, component, component, area, region, layer, section or part from another element, component, component, area, region, layer, section or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first area, first layer or first section described below may be referred to as the second element, second component, second area, second layer or second section. The description of an element as a "first" element may not require or imply the presence of a second element or other element. The terms "first", "second", etc. may also be used herein to distinguish elements of different categories or sets. For the sake of simplicity, the terms "first", "second", etc. may respectively represent "first category (or first set)", "second category (or second set)", etc.

[0054] In the examples, the x-axis, y-axis, and / or z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction, and / or the third direction.

[0055] The terms used herein are for the purpose of describing the embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to include the plural forms as well, and the plural forms are intended to include the singular forms, unless the context clearly indicates otherwise. It will also be understood that the terms "comprises," "comprising," "have," "having," "includes," and "including," when used in this specification, specify the presence of stated features, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof.

[0056] As used herein, the terms "substantially", "about", "approximately" and similar terms are used as approximate terms and not as terms of degree, and are intended to allow for inherent deviations in measurements or calculations that will be recognized by those of ordinary skill in the art. For example, "substantially", a range of + / - 5% of the corresponding value may be included. As used herein, "about" or "approximately" includes the value and means within an acceptable deviation range of a particular value determined by those of ordinary skill in the art in view of the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value. In addition, when describing embodiments of the present disclosure, the use of "can" refers to "one or more embodiments of the present disclosure."

[0057] In some embodiments, known structures and devices can be described in the accompanying drawings for one or more functional blocks (e.g., block diagrams), units and / or modules to avoid unnecessary ambiguity in various embodiments. Those skilled in the art will understand that these blocks, units and / or modules are physically implemented by logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wire connectors and other electronic circuits. This can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Blocks, units and / or modules implemented by microprocessors or other similar hardware can be programmed and controlled using software to perform the various functions discussed herein, optionally, can be driven by firmware and / or software. In addition, each block, unit and / or module can be implemented by dedicated hardware, or a combination of dedicated hardware that performs certain functions and a processor (e.g., one or more programmed microprocessors and related circuits) that performs functions different from those of the dedicated hardware. In addition, in some embodiments, without departing from the scope of this disclosure, blocks, units and / or modules can be physically divided into two or more interactive discrete blocks, units and / or modules. Furthermore, in some embodiments, blocks, units and / or modules may be physically combined into more complex blocks, units and / or modules without departing from the scope of the present disclosure.

[0058] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0059] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0060] Figure 1 is a perspective view of a display device according to one or more embodiments of the present disclosure.

[0061] refer to Figure 1 , the display device DD according to one or more embodiments of the present disclosure may have a rectangular shape having long sides extending in a first direction DR1 and short sides extending in a second direction DR2 intersecting the first direction DR1. However, the present disclosure is not limited thereto, and the display device DD may have various shapes such as a circle or a polygon. Hereinafter, a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 is defined as a third direction DR3. In this specification, "when viewed on a plane" or "in a plan view" is defined as a state viewed in the third direction DR3.

[0062] An upper surface of the display device DD may be defined as a display surface DS and may have a plane defined by a first direction DR1 and a second direction DR2. An image IM generated by the display device DD may be provided to a user through the display surface DS.

[0063] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA displays an image, and the non-display area NDA does not display an image. The non-display area NDA may surround the display area DA, but the present disclosure is not limited thereto, and the non-display area NDA may not be located on one side of the display area DA.

[0064] Figure 2 Shown Figure 1 A cross section of a display device is shown in FIG.

[0065] refer to Figure 2 The display device DD may include a display panel DP, an input sensor IS, an anti-reflection layer RPL, a window WIN, a panel protection film PPF, and first and second adhesive layers AL1 and AL2. In one or more embodiments of the present disclosure, the input sensor IS may be omitted.

[0066] The display panel DP according to one or more embodiments of the present disclosure may be a light-emitting display panel, but is not limited thereto. For example, the display panel DP may be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of an inorganic light-emitting display panel may include quantum dots, quantum rods, etc. Hereinafter, the display panel DP will be described as an organic light-emitting display panel.

[0067] The input sensor IS may be located on the display panel DP (as used herein, "on" or "located on" may mean "above"). In one or more embodiments, the input sensor IS may include a plurality of sensors for sensing external input in a capacitive manner. When manufacturing the display device DD, the input sensor IS may be formed directly on the display panel DP, but the present disclosure is not limited thereto. The input sensor IS may be manufactured separately from the display panel DP and then attached to the display panel DP via an adhesive layer.

[0068] The anti-reflection layer RPL may be located on the input sensor IS. When the display device DD is manufactured, the anti-reflection layer RPL may be directly formed on the input sensor IS. The anti-reflection layer RPL may include a color filter and may further include a black matrix.

[0069] However, the present disclosure is not limited thereto, and the anti-reflection layer RPL may be manufactured separately and then attached to the input sensor IS via an adhesive layer. The anti-reflection layer RPL may include an optical film such as a polarizing film. The anti-reflection layer RPL may reduce the reflectivity of external light incident from the top of the display device DD toward the display panel DP. The anti-reflection layer RPL may reduce or prevent the external light from being viewed by the user.

[0070] The window WIN may be located on the anti-reflection layer RPL. The window WIN may protect the display panel DP, the input sensor IS, and the anti-reflection layer RPL from external scratches and impacts.

[0071] The panel protection film PPF may be located under the display panel DP. The panel protection film PPF may protect the lower surface of the display panel DP. The panel protection film PPF may include a flexible plastic material such as polyethylene terephthalate (PET).

[0072] Figure 3 It shows Figure 2 FIG. 4 is a diagram of a cross section of a display panel shown in FIG.

[0073] refer to Figure 3 The display panel DP may include a base layer SUB, a circuit element layer DP-CL located on the base layer SUB, a display element layer DP-OLED located on the circuit element layer DP-CL, and an encapsulation layer TFE located on the display element layer DP-OLED (as used herein, "on" may mean "above").

[0074] and Figure 1 Similar to the display device DD in FIG, the base layer SUB may include a display area DA and (eg, in a plan view) a non-display area NDA surrounding the display area DA. The base layer SUB may include a flexible plastic material such as polyimide (PI) or glass.

[0075] The circuit element layer DP-CL may include a driver for the light-emitting element and a driver for the optical sensing element. The display element layer DP-OLED may include a light-emitting element and an optical sensing element. An encapsulation layer TFE may be located on the circuit element layer DP-CL to cover the display element layer DP-OLED. The encapsulation layer TFE may protect the pixels from moisture, oxygen, and external foreign matter.

[0076] Figure 4 is a block diagram of a display device according to one or more embodiments of the present disclosure.

[0077] refer to Figure 4The display device DD includes a display panel DP, a drive controller 100, and a driver for the display device DD. In one or more embodiments of the present disclosure, the driver for the display device DD includes a data driver 200, a scan driver 300, a light emitting driver 350, a voltage generator 400, and a readout circuit 500. In one or more embodiments of the present disclosure, the voltage generator 400 and the readout circuit 500 can be implemented as a single driver chip with the drive controller 100.

[0078] The display panel DP may include a plurality of pixels PX located in the display area DA and a plurality of optical sensors SN located in the display area DA. In one or more embodiments of the present disclosure, the plurality of optical sensors SN may be located between two adjacent pixels PX, respectively. However, the arrangement relationship between the optical sensors SN and the pixels PX is not limited thereto.

[0079] The display panel DP may include initialization scan lines GI1 to GIn, compensation scan lines GC1 to GCn, bias scan lines GB1 to GBn, write scan lines GW1 to GWn, emission control lines EML1 to EMLn, reset scan lines GR1 to GRn, data lines DL1 to DLm, and readout lines RL1 to RLh. The initialization scan lines GI1 to GIn, compensation scan lines GC1 to GCn, bias scan lines GB1 to GBn, write scan lines GW1 to GWn, emission control lines EML1 to EMLn, and reset scan lines GR1 to GRn extend in a second direction DR2. The data lines DL1 to DLm and readout lines RL1 to RLh extend in a first direction DR1.

[0080] The plurality of pixels PX are electrically connected to initialization scan lines GI1 to GIn, compensation scan lines GC1 to GCn, write scan lines GW1 to GWn, bias scan lines GB1 to GBn, emission control lines EML1 to EMLn, and data lines DL1 to DLm. The number of signal lines connected to each of the pixels PX is not limited and may vary in different embodiments.

[0081] The plurality of optical sensors SN are electrically connected to write scan lines GW1 to GWn, reset scan lines GR1 to GRn, and readout lines RL1 to RLh. The number of signal lines connected to each of the plurality of optical sensors SN is not limited and may differ in different embodiments.

[0082] The driving controller 100 receives the image signal RGB and the control signal CTRL. The driving controller 100 generates an image data signal DATA for converting the data format of the image signal RGB to meet the interface specification with the data driver 200. The driving controller 100 outputs a first control signal DCS, a second control signal SCS, a third control signal ECS, and a fourth control signal RCS.

[0083] The data driver 200 receives a first control signal DCS and an image data signal DATA from the drive controller 100. The data driver 200 converts the image data signal DATA into a data signal and outputs the data signal to a plurality of data lines DL1 to DLm to be described later. The data signal is an analog voltage corresponding to the grayscale value of the image data signal DATA.

[0084] The scan driver 300 receives a second control signal SCS from the drive controller 100. In response to the second control signal SCS, the scan driver 300 outputs an initialization scan signal to the initialization scan lines GI1 to GIn and a compensation scan signal to the compensation scan lines GC1 to GCn. Furthermore, in response to the second control signal SCS, the scan driver 300 may output a write scan signal to the write scan lines GW1 to GWn and a black scan signal to the bias scan lines GB1 to GBn. Furthermore, in response to the second control signal SCS, the scan driver 300 may output a reset scan signal to the reset scan lines GR1 to GRn.

[0085] The light emitting driver 350 receives a third control signal ECS from the driving controller 100. In response to the third control signal ECS, the light emitting driver 350 may output a light emitting control signal to the light emitting control lines EML1 to EMLn. Alternatively, the scan driver 300 may be connected to the light emitting control lines EML1 to EMLn. In this case, the light emitting driver 350 may be omitted, and the scan driver 300 may output a light emitting control signal to the light emitting control lines EML1 to EMLn (e.g., in response to the third control signal ECS).

[0086] The readout circuit 500 receives a fourth control signal RCS from the drive controller 100. In response to the fourth control signal RCS, the readout circuit 500 may receive a sensing signal S_FS from the readout lines RL1 to RLh. The readout circuit 500 may process the sensing signal S_FS received from the readout lines RL1 to RLh and provide the processed sensing signal S_FS to the drive controller 100. The drive controller 100 may recognize biometric information based on the sensing signal S_FS.

[0087] The voltage generator 400 generates voltages suitable for operating the display panel DP and can generate a first driving voltage ELVDD, a second driving voltage ELVSS having a lower level than the first driving voltage ELVDD, a first initialization voltage VINT, a second initialization voltage AINT, a reset voltage VRST, and a bias voltage VBIAS.

[0088] Figure 5 It shows Figure 4 is a diagram of an equivalent circuit of any one pixel PXij among the pixels PX shown in and an optical sensor SNij adjacent to the any one pixel PXij.

[0089] Figure 5 1 shows a pixel PXij connected to the i-th scan line SLi, the i-th emission line ELi and the j-th data line DLj. Figure 5 An optical sensor SNij connected to an i-th reset scan line GRi and a j-th readout line RXj is shown, where i and j are natural numbers greater than 0. The i-th scan line SLi may include an i-th initialization scan line GIi, an i-th compensation scan line GCi, an i-th bias scan line GBi, and an i-th write scan line GWi.

[0090] refer to Figure 5 , the pixel PXij may include a pixel driver PC (or a first driver) and a light emitting element OLED electrically connected to the pixel driver PC. The light emitting element OLED can be turned on or off by controlling the pixel driver PC.

[0091] The pixel driver PC may include a plurality of transistors T1, T2, T3, T4, T5, T6, T7, and T8 and a capacitor CST. The transistors T1, T2, T3, T4, T5, T6, T7, and T8 and the capacitor CST may control the amount of current flowing through the light-emitting element OLED. The light-emitting element OLED may generate light (e.g., light having a predetermined brightness) according to the amount of current supplied thereto.

[0092] The i-th write scan line GWi may receive the i-th write scan signal GWSi, and the i-th compensation scan line GCi may receive the i-th compensation scan signal GCSi. The i-th initialization scan line GIi may receive the i-th initialization scan signal GISi, and the i-th bias scan line GBi may receive the i-th bias scan signal GBSi. The i-th reset scan line GRi may receive the i-th reset scan signal GRSi. The i-th emission line ELi may receive the i-th emission signal ESi.

[0093] A first initialization line VIL1 may receive a first initialization voltage VINT, and a second initialization line VIL2 may receive a second initialization voltage AINT. A bias line VBL may receive a bias voltage VBIAS. A first power line PL1 may receive a first drive voltage ELVDD, and a second power line PL2 may receive a second drive voltage ELVSS. A light-emitting element OLED may be connected to the second power line PL2. A reset line VRL may receive a reset voltage VRST.

[0094] Transistors T1, T2, T3, T4, T5, T6, T7, and T8 may each include a source (or source terminal), a drain (or drain terminal), and a gate (or gate terminal). Hereinafter, for convenience, any one of the source and the drain is defined as a first electrode, and the other of the source and the drain is defined as a second electrode. Furthermore, the gate is defined as a gate electrode or a control electrode.

[0095] The first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 may be PMOS transistors, and the third transistor T3 and the fourth transistor T4 may be NMOS transistors.

[0096] The first transistor T1 can be defined as a driving transistor, and the second transistor T2 can be defined as a switching transistor. The third transistor T3 can be defined as a compensation transistor. The fourth transistor T4 and the seventh transistor T7 can be defined as initialization transistors. The fifth transistor T5 and the sixth transistor T6 can be defined as light emission control transistors. The eighth transistor T8 can be defined as a bias transistor.

[0097] The light-emitting element OLED may include an organic light-emitting diode. The light-emitting element OLED may include a first electrode, a second electrode, and a light-emitting layer located between the first and second electrodes. For ease of description, the first electrode is described as an anode AE, and the second electrode is described as a cathode CE. The anode AE ​​may be electrically connected to the first power line PL1 via the sixth transistor T6, the first transistor T1, and the fifth transistor T5. The cathode CE may be electrically connected to the second power line PL2.

[0098] The first transistor T1 may be located between the fifth transistor T5 and the sixth transistor T6 to be connected to the fifth transistor T5 and the sixth transistor T6. The first transistor T1 may be connected to the first power line PL1 via the fifth transistor T5 and to the anode AE ​​via the sixth transistor T6. The first transistor T1 may include a first electrode connected to the first power line PL1 via the fifth transistor T5, a second electrode connected to the anode AE ​​via the sixth transistor T6, and a gate electrode connected to the first node N1. The first electrode of the first transistor T1 may be connected to the fifth transistor T5, and the second electrode of the first transistor T1 may be connected to the sixth transistor T6. The first transistor T1 may control the amount of current flowing through the light-emitting element OLED based on the voltage of the first node N1 applied to the gate electrode of the first transistor T1.

[0099] The second transistor T2 may be located between the first transistor T1 and the j-th data line DLj to be connected to the first transistor T1 and to the j-th data line DLj. The second transistor T2 may include a first electrode connected to the j-th data line DLj, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the i-th write scan line GWi. The second transistor T2 may be turned on by the i-th write scan signal GWSi applied via the i-th write scan line GWi to electrically connect the j-th data line DLj and the first electrode of the first transistor T1. The second transistor T2 may perform a switching operation to supply a data voltage VD from the j-th data line DLj to the first electrode of the first transistor T1.

[0100] The third transistor T3 may be connected to the second electrode of the first transistor T1 and the first node N1. The third transistor T3 may include a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the first node N1, and a gate electrode connected to the i-th compensation scan line GCi. The third transistor T3 may be turned on by the i-th compensation scan signal GCSi applied via the i-th compensation scan line GCi to electrically connect the second electrode of the first transistor T1 and the gate electrode of the first transistor T1. When the third transistor T3 is turned on, the first transistor T1 and the third transistor T3 may be connected in a diode manner.

[0101] The fourth transistor T4 may be connected to the first node N1. The fourth transistor T4 may include a first electrode connected to the first node N1, a second electrode connected to the first initialization line VIL1, and a gate electrode connected to the i-th initialization scan line GIi. The fourth transistor T4 may be turned on by the i-th initialization scan signal GISi applied through the i-th initialization scan line GIi to supply the first initialization voltage VINT from the first initialization line VIL1 to the first node N1.

[0102] The fifth transistor T5 may include a first electrode connected to the first power line PL1, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the i-th light-emitting line ELi. The sixth transistor T6 may include a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the anode AE, and a gate electrode connected to the i-th light-emitting line ELi. The fifth and sixth transistors T5 and T6 may be turned on by the i-th light-emitting signal ESi applied via the i-th light-emitting line ELi. The first drive voltage ELVDD may be provided to the light-emitting element OLED via the turned-on fifth and sixth transistors T5 and T6, allowing a drive current to flow through the light-emitting element OLED. As a result, the light-emitting element OLED may emit light.

[0103] The seventh transistor T7 may include a first electrode connected to the anode AE, a second electrode connected to the second initialization line VIL2, and a gate electrode connected to the i-th bias scan line GBi. The seventh transistor T7 may be turned on by the i-th bias scan signal GBSi applied through the i-th bias scan line GBi to supply the second initialization voltage AINT from the second initialization line VIL2 to the anode AE ​​of the light-emitting element OLED.

[0104] In one or more embodiments of the present disclosure, the seventh transistor T7 may be omitted. In one or more embodiments of the present disclosure, the second initialization voltage AINT may have a different level from the first initialization voltage VINT. However, the present disclosure is not limited thereto, and the second initialization voltage AINT may have the same level as the first initialization voltage VINT.

[0105] The seventh transistor T7 can improve the black expression capability of the pixel PXij. When the seventh transistor T7 is turned on, the parasitic capacitor of the light-emitting element OLED can be discharged. Therefore, when performing black brightness, the light-emitting element OLED may not emit light due to the leakage current of the first transistor T1, thereby improving the black expression capability.

[0106] Capacitor CST may include a first electrode connected to first power line PL1 and a second electrode connected to first node N1. When fifth and sixth transistors T5 and T6 are turned on, an amount of current flowing through first transistor T1 may be determined by a voltage stored in capacitor CST.

[0107] The eighth transistor T8 may include a first electrode connected to the bias line VBL, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the i-th bias scan line GBi. In one or more embodiments of the present disclosure, the eighth transistor T8 may be omitted. The eighth transistor T8 may be turned on by the i-th bias scan signal GBSi and may provide the bias voltage VBIAS to the first electrode of the first transistor T1. Since the bias voltage VBIAS is applied to the first transistor T1, the hysteresis curve of the first transistor T1 may be suppressed from shifting.

[0108] The optical sensor SNij may include a sensor driver SNC (or a second driver) and an optical sensing element LRE electrically connected to the sensor driver SNC. The sensor driver SNC may detect an operation of the optical sensing element LRE.

[0109] The sensor driver SNC may include a first sensing transistor T1 ′, a second sensing transistor T2 ′, and a third sensing transistor T3 ′. The first sensing transistor T1 ′ and the third sensing transistor T3 ′ may be PMOS transistors, and the second sensing transistor T2 ′ may be an NMOS transistor.

[0110] The optical sensing element LRE may be defined as a photodiode. The optical sensing element LRE may convert light energy incident from the outside into electrical energy. The optical sensing element LRE may include a first electrode, a second electrode, and a photoelectric conversion layer located between the first electrode and the second electrode.

[0111] For ease of description, the first electrode is described as the anode AE', and the second electrode is described as the cathode CE'. The anode AE' may be connected to the second node N2, and the cathode CE' may be connected to the second power line PL2. Meanwhile, to distinguish the anode AE ​​and cathode CE of the light-emitting element OLED from the anode AE' and cathode CE' of the optical sensing element LRE, the anode AE ​​and cathode CE of the light-emitting element OLED may be defined as the first electrode and the second electrode, respectively, and the anode AE' and cathode CE' of the optical sensing element LRE may be defined as the 1-1 electrode and the 2-1 electrode, respectively.

[0112] The first sensing transistor T1' may be connected to the optical sensing element LRE, the second sensing transistor T2', and the third sensing transistor T3'. The first sensing transistor T1' may include a first electrode receiving the second initialization voltage AINT, a gate electrode connected to the second node N2, and a second electrode connected to the third sensing transistor T3'. The first electrode of the first sensing transistor T1' may be connected to the second initialization line VIL2 to receive the second initialization voltage AINT.

[0113] The second sensing transistor T2 ′ may include a first electrode connected to the second node N2 , a gate electrode connected to the i-th reset scan line GRi, and a second electrode connected to the reset line VRL.

[0114] The third sensing transistor T3' may include a first electrode connected to the second electrode of the first sensing transistor T1', a gate electrode connected to the i-th write scan line GWi, and a second electrode connected to the readout line RXj. The third sensing transistor T3' may be turned on by the i-th write scan signal GWSi received through the i-th write scan line GWi.

[0115] The second sensing transistor T2' may be turned on by the i-th reset scan signal GRSi received through the i-th reset scan line GRi. The turned-on second sensing transistor T2' may provide a reset voltage VRST to the second node N2. The second node N2 may be reset by the reset voltage VRST.

[0116] The i-th write scan signal GWSi may be applied to the gate electrode of the third sensing transistor T3 ′ to turn on the third sensing transistor T3 ′. The first sensing transistor T1 ′ may be connected to the readout line RXj by turning on the third sensing transistor T3 ′.

[0117] The optical sensing element LRE can receive light and convert it into an electrical signal, thereby changing the voltage of the second node N2. When the first sensing transistor T1' is turned on, the second initialization voltage AINT supplied to the first sensing transistor T1' can be controlled based on the voltage change at the second node N2 and supplied to the readout line RXj via the third sensing transistor T3'. Therefore, the signal detected by the optical sensing element LRE can be output as a sense signal RS via the readout line RXj.

[0118] Figure 6 It shows Figure 5 FIG. 4 is a diagram showing a cross section of a light emitting element OLED, a first transistor T1, a fourth transistor T4 and a sixth transistor T6 of a pixel PXij shown in FIG.

[0119] Figure 6 Shown Figure 5 The first transistor T1, the fourth transistor T4 and the sixth transistor T6 of the pixel driver PC in FIG. Figure 6 The shielding layer BML may be located on the base layer SUB. The shielding layer BML may overlap with the first transistor T1. The shielding layer BML may include metal, and a constant voltage may be applied to the shielding layer BML. When the constant voltage is applied to the shielding layer BML, the threshold voltage value of the first transistor T1 located on the shielding layer BML may be maintained without any change.

[0120] In addition, the shielding layer BML can block light incident on the first transistor T1 from a lower portion or below the shielding layer BML. For example, the shielding layer BML can include a reflective metal. In one or more embodiments of the present disclosure, the shielding layer BML can be omitted.

[0121] The buffer layer BFL may be located on the base layer SUB and may include an inorganic layer. The buffer layer BFL may cover the shield layer BML. The semiconductor layer SCP1 (or semiconductor pattern region, hereinafter referred to as the first semiconductor layer) of the first transistor T1 and the semiconductor layer SCP6 (or semiconductor pattern region, hereinafter referred to as the sixth semiconductor layer) of the sixth transistor T6 may be located on the buffer layer BFL. Hereinafter, the first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 may include polycrystalline silicon. However, the present disclosure is not limited thereto, and the first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 may include amorphous silicon.

[0122] The first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 can be formed by the same process, and a portion of each of the first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 can be doped with an N-type dopant or a P-type dopant. The first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 can include a high-doped region and a low-doped region. The high-doped region has a higher conductivity than the low-doped region. The high-doped region can substantially correspond to the source region and the drain region of the first transistor T1 and the sixth transistor T6. The low-doped region can substantially correspond to the active region (or channel region) of each of the first transistor T1 and the sixth transistor T6.

[0123] The highly doped region of the first semiconductor layer SCP1 may include a first source region S1 and a first drain region D1. The lowly doped region of the first semiconductor layer SCP1 is defined as a first channel region A1 and is located between the first source region S1 and the first drain region D1. The sixth semiconductor layer SCP6 may include a sixth source region S6, a sixth channel region A6, and a sixth drain region D6.

[0124] The first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 are Figure 6 In other words, the first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 may be different parts or different regions of one semiconductor pattern.

[0125] A first insulating layer INS1 covering the first semiconductor layer SCP1 and the sixth semiconductor layer SCP6 may be located on the buffer layer BFL. Gate electrodes of the first transistor T1 and the sixth transistor T6 are located on the first insulating layer INS1. The gate electrodes of the first transistor T1 and the sixth transistor T6 may be formed using the same process. Hereinafter, the gate electrode of the first transistor T1 is referred to as the first gate electrode G1, and the gate electrode of the sixth transistor T6 is referred to as the sixth gate electrode G6.

[0126] A second insulating layer INS2 may be located on the first insulating layer INS1 to cover the first gate electrode G1 and the sixth gate electrode G6. A dummy electrode DME may be located on the second insulating layer INS2. The dummy electrode DME may be located on the first gate electrode G1 and may overlap with the first gate electrode G1 when viewed in a planar manner. The dummy electrode DME and the first gate electrode G1 may form the capacitor CST described above. In other words, the first gate electrode G1 corresponds to one electrode of the capacitor CST, and the dummy electrode DME corresponds to the other electrode of the capacitor CST.

[0127] A third insulating layer INS3 may be located on the second insulating layer INS2 to cover the dummy electrode DME. A semiconductor layer SCP4 (or a semiconductor pattern region, hereinafter referred to as a fourth semiconductor layer) of the fourth transistor T4 may be located on the third insulating layer INS3. The fourth semiconductor layer SCP4 may include an oxide semiconductor including a metal oxide. The oxide semiconductor may include a crystalline oxide semiconductor or an amorphous oxide semiconductor.

[0128] The fourth semiconductor layer SCP4 may include a plurality of regions divided according to whether the metal oxide is reduced. The region where the metal oxide is reduced (hereinafter referred to as the reduction region) has a stronger conductive property than the region where the metal oxide is not reduced (hereinafter referred to as the non-reduction region). The reduction region may substantially correspond to the source region and the drain region of the fourth transistor T4. The non-reduction region may substantially correspond to the active region (or channel region) of the fourth transistor T4.

[0129] The reduction region of the fourth semiconductor layer SCP4 may include a fourth source region S4 and a fourth drain region D4. A fourth channel region A4 may be located between the fourth source region S4 and the fourth drain region D4.

[0130] A fourth insulating layer INS4 may be located on the third insulating layer INS3 to cover the fourth semiconductor layer SCP4 . A fourth gate electrode G4 of the fourth transistor T4 may be located on the fourth insulating layer INS4 .

[0131] The fifth insulating layer INS5 may be on the fourth insulating layer INS4 to cover the fourth gate electrode G4. The buffer layer BFL and the first, second, third, fourth, and fifth insulating layers INS1, INS2, INS3, INS4, and INS5 may include an inorganic layer.

[0132] The connection electrode CNE may be located between the sixth transistor T6 and the light emitting element OLED. The connection electrode CNE may electrically connect the sixth transistor T6 and the light emitting element OLED. The connection electrode CNE may include a first connection electrode CNE1 and a second connection electrode CNE2 located on the first connection electrode CNE1.

[0133] The first connection electrode CNE1 may be located on the fifth insulating layer INS5 and may be connected to the sixth drain region D6 via a first contact hole CH1. The first contact hole CH1 may be defined in the first insulating layer INS1, the second insulating layer INS2, the third insulating layer INS3, the fourth insulating layer INS4, and the fifth insulating layer INS5. The sixth insulating layer INS6 may be located on the fifth insulating layer INS5 to cover the first connection electrode CNE1. The second connection electrode CNE2 may be located on the sixth insulating layer INS6. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 via a second contact hole CH2 defined in the sixth insulating layer INS6. The seventh insulating layer INS7 may be located on the sixth insulating layer INS6 to cover the second connection electrode CNE2. The sixth insulating layer INS6 and the seventh insulating layer INS7 may include inorganic layers or organic layers.

[0134] The light emitting element OLED is located on the seventh insulating layer INS7. The light emitting element OLED may include a first electrode AE, a second electrode CE, a hole control layer HCL, an electron control layer ECL and a light emitting layer EML. The first electrode AE ​​may be Figure 5 The anode AE ​​shown in FIG, and the second electrode CE may be Figure 5 The cathode CE shown in FIG. The second electrode CE may be located on / over the first electrode AE. The hole control layer HCL and the electron control layer ECL may be located between the first electrode AE ​​and the second electrode CE. The light-emitting layer EML may be located between the hole control layer HCL and the electron control layer ECL.

[0135] The display area DA may include a light emitting area LEA corresponding to the light emitting element OLED and a non-light emitting area NLEA adjacent to the light emitting area LEA. The first electrode AE ​​may be located on the seventh insulating layer INS7. The first electrode AE ​​may be electrically connected to the second connection electrode CNE2 through a third contact hole CH3 defined in the seventh insulating layer INS7.

[0136] A pixel defining layer PDL for exposing a portion (e.g., a predetermined portion) of the first electrode AE ​​may be located on the first electrode AE ​​and the seventh insulating layer INS7. A light emitting opening PDL-OP1 for exposing a portion of the first electrode AE ​​may be defined in or by the pixel defining layer PDL. The light emitting area LEA corresponds to the light emitting opening PDL-OP1.

[0137] The hole control layer HCL may be located on the first electrode AE ​​and the pixel definition layer PDL. The hole control layer HCL is generally located in the emission area LEA and the non-emission area NLEA. The hole control layer HCL may include a hole transport layer and a hole injection layer.

[0138] The light-emitting layer EML may be located on the hole control layer HCL. The light-emitting layer EML may be located in a region corresponding to the light-emitting opening PDL-OP1. The light-emitting layer EML may include an organic material and / or an inorganic material. The light-emitting layer EML may generate light of any one color, for example, red, green, and blue.

[0139] The electron control layer ECL may be located on the light emitting layer EML and the hole control layer HCL. The electron control layer ECL may be located in common in the light emitting area LEA and the non-light emitting area NLEA. The electron control layer ECL may include an electron transport layer and an electron injection layer.

[0140] The second electrode CE may be located on the electronic control layer ECL. The second electrode CE is generally located in the pixel PX. That is, the second electrode CE may be a common layer having an integral shape and may be commonly located on the light emitting layer EML of the pixel PX.

[0141] The layers from the buffer layer BFL to the seventh insulating layer INS7 may be defined as a circuit element layer DP-CL. The layer in which the light emitting element OLED is located may be defined as a display element layer DP-OLED.

[0142] The encapsulation layer TFE may be located on the light-emitting element OLED. The encapsulation layer TFE may include an inorganic layer, an organic layer, and an inorganic layer stacked sequentially. The inorganic layers may each include an inorganic material and may protect the pixel from moisture / oxygen. The organic layer may include an organic material and may protect the pixel PX from foreign matter such as dust particles.

[0143] The encapsulation layer TFE may include an inorganic layer and an organic layer located between the inorganic layers. The inorganic layer may reduce or prevent external moisture or oxygen from penetrating into the light emitting layer EML and the photoelectric conversion layer OPD (see Figure 7 For example, the inorganic layer may include silicon nitride, silicon oxide, or a combination thereof. The inorganic layer may be formed by a deposition process.

[0144] The organic layer can provide or allow for a substantially flat surface. Curves formed on the upper surface of an inorganic layer located below the organic layer, or particles present on the inorganic layer located below the organic layer, can be covered by the organic layer, thereby blocking the surface state of the upper surface of the inorganic layer located below the organic layer from affecting the configuration formed on the organic layer. The organic layer can include an organic material and can be formed using a solution process such as spin coating, slit coating, or inkjet process.

[0145] Figure 7 It shows Figure 5 FIG. 1 is a diagram showing a cross section of an optical sensing element LRE, a first sensing transistor T1′ and a second sensing transistor T2′ of an optical sensor SNij shown in FIG. Figure 6 The detailed description of the configuration is the same as the configuration described in Figure 6 Description in .

[0146] The semiconductor layer SCP1' of the first sensing transistor T1' (hereinafter referred to as the first sensing semiconductor layer) may be connected to Figure 6 The first semiconductor layer SCP1 in the second sensing transistor T2' is formed by the same process. The semiconductor layer SCP2' of the second sensing transistor T2' (hereinafter referred to as the second sensing semiconductor layer) can be Figure 6 The fourth semiconductor layer SCP4 is formed by the same process. The first sensing semiconductor layer SCP1' may include a first source region S1', a first drain region D1', and a first channel region A1'. The second sensing semiconductor layer SCP2' may include a second source region S2', a second drain region D2', and a second channel region A2'.

[0147] The stack structure of the first sensing transistor T1' can be substantially the same as Figure 6 The stack structure of the first transistor T1 shown in FIG is the same as that of the second sensing transistor T2′. Figure 6 The stack structure of the fourth transistor T4 shown in FIG is the same. In one or more embodiments, the stack structure of the third sensing transistor T3 ′ may be substantially the same as the stack structure of the first sensing transistor T1 ′.

[0148] The connection electrode CNE' may include a first connection electrode CNE1' (or a first sensing connection electrode) and a second connection electrode CNE2' (or a second sensing connection electrode). The first connection electrode CNE1' may be connected to Figure 6 The first connection electrode CNE1 shown in FIG is located on the same layer and can be connected to the first gate electrode G1′ of the first sensing transistor T1′ through the first contact hole CH1′. Hereinafter, the first gate electrode G1′ is defined as a first sensing gate electrode G1′ to distinguish it from the first gate electrode G1 described above.

[0149] The second connection electrode CNE2′ can be connected to Figure 6 The second connection electrode CNE2 shown in FIG. 1 is located on the same layer and may be connected to the first connection electrode CNE1 ′ through a second contact hole CH2 ′ defined in the sixth insulating layer INS6 .

[0150] refer to Figure 7 , the display area DA may include a light absorption area LRA corresponding to the optical sensor SNij and a non-light emitting area NLEA adjacent to the light absorption area LRA. The non-light emitting area NLEA may be Figure 6 The non-luminous area NLEA shown in .

[0151] The optical sensing element LRE may include a first electrode AE', a second electrode CE', a hole control layer HCL', an electron control layer ECL' and a photoelectric conversion layer OPD. The first electrode AE' may be Figure 5 The anode AE' shown in FIG, and the second electrode CE' may be Figure 5 The cathode CE' shown in FIG. A sensing opening PDL-OP2 for exposing a portion (e.g., a predetermined portion) of the first electrode AE' may be defined in the pixel defining layer PDL. The light absorption area LRA corresponds to the sensing opening PDL-OP2. The first electrode AE' may be connected to the second connection electrode CNE2' through a third contact hole CH3' defined in the seventh insulating layer INS7.

[0152] The first electrode AE' and Figure 6 The first electrode AE ​​shown in FIG is formed by the same process. The second electrode CE', the hole control layer HCL' and the electron control layer ECL' may have respective Figure 6 The second electrode CE, the hole control layer HCL and the electron control layer ECL shown in FIG are integrated into one shape. Figure 7 The second electrode CE' and Figure 6 The second electrode CE in the embodiment may be a different region of the common layer. The common layer may be deposited through an open mask to have an integral shape. Figure 7 The hole control layer HCL' and Figure 6 The hole control layer HCL in the embodiment may also be different regions of a common hole control layer, and Figure 7 The electronic control layer ECL' and Figure 6 The electron control layers ECL in may also be different regions of a common electron control layer.

[0153] Figure 8A is a diagram illustrating an arrangement state of light emitting openings and sensing openings on a plane according to one or more embodiments of the present disclosure. Figure 8B yes Figure 8A Magnified view of a cell area shown in . Figure 8C yes Figure 8A Magnified view of a cell area shown in . Figure 8D It is along Figure 8C A cross-sectional view taken along line II'. Figure 8E It is along Figure 8C A cross-sectional view taken along line II'.

[0154] For ease of description, the light emitting element OLED (see Figure 6 ) in each of the first electrodes AE configured (see Figure 6 ) and included in the optical sensing element LRE (see Figure 7 ) in each of the first electrodes AE' (see Figure 7 ) is shown as a dotted line. The first electrode AE ​​shown as a dotted line may be referred to as a “light emitting element”, and the first electrode AE′ may be referred to as a “sensing element”.

[0155] refer to Figure 8A According to one or more embodiments, a display device DD may include unit elements UE located in a display area DA. The unit elements UE may be arranged in a constant pattern in the display area DA. For example, a first column of unit elements U-1 and a second column of unit elements U-2 may each include unit elements UE arranged in a first direction DR1. The second column of unit elements U-2 may be shifted from the first column of unit elements U-1 along a first diagonal direction GDR1.

[0156] The unit elements UE may each include a first light emitting element O-E1, a second light emitting element O-E2, a 3-1st light emitting element O-E31, a 3-2nd light emitting element O-E32, a first optical sensing element LE1, and a second optical sensing element LE2.

[0157] The first light-emitting element O-E1 may provide light of a first color, the second light-emitting element O-E2 may provide light of a second color, and the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 may provide light of a third color. The first color of light may be blue, the second color of light may be red, and the third color of light may be green. However, the present disclosure is not limited thereto, and the first to third colors of light may be changed to other colors of light.

[0158] The sum of the number of first sensing elements L-E1 and second sensing elements L-E2 included in one unit element UE may be the same as the sum of the number of the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 providing light of the third color. That is, when n light-emitting elements providing light of the third color are located in one unit element UE, n sensing elements may also be located in the one unit element UE (for example, n may be equal to 2).

[0159] Each of the first light emitting element O-E1, the second light emitting element O-E2, the 3-1st light emitting element O-E31, and the 3-2nd light emitting element O-E32 may include Figure 5 The pixel driver PC described in Figure 6 Each of the first optical sensing element L-E1 and the second optical sensing element L-E2 may include Figure 5 The sensor driver SNC described in Figure 7 The optical sensing element LRE described in.

[0160] The first light-emitting element O-E1 and the second light-emitting element O-E2 may be spaced apart from each other along the first direction DR1. The 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 may be spaced apart from each other along the second direction DR2, with the first optical sensing element LE1 between the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32. The 3-1st light-emitting element O-E31 may be spaced apart from the first light-emitting element O-E1 along the second diagonal direction GDR2, and the 3-2nd light-emitting element O-E32 may be spaced apart from the first light-emitting element O-E1 along the first diagonal direction GDR1. The first optical sensing element LE1 may be spaced apart from the second optical sensing element LE2 along the first direction DR1, with the second light-emitting element O-E2 between the first optical sensing element LE1 and the second optical sensing element LE2.

[0161] The unit opening U-OP may be defined in the pixel definition layer PDL (see Figure 6 and Figure 7 ). One unit opening U-OP may correspond to one unit element UE. The unit openings U-OP may be arranged in a constant pattern in the display area DA.

[0162] Each of the unit openings U-OP may include a first light emitting opening O-OP1, a second light emitting opening O-OP2, a 3-1st light emitting opening O-OP31, a 3-2nd light emitting opening O-OP32, a first sensing opening L-OP1, and a second sensing opening L-OP2.

[0163] The first light emitting opening O-OP1, the second light emitting opening O-OP2, the 3-1st light emitting opening O-OP31, and the 3-2nd light emitting opening O-OP32 may be Figure 6 The first sensing opening L-OP1 and the second sensing opening L-OP2 may correspond to the light emitting opening PDL-OP1 described in Figure 7 The sensing opening PDL-OP2 described in FIG.

[0164] The first light-emitting opening O-OP1 may overlap with the first light-emitting element O-E1, the second light-emitting opening O-OP2 may overlap with the second light-emitting element O-E2, the 3-1st light-emitting opening O-OP31 may overlap with the 3-1st light-emitting element O-E31, and the 3-2nd light-emitting opening O-OP32 may overlap with the 3-2nd light-emitting element O-E32. The first sensing opening L-OP1 may overlap with the first optical sensing element L-E1, and the second sensing opening L-OP2 may overlap with the second optical sensing element L-E2.

[0165] The first light emitting opening O-OP1 and the second light emitting opening O-OP2 may be spaced apart from each other along the first direction DR1. The 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32 may be spaced apart from each other along the second direction DR2, with the first sensing opening L-OP1 being between the 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32. The 3-1st light emitting opening O-OP31 may be spaced apart from the first light emitting opening O-OP1 along the second diagonal direction GDR2. The 3-2nd light emitting opening O-OP32 may be spaced apart from the first light emitting opening O-OP1 along the first diagonal direction GDR1. The first sensing opening L-OP1 may be spaced apart from the second sensing opening L-OP2 along the first direction DR1, with the second light emitting opening O-OP2 being between the first sensing opening L-OP1 and the second sensing opening L-OP2.

[0166] The first light emitting opening O-OP1 may have a hexagonal shape obtained by removing a first portion facing the first sensing opening L-OP1 in the first direction DR1 and a second portion point-symmetrical with the first portion from the imaginary rectangular shape V-OP1. For example, the first light emitting opening O-OP1 may have a hexagonal shape obtained by removing a first portion and a second portion extending along the second diagonal direction GDR2 of the imaginary rectangular shape V-OP1.

[0167] The second light emitting opening O-OP2 may have a hexagonal shape obtained by removing a first portion facing the first sensing opening L-OP1 in the first direction DR1 and a second portion that is point-symmetrical with the first portion and faces the second sensing opening L-OP2 in the first direction DR1 from the imaginary rectangular shape V-OP2. For example, the second light emitting opening O-OP2 may have a hexagonal shape by removing the first portion and the second portion extending along the second diagonal direction GDR2 of the imaginary rectangular shape V-OP2.

[0168] The 3-1st light emitting opening O-OP31 may have a hexagonal shape obtained by removing a first portion facing the first sensing opening L-OP1 in the second direction DR2 and a second portion point-symmetrical with the first portion from the imaginary rectangular shape V-OP31. For example, the 3-1st light emitting opening O-OP31 may have a hexagonal shape obtained by removing the first portion and the second portion extending along the first diagonal direction GDR1 of the imaginary rectangular shape V-OP31.

[0169] The 3-2nd light emitting opening O-OP32 may have a hexagonal shape obtained by removing a first portion facing the first sensing opening L-OP1 in the second direction DR2 and a second portion point-symmetrical with the first portion from the imaginary rectangular shape V-OP32. For example, the 3-2nd light emitting opening O-OP32 may have a hexagonal shape obtained by removing the first portion and the second portion extending along the second diagonal direction GDR2 of the imaginary rectangular shape V-OP32.

[0170] The 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32 may be line-symmetrical with respect to an imaginary extension line extending along the first direction DR1 and intersecting the center between the 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32. Therefore, the 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32 may have the same area (e.g., the same total area).

[0171] Each of the first and second sensing openings L-OP1 and L-OP2 may have a rectangular shape including short sides extending in the first direction DR1 and long sides extending in the second direction DR2 and having a length greater than the short sides. The first and second sensing openings L-OP1 and L-OP2 may have the same area.

[0172] The first and second sensing openings L-OP1 and L-OP2 included in each of the unit openings U-OP arranged along the first direction DR1 may be aligned along the first direction DR1.

[0173] In two unit openings U-OP positioned adjacent to each other along the second direction DR2 (or along the first diagonal direction GDR1 or along the second diagonal direction GDR2), the first sensing openings L-OP1 included in one unit opening U-OP and the second sensing openings L-OP2 included in the other unit opening U-OP may be alternately arranged along the second direction DR2 to have a zigzag form. That is, the first sensing openings L-OP1 and the second sensing openings L-OP2 arranged along the second direction DR2 and located in the same row may be alternately arranged along the second direction DR2 to have a zigzag form deviated in the first direction DR1.

[0174] refer to Figure 8B The first light-emitting opening O-OP1 may include a first side b1 facing the first sensing opening L-OP1 (for example, in the first direction DR1) and extending along the second direction DR2, and a second side b2 facing the 3-1st light-emitting opening O-OP31 (for example, in the second diagonal direction GDR2) and extending along the first diagonal direction GDR1.

[0175] The second light emitting opening O-OP2 may include a third side r1 facing the first sensing opening L-OP1 and extending along the second direction DR2 (for example, in the first direction DR1), and a fourth side r2 facing the 3-2nd light emitting opening O-OP32 and extending along the first diagonal direction GDR1 (for example, in the second diagonal direction GDR2).

[0176] The 3-1st light emitting opening O-OP31 may include a fifth side g1 facing the first sensing opening L-OP1 and extending along the first direction DR1, and a sixth side g2 facing the first light emitting opening O-OP1 and extending along the first diagonal direction GDR1.

[0177] The first sensing opening L- OP1 may include a long side L1 extending along the second direction DR2 , and a short side L2 extending along the first direction DR1 and having a length smaller than the long side L1 .

[0178] According to one or more embodiments, the first side b1 is longer than the fifth side g1. The sixth side g2 is longer than the fifth side g1. In addition, the ratio of the second side b2 to the first side b1 may be greater than the ratio of the fourth side r2 to the third side r1.

[0179] Reference again Figure 8AThe distance from one long side of the first sensing opening L-OP1 to the first light-emitting opening O-OP1 may be a first width d1, the distance from the other long side of the first sensing opening L-OP1 to the second light-emitting opening O-OP2 may be a second width d2, the distance from one short side of the first sensing opening L-OP1 to the 3-1st light-emitting opening O-OP31 may be a third width d3, and the distance from the other short side of the first sensing opening L-OP1 to the 3-2nd light-emitting opening O-OP32 may be a fourth width d4. The first width d1, the second width d2, the third width d3, and the fourth width d4 may be the same.

[0180] In addition, the distances (widths) between the long and short sides of the second sensing opening L- OP2 and the light emitting elements surrounding the long and short sides of the second sensing opening L- OP2 may also be the same.

[0181] The light emitting elements and the optical sensing elements for providing light of the third color in one unit element UE may be present in the same number, thereby increasing the number of optical sensing elements LRE (see Figure 7 ) resolution. In addition, the distance from the sensing opening to the light emitting opening surrounding the sensing opening can be the same, thereby stably ensuring the opening ratio of the light emitting opening. Therefore, a display device DD with increased light emitting efficiency can be provided.

[0182] refer to Figure 8C According to the embodiment, one unit element U-Ea may include a first light emitting element O-E1, a second light emitting element O-E2, a 3-1st light emitting element O-E31, a 3-2nd light emitting element O-E32, and an optical sensing element L-E1. The description of the first light emitting element O-E1, the second light emitting element O-E2, the 3-1st light emitting element O-E31, the 3-2nd light emitting element O-E32, and the optical sensing element L-E1 may be the same as that of Figures 5 to 7 The light emitting element and the optical sensing element described in correspondence. The unit element U-Ea can be set in multiple and can be arranged in a manner such as Figure 8A The constant rule described in is set in the display area DA.

[0183] One unit opening U-OPa may correspond to one unit element U-Ea. According to an embodiment, one unit opening U-OPa may include a first light emitting opening O-OP1, a second light emitting opening O-OP2, a 3-1st light emitting opening O-OP31, a 3-2nd light emitting opening O-OP32, a sensing opening L-OP, and a penetration opening N-OP.

[0184] The first light emitting opening O-OP1, the second light emitting opening O-OP2, the 3-1st light emitting opening O-OP31, and the 3-2nd light emitting opening O-OP32 may be Figure 6The sensing opening L-OP and the penetration opening N-OP may correspond to the light emitting opening PDL-OP1 described in FIG. Figure 7 The sensing opening PDL-OP2 described in FIG.

[0185] The first light-emitting opening O-OP1 may overlap with the first light-emitting element O-E1, the second light-emitting opening O-OP2 may overlap with the second light-emitting element O-E2, the 3-1st light-emitting opening O-OP31 may overlap with the 3-1st light-emitting element O-E31, and the 3-2nd light-emitting opening O-OP32 may overlap with the 3-2nd light-emitting element O-E32. The sensing opening L-OP may overlap with the optical sensing element LE.

[0186] According to this embodiment, in the region overlapping with the through opening N-OP, the Figure 7 At least any one of the configurations of the optical sensing element LRE described in .

[0187] exist Figure 8D The example shows Figure 8C A cross-sectional view of the area corresponding to the through opening N-OP.

[0188] refer to Figure 8D , and the area overlapping with the sensing opening L-OP may have the area overlapping with the penetration opening N-OP omitted. Figure 7 Among the configurations of the optical sensing element LRE described in , the structure of the configuration provided on the anode AE'.

[0189] Figure 8D Although the dummy electrode AE'-D is formed in the same process as the anode AE', the dummy electrode AE'-D may be defined as floating. A pixel defining layer (PDL) may be provided on the dummy electrode AE'-D. A through-opening (N-OP) that at least partially exposes the dummy electrode AE'-D may be defined in the pixel defining layer (PDL).

[0190] According to this embodiment, the optical sensing element LRE (see Figure 7 ) can be provided in any one of the openings provided in one unit opening U-OPa. The through opening N-OP overlapping with the dummy sensing element may not be used for optical sensing.

[0191] However, the embodiments of the present inventive concept are not limited thereto and may be changed Figure 8C . Furthermore, the through-opening N-OP may be additionally provided in one unit opening U-OPa, and embodiments of the inventive concept are not limited thereto.

[0192] Furthermore, the optical sensing element LRE (see Figure 7 ), or the entire configuration of the optical sensing element LRE may be omitted, and embodiments of the inventive concept are not limited thereto.

[0193] refer to Figure 8E , the penetration opening N-OP according to the embodiment may be a hole defined by penetrating the display panel DP and the input sensor IS.

[0194] According to an embodiment, the through openings N-OP may be defined by penetrating the base layer SUB, the encapsulation layer TFE, and the input sensors IS formed on the encapsulation layer TFE in a continuous process.

[0195] According to an embodiment, the inside of the through opening N-OP may be filled with an organic material or may be provided as an empty space, and embodiments of the present inventive concept are not limited thereto.

[0196] Figure 9A is a diagram illustrating an arrangement state of light emitting openings and sensing openings on a plane according to one or more embodiments of the present disclosure. Figure 9B yes Figure 9A For ease of description, the light emitting element OLED (see Figure 6 ) in each of the first electrodes AE configured (see Figure 6 ) and included in the optical sensing element LRE (see Figure 7 ) in each of the first electrodes AE' (see Figure 7 ) is shown as a dotted line. The first electrode AE ​​shown as a dotted line (see Figure 6 ) can be referred to as a "light emitting element", and the first electrode AE' (see Figure 7 ) can be called a "sensing element".

[0197] refer to Figure 9A and Figure 9B According to one or more embodiments, a display device DD may include unit elements UE located in a display area DA-A. The unit elements UE may be arranged in a constant pattern in the display area DA-A. For example, each of a first column of unit elements U-1 and a second column of unit elements U-2 may include unit elements UE arranged in a first direction DR1. The second column of unit elements U-2 may be shifted from the first column of unit elements U-1 along a first diagonal direction GDR1.

[0198] The unit elements UE may each include a first light-emitting element O-E1, a second light-emitting element O-E2, a 3-1st light-emitting element O-E31, a 3-2nd light-emitting element O-E32, a first optical sensing element LE1, a second optical sensing element LE2, a third optical sensing element LE3 and a fourth optical sensing element LE4.

[0199] The first light-emitting element O-E1 may provide light of a first color, the second light-emitting element O-E2 may provide light of a second color, and the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 may provide light of a third color. The first color of light may be blue, the second color of light may be red, and the third color of light may be green. However, the present disclosure is not limited thereto, and the first to third colors of light may be changed to other colors of light.

[0200] The sum of the numbers of the first optical sensing element LE1, the second optical sensing element LE2, the third optical sensing element LE3, and the fourth optical sensing element LE4 included in one unit element UE may be greater than the sum of the numbers of the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 providing light of the third color.

[0201] The first light emitting element O-E1, the second light emitting element O-E2, the 3-1st light emitting element O-E31, and the 3-2nd light emitting element O-E32 may each include Figure 5 The pixel driver PC described in Figure 6 The first optical sensing element LE1, the second optical sensing element LE2, the third optical sensing element LE3 and the fourth optical sensing element LE4 may each include Figure 5 The sensor driver SNC described in Figure 7 The optical sensing element LRE described in.

[0202] The first light-emitting element O-E1 and the second light-emitting element O-E2 may be spaced apart from each other along the first direction DR1. The 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32 may be spaced apart from each other along the second direction DR2, with the first optical sensing element LE1 being between the 3-1st light-emitting element O-E31 and the 3-2nd light-emitting element O-E32. The 3-1st light-emitting element O-E31 may be spaced apart from the first light-emitting element O-E1 along the second diagonal direction GDR2, and the 3-2nd light-emitting element O-E32 may be spaced apart from the first light-emitting element O-E1 along the first diagonal direction GDR1.

[0203] The first optical sensing element LE1 may be spaced apart from the second optical sensing element LE2 along the first direction DR1, with the second light-emitting element O-E2 located between the first and second optical sensing elements LE1 and LE2. The third optical sensing element LE3 may be spaced apart from the fourth optical sensing element LE4 along the second direction DR2, with the second light-emitting element O-E2 located between the third and fourth optical sensing elements LE3 and LE4. The third optical sensing element LE3 may be aligned with the 3-1st light-emitting element O-E31 along the first direction DR1, and the fourth optical sensing element LE4 may be aligned with the 3-2nd light-emitting element O-E32 along the first direction DR1. The first optical sensing element LE1, the second optical sensing element LE2, the third optical sensing element LE3, and the fourth optical sensing element LE4 may surround the second light-emitting element O-E2. The third optical sensing element LE3 may be spaced apart from the first optical sensing element LE1 along the second diagonal direction GDR2, and the fourth optical sensing element LE4 may be spaced apart from the first optical sensing element LE1 along the first diagonal direction GDR1.

[0204] The unit opening U-OP may be defined in the pixel definition layer PDL (see Figure 6 and Figure 7 ). One unit opening U-OP may correspond to one unit element UE. The unit openings U-OP may be arranged in a constant pattern in the display area DA.

[0205] The unit openings U-OP may each include a first light emitting opening O-OP1, a second light emitting opening O-OP2, a 3-1st light emitting opening O-OP31, a 3-2nd light emitting opening O-OP32, a first sensing opening L-OP1, a second sensing opening L-OP2, a third sensing opening L-OP3, and a fourth sensing opening L-OP4.

[0206] The first light-emitting opening O-OP1 may overlap with the first light-emitting element O-E1, the second light-emitting opening O-OP2 may overlap with the second light-emitting element O-E2, the 3-1st light-emitting opening O-OP31 may overlap with the 3-1st light-emitting element O-E31, and the 3-2nd light-emitting opening O-OP32 may overlap with the 3-2nd light-emitting element O-E32.

[0207] The first sensing opening L-OP1 may overlap with the first optical sensing element LE1, the second sensing opening L-OP2 may overlap with the second optical sensing element LE2, the third sensing opening L-OP3 may overlap with the third optical sensing element LE3, and the fourth sensing opening L-OP4 may overlap with the fourth optical sensing element LE4.

[0208] The first light emitting opening O-OP1 and the second light emitting opening O-OP2 may be spaced apart from each other along the first direction DR1. The 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32 may be spaced apart from each other along the second direction DR2, with the first sensing opening L-OP1 being between the 3-1st light emitting opening O-OP31 and the 3-2nd light emitting opening O-OP32. The 3-1st light emitting opening O-OP31 may be spaced apart from the first light emitting opening O-OP1 along the second diagonal direction GDR2, and the 3-2nd light emitting opening O-OP32 may be spaced apart from the first light emitting opening O-OP1 along the first diagonal direction GDR1.

[0209] The first sensing opening L-OP1 may be spaced apart from the second sensing opening L-OP2 along the first direction DR1, and the second light emitting opening O-OP2 may be between the first sensing opening L-OP1 and the second sensing opening L-OP2. The third sensing opening L-OP3 may be spaced apart from the fourth sensing opening L-OP4 along the second direction DR2, and the second light emitting opening O-OP2 may be between the third sensing opening L-OP3 and the fourth sensing opening L-OP4. The first sensing opening L-OP1, the second sensing opening L-OP2, the third sensing opening L-OP3, and the fourth sensing opening L-OP4 may surround the second light emitting opening O-OP2.

[0210] The first light emitting opening O-OP1 may have an octagonal shape. For example, the first light emitting opening O-OP1 may have an octagonal shape with corners of an imaginary square shape V-OP1 removed.

[0211] The second light emitting opening O-OP2 may have an octagonal shape. For example, the second light emitting opening O-OP2 may have an octagonal shape with corners of the imaginary square shape V-OP2 removed.

[0212] The 3-1st light emitting opening O-OP31 may have an octagonal shape extending along the first diagonal direction GDR1, and the 3-2nd light emitting opening O-OP32 may have an octagonal shape extending along the second diagonal direction GDR2.

[0213] The first and second sensing openings L-OP1 and L-OP2 may each have a rectangular shape including short sides extending in the first direction DR1 and long sides extending in the second direction DR2 and having a length greater than the short sides.

[0214] The third and fourth sensing openings L-OP3 and L-OP4 may each have a rectangular shape including short sides extending in the second direction DR2 and long sides extending in the first direction DR1 and having a length greater than the short sides. The third and fourth sensing openings L-OP3 and L-OP4 may have the same area.

[0215] The first and second sensing openings L-OP1 and L-OP2 included in each of the unit openings U-OP arranged along the first direction DR1 may be aligned along the first direction DR1.

[0216] The third and fourth sensing openings L-OP3 and L-OP4 included in one unit opening U-OP may be arranged along the second direction DR2 with the third and fourth sensing openings L-OP3 and L-OP4 included in another unit opening U-OP located adjacently along the second direction DR2.

[0217] The first sensing openings L-OP1 included in one unit opening U-OP and the second sensing openings L-OP2 included in another unit opening U-OP located adjacently along the second direction DR2 may be alternately arranged in a zigzag form along the second direction DR2. That is, the first sensing openings L-OP1 and the second sensing openings L-OP2 arranged in the second direction DR2 and located in the same row may be alternately arranged in a zigzag form along the second direction DR2 (for example, offset with respect to the first direction DR1).

[0218] The distance from one long side of the first sensing opening L-OP1 to the first light emitting opening O-OP1 may be a first width d1, the distance from the other long side of the first sensing opening L-OP1 to the second light emitting opening O-OP2 may be a second width d2, the distance from one short side of the first sensing opening L-OP1 to the 3-1st light emitting opening O-OP31 may be a third width d3, and the distance from the other short side of the first sensing opening L-OP1 to the 3-2nd light emitting opening O-OP32 may be a fourth width d4. The first width d1, the second width d2, the third width d3, and the fourth width d4 may be the same.

[0219] In addition, the distance (width) between the long side and short side of the second light-emitting opening O-OP2 and the first sensing opening L-OP1, the second sensing opening L-OP2, the third sensing opening L-OP3 and the fourth sensing opening L-OP4 surrounding the long side and short side of the second light-emitting opening O-OP2 can be the same.

[0220] The optical sensing elements present in one unit element UE may be greater than the number of light emitting elements providing light of the third color in one unit element UE, thereby increasing the number of optical sensing elements LRE (see Figure 7 ) resolution. In addition, the distance from the sensing opening to the light emitting opening surrounding the sensing opening can be the same, thereby stably ensuring the opening ratio of the light emitting opening. Therefore, a display device DD with increased light emitting efficiency can be provided.

[0221] Figure 10 An optical sensor according to one or more embodiments of the present disclosure (e.g., using Figure 5 and Figure 7 The process of obtaining fingerprint information as biometric information using the optical sensor SNij) shown in FIG.

[0222] refer to Figure 10 , the display device DD may include a plurality of optical sensors SN. The optical sensors SN may each have Figure 5 and Figure 7 The optical sensor SNij has the same configuration as shown in FIG. The optical sensor SN can detect the fingerprint FNT of the finger FN provided to the display panel DP. The light emitting element OLED (see FIG. 1 ) of the pixel PX Figure 6 ) can be directed to and reflected from the fingerprint FNT. The fingerprint FNT is defined by valleys and ridges of the fingerprint FNT, and the reflectivity of the valleys differs from the reflectivity of the ridges. Multiple optical sensors SN receive light reflected from the valleys or ridges, depending on the valley or ridge location. Information about the fingerprint FNT can be obtained using the light received by the multiple optical sensors SN.

[0223] The light emitting elements and the optical sensing elements providing light of corresponding colors may be located in the same number in one unit pixel, thereby increasing the resolution of the optical sensing element.

[0224] Furthermore, the distances from the sensing opening to the light emitting openings surrounding the sensing opening may be the same, thereby stably securing the opening ratio of the light emitting openings.

[0225] Therefore, a display device with increased light emitting efficiency can be provided.

[0226] In the above description, the preferred embodiments of the present disclosure have been described with reference to the present disclosure. However, those skilled in the art or those skilled in the relevant art will understand that various modifications and changes can be made to the disclosed embodiments within the scope of the present disclosure as described in the claims. Therefore, the present disclosure is not limited to the contents described in the specific embodiments of the specification, but should be determined by the claims, and functional equivalents of the present disclosure should be included in the present disclosure.

Claims

1. A display device, characterized in that include: a base layer including a display area and a non-display area surrounding the display area in a plan view; a unit element at the display area and including a light emitting element and an optical sensing element; as well as a pixel defining layer defining unit openings, wherein the unit openings include light emitting openings for providing light generated by the light emitting elements and sensing openings respectively overlapping with the optical sensing elements, Wherein, the light emitting element includes: a first light emitting element for providing light of a first color, a second light emitting element for providing light of a second color different from the first color and spaced apart from the first light emitting element along a first direction, and 3-1st and 3-2nd light emitting elements for providing light of a third color different from the first and second colors and spaced apart along a second direction intersecting the first direction, and The number of the optical sensing elements in one of the unit elements is equal to or greater than 2.

2. The display device according to claim 1, wherein The optical sensing element in the one of the unit elements comprises: A first optical sensing element is located between the 3-1st light emitting element and the 3-2nd light emitting element; and a second optical sensing element spaced apart from the first optical sensing element along the first direction, and the second light emitting element is between the first optical sensing element and the second optical sensing element, Wherein, the light emitting opening in one of the unit openings comprises: a first light-emitting opening, overlapping with the first light-emitting element; a second light-emitting opening, overlapping with the second light-emitting element; The 3-1st light-emitting opening overlaps with the 3-1st light-emitting element; and The 3-2nd light emitting opening overlaps with the 3-2nd light emitting element, and Wherein, the sensing opening in said one of the unit openings comprises: a first sensing opening, overlapping with the first optical sensing element; and The second sensing opening overlaps with the second optical sensing element.

3. The display device according to claim 2, wherein The first sensing openings and the second sensing openings in the unit openings respectively arranged along the first direction are aligned along the first direction.

4. The display device according to claim 2, wherein The first sensing openings and the second sensing openings in the unit openings respectively arranged along the second direction among the unit openings are alternately arranged along the second direction to have a zigzag form.

5. The display device according to claim 2, wherein: The first sensing opening and the second sensing opening respectively have a rectangular shape including short sides extending in the first direction and long sides extending in the second direction.

6. The display device according to claim 5, wherein: The first light emitting opening and the second light emitting opening have a hexagonal shape corresponding to an imaginary rectangle extending in a diagonal direction intersecting the first direction and the second direction and from which a first portion, one of the long sides facing the first sensing opening in the first direction, and a second portion point-symmetrical to the first portion are removed.

7. The display device according to claim 6, wherein: The 3-1st and 3-2nd light emitting openings have a hexagonal shape corresponding to an imaginary rectangle from which a third portion of the short side facing the first sensing opening in the second direction and a fourth portion point-symmetrical to the third portion are removed.

8. The display device according to claim 7, wherein: A length of a side of the first light emitting opening facing the first sensing opening in the first direction is greater than a length of a side of the 3-1st light emitting opening facing the first sensing opening in the second direction.

9. The display device according to claim 7, wherein: The first light emitting opening includes a first side facing the first sensing opening in the first direction, and a second side facing the 3-1st light emitting opening in a first diagonal direction crossing the first direction and the second direction. The second light emitting opening includes a third side facing the first sensing opening in the first direction, and a fourth side facing the 3-2 light emitting opening in the first diagonal direction, and The ratio of the second side to the first side is greater than the ratio of the fourth side to the third side.

10. The display device according to claim 2, wherein A length of a first side of the 3-1st light-emitting opening facing the first light-emitting opening in a first diagonal direction intersecting the first direction and the second direction is greater than a length of a second side of the 3-1st light-emitting opening facing the second light-emitting opening in a second diagonal direction intersecting the first diagonal direction.

11. The display device according to claim 10, wherein: The 3-1st light emitting opening and the 3-2nd light emitting opening are line-symmetrical with respect to an imaginary line extending in the first direction.

12. The display device according to claim 1, wherein The optical sensing element in the one of the unit elements comprises: a first optical sensing element, between the 3-1st light emitting element and the 3-2nd light emitting element; a second optical sensing element spaced apart from the first optical sensing element along the first direction, and the second light emitting element is between the first optical sensing element and the second optical sensing element; a third optical sensing element spaced apart from the first optical sensing element in a first diagonal direction intersecting the first direction and the second direction; and a fourth optical sensing element spaced apart from the third optical sensing element along the second direction, with the second light emitting element between the third and fourth optical sensing elements, and the fourth optical sensing element spaced apart from the first optical sensing element in a second diagonal direction intersecting the first diagonal direction, Wherein, the light emitting opening in one of the unit openings comprises: a first light-emitting opening, overlapping with the first light-emitting element; a second light-emitting opening, overlapping with the second light-emitting element; The 3-1st light-emitting opening overlaps with the 3-1st light-emitting element; and The 3-2nd light emitting opening overlaps with the 3-2nd light emitting element, and Wherein, the sensing opening in said one of the unit openings comprises: a first sensing opening, overlapping with the first optical sensing element; a second sensing opening, overlapping with the second optical sensing element; a third sensing opening, overlapping with the third optical sensing element; and The fourth sensing opening overlaps with the fourth optical sensing element.

13. The display device according to claim 12, wherein: The first sensing openings and the second sensing openings respectively in the unit openings arranged along the first direction are aligned along the first direction.

14. The display device according to claim 12, wherein: The third sensing opening and the fourth sensing opening, respectively in the unit openings arranged along the second direction, are aligned along the second direction.

15. The display device according to claim 12, wherein: The first sensing opening and the second sensing opening have a rectangular shape including a first side extending in the first direction and a second side extending in the second direction and having a length greater than the first side, and The third sensing opening and the fourth sensing opening have a rectangular shape including a third side extending in the first direction and a fourth side extending in the second direction and having a length smaller than the third side.

16. The display device according to claim 12, wherein: The first light emitting opening and the second light emitting opening have an octagonal shape corresponding to an imaginary square from which corners are removed.

17. The display device according to claim 12, wherein: The 3-1st light emitting opening has an octagonal shape extending in the second diagonal direction, and The 3-2 th light emitting opening has an octagonal shape extending in the first diagonal direction.

18. The display device according to claim 1, wherein The sensing opening includes a short side extending in the first direction and a long side extending in the second direction, and The distance from one long side of the sensing opening to the light emitting opening along the first direction is equal to the distance from one short side of the sensing opening to the other light emitting opening along the second direction.

19. The display device according to claim 1, wherein The first color is blue, the second color is red, and the third color is green.

20. The display device according to claim 1, wherein The light emitting element includes a first electrode at least partially exposed by the light emitting opening, a second electrode, and a light emitting layer between the first electrode and the second electrode. The optical sensing element includes a first sensing electrode at least partially exposed by the sensing opening, a second sensing electrode, and a photoelectric conversion layer between the first sensing electrode and the second sensing electrode, and The second electrode and the second sensing electrode are a common layer with an integral shape.

21. A display device, characterized in that include: a base layer comprising a display area and a non-display area surrounding the display area; Unit elements are provided on the display area and each includes a light emitting element and at least one optical sensing element and a dummy sensing element; as well as a pixel defining layer, wherein the pixel defining layer defines unit openings therein, the unit openings each including a light emitting opening to which light generated by the light emitting element included in the unit element is provided and an opening respectively overlapping the at least one optical sensing element and the dummy sensing element; The light-emitting element included in one of the unit elements includes: a first light emitting element providing light having a first color; a second light emitting element providing light having a second color different from the first color and spaced apart from the first light emitting element along a first direction; and a 3-1st light emitting element and a 3-2nd light emitting element each providing light having a third color different from the first color and the second color, and being spaced apart from each other along a second direction crossing the first direction, and A sum of the numbers of the at least one optical sensing element and the dummy sensing element included in the one unit element is equal to or greater than a sum of the numbers of the 3-1st light emitting element and the 3-2nd light emitting element.

22. The display device according to claim 21, wherein The light emitting opening included in the one unit opening includes: a first light-emitting opening, overlapping with the first light-emitting element; a second light-emitting opening, overlapping with the second light-emitting element; The 3-1st light-emitting opening overlaps with the 3-1st light-emitting element; and The 3-2nd light emitting opening overlaps with the 3-2nd light emitting element, and The opening included in the one unit opening includes: a sensing opening overlapping the at least one optical sensing element; and The penetrating opening overlaps with the dummy sensing element.

23. The display device according to claim 22, wherein: The at least one optical sensing element includes a first sensing electrode at least partially exposed by the sensing opening, a second sensing electrode, and a photoelectric conversion layer disposed between the first sensing electrode and the second sensing electrode, and At least any one of the first sensing electrode, the second sensing electrode, and the photoelectric conversion layer is omitted in the dummy sensing element.

24. A display device, characterized in that include: Display panel, including: unit elements, each comprising a light emitting element and at least one optical sensing element; A pixel defining layer, wherein unit openings are defined in the pixel defining layer, and each of the unit openings includes: a light emitting opening to which light generated by the light emitting element included in the unit element is provided; a sensing opening overlapping the at least one optical sensing element; and a penetration opening spaced apart from the sensing opening, with any one of the light emitting openings being between the sensing opening and the penetration opening; and An input sensor is directly provided on the display panel, The penetration opening is defined by penetrating the display panel and the input sensor.

25. The display device according to claim 24, wherein The light emitting element included in one of the unit elements includes: a first light emitting element providing light having a first color; a second light emitting element providing light having a second color different from the first color and spaced apart from the first light emitting element along a first direction; and The 3-1st light emitting element and the 3-2nd light emitting element each provide light having a third color different from the first color and the second color, and are spaced apart from each other along a second direction intersecting the first direction.

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