Display device

Abstract

There is provided a display device including: a substrate including quadrangular unit areas repeatedly arranged in a first direction and a second direction; a first sub-pixel for emitting a first color and including a first sub-emission region and a second sub-emission region; a second sub-pixel for emitting a second color and including a second emission region adjacent to the first sub-emission region in the first direction; and a third sub-pixel for emitting a third color and including a third emission region adjacent to the first sub-emission region in the second direction, the first sub-emission region includes a 1-1 edge extending substantially in a first direction and being concave, a 1-2 edge extending substantially in a second direction and being concave, and a first protrusion connecting the 1-1 edge to the 1-2 edge.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0110138, filed on August 22, 2023, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device in which an emission area is increased so that deposition efficiency during a manufacturing process is improved. Background Art

[0004] An organic light-emitting display device is a display device configured to realize an image by light generated in an emissive layer interposed between a pixel electrode and an opposing electrode. In such an organic light-emitting display device, in order to control the light emission or light emission level of each pixel, the pixel electrode is electrically connected to a thin film transistor, and the thin film transistor controls the electrical signal applied to the pixel electrode. Utility Model Content

[0005] However, in such an organic light emitting display device, as applicability to high resolution increases, the size of sub-pixels decreases, and thus, it becomes difficult to emit light with sufficient brightness in the sub-pixels.

[0006] The present disclosure provides a display device in which the emission area is increased and the deposition efficiency is improved. However, this is merely an example, and the scope of the present disclosure is not limited thereby.

[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

[0008] According to one or more embodiments, a display device includes: a substrate including quadrilateral unit areas repeatedly arranged in a first direction and in a second direction perpendicular to the first direction; a first sub-pixel for emitting a first color and including a first sub-emission area and a second sub-emission area spaced apart from each other at one of the unit areas; a second sub-pixel for emitting a second color and including a second emission area adjacent to the first sub-emission area in the first direction at the one of the unit areas; and a third sub-pixel for emitting a third color and including a third emission area adjacent to the first sub-emission area in the second direction at the one of the unit areas, wherein the first sub-emission area includes a 1-1 edge extending generally in the first direction and being concave, a 1-2 edge extending generally in the second direction and being concave, and a first protrusion connecting the 1-1 edge to the 1-2 edge.

[0009] The first protrusion may be convex in a third direction intersecting the first direction and the second direction.

[0010] The first sub-emission area may be smaller than the second and third emission areas.

[0011] The second emission region may include a 2-1 edge extending generally in the first direction and having a convex shape and a 2-2 edge extending generally in the second direction and having a convex shape.

[0012] The third emission region may include a 3-1 edge extending generally in the first direction and being convex, and a 3-2 edge extending generally in the second direction and being convex.

[0013] The length of the 2-1st edge may be substantially equal to the length of the 2-2nd edge, wherein the length of the 3-1st edge is substantially equal to the length of the 3-2nd edge.

[0014] The second emission region may include a second protrusion where the 2-1st edge and the 2-2nd edge meet, and the third emission region may include a third protrusion where the 3-1st edge and the 3-2nd edge meet.

[0015] The second protrusion and the third protrusion may each have a pointed shape in a third direction crossing the first direction and the second direction.

[0016] A size of the second sub-emission area may be substantially equal to a size of the first sub-emission area.

[0017] The second sub-emission region may have a shape in which the first sub-emission region is rotated 90 degrees.

[0018] The display device may further include a pixel defining layer over the substrate, covering at least a portion of the pixel electrode of the first sub-pixel, and defining an opening defining the first sub-emission region and the second sub-emission region.

[0019] The pixel electrode of the first subpixel may include a first subpixel electrode corresponding to the first sub-emission region and a second subpixel electrode corresponding to the second sub-emission region, wherein the first subpixel electrode and the second subpixel electrode are electrically connected to each other.

[0020] The unit area may have a substantially square shape.

[0021] According to one or more embodiments, a display device includes: a substrate including quadrilateral unit areas repeatedly arranged in a first direction and in a second direction perpendicular to the first direction; a first sub-pixel for emitting a first color and including a first sub-emission area and a second sub-emission area spaced apart from each other at one of the unit areas; a second sub-pixel for emitting a second color at the one of the unit areas and including a second emission area having a size larger than that of the first sub-emission area; and a third sub-pixel for emitting a third color at the one of the unit areas and including a third emission area having a size larger than that of the first sub-emission area, wherein the first sub-emission area includes a 1-1 edge extending generally in the first direction and being convex and a 1-2 edge extending generally in the second direction and being convex, wherein the second emission area includes a 2-1 edge extending generally in the first direction and being convex and a 2-2 edge extending generally in the second direction and being convex, and wherein the third emission area includes a 3-1 edge extending generally in the first direction and being convex and a 3-2 edge extending generally in the second direction and being convex.

[0022] The first and second sub-emission regions may be adjacent to each other in a third direction crossing the first and second directions, wherein the second and third emission regions are adjacent to each other in a fourth direction perpendicular to the third direction.

[0023] The second sub-emission region may have a shape in which the first sub-emission region is rotated 90 degrees.

[0024] The first sub-emitting area may include a first protrusion connecting the 1-1 edge to the 1-2 edge, wherein the second emitting area includes a second protrusion, and the 2-1 edge and the 2-2 edge intersect at the second protrusion, wherein the third emitting area includes a third protrusion, and the 3-1 edge and the 3-2 edge intersect at the third protrusion, wherein the first protrusion is convex in a third direction intersecting the first direction and the second direction, and wherein the second protrusion and the third protrusion have a pointed shape in the third direction.

[0025] The length of the 2-1st edge may be substantially equal to the length of the 2-2nd edge, wherein the length of the 3-1st edge is substantially equal to the length of the 3-2nd edge.

[0026] The display device may further include a pixel defining layer over the substrate, covering at least a portion of the pixel electrode of the first sub-pixel, and defining an opening defining the first sub-emission region and the second sub-emission region.

[0027] The pixel electrode of the first subpixel may include a first subpixel electrode corresponding to the first sub-emission region and a second subpixel electrode corresponding to the second sub-emission region, wherein the first subpixel electrode and the second subpixel electrode are electrically connected to each other.

[0028] Aspects other than those described above will become apparent from the following detailed description, the appended claims and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other aspects of the embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0030] Figure 1 is a schematic plan view of a display device according to one or more embodiments;

[0031] Figures 2 to 4 Each is a cross-sectional view schematically showing a portion of a display device according to one or more embodiments;

[0032] Figure 5 is an equivalent circuit diagram of a pixel included in a display device according to one or more embodiments;

[0033] Figure 6 is a schematic plan view of a display device according to one or more embodiments;

[0034] Figure 7 is a schematic plan view of a portion of a display device according to one or more embodiments;

[0035] Figure 8A and Figure 8B is a schematic plan view of a comparative example for explaining the characteristics of one or more embodiments;

[0036] Figure 9 is a table for explaining aperture ratios of display devices according to one or more embodiments and comparative examples; and

[0037] Figure 10 is a cross-sectional view schematically illustrating a portion of a display device according to one or more embodiments. DETAILED DESCRIPTION

[0038] By referring to the detailed description and drawings of the embodiments, it is easier to understand the aspects of some embodiments of the present disclosure and the methods for realizing them. The described embodiments are provided as examples so that the present disclosure will be thorough and complete and will fully convey the aspects of the present disclosure to those skilled in the art. Therefore, processes, elements and techniques that are redundant, irrelevant or unrelated to the description of the embodiments or unnecessary for those of ordinary skill in the art to fully understand the aspects of the present disclosure may be omitted. Unless otherwise stated, in the entire drawings and written description, the same reference numerals, symbols or combinations thereof represent the same elements, and therefore, their repeated descriptions may be omitted.

[0039] The described embodiments may have various modifications and may be implemented in different forms, and should not be interpreted as being limited to the embodiments shown herein. When describing one or more embodiments, "can," "may," or "may not" correspond to one or more embodiments of the present disclosure. The present disclosure encompasses all modifications, equivalents, and replacements within the scope of the ideas and techniques of the present disclosure. In addition, each of the features of the various embodiments of the present disclosure may be combined with each other in part or in its entirety, and various interlocks and drives are technically possible. Each embodiment may be implemented independently of one another, or may be implemented together in a mutual relationship.

[0040] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for specific materials, material properties, dimensions, proportions, commonalities between the illustrated elements, and / or any other characteristics, attributes, properties, etc. of the elements.

[0041] Various embodiments are described herein with reference to cross-sectional views that are schematic representations of embodiments and / or intermediate structures. Therefore, variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are anticipated. Furthermore, the specific structural or functional descriptions disclosed herein are merely exemplary and are provided for the purpose of describing embodiments according to the concepts of the present disclosure. Therefore, the embodiments disclosed herein should not be construed as limited to the shapes of the elements, layers, or regions shown, but rather should include deviations in shapes due to, for example, manufacturing.

[0042] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0043] For ease of explanation, spatial relative terms such as "below", "below", "down", "downside", "beneath", "above", "upper side" etc. may be used herein to describe the relationship between an element or feature and another (some) element or feature as shown in the drawings. It will be understood that, in addition to the orientation depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or in operation. For example, if the device in the drawings is flipped, the element described as being "below", "below" or "below" other elements or features will then be oriented "above" other elements or features. Therefore, the exemplary terms "below" and "below" can include both above and below orientations. The device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when a first portion is described as being arranged "on" a second portion, this means that the first portion is arranged on the upper or lower side of the second portion, and is not limited to its upper side based on the direction of gravity.

[0044] In addition, the phrase "in a plan view" means when viewing an object portion from above, and the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section taken by vertically cutting an object portion from the side. The terms "overlap" or "overlapped" mean that a first object can be above or below a second object, or on one side of the second object, and vice versa. In addition, the term "overlap" can include stacking, facing, or facing, extending over, covering, or partially covering, or any other suitable term as will be understood and understood by those of ordinary skill in the art. The expression "non-overlapping" can include meanings such as "separated from," "separated from," or "offset from," as well as any other suitable equivalents as will be understood and understood by those of ordinary skill in the art. The terms "face" and "facing" can mean that a first object can be directly or indirectly opposite to a second object. In the case where a third object is between the first and second objects, the first and second objects can be understood to be indirectly opposite to each other, but still facing each other.

[0045] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, it may be directly formed on, directly on, directly connected to, or directly coupled to another element, layer, region, or component, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to another element, layer, region, or component such that one or more intervening elements, layers, regions, or components may be present. Furthermore, this may collectively mean directly coupled or directly connected or indirectly coupled or indirectly connected as well as integrally coupled or integrally connected or non-integrally coupled or non-integrally connected. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, it may be directly electrically connected or directly electrically coupled to the other layer, region, and / or component, or there may be one or more intervening layers, regions, or components. The one or more intervening components may include switches, resistors, capacitors, and / or the like. When describing embodiments, unless explicitly described as being directly connected, statements about connection refer to electrical connection, and "directly connected / directly coupled" or "directly on" means that one component is directly connected or directly coupled to another component or directly on another component without intervening components.

[0046] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upper direction, but includes forming the part on the side surface or in the lower direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "under" another part, this includes not only the situation that the part is "directly under" the other part, but also the situation that there is another part between the part and the other part. At the same time, other expressions describing the relationship between components such as "between...", "directly between..." or "adjacent to..." and "directly adjacent to..." can be interpreted similarly. It will be understood that when an element or layer is referred to as "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intervening elements or layers.

[0047] For the purposes of this disclosure, expressions such as "at least one of" or "any one of" or "one or more of" when preceding a list of elements modify the entire list of elements and do not modify the individual elements in the list. For example, "at least one of X, Y, and Z," "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ, or any variation thereof. Similarly, the expression "at least one of A and B" may include A, B, or A and B. As used herein, "or" generally means "and / or," and the term "and / or" includes any and all combinations of one or more of the relevant listed items. For example, the expression "A and / or B" may include A, B, or A and B. Similarly, expressions such as "at least one of," "a plurality of," "one of," and other prepositional phrases, when preceding / following a list of elements, modify the entire list of elements and do not modify the individual elements in the list.

[0048] It will be understood that although the terms "first", "second", "third", etc. can be used in this article to describe various elements, components, areas, layers and / or parts, these elements, components, areas, layers and / or parts should not be limited by these terms. These terms do not correspond to a specific order, position or advantage, and are used only to distinguish one element, component, component, area, region, layer, section or part from another element, component, component, area, region, layer, section or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first area, first layer or first section described below can be referred to as the second element, second component, second area, second layer or second section. Describing an element as a "first" element may not require or imply the presence of a second element or other element. The terms "first", "second", etc. can also be used in this article to distinguish elements of different categories or groups. For the sake of simplicity, the terms "first", "second", etc. can respectively represent "first category (or first group)", "second category (or second group)", etc.

[0049] In the examples, the x-axis, y-axis, and / or z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction, and / or the third direction.

[0050] In the following embodiments, the expression “a line extends in the first direction or the second direction” may include a case where “the line extends in a linear shape” and a case where “the line extends in a zigzag shape or a curved shape” in the first direction or the second direction.

[0051] The terms used herein are only for the purpose of describing embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to also include the plural forms, and the plural forms are also intended to include the singular forms, unless the context clearly indicates otherwise. It will also be understood that when used in this specification, the terms "comprise", "include", "have", "have", "contain" and "include" specify the existence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups.

[0052] As used herein, the terms "substantially," "about," "approximately," and similar terms are used as approximate terms and not as terms of degree, and are intended to allow for inherent deviations in measurements or calculations that will be recognized by those of ordinary skill in the art. For example, "substantially" may include a range of + / - 5% of the corresponding value. In view of the measurements in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "about" or "approximately" as used herein include the value and mean within an acceptable deviation range for the particular value as determined by those of ordinary skill in the art. For example, "approximately" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure."

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0054] Figure 1 is a plan view schematically illustrating a display device according to one or more embodiments. Figures 2 to 4 Each is a cross-sectional view schematically showing a portion of a display device according to one or more embodiments.

[0055] refer to Figures 1 to 4 , the display device may include a display panel 10 . In one or more embodiments, a cover window for protecting the display panel 10 may be disposed on an upper portion of the display panel 10 .

[0056] The display panel 10 may include a display area DA for displaying an image and a peripheral area PA outside the display area DA. The peripheral area PA may be a non-display area of ​​the type in which no pixels are arranged. The display area DA may be completely surrounded by the peripheral area PA (for example, in a plan view). Various elements included in the display panel 10 may be located on the substrate 100. Therefore, it is apparent that the substrate 100 includes the display area DA and the peripheral area PA.

[0057] A plurality of pixels PX may be arranged in the display area DA. The pixels PX may include a display element. The display element may be connected to a pixel circuit configured to drive the pixels PX. In one or more embodiments, the display element may be an organic light emitting diode (OLED). Each of the pixels PX may emit, for example, red, green, blue, or white light via the organic light emitting diode (OLED).

[0058] In a plan view, the display area DA may have a Figure 1 In some embodiments, the display area DA may have a polygonal shape such as a triangle, a pentagon, a hexagon, etc., or a circular shape, an elliptical shape, an irregular shape, etc.

[0059] The peripheral area PA, which is an area arranged around the display area DA, may be an area where no image is displayed. Various lines configured to transmit electrical signals to be applied to the display area DA, external circuits electrically connected to pixel circuits, and pads on which a printed circuit board or a driver IC chip is attached may be arranged in the peripheral area PA.

[0060] refer to Figure 2 and Figure 3 , the display panel 10 may include a substrate 100 , a display layer DISL, a touch screen layer TSL, and an optical function layer OFL on the substrate 100 .

[0061] In one or more embodiments, the display layer DISL may include a pixel circuit PC including a thin film transistor TFT, a light emitting element ED as a display element, and an encapsulation material ENCM such as a thin film encapsulation layer TFEL or an encapsulation substrate. Insulating layers IL and IL' may be disposed in the display layer DISL and between the substrate 100 and the display layer DISL, respectively. For ease of explanation, in Figure 3 The pixel circuit PC is omitted.

[0062] The substrate 100 may have a single-layer structure formed of a glass material. Alternatively, the substrate 100 may include a polymer resin. The substrate 100 including the polymer resin may have a multilayer structure in which an organic layer and an inorganic layer including the polymer resin are stacked. The substrate 100 may include a rigid substrate or a flexible substrate that is bendable, foldable, rollable, etc.

[0063] The buffer layer 111, the inorganic insulating layer 111, and the planarization layer 117 may be sequentially stacked on the substrate 100. The planarization layer 117 may include an organic material or an inorganic material and may have a single-layer structure or a multi-layer structure. The pixel circuit PC may be arranged between the buffer layer 111 and the planarization layer 117. Figure 4 As shown in FIG, the pixel circuit PC may include a thin film transistor TFT and a capacitor Cst.

[0064] The thin film transistor TFT may include a semiconductor layer ACT including an organic semiconductor material such as amorphous silicon, polysilicon, or an oxide semiconductor material, a gate electrode GE, a source electrode SE, and a drain electrode DE. The capacitor Cst may include a lower electrode CE1 and an upper electrode CE2.

[0065] The semiconductor layer ACT may be located on the buffer layer 111. The first insulating layer 112 may be disposed between the semiconductor layer ACT and the gate electrode GE. The second insulating layer 113 may be located on the gate electrode GE. The upper electrode CE2 of the capacitor Cst may be located on the second insulating layer 113. The upper electrode CE2 may overlap the gate electrode GE therebelow. The gate electrode GE and the upper electrode CE2, overlapping each other with the second insulating layer 113 therebetween, may constitute the capacitor Cst. The gate electrode GE may be the lower electrode CE1 of the capacitor Cst. The third insulating layer 115 may be located on the capacitor Cst. The source electrode SE and the drain electrode DE may be located on the third insulating layer 115.

[0066] The first insulating layer 112, the second insulating layer 113, and the third insulating layer 115 may each include an inorganic substance such as silicon oxide, silicon nitride, and / or silicon oxynitride. The first insulating layer 112, the second insulating layer 113, and the third insulating layer 115 may be referred to as an inorganic insulating layer IIL.

[0067] A buffer layer 111 including an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be disposed between the thin film transistor TFT and the substrate 100 .

[0068] The planarization layer 117 may be on the thin film transistor TFT. The planarization layer 117 may include an organic insulating material such as acryl, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). The planarization layer 117 may include an organic insulating material such as silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO x ) inorganic insulating material. Zinc oxide (ZnO x) may be ZnO and / or ZnO 2 . When forming the planarization layer 117 , in order to provide a flat upper surface after forming the layer, chemical mechanical polishing may be performed on the upper surface of the layer. The planarization layer 117 may include a single layer or a plurality of layers.

[0069] As the light emitting element ED, an organic light emitting diode OLED as a display element may be disposed on the planarization layer 117. The organic light emitting diode OLED may include a pixel electrode 121, an opposite electrode 123, and an intermediate layer therebetween.

[0070] The pixel electrode 121 may be positioned on the planarization layer 117 , and the pixel electrode 121 may make contact with the source electrode SE or the drain electrode DE through a through-hole of the planarization layer 117 to be electrically connected to the thin film transistor TFT.

[0071] The pixel defining layer 119 may be positioned on the planarization layer 117. The pixel defining layer 119 may include an opening OP covering an edge of the pixel electrode 121 and exposing a portion of the pixel electrode 121. The size and shape of the emission area EA of the organic light emitting diode OLED may be defined by the opening OP.

[0072] The pixel defining layer 119 may include a transparent insulating material or an opaque insulating material. In one or more embodiments, the pixel defining layer 119 may include an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), or phenol resin. In some embodiments, the pixel defining layer 119 may include an inorganic insulating material such as silicon nitride or silicon oxide, or may include both an organic insulating material and an inorganic insulating material.

[0073] In one or more embodiments, the pixel defining layer 119 may include a light-blocking material and may be set to black. The light-blocking material may include a resin or paste containing carbon black, carbon nanotubes, or a black dye, may include metal particles (e.g., nickel, aluminum, molybdenum, and / or alloys thereof), may include metal oxide particles (e.g., chromium oxide), and / or may include metal nitride particles (e.g., chromium nitride). When the pixel defining layer 119 includes a light-blocking material, reflection of external light caused by the metal structure below the pixel defining layer 119 may be reduced.

[0074] like Figure 3, the spacer SPC may be located on the pixel defining layer 119. In one or more embodiments, the spacer SPC may include the same material as the pixel defining layer 119. In this case, the pixel defining layer 119 and the spacer SPC may be formed together in a mask process using a half-tone mask, so that the spacer SPC may have an island shape protruding from the pixel defining layer 119 in the z-direction. In some embodiments, the spacer SPC may include a different material from the pixel defining layer 119. In this case, the spacer SPC may be an island-shaped insulating pattern spaced a certain distance apart from each other on the pixel defining layer 119.

[0075] like Figure 4 As shown in FIG, the intermediate layer may include an emission layer 122 b and an organic functional layer 122 e on and / or below the emission layer 122 b.

[0076] The emission layer 122b may correspond to the pixel electrode 121 in the opening OP of the pixel defining layer 119. The emission layer 122b may include a polymer material or a low molecular weight material and may emit red, green, blue, or white light.

[0077] The organic functional layer 122e may include a first functional layer 122a and / or a second functional layer 122c. The first functional layer 122a or the second functional layer 122c may be omitted.

[0078] The first functional layer 122a may be disposed below the emission layer 122b. The first functional layer 122a may have a single-layer structure or a multi-layer structure including an organic material. The first functional layer 122a may be a hole transport layer (HTL) having a single-layer structure. Alternatively, the first functional layer 122a may include a hole injection layer (HIL) and the HTL. The first functional layer 122a may be integrally formed to correspond to the organic light emitting diode OLED included in the display area DA.

[0079] The second functional layer 122c may be disposed on the emission layer 122b. The second functional layer 122c may have a single-layer structure or a multi-layer structure including an organic material. The second functional layer 122c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 122c may be integrally formed to correspond to the organic light emitting diode OLED included in the display area DA.

[0080] The opposite electrode 123 may be positioned on the emission layer 122 b , and the upper layer 150 including an organic material may be formed on the opposite electrode 123 .

[0081] In one or more embodiments, the intermediate layer may include two or more emission units stacked sequentially between the pixel electrode 121 and the opposing electrode 123, and may include a charge generation layer (CGL) disposed between the two emission units. When the intermediate layer includes an emission unit and a charge generation layer, the organic light emitting diode (OLED) may be a tandem light emitting element. The organic light emitting diode (OLED) may have improved color purity and emission efficiency due to the stacked structure including multiple emission units.

[0082] An emission unit may include an emission layer 122b and a first functional layer 122a and a second functional layer 122c located above and below the emission layer 122b, respectively. The charge generation layer may include a negative charge generation layer and a positive charge generation layer. The luminous efficiency of an organic light-emitting diode (OLED), which is a series-connected light-emitting element including multiple emission units, may be further improved by using negative charge generation layers and positive charge generation layers. The negative charge generation layer may be an n-type charge generation layer. The negative charge generation layer may provide electrons. The negative charge generation layer may include a host and a dopant. The host may include an organic material. The dopant may include a metallic material. The positive charge generation layer may be a p-type charge generation layer. The positive charge generation layer may provide holes. The positive charge generation layer may include a host and a dopant. The host may include an organic material. The dopant may include a metallic material.

[0083] The upper layer 150 may protect the opposite electrode 123 and improve light extraction efficiency. The upper layer 150 may include lithium fluoride (LiF). Alternatively, the upper layer 150 may further include silicon oxide (SiO2) or silicon nitride (SiN x ) of inorganic insulating materials.

[0084] The display element may be covered with a thin film encapsulation layer (TFEL). In one or more embodiments, the thin film encapsulation layer (TFEL) may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the thin film encapsulation layer (TFEL) may include a first inorganic encapsulation layer 161, a second inorganic encapsulation layer 163, and an organic encapsulation layer 162 therebetween.

[0085] Touch screen layer TSL (see, for example, Figure 2) may be located on the second inorganic encapsulation layer 163. The touch screen layer TSL may be configured to obtain coordinate information based on external input (e.g., a touch event). The touch screen layer TSL may sense external input by using a self-capacitance method or a mutual capacitance method. The touch screen layer TSL may include a touch electrode TPE and a line connected to the touch electrode TPE. The touch electrode TPE may include a first touch electrode 171 and a second touch electrode 172. The first touch electrode 171 may be connected by a first connection electrode placed on the same layer as the first touch electrode 171. The second touch electrode 172 may be connected by a second connection electrode 172b located on a different layer from the second touch electrode 172 via a contact hole CNT of the insulating layer 174. The touch electrode TPE may correspond to a corresponding portion of the pixel defining layer 119.

[0086] The optical function layer OFL may include a filter layer 180 including a color filter 182, a black matrix 183, and an overcoat layer 184. The black matrix 183 may cover the first touch electrode 171 and the second touch electrode 172. The black matrix 183 may be arranged to correspond to the pixel defining layer 119. The overcoat layer 184 may include an organic material such as a resin, and the organic material may be transparent.

[0087] In the display panel 10 using the color filter 182 and the black matrix 183 instead of the polarizer and the polarizing film as the optical functional layer OFL, the emission efficiency of the display element can be improved, thereby achieving a reduction in power consumption and an increase in brightness, and thus improving the life of the display panel 10. In addition, even if the emission area is smaller than the emission area of ​​the related art, the same or greater brightness / lifespan can be achieved. In addition, because no polarizer or polarizing film is used, the thickness of the display panel 10 can be reduced.

[0088] The color filter 182 may include a first color filter 182a, a second color filter 182b, and a third color filter 182c. The first color filter 182a is configured to selectively transmit only light of the first color, the second color filter 182b is configured to selectively transmit only light of the second color, and the third color filter 182c is configured to selectively transmit only light of the third color. The first color filter 182a, the second color filter 182b, and the third color filter 182c may be arranged corresponding to the emission area EA of the pixel PX. The first color filter 182a, the second color filter 182b, and the third color filter 182c may be arranged adjacent to each other. Each of the first color filter 182a, the second color filter 182b, and the third color filter 182c may have an independent pattern structure. Each of the first color filter 182a, the second color filter 182b, and the third color filter 182c may be arranged in the opening 183OP of the black matrix 183. Each of the first color filter 182 a , the second color filter 182 b , and the third color filter 182 c may overlap a portion of the pixel defining layer 119 .

[0089] Figure 5 is an equivalent circuit diagram of a pixel included in a display device according to one or more embodiments.

[0090] refer to Figure 5 , the pixel circuit PC may include a driving transistor T1, a scanning transistor T2, and a storage capacitor Cst. In one or more embodiments, the driving transistor T1 and the scanning transistor T2 may be thin film transistors.

[0091] The scan transistor T2 may be electrically connected to each of the scan line SL and the data line DL and may be configured to transmit a data voltage input from the data line DL to the drive transistor T1 based on a scan signal input from the scan line SL. The storage capacitor Cst may be electrically connected to the scan transistor T2 and the driving voltage line PL and may be configured to store a voltage corresponding to a difference between a voltage received from the scan transistor T2 and a driving voltage ELVDD supplied to the driving voltage line PL.

[0092] The driving transistor T1 can be electrically connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the display element DPE in response to the voltage value stored in the storage capacitor Cst. The display element DPE can emit light with a specific brightness according to the driving current. The common voltage ELVSS can be provided to the opposite electrode of the display element DPE. The display element DPE can be Figure 4 Organic light-emitting diodes OLED.

[0093] Figure 5It is shown that the pixel circuit PC includes two transistors T1 and T2 and one storage capacitor Cst, but the pixel circuit PC may include three or more transistors.

[0094] Figure 6 is a schematic plan view of a portion of a display device according to one or more embodiments, in which arrangement of sub-pixels is shown. Figure 6 The display panel 10 has a quadrilateral unit area UA. The unit areas UA may be repeatedly arranged in a first direction D1 and a second direction D2 on the display panel 10. The second direction D2 may be perpendicular to the first direction D1. The first direction D1 may be the +x direction or the -x direction, and the second direction D2 may be the +y direction or the -y direction.

[0095] A plurality of subpixels may be arranged in a unit area UA. The subpixels may emit different corresponding colors and may be, for example, one of a red subpixel, a green subpixel, and a blue subpixel. A first subpixel P1, a second subpixel P2, and a third subpixel P3 that emit different colors may be arranged in the unit area UA. Hereinafter, for ease of description, the first subpixel P1 is a red subpixel, the second subpixel P2 is a green subpixel, and the third subpixel P3 is a blue subpixel.

[0096] In one unit area UA, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be separated from each other. The first sub-pixel P1 may include a first sub-pixel P1-1 and a second sub-pixel P1-2. In this case, the first sub-pixel P1-1, the second sub-pixel P1-2, the second sub-pixel P2, and the third sub-pixel P3 may be separated from each other. The first sub-pixel P1-1 and the second sub-pixel P1-2 may be driven by one pixel circuit PC.

[0097] In the unit area UA, the first sub-subpixel P1-1 may be adjacent to the second sub-subpixel P2 in the first direction D1 and adjacent to the third sub-subpixel P3 in the second direction D2. The second sub-subpixel P1-2 may be adjacent to the second sub-subpixel P2 in the second direction D2 and adjacent to the third sub-subpixel P3 in the first direction D1. The first sub-subpixel P1-1 and the second sub-subpixel P1-2 may be arranged adjacent to each other in a third direction / diagonal direction intersecting the first direction D1 and the second direction D2.

[0098] In other words, on the display panel 10, the second sub-pixel P2 and the first sub-pixel P1-1 may be alternately arranged in the first row 1N, and the second sub-pixel P1-2 and the third sub-pixel P3 may be alternately arranged in the second row 2N adjacent to the first row 1N. Furthermore, the second sub-pixel P2 and the first sub-pixel P1-1 may be alternately arranged in the third row 3N adjacent to the second row 2N again, as in the first row 1N, and the second sub-pixel P1-2 and the third sub-pixel P3 may be alternately arranged in the fourth row 4N again, as in the second row 2N. This arrangement of sub-pixels may be repeated up to the Nth row N.

[0099] In the same manner, the second sub-pixel P2 and the second sub-pixel P1-2 may be alternately arranged in the first column 1M, and the second sub-pixel P1-2 and the third sub-pixel P3 may be alternately arranged in the second column 2M adjacent to the first column 1M. Furthermore, the second sub-pixel P2 and the second sub-pixel P1-2 may be alternately arranged in the third column 3M again as in the first column 1M, and the second sub-pixel P1-2 and the third sub-pixel P3 may be alternately arranged in the fourth column 4M again as in the second column 2M. This arrangement of sub-pixels may be repeated up to the Mth column M.

[0100] In one or more embodiments, the unit area UA may have a square shape. Figure 6 As shown in FIG, the width W of the unit area UA in the first direction D1 may be the same as the width W of the unit area UA in the second direction D2. However, the embodiment is not limited thereto. For example, the unit area UA may have a rectangular shape.

[0101] The emission area EA of the pixel PX is a region where the emission layer 122b of the organic light emitting diode OLED is disposed, and as shown in FIG. Figure 4 As described, the size and shape of the emission area EA of the organic light emitting diode OLED can be defined by the opening OP of the pixel defining layer 119. The arrangement (placement) of the pixel PX herein may refer to the arrangement (placement) of the display element DPE, the arrangement (placement) of the pixel electrode 121, or the arrangement (placement) of the emission area EA. The size (area) of the pixel PX herein may refer to the size (area) of the emission area EA or the size of the opening OP of the pixel defining layer 119.

[0102] Figure 7 is a schematic plan view of a portion of an emission region of a sub-pixel of a display device according to one or more embodiments.

[0103] refer to Figure 7, the substrate 100 may include a unit area UA having a quadrilateral shape, and the first sub-pixel P1-1, the second sub-pixel P1-2, the second sub-pixel P2, and the third sub-pixel P3 may be spaced apart from each other in the unit area UA. The unit area UA may include a virtual quadrilateral shape VS whose center point is the center point of the unit area UA. The first sub-pixel P1-1, the second sub-pixel P1-2, the second sub-pixel P2, and the third sub-pixel P3 may be arranged at the vertices of the virtual quadrilateral shape VS.

[0104] The first subpixel P1 may include a first sub-emission area EA1-1 corresponding to the first sub-subpixel P1-1 and a second sub-emission area EA1-2 corresponding to the second sub-subpixel P1-2. The second subpixel P2 may include a second emission area EA2, and the third subpixel P3 may include a third emission area EA3.

[0105] In one or more embodiments, the size of the first sub-emission region EA1-1 may be smaller than the size of the second emission region EA2 and the third emission region EA3. In one or more embodiments, the size of the second sub-emission region EA1-2 may be smaller than the size of the second emission region EA2 and the third emission region EA3. The size of the second emission region EA2 may be smaller than the size of the third emission region EA3. The size of the first sub-emission region EA1-1 may be the same as the size of the second sub-emission region EA1-2.

[0106] In one or more embodiments, the first sub-emission region EA1-1 may include a 1-1 edge E1-1 extending generally in the first direction D1, a 1-2 edge E1-2 extending generally in the second direction D2, and a first protrusion C1 connecting the 1-1 edge E1-1 with the 1-2 edge E1-2. Figure 7 The first sub-emission region EA1-1 may have a shape in which two 1-1 edges E1-1 facing each other in the second direction D2, two 1-2 edges E1-2 facing each other in the first direction D1, and four first protrusions C1 are connected to each other. The second sub-emission region EA1-2 may have a shape in which the first sub-emission region EA1-1 is rotated 90 degrees in the clockwise or counterclockwise direction.

[0107] The second emission area EA2 may include a 2-1st edge E2-1 extending generally in the first direction D1, a 2-2nd edge E2-2 extending generally in the second direction D2, and a second protrusion C2 at which the 2-1st edge E2-1 and the 2-2nd edge E2-2 meet. Figure 7, the second emission area EA2 may have a shape in which two 2-1st edges E2-1 facing each other in the second direction D2 and two 2-2nd edges E2-2 facing each other in the first direction D1 are connected to each other.

[0108] The third emission area EA3 may include a 3-1st edge E3-1 extending generally in the first direction D1, a 3-2nd edge E3-2 extending generally in the second direction D2, and a third protrusion C3 at which the 3-1st edge E3-1 and the 3-2nd edge E3-2 meet. Figure 7 , the third emission area EA3 may have a shape in which two 3-1st edges E3-1 facing each other in the second direction D2 and two 3-2nd edges E3-2 facing each other in the first direction D1 are connected to each other.

[0109] Herein, the edge of the emission region being concave means that the emission region is curved in an inward direction, and the edge of the emission region being convex means that the emission region is curved in an outward direction.

[0110] In one or more embodiments, the first sub-emission area EA1-1 may have an approximately concave quadrilateral shape. The 1-1 edge E1-1 and the 1-2 edge E1-2 may have a concave shape. The 1-1 edge E1-1 may be curved in the second direction D2, and the 1-2 edge E1-2 may be curved in the first direction D1. The first protrusion C1 may be convex in the opposite direction toward the center of the first sub-emission area EA1-1. A portion of the first protrusion C1 may be convex in the third direction D3, and the remaining portion may be convex in the fourth direction D4. The first sub-emission area EA1-1 may have a shape in which the four sides of the virtual rectangle are concave and in which the four vertices protrude convexly.

[0111] The second emission area EA2 may have a substantially convex quadrilateral shape. The 2-1st edge E2-1 and the 2-2nd edge E2-2 may have a convex shape. The 2-1st edge E2-1 may be curved in the second direction D2, and the 2-2nd edge E2-2 may be curved in the first direction D1. Due to the convex 2-1st edge E2-1 and the 2-2nd edge E2-2, the second protrusion C2 may have a generally pointed shape. A portion of the second protrusion C2 may be pointed in the third direction D3, and the remaining portion may be pointed in the fourth direction D4. The second emission area EA2 may have a shape in which the four sides of the virtual rectangle are convex.

[0112] The third emission area EA3 may have a substantially convex quadrilateral shape. The 3-1st edge E3-1 and the 3-2nd edge E3-2 may have a convex shape. The 3-1st edge E3-1 may be curved in the second direction D2, and the 3-2nd edge E3-2 may be curved in the first direction D1. Due to the convex 3-1st edge E3-1 and the 3-2nd edge E3-2, the third protrusion C3 may have a generally pointed shape. A portion of the third protrusion C3 may be pointed in the third direction D3, and the remaining portion may be pointed in the fourth direction D4. The third emission area EA3 may have a shape in which the four sides of the virtual rectangle are convex.

[0113] The emission layer 122b of the display element DPE can be formed by depositing an emission material on the emission area EA defined by the opening OP of the pixel defining layer 119 using a fine metal mask (FMM), and the deposition efficiency can vary depending on the shape of the emission area EA. For example, the vertex portion of the quadrilateral emission area EA may not be deposited normally, or the quadrilateral emission area EA may be deposited with rounded corners, thereby reducing the aperture ratio of the pixel PX. The same can be applied to the upper material layer and / or lower material layer deposited corresponding to the emission area EA.

[0114] According to one or more embodiments, the first subpixel P1, the second subpixel P2, and the third subpixel P3 may each have a shape in which a corner portion (vertex) at which an edge extending in the first direction D1 and an edge extending in the second direction D2 intersect is protruded, thereby achieving increased deposition efficiency and aperture ratio. In addition, in one or more embodiments, because the edge of the first sub-emission area EA1-1 is concave and the edge of the emission area adjacent to the first sub-emission area EA1-1 is convex, the aperture ratio is improved, and the distances d12, d13, etc. between the subpixels are obtained, thereby reducing or preventing the possibility of defects in deposition using the FMM.

[0115] In one or more embodiments, the length L2-1 of the 2-1st edge E2-1 and the length L2-2 of the 2-2nd edge E2-2 may be the same. The length L2-1 of the 2-1st edge E2-1 and the length L2-2 of the 2-2nd edge E2-2 may refer to the width or curve length in the extending direction of each edge. The length L3-1 of the 3-1st edge E3-1 and the length L3-2 of the 3-2nd edge E3-2 may be the same. The length L3-1 of the 3-1st edge E3-1 and the length L3-2 of the 3-2nd edge E3-2 may refer to the width or curve length in the extending direction of each edge.

[0116] When the lengths of the edges of the sub-pixel emission areas are different from each other, since reflection of light is different between the long edge and the short edge, the viewing angle characteristic may be degraded.

[0117] According to one or more embodiments, because the edges of the second emission area EA2 have substantially the same length, and because the edges of the third emission area EA3 have substantially the same length, it is possible to reduce or prevent the degradation of viewing angle characteristics due to the difference in light reflection due to the difference in edge lengths. In addition, as described above, the second sub-emission area EA1-2 may have a shape in which the first sub-emission area EA1-1 is rotated 90 degrees in a clockwise or counterclockwise direction. Therefore, even when the display panel 10 is used in a form extended from side to side or in a rotated state, an image of appropriate quality can be displayed.

[0118] Figure 8A and Figure 8B Each is a plan view schematically showing a comparative example for explaining the characteristics of one or more embodiments, and Figure 9 is a comparison table for explaining aperture ratios of display devices according to one or more embodiments and comparative examples. Figure 9 Comparative Example 1 refers to Figure 8A Comparative Example 2 refers to Figure 8B and the example (hereinafter referred to as Example 1) refers to a comparative example corresponding to Figure 7 implementation method.

[0119] Figure 8A is a schematic plan view of Comparative Example 1, and Figure 8B is a schematic plan view of Comparative Example 2. Comparative Examples 1 and 2 have the same sub-pixel arrangements and the same distances between sub-pixels as those of Example 1, but differ from Example 1 in the shapes of emission areas of the sub-pixels.

[0120] In the case of comparative example 1, the emission areas of the first sub-subpixel P1-1, the second sub-subpixel P1-2, the second sub-subpixel P2, and the third sub-subpixel P3 each have a quadrilateral shape with chamfered vertices. The 1-1 edge E1-1, the 1-2 edge E1-2, the 2-1 edge E2-1, the 2-2 edge E2-2, the 3-1 edge E3-1, and the 3-2 edge E3-2 of the emission area of ​​each sub-pixel are all straight, and the corner portions of the emission area can have a rounded shape or a right angle shape.

[0121] In the case of comparative example 2, the emission areas of the first sub-subpixel P1-1 and the second sub-subpixel P1-2 may each have a convex quadrilateral shape, and the emission areas of the second sub-pixel P2 and the third sub-pixel P3 may each have a concave quadrilateral shape. In the case of comparative example 2, which is different from example 1, the 1-1 edge E1-1 and the 1-2 edge E1-2 are convex, and the 2-1 edge E2-1, the 2-2 edge E2-2, the 3-1 edge E3-1, and the 3-2 edge E3-2 are concave.

[0122] Figure 9 It is about Figure 8A Comparative Example 1. Figure 8B Comparative Example 2 and Based on Figure 7 1 and 2 are comparison tables of aperture ratio tests of pixels of Example 1. The distances between the sub-pixels included in Comparative Example 1, Comparative Example 2, and Example 1 are all equal to about 24.3 μm.

[0123] The total aperture ratio of Comparative Example 1 is about 93.89%, and the total aperture ratio of Comparative Example 2 is about 94.92%. It can be seen that the aperture ratio of Comparative Example 2, in which the edge of the emission area is curved and the emission area has a protruding corner portion (vertex), is greater than the aperture ratio of Comparative Example 1, in which the edge of the emission area is formed into a straight line.

[0124] Comparing Comparative Example 2 with Example 1, in Example 1, the edge of the emission area of ​​the separated first sub-pixel P1 is concave, and the edges of the emission areas of the second sub-pixel P2 and the third sub-pixel P3 are convex, while in Comparative Example 2, the edge of the emission area of ​​the first sub-pixel P1 is convex, and the edges of the emission areas of the second sub-pixel P2 and the third sub-pixel P3 are concave.

[0125] refer to Figure 9 , the total aperture ratio of Example 1 is 95.55%, and the total aperture ratio of Comparative Example 2 is 94.92%. That is, it can be seen that the aperture ratio of Example 1 is greater than the aperture ratio of Comparative Example 2. In order to compare the total aperture ratio, the aperture ratio of the first sub-pixel P1 of Comparative Example 2 is the same as that of the first sub-pixel P1 of Example 1. Figure 9 That is, in a state where the emission area of ​​the first subpixel P1 of comparative example 2 is convex and the emission area of ​​the first subpixel P1 of example 1 is concave and the aperture ratios of the first subpixel P1 and the second subpixel P2 are the same, when the second subpixel P2 and the third subpixel P3 are formed so that the distance between the subpixels of comparative example 2 and example 1 is approximately 24.3 μm, the size of the emission area of ​​the second subpixel P2 and the third subpixel P3 of example 1 can be larger than the size of the emission area of ​​comparative example 2.

[0126] In other words, when the emission regions having a relatively small size among the emission regions included in the unit area UA are concave, and the emission regions having a relatively large size are convex, the aperture ratio may be improved.

[0127] Figure 10 is a cross-sectional view schematically illustrating a portion of a display device according to one or more embodiments. Figure 10 yes Figure 7 A cross-sectional view of a portion of the display device taken along line II'. Figure 10 In, with Figure 4 The same reference numerals as those in the drawings denote the same elements, and thus, redundant descriptions thereof are omitted.

[0128] refer to Figure 10 as well as Figure 7 , the first sub-pixel P1 may include a first sub-pixel P1-1 and a second sub-pixel P1-2. The pixel electrode 121 of the first sub-pixel P1 may include a first sub-pixel electrode 121-1 corresponding to the first sub-pixel P1-1 and a second sub-pixel electrode 121-2 corresponding to the second sub-pixel P1-2. The pixel defining layer 119 may include a first opening OP1-1 that exposes at least a portion of the first sub-pixel electrode 121-1 to define the first sub-emission area EA1-1. The pixel defining layer 119 may include a second opening OP1-2 that exposes at least a portion of the second sub-pixel electrode 121-2 to define the second sub-emission area EA1-2. That is, the first sub-pixel electrode 121-1 may correspond to the first sub-emission area EA1-1, and the second sub-pixel electrode 121-2 may correspond to the second sub-emission area EA1-2.

[0129] In one or more embodiments, the connection line CWL may be located on the planarization layer 117. The connection line CWL may overlap at least a portion of the first subpixel electrode 121-1 and the second subpixel electrode 121-2 in the z-direction. The connection line CWL may include a conductive material. An upper planarization layer 118 may cover the connection line CWL and may be located on the planarization layer 117. The upper planarization layer 118 may include the same material as the planarization layer 117. The first subpixel electrode 121-1 and the second subpixel electrode 121-2 may be located on the upper planarization layer 118.

[0130] The first sub-pixel electrode 121-1 and the second sub-pixel electrode 121-2 can be electrically connected to the connection line CWL through the through-hole of the upper planarization layer 118. Therefore, the first sub-pixel electrode 121-1 and the second sub-pixel electrode 121-2 can be electrically connected to each other. The connection line CWL can be electrically connected to the thin film transistor TFT by contacting the source electrode SE or the drain electrode DE through the through-hole of the planarization layer 117. The first sub-pixel electrode 121-1 and the second sub-pixel electrode 121-2 can be electrically connected to the same pixel circuit PC. The first sub-sub-pixel P1-1 and the second sub-sub-pixel P1-2 can be driven by the same pixel circuit PC.

[0131] and Figure 10 Differently, in one or more embodiments, the first subpixel electrode 121 - 1 and the second subpixel electrode 121 - 2 may be integrally formed, and a connection line connecting the first subpixel electrode 121 - 1 to the second subpixel electrode 121 - 2 may be omitted.

[0132] According to one or more embodiments, the first subpixel P1, the second subpixel P2, and the third subpixel P3 configured to emit light of different corresponding colors in the unit area UA may be spaced apart from each other. The first subpixel P1 may include a first subpixel P1-1 and a second subpixel P1-2 that are smaller than the second subpixel P2 and the third subpixel P3. The emission areas of the first subpixel P1-1 and the second subpixel P1-2 may have concave edges, and the emission areas of the second subpixel P2 and the third subpixel P3 may have convex edges. As a result, deposition efficiency may be improved, thereby improving the aperture ratio of the pixel PX.

[0133] In the above description, for ease of explanation, the organic light emitting diode OLED as the display element DPE is described as included in the display device. However, the embodiments of the present disclosure can be applied to various display devices such as liquid crystal display devices, electrophoretic display devices, inorganic electroluminescent (EL) display devices, etc.

[0134] The display device according to the embodiment may be an electronic device such as a smartphone, a mobile phone, a navigation device, a game console, a television (TV), a head unit, a notebook computer, a laptop computer, a tablet computer, a personal media player (PMP), or a personal digital assistant (PDA). In addition, the electronic device may be a flexible device.

[0135] According to the above, a display device is provided in which the emission area is increased and the deposition efficiency in the manufacturing process is improved. However, the scope of the present disclosure is not limited to these effects.

[0136] It should be understood that the embodiments described herein should be considered to be descriptive only and not for the purpose of limitation. The description of aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the appended claims and the functional equivalents to be included therein.

Claims

1. A display device, characterized in that: include: a substrate comprising quadrilateral unit regions repeatedly arranged in a first direction and in a second direction perpendicular to the first direction; a first sub-pixel for emitting a first color and including, at one of the unit areas, a first sub-emission region and a second sub-emission region spaced apart from each other; a second sub-pixel configured to emit a second color and including, at said one of said unit areas, a second emission area adjacent to said first sub-emission area in said first direction; as well as a third sub-pixel for emitting a third color and including, at said one of said unit areas, a third emission area adjacent to said first sub-emission area in said second direction, The first sub-emitting region includes a concave 1-1 edge extending in the first direction, a concave 1-2 edge extending in the second direction, and a first protrusion connecting the 1-1 edge to the 1-2 edge.

2. The display device according to claim 1, wherein The first protrusion is convex in a third direction intersecting the first direction and the second direction.

3. The display device according to claim 1, wherein The first sub-emission area is smaller than the second emission area and the third emission area.

4. The display device according to claim 1, wherein The second emission region includes a 2-1 edge extending in the first direction and having a convex shape and a 2-2 edge extending in the second direction and having a convex shape.

5. The display device according to claim 4, wherein: The third emission region includes a 3-1 edge extending in the first direction and having a convex shape and a 3-2 edge extending in the second direction and having a convex shape.

6. The display device according to claim 5, wherein: The length of the 2-1 edge is equal to the length of the 2-2 edge, and The length of the 3-1 edge is equal to the length of the 3-2 edge.

7. The display device according to claim 1, wherein The size of the second sub-emission area is equal to the size of the first sub-emission area.

8. The display device according to claim 1, wherein The second sub-emission region has a shape in which the first sub-emission region is rotated 90 degrees.

9. The display device according to claim 1, wherein Also includes: A pixel defining layer is above the substrate, covers at least a portion of the pixel electrode of the first sub-pixel, and defines an opening, wherein the opening defines the first sub-emission region and the second sub-emission region.

10. The display device according to claim 9, wherein The pixel electrode of the first sub-pixel includes a first sub-pixel electrode corresponding to the first sub-emission area and a second sub-pixel electrode corresponding to the second sub-emission area, and The first sub-pixel electrode and the second sub-pixel electrode are electrically connected to each other.

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