Protective filter circuit of HDMI (High Definition Multimedia Interface)

Abstract

The utility model discloses a protection filter circuit of an HDM I interface, comprising a first protection circuit comprising at least one of a first double-line balance filter, a second double-line balance filter, a third double-line balance filter and a fourth double-line balance filter; wherein the first double-line balance filter is used for filtering signal lines sent by a TMDS D2 + interface and a TMDS D2-interface of the HDM I; the second double-line balance filter is used for filtering signal lines sent by a TMDS D1 + interface and a TMDS D1-interface of the HDM I; the third double-line balance filter is used for filtering signal lines sent by a TMDS D0 + interface and a TMDS D0-interface of the HDM I; and the fourth double-line balance filter is used for filtering signal lines sent by the TMDS CK + interface and the TMDS CK-interface of the HDM I. Compared with a traditional filtering scheme, the cost is reduced, the protection filtering circuit has extremely low parasitic inductance, high-frequency filtering can be expanded to a GHz range, and the filtering effect is better.

Description

Technical Field

[0001] The utility model relates to the field of electronic product interfaces, in particular to a protective filter circuit for an HDMI interface. Background Art

[0002] With the continuous development of modern technology, electronic products are being updated at an increasingly rapid pace, and we are using more and more electronic products in our daily lives. In such a complex electromagnetic compatibility environment, the anti-interference ability of the product itself has attracted much attention. Electronic products must be able to operate normally even when subjected to surrounding electromagnetic interference, and the electronic products themselves must not generate electromagnetic interference to other nearby devices, thereby affecting their normal operation.

[0003] In daily life, the HDMI (High Definition Multimedia Interface) interface is a widely used interface in various electronic devices, such as TVs, computers, and projectors. Because the HDMI interface can transmit high-definition video and audio signals simultaneously, it is very susceptible to electromagnetic interference, resulting in problems such as image blur, color distortion, and audio noise. Utility Model Content

[0004] To solve the above technical problems, the present application provides a protection filtering circuit for an HDMI interface, comprising: a first protection circuit, the first protection circuit including at least one of a first two-wire balanced filter, a second two-wire balanced filter, a third two-wire balanced filter, and a fourth two-wire balanced filter; wherein the first two-wire balanced filter is used to filter the signal lines emitted from the TMDS D2+ interface and the TMDS D2- interface of the HDMI; the second two-wire balanced filter is used to filter the signal lines emitted from the TMDS D1+ interface and the TMDS D1- interface of the HDMI; the third two-wire balanced filter is used to filter the signal lines emitted from the TMDS D0+ interface and the TMDS D0- interface of the HDMI; and the fourth two-wire balanced filter is used to filter the signal lines emitted from the TMDS CK+ interface and the TMDS CK- interface of the HDMI.

[0005] Preferably, a first pin of the first two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D2+ interface of HDMI, a second pin of the first two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D2- interface of HDMI, and a third pin and a fourth pin of the first two-wire balanced filter are grounded; a first pin of the second two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D1+ interface of HDMI, a second pin of the second two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D1- interface of HDMI, and a third pin and a fourth pin of the second two-wire balanced filter are grounded; a first pin of the third two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D0+ interface of HDMI, a second pin of the third two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS D0- interface of HDMI, and a third pin and a fourth pin of the third two-wire balanced filter are grounded; a first pin of the fourth two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS CK+ interface of HDMI, a second pin of the fourth two-wire balanced filter is connected to a signal line and a chip emitted by a TMDS CK- interface of HDMI, and a third pin and a fourth pin of the fourth two-wire balanced filter are grounded.

[0006] Preferably, a second protection circuit is further included, which is used to filter at least one of the signal lines emitted by the TMDS D2+ interface, TMDS D2- interface, TMDS D1+ interface, TMDS D1- interface, TMDS D0+ interface, TMDS D0- interface, TMDS CK+ interface and TMDS CK- interface of HDMI.

[0007] Preferably, the second protection circuit includes at least one of a first transient voltage suppressor and a second transient voltage suppressor, a first pin of the first transient voltage suppressor is connected to the TMDS D2+ interface of HDMI, a second pin is connected to the TMDS D2- interface of HDMI, a third pin is connected to the TMDS DISHIELD interface of HDMI, a fourth pin is connected to the TMDS D1+ interface of HDMI, a fifth pin is connected to the TMDS D1- interface of HDMI, a sixth pin, a seventh pin, a ninth pin, and a tenth pin are connected to the chip, and an eighth pin is grounded; a first pin of the second transient voltage suppressor is connected to the TMDS D0+ interface of HDMI, a second pin is connected to the TMDS D0- interface of HDMI, a third pin is connected to the TMDS CKSHIELD interface of HDMI, a fourth pin is connected to the TMDS CK+ interface of HDMI, a fifth pin is connected to the TMDS CK- interface of HDMI, a sixth pin, a seventh pin, a ninth pin, and a tenth pin are connected to the chip, and an eighth pin is grounded.

[0008] Preferably, a third protection circuit is further included, and the third protection circuit is used to filter at least one of the signal lines sent from the CEC interface, SCL interface, SDA interface, +5V POWER, and HOTPLUGDET interface of HDMI.

[0009] Preferably, the third protection circuit includes at least one of a third transient voltage suppressor, a fourth transient voltage suppressor, a fifth transient voltage suppressor, a sixth transient voltage suppressor and a seventh transient voltage suppressor; the first end of the third transient voltage suppressor is connected to the signal line and chip emitted by the CEC interface of HDMI, and the second end is grounded; the first end of the fourth transient voltage suppressor is connected to the signal line and chip emitted by the SCL interface of HDMI, and the second end is grounded; the first end of the fifth transient voltage suppressor is connected to the signal line and chip emitted by the SDA interface of HDMI, and the second end is grounded; the first end of the sixth transient voltage suppressor is connected to the signal line and +5V power supply emitted by the +5V POWER interface of HDMI, and the second end is grounded; the first end of the seventh transient voltage suppressor is connected to the signal line and HOTPLUG terminal emitted by the HOTPLUGDET interface of HDMI, and the second end is grounded.

[0010] Preferably, a fourth protection circuit is further included, and the fourth protection circuit is used to filter the signal line sent from the +5V POWER interface of the HDMI.

[0011] Preferably, the fourth protection circuit includes a first inductor, a first capacitor and a second capacitor, the first inductor is connected between the +5V POWER interface of HDMI and the +5V power supply, the first end of the first capacitor is connected to the first end of the first inductor, and the second end of the first capacitor is grounded; the first end of the second capacitor is connected to the second end of the first inductor, and the second end of the second capacitor is grounded.

[0012] The present invention provides a protective filter circuit for an HDMI interface, which has the following beneficial effects: Conventional HDMI differential signal line filter circuits consist of four signal line common-mode filters, resulting in electromagnetic interference in frequency bands above 200 MHz during electromagnetic compatibility testing, and incomplete filtering. Compared to conventional filtering solutions, the present invention replaces the common-mode filter with a dual-line balanced filter, reducing costs. Furthermore, the protective filter circuit has extremely low parasitic inductance, extending high-frequency filtering to the GHz range and achieving improved filtering effectiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the present invention will be further described below in conjunction with the accompanying drawings and embodiments. The drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0014] Figure 1 This is a schematic diagram of the working principle of an HDMI interface protection filter circuit in a preferred embodiment of the utility model;

[0015] Figure 2 This is an appearance diagram of a dual-line balanced filter according to a preferred embodiment of the present utility model;

[0016] Figure 3 This is a diagram of the internal structure of a dual-line balanced filter according to a preferred embodiment of the present utility model. DETAILED DESCRIPTION

[0017] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0018] See also Figure 1 , Figure 1The present application provides a protection filtering circuit for an HDMI interface, comprising: a first protection circuit 1, the first protection circuit 1 including at least one of a first dual-line balanced filter BDL1, a second dual-line balanced filter BDL2, a third dual-line balanced filter BDL3, and a fourth dual-line balanced filter BDL4; wherein the first dual-line balanced filter BDL1 is used to filter the signal lines emitted from the TMDS D2+ interface and TMDS D2- interface of the HDMI; the second dual-line balanced filter BDL2 is used to filter the signal lines emitted from the TMDS D1+ interface and TMDS D1- interface of the HDMI; the third dual-line balanced filter BDL3 is used to filter the signal lines emitted from the TMDS D0+ interface and TMDS D0- interface of the HDMI; and the fourth dual-line balanced filter BDL4 is used to filter the signal lines emitted from the TMDS CK+ interface and TMDS CK- interface of the HDMI.

[0019] like Figure 2 and Figure 3 As shown, Figure 2 An appearance diagram of a dual-line balanced filter according to a preferred embodiment of the utility model; Figure 3 This is a diagram of the internal structure of a dual-line balanced filter in a preferred embodiment of the present invention. The internal structure of the dual-line balanced filter of the present application is based on the structure of MLCC (Multi-layer ceramic capacitors), with the addition of a reference electrode, namely a Faraday cage shielding layer. The Faraday cage separates the two poles of the MLCC capacitor, forming two rectangular coaxial structures, which are equivalent to two balanced Y capacitors. Since the two electrodes are not completely isolated, a capacitor is formed between them (A and B), which is equivalent to an X capacitor. This makes the dual-line balanced filter have extremely low parasitic inductance, can extend high-frequency filtering to the GHz range, and the internal integration of two balanced capacitor components can effectively reduce the conversion of differential common-mode noise.

[0020] The HDMI interface protection filter circuit provided in this application provides targeted protection filtering for HDMI interfaces, reducing EMC (Electromagnetic Compatibility) testing costs, optimizing circuit design, and improving product EMC performance. Compared to traditional filtering solutions, this application replaces the common-mode filter with a two-wire balanced filter, reducing costs. The protection filter circuit also boasts extremely low parasitic inductance, extending high-frequency filtering to the GHz range and achieving improved filtering performance.

[0021] In one embodiment, the first pin of the first two-line balanced filter BDL1 is connected to the signal line and chip emitted by the TMDSD2+ interface of HDMI, the second pin of the first two-line balanced filter BDL1 is connected to the signal line and chip emitted by the TMDSD2- interface of HDMI, and the third pin and the fourth pin of the first two-line balanced filter BDL1 are grounded; the first pin of the second two-line balanced filter BDL2 is connected to the signal line and chip emitted by the TMDS D1+ interface of HDMI, the second pin of the second two-line balanced filter BDL2 is connected to the signal line and chip emitted by the TMDS D1- interface of HDMI, and the third pin and the fourth pin of the second two-line balanced filter BDL2 are grounded; the first pin of the third two-line balanced filter BDL3 is connected to the signal line and chip emitted by the TMDS D0+ interface of HDMI, and the second pin of the third two-line balanced filter BDL3 is connected to the TMDS The signal line emitted by the D0- interface is connected to the chip, and the third pin and the fourth pin of the third two-line balanced filter BDL3 are grounded; the first pin of the fourth two-line balanced filter BDL4 is connected to the signal line emitted by the TMDSCK+ interface of HDMI and the chip, the second pin of the fourth two-line balanced filter BDL4 is connected to the signal line emitted by the TMDS CK- interface of HDMI and the chip, and the third pin and the fourth pin of the fourth two-line balanced filter BDL4 are grounded.

[0022] In one embodiment, the protection filtering circuit of the HDMI interface of the present application further includes a second protection circuit 2, which is used to filter at least one of the signal lines emitted by the TMDS D2+ interface, TMDS D2- interface, TMDS D1+ interface, TMDS D1- interface, TMDS D0+ interface, TMDS D0- interface, TMDS CK+ interface and TMDS CK- interface of the HDMI.

[0023] In one embodiment, the second protection circuit 2 includes at least one of a first transient voltage suppressor D1 and a second transient voltage suppressor D2, a first pin of the first transient voltage suppressor D1 is connected to the TMDS D2+ interface of HDMI, a second pin is connected to the TMDS D2- interface of HDMI, a third pin is connected to the TMDS DI SHIELD interface of HDMI, a fourth pin is connected to the TMDS D1+ interface of HDMI, a fifth pin is connected to the TMDS D1- interface of HDMI, a sixth pin, a seventh pin, a ninth pin, and a tenth pin are connected to the chip, and an eighth pin is grounded; a first pin of the second transient voltage suppressor D2 is connected to the TMDS D0+ interface of HDMI, a second pin is connected to the TMDS D0- interface of HDMI, a third pin is connected to the TMDS CK SHIELD interface of HDMI, a fourth pin is connected to the TMDS CK+ interface of HDMI, a fifth pin is connected to the TMDSCK- interface of HDMI, a sixth pin, a seventh pin, a ninth pin, and a tenth pin are connected to the chip, and an eighth pin is grounded.

[0024] The first and second transient voltage suppressors (TVSs) D1 and D2 are housed in the DFN2510-10 package. This packaged TVS can simultaneously protect four signal lines, saving space and cost. Furthermore, the first protection circuit provides a secondary discharge of residual interference energy after the second protection circuit has been activated, preventing electrostatic damage to downstream circuits. This provides better protection and quickly resolves EMC issues.

[0025] In one embodiment, the protection filtering circuit of the HDMI interface of the present application further includes a third protection circuit 3, which is used to filter at least one of the signal lines emitted by the HDMI CEC interface, SCL interface, SDA interface, +5V POWER interface, and HOTPLUGDET interface.

[0026] In one embodiment, the third protection circuit 3 includes at least one of a third transient voltage suppressor D3, a fourth transient voltage suppressor D4, a fifth transient voltage suppressor D5, a sixth transient voltage suppressor D6 and a seventh transient voltage suppressor D7; a first end of the third transient voltage suppressor D3 is connected to the signal line and chip emitted by the CEC interface of HDMI, and a second end is grounded; a first end of the fourth transient voltage suppressor D4 is connected to the signal line and chip emitted by the SCL interface of HDMI, and a second end is grounded; a first end of the fifth transient voltage suppressor D5 is connected to the signal line and chip emitted by the SDA interface of HDMI, and a second end is grounded; a first end of the sixth transient voltage suppressor D6 is connected to the signal line and +5V power supply emitted by the +5V POWER interface of HDMI, and a second end is grounded; a first end of the seventh transient voltage suppressor D7 is connected to the signal line and HOTPLUG terminal emitted by the HOTPLUGDET interface of HDMI, and a second end is grounded.

[0027] The protection filter circuit of the HDMI interface of this embodiment can quickly discharge electrostatic energy, so that the chip of the back-end circuit will not be broken down by the transient high-voltage energy of static electricity.

[0028] In one embodiment, the protection filter circuit of the HDMI interface of the present application further includes a fourth protection circuit 4, which is used to filter the signal line emitted by the +5V POWER interface of the HDMI.

[0029] In one embodiment, the fourth protection circuit includes a first inductor L1, a first capacitor C1, and a second capacitor C2. The first inductor L1 is connected between the +5V POWER interface of the HDMI and the +5V power supply. The first end of the first capacitor C1 is connected to the first end of the first inductor L1, and the second end of the first capacitor C2 is grounded. The first end of the second capacitor C2 is connected to the second end of the first inductor L1, and the second end of the second capacitor C2 is grounded.

[0030] The protection filter circuit of the HDMI interface of this embodiment can effectively filter out power noise on the power line, preventing the noise from coupling to the signal line and causing interference.

[0031] It should be noted that, in this specification, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0032] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A protective filter circuit for an HDMI interface, characterized in that: include: A first protection circuit, the first protection circuit includes at least one of a first dual-line balanced filter, a second dual-line balanced filter, a third dual-line balanced filter and a fourth dual-line balanced filter; wherein the first dual-line balanced filter is used to filter the signal lines emitted by the TMDSD2+ interface and TMDSD2- interface of HDM I; the second dual-line balanced filter is used to filter the signal lines emitted by the TMDSD1+ interface and TMDSD1- interface of HDM I; the third dual-line balanced filter is used to filter the signal lines emitted by the TMDSD0+ interface and TMDSD0- interface of HDMI; and the fourth dual-line balanced filter is used to filter the signal lines emitted by the TMDSCK+ interface and TMDS CK- interface of HDM I.

2. The protection filter circuit of the HDMI interface according to claim 1, characterized in that: The first pin of the first two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD2+ interface of HDM I, the second pin of the first two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD2- interface of HDMI, and the third pin and the fourth pin of the first two-wire balanced filter are grounded; the first pin of the second two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD1+ interface of HDM I, the second pin of the second two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD1- interface of HDM I, and the third pin and the fourth pin of the second two-wire balanced filter are grounded; the first pin of the third two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD0+ interface of HDMI, the second pin of the third two-wire balanced filter is connected to the signal line and chip emitted by the TMDSD0- interface of HDM I, and the third pin and the fourth pin of the third two-wire balanced filter are grounded; the first pin of the fourth two-wire balanced filter is connected to the signal line and chip emitted by the TMDS CK+ interface of HDM I, and the second pin of the fourth two-wire balanced filter is connected to the TMDS The signal line emitted by the CK-interface is connected to the chip, and the third pin and the fourth pin of the fourth two-wire balanced filter are grounded.

3. The protection filter circuit of the HDMI interface according to claim 1, characterized in that: It also includes a second protection circuit, which is used to filter at least one of the signal lines emitted by the TMDSD2+ interface, TMDSD2- interface, TMDSD1+ interface, TMDSD1- interface, TMDSD0+ interface, TMDSD0- interface, TMDS CK+ interface and TMDS CK- interface of HDM I.

4. The protection filter circuit of the HDMI interface according to claim 3, characterized in that: The second protection circuit includes at least one of a first transient voltage suppressor and a second transient voltage suppressor, wherein the first pin of the first transient voltage suppressor is connected to the TMDSD2+ interface of HDMI, the second pin is connected to the TMDSD2- interface of HDMI, the third pin is connected to the TMDSDI SHIELD interface of HDMI, the fourth pin is connected to the TMDSD1+ interface of HDMI, the fifth pin is connected to the TMDSD1- interface of HDMI, the sixth pin, the seventh pin, the ninth pin, and the tenth pin are connected to the chip, and the eighth pin is grounded; the first pin of the second transient voltage suppressor is connected to the TMDSD0+ interface of HDMI, the second pin is connected to the TMDSD0- interface of HDMI, the third pin is connected to the TMDS CK SHIELD interface of HDMI, the fourth pin is connected to the TMDS CK+ interface of HDMI, the fifth pin is connected to the TMDS CK- interface of HDMI, the sixth pin, the seventh pin, the ninth pin, and the tenth pin are connected to the chip, and the eighth pin is grounded.

5. The protection filter circuit of the HDMI interface according to claim 1, wherein: It also includes a third protection circuit, which is used to filter at least one of the signal lines sent from the CEC interface, SCL interface, SDA interface, +5V POWER interface, and HOTPLUGDET interface of HDMI.

6. The protection filter circuit of the HDMI interface according to claim 5, characterized in that: The third protection circuit includes at least one of a third transient voltage suppressor, a fourth transient voltage suppressor, a fifth transient voltage suppressor, a sixth transient voltage suppressor and a seventh transient voltage suppressor; a first end of the third transient voltage suppressor is connected to the signal line and chip emitted by the CEC interface of HDMI, and a second end is grounded; a first end of the fourth transient voltage suppressor is connected to the signal line and chip emitted by the SCL interface of HDMI, and a second end is grounded; a first end of the fifth transient voltage suppressor is connected to the signal line and chip emitted by the SDA interface of HDMI, and a second end is grounded; a first end of the sixth transient voltage suppressor is connected to the signal line and +5V power supply emitted by the +5V POWER interface of HDMI, and a second end is grounded; a first end of the seventh transient voltage suppressor is connected to the signal line and HOTPLUG terminal emitted by the HOTPLUGDET interface of HDMI, and a second end is grounded.

7. The protection filter circuit of the HDMI interface according to claim 1, characterized in that: The device further comprises a fourth protection circuit, which is used to filter the signal line sent from the +5V POWER interface of the HDMI.

8. The protection filter circuit of the HDMI interface according to claim 7, characterized in that: The fourth protection circuit includes a first inductor, a first capacitor, and a second capacitor. The first inductor is connected between the +5V POWER interface of the HDMI and the +5V power supply. The first end of the first capacitor is connected to the first end of the first inductor, and the second end of the first capacitor is grounded. The first end of the second capacitor is connected to the second end of the first inductor, and the second end of the second capacitor is grounded.

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