Over-voltage and under-voltage protection circuit

Abstract

The utility model provides an overvoltage and undervoltage protection circuit, and relates to the technical field of overvoltage and undervoltage protection. The under-voltage control sub-circuit and the overvoltage control sub-circuit respectively monitor the voltage of a target area, when an under-voltage or overvoltage condition is detected, the corresponding protection sub-circuit is activated, and the under-voltage protection sub-circuit realizes protection by connecting a first pin of a chip to an external low level, so that the output power is reduced or the output is completely closed; according to the overvoltage protection circuit, the internal logic of a control chip is utilized, accurate under-voltage protection can be achieved without complex ADC conversion, the overvoltage protection sub-circuit achieves protection by cutting off connection between a second pin and an external high level, the pins return to a low level state due to the action of an internal pull-down resistor by cutting off connection between the external high level, and the overvoltage protection sub-circuit achieves overvoltage protection by cutting off the external high level connection. As a high-digit ADC (Analog to Digital Converter) does not need to be used, quantization errors and nonlinear errors related to the ADC are eliminated, higher precision is kept, the cost is reduced, and the balance between the precision and the cost is realized.

Description

Technical Field

[0001] The present application relates to the technical field of overvoltage and undervoltage protection, and in particular to an overvoltage and undervoltage protection circuit. Background Art

[0002] In electronic devices, power management is a crucial part. In order to protect electronic devices from voltage fluctuations, overvoltage and undervoltage protection circuits are widely used. This protection mechanism can cut off the power supply in time when the voltage is too high or too low, thereby avoiding damage to the equipment.

[0003] At present, the over-voltage and under-voltage protection circuits of related technologies are usually implemented using a single-chip microcomputer or a comparator. In single-chip microcomputer applications, voltage information is collected through an analog-to-digital converter (ADC), and then judgment and control are performed based on preset thresholds. Comparator applications compare the collected voltage with a reference voltage to achieve over-voltage and under-voltage protection functions. These solutions require corresponding peripheral components to support the normal operation of the circuit.

[0004] However, when using a single-chip microcomputer, the ADC with different bits will lead to different degrees of temperature control errors. For example, the error of an 8-bit single-chip microcomputer can reach 39mV (1 / 2 8 ), while the error of 12-bit microcontroller is about 9.6mV (1 / 2 12 Increasing the number of ADC bits improves accuracy, but also increases cost. Therefore, an overvoltage and undervoltage protection circuit is needed that strikes a balance between accuracy and cost. Utility Model Content

[0005] The present application provides an overvoltage and undervoltage protection circuit for improving detection accuracy while maintaining cost.

[0006] In a first aspect, the present application provides an overvoltage and undervoltage protection circuit, including: an undervoltage protection circuit and an overvoltage protection circuit;

[0007] The undervoltage protection circuit includes an undervoltage control subcircuit and an undervoltage protection subcircuit;

[0008] The undervoltage control subcircuit has a reference terminal connected to the target area, an input terminal connected to an external high level, and an output terminal connected to the detection terminal of the undervoltage protection subcircuit; it is used to obtain the voltage of the target area, and when the voltage of the target area is lower than the preset undervoltage protection voltage, it introduces an external high level from the input terminal and outputs it from the output terminal; the input terminal and output terminal of the undervoltage control subcircuit are the same terminal;

[0009] The input end of the undervoltage protection subcircuit is connected to the first pin of the chip, and the output end is connected to the external low level. When the detection end detects an external high level, the first pin is connected to the external low level. The level of the first pin is required to be greater than the external low level.

[0010] The overvoltage protection circuit includes an overvoltage control subcircuit and an overvoltage protection subcircuit;

[0011] The reference terminal of the overvoltage control subcircuit is connected to the target area, the input terminal is connected to the external high level, and the output terminal is connected to the detection terminal of the overvoltage protection subcircuit. The overvoltage control subcircuit is used to obtain the voltage of the target area. When the voltage of the target area is higher than the preset overvoltage protection voltage, the output terminal switches from outputting the external high level to outputting the preset control voltage. The input terminal and output terminal of the overvoltage control subcircuit are the same terminal.

[0012] The input end of the overvoltage protection subcircuit is connected to the external high level, and the output end is connected to the second pin of the chip. It is used to cut off the connection between the second pin and the external high level when the detection end detects a preset control voltage, where the level requirement of the second pin is greater than that of the first pin.

[0013] By adopting the above technical solution, the undervoltage control subcircuit and the overvoltage control subcircuit respectively monitor the voltage in the target area. When an undervoltage or overvoltage condition is detected, the corresponding protection subcircuit is activated. The undervoltage protection subcircuit achieves protection by connecting the first pin of the chip to an external low voltage, reducing the output power or completely shutting down the output. This utilizes the internal logic of the control chip and achieves precise undervoltage protection without complex ADC conversion. The overvoltage protection subcircuit achieves protection by disconnecting the second pin from the external high voltage. By disconnecting the external high voltage connection, these pins return to a low state due to the action of internal pull-down resistors, thus stopping the chip from operating. By eliminating the need for a high-bit ADC, the quantization error and nonlinearity associated with the ADC are eliminated. At the same time, the key control pins of the chip are directly operated instead of through a complex analog-to-digital conversion process. This direct control reduces intermediate links and reduces the possibility of error accumulation. Therefore, this solution reduces cost while maintaining high accuracy, achieving a balance between accuracy and cost.

[0014] In conjunction with some embodiments of the first aspect, in some embodiments, the undervoltage protection circuit further includes an undervoltage difference adjustable subcircuit;

[0015] The detection end of the undervoltage hysteresis adjustable subcircuit is connected to the output end of the undervoltage control subcircuit, and the input end is interconnected with the reference end and the target area of ​​the undervoltage control subcircuit; when the detection end detects an external high level, a feedback network is formed between the reference end and the target area of ​​the undervoltage control subcircuit, so that the voltage obtained by the detection end of the undervoltage protection subcircuit is reduced.

[0016] By adopting the above technical solution, when the undervoltage control subcircuit detects undervoltage and outputs a high level, the undervoltage hysteresis adjustable subcircuit will form a feedback network between the reference end of the undervoltage control subcircuit and the target area. The function of this feedback network is to reduce the voltage obtained by the detection end of the undervoltage protection subcircuit, which can prevent the frequent switching of the protection circuit caused by repeated voltage fluctuations near the critical point. Specifically, when the voltage recovers from the undervoltage state, it needs to reach a higher threshold before the protection state can be released. This avoids the frequent switching phenomenon that may occur during the slow recovery of the voltage.

[0017] In conjunction with some embodiments of the first aspect, in some embodiments, the undervoltage protection circuit further includes an undervoltage compensation subcircuit;

[0018] The input end of the undervoltage compensation subcircuit is interconnected with the reference end and the target area of ​​the undervoltage control subcircuit, and the output end of the undervoltage compensation subcircuit is interconnected with the input end and the output end of the undervoltage control subcircuit, so as to slow down the voltage rise speed when the voltage at the input end of the undervoltage control subcircuit increases, and slow down the voltage fall speed when the voltage at the output end of the undervoltage control subcircuit decreases.

[0019] By adopting the above technical solution, the undervoltage compensation subcircuit is connected to the input and output terminals of the undervoltage control subcircuit, thereby playing a buffering role when the voltage changes. When the input voltage of the undervoltage control subcircuit increases, the undervoltage compensation subcircuit will slow down the voltage rise rate; when the output voltage decreases, it will slow down the voltage fall rate, making the voltage change smoother. This not only avoids the voltage jump problem at the critical point, but also improves the response speed of the circuit near the undervoltage point.

[0020] In conjunction with some embodiments of the first aspect, in some embodiments, the undervoltage protection circuit further includes a rectifier and filter subcircuit;

[0021] The reference end of the undervoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit, and the reference end of the overvoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit; the voltage of the target area is rectified and filtered and then input into the reference end of the undervoltage control subcircuit and the reference end of the overvoltage control subcircuit respectively.

[0022] By employing this technical solution, the rectifier and filter subcircuit is located between the target area and the reference terminals of the undervoltage and overvoltage control subcircuits, ensuring that only positive voltage is transmitted, preventing potential damage to the circuits caused by negative voltage. Furthermore, the filtering function smoothes voltage fluctuations and filters out high-frequency noise and transient interference. This results in a more stable and reliable voltage signal, providing an accurate reference voltage for the undervoltage and overvoltage control subcircuits, thereby reducing false triggering and improving detection accuracy.

[0023] In conjunction with some embodiments of the first aspect, in some embodiments, the overvoltage protection circuit further includes a voltage stabilization subcircuit;

[0024] The input end of the voltage stabilization subcircuit is interconnected with the output end of the overvoltage protection subcircuit and the second pin, and is used to stabilize the voltage received by the second pin to a preset stable voltage when the voltage in the target area is not higher than the preset overvoltage protection voltage.

[0025] By adopting this technical solution, the voltage stabilization subcircuit is connected to the output terminals of the overvoltage protection subcircuit and the chip's second pin. Under normal operating conditions (i.e., when the voltage in the target region is no higher than the preset overvoltage protection voltage), the voltage stabilization subcircuit stabilizes the voltage received by the second pin at a preset stable voltage value. This ensures that the chip's second pin receives a stable power supply within its normal operating range, improving the chip's operating efficiency and lifespan.

[0026] In conjunction with some embodiments of the first aspect, in some embodiments, the overvoltage protection circuit further includes an overvoltage difference adjustable subcircuit;

[0027] The detection end and input end of the overvoltage hysteresis adjustable subcircuit are interconnected with the output end of the overvoltage control subcircuit, and the output end is interconnected with the reference end and target area of ​​the overvoltage control subcircuit; when the detection end detects a preset voltage, a feedback network is formed between the reference end and the target area of ​​the overvoltage control subcircuit, so that the voltage obtained by the detection end of the overvoltage protection subcircuit is reduced.

[0028] By adopting the above technical solution, when the overvoltage control subcircuit detects overvoltage and outputs a preset voltage, the overvoltage hysteresis adjustable subcircuit forms a feedback network between the reference end of the overvoltage control subcircuit and the target area. The function of this feedback network is to reduce the voltage obtained by the detection end of the overvoltage protection subcircuit, thereby preventing the protection circuit from frequently switching when the voltage fluctuates repeatedly near the critical point. When the voltage drops from the overvoltage state, it needs to drop to a lower threshold before the protection state can be released, thereby avoiding the frequent switching phenomenon that may occur during the slow decline of voltage.

[0029] In conjunction with some embodiments of the first aspect, in some embodiments, the overvoltage protection circuit further includes an overvoltage compensation subcircuit;

[0030] The input end of the overvoltage compensation subcircuit is interconnected with the reference end and the target area of ​​the overvoltage control subcircuit, and the output end of the overvoltage compensation subcircuit is interconnected with the input end and the output end of the overvoltage control subcircuit, so as to slow down the voltage rise speed when the voltage at the input end of the overvoltage control subcircuit increases, and slow down the voltage fall speed when the voltage at the output end of the overvoltage control subcircuit decreases.

[0031] By adopting the above technical solution, the overvoltage compensation subcircuit is connected to the input and output terminals of the overvoltage control subcircuit, and acts as a buffer when the voltage changes. When the input voltage of the overvoltage control subcircuit increases, the overvoltage compensation subcircuit slows down the voltage rise rate; when the output voltage decreases, it slows down the voltage fall rate, making the voltage change smoother. This not only avoids the voltage jump problem at the critical point, but also improves the response speed of the circuit near the overvoltage point.

[0032] In a second aspect, the present application provides an over-voltage and under-voltage protection circuit, comprising: a three-terminal adjustable shunt shunt regulator Q1, a voltage regulator D5, a transistor Q2, a three-terminal adjustable shunt shunt regulator Q6, a voltage regulator D7, a transistor Q4, and a transistor Q5;

[0033] The reference terminal of the three-terminal adjustable shunt shunt regulator Q1 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator D5, and the external high level is interconnected, and the output terminal is grounded;

[0034] The output end of the voltage regulator D5 is connected to the base of the transistor Q2;

[0035] The sending stage of transistor Q2 is connected to the first pin, and the collector stage is grounded;

[0036] The reference terminal of the three-terminal adjustable shunt shunt regulator Q6 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator tube D7, and the external high level is interconnected, and the output terminal is grounded;

[0037] The output end of the voltage regulator tube D7 is connected to the base of the Darlington tube composed of the transistor Q4 and the transistor Q5;

[0038] The sending stage of the Darlington tube is connected to the external high level, and the collector stage of the Darlington tube is connected to the second pin.

[0039] In a third aspect, the present application provides an over-voltage and under-voltage protection circuit, including: a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a rectifier diode D1, a rectifier diode D2, a rectifier diode D3, a rectifier diode D4, a rectifier diode D6, a Zener diode D5, a Zener diode D7, a Zener diode D8, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, a three-terminal adjustable shunt shunt regulator Q1, a three-terminal adjustable shunt shunt regulator Q6, a transistor Q2, a transistor Q3, a transistor Q4, a transistor Q5, and a MOS tube Q7;

[0040] The anode of the rectifier diode D1 and the anode of the rectifier diode D3 are both connected to the target area, the cathode of the rectifier diode D1 and the cathode of the rectifier diode D3 are both grounded through the capacitor C2, and are both connected to the anode of the rectifier diode D4 through the resistor R1, the resistor R2, and the resistor R3 connected in series in sequence;

[0041] The cathode of the rectifier diode D4 is interconnected with the first end of the resistor R7, the first end of the capacitor C3, and the first end of the resistor R13;

[0042] The second end of the resistor R7 is interconnected with the first end of the resistor R9, the first end of the resistor R10, the first end of the capacitor C4, the first end of the capacitor C1, and the reference end of the three-terminal adjustable shunt shunt regulator Q1;

[0043] An input end of a three-terminal adjustable shunt shunt regulator Q1, a second end of a capacitor C1, a first end of a resistor R4, and a cathode of a voltage regulator D5 are interconnected, and an output end of the three-terminal adjustable shunt shunt regulator Q1 is grounded;

[0044] The second end of the resistor R4 is connected to the cathode of the rectifier diode D2;

[0045] The anode of the rectifier diode D2 is connected to the external high level;

[0046] The anode of the voltage regulator tube D5 is connected to the first end of the resistor R5;

[0047] The second end of the resistor R5 is interconnected with the first end of the resistor R8, the base of the transistor Q2, and the base of the transistor Q3;

[0048] The emitter of transistor Q2 is connected to the first pin of the chip through resistor R6, and the collector of transistor Q2 is grounded;

[0049] The emitter of the transistor Q3 is connected to the second end of the resistor R10, and the collector of the transistor Q3 is grounded;

[0050] The second end of the resistor R13 is connected to the first end of the resistor R16, the first end of the resistor R17, the first end of the capacitor C5, the first end of the capacitor C6, and the reference end of the three-terminal adjustable shunt shunt regulator Q6;

[0051] A second end of the resistor R16 and a second end of the capacitor C6 are grounded;

[0052] An input end of the three-terminal adjustable shunt shunt regulator Q6 is interconnected with the second end of the capacitor C5, the first end of the resistor R12, and the cathode of the voltage regulator D7; an output end of the three-terminal adjustable shunt shunt regulator Q6 is grounded;

[0053] The second end of the resistor R12 is connected to the cathode of the rectifier diode D6;

[0054] The anode of the rectifier diode D6 is connected to the external high level;

[0055] The anode of the voltage regulator tube D7 is connected to the first end of the resistor R14;

[0056] The second end of the resistor R14 is connected to the base of the Darlington transistor composed of the transistor Q4 and the transistor Q5 and the first end of the resistor R15;

[0057] The emitter of the Darlington transistor is connected to the external high level through the resistor R11, and the collector of the transistor Q4 is interconnected with the first end of the capacitor C7, the second end of the resistor R15, the first end of the resistor R18, the cathode of the voltage regulator D8, and the second pin of the chip;

[0058] The second end of the capacitor C7, the anode of the voltage regulator tube D8 and the gate of the MOS tube Q7 are connected;

[0059] The source of the MOS transistor Q7 is connected to the second end of the resistor R17;

[0060] The second end of the resistor R18 is grounded via the resistor R19 ; the second end of the resistor R18 is connected to the drain of the MOS transistor Q7 .

[0061] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0062] 1. The undervoltage control subcircuit and overvoltage control subcircuit each monitor the voltage in the target area. When an undervoltage or overvoltage condition is detected, the corresponding protection subcircuit is activated. The undervoltage protection subcircuit connects the first pin of the chip to an external low-level voltage, reducing the output power or completely shutting down the output. This utilizes the internal logic of the control chip to achieve precise undervoltage protection without the need for complex ADC conversion. The overvoltage protection subcircuit disconnects the second pin from the external high-level voltage. By disconnecting the external high-level connection, these pins return to a low-level state due to the action of internal pull-down resistors, thus stopping the chip from operating. By eliminating the need for a high-bit ADC, the quantization error and nonlinearity associated with the ADC are eliminated. At the same time, the key control pins of the chip are directly operated, rather than through a complex analog-to-digital conversion process. This direct control reduces intermediate links and reduces the possibility of error accumulation. Therefore, this solution maintains high accuracy while reducing cost, achieving a balance between accuracy and cost.

[0063] 2. When the undervoltage control subcircuit detects undervoltage and outputs a high level, the undervoltage hysteresis adjustable subcircuit forms a feedback network between the reference terminal of the undervoltage control subcircuit and the target area. The function of this feedback network is to reduce the voltage obtained by the detection terminal of the undervoltage protection subcircuit, which can prevent the frequent switching of the protection circuit caused by repeated voltage fluctuations near the critical point. Specifically, when the voltage recovers from the undervoltage state, it needs to reach a higher threshold to release the protection state. This avoids the frequent switching phenomenon that may occur during the slow voltage recovery process.

[0064] 3. By connecting to the input and output of the undervoltage control subcircuit, it acts as a buffer during voltage changes. When the voltage at the input of the undervoltage control subcircuit increases, the undervoltage compensation subcircuit slows the voltage rise; when the voltage at the output decreases, it slows the voltage fall, making the voltage change smoother. This not only avoids voltage jumps at critical points but also improves the circuit's response speed near the undervoltage point. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Figure 1 This is a circuit diagram of an over-voltage and under-voltage protection circuit in an embodiment of the present application;

[0066] Figure 2 This is another circuit diagram of the over-voltage and under-voltage protection circuit in an embodiment of the present application; DETAILED DESCRIPTION

[0067] The terms used in the following examples of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. As used in the specification and appended claims of the present application, the singular expressions "a," "an," "the," "the," "the" and "the" are intended to include plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used in the present application refers to and includes any or all possible combinations of one or more of the listed items.

[0068] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0069] refer to Figure 1 , Figure 1 This is a circuit diagram of an over-voltage and under-voltage protection circuit in an embodiment of the present application;

[0070] In a first aspect, the present application provides an overvoltage and undervoltage protection circuit, including: an undervoltage protection circuit and an overvoltage protection circuit;

[0071] This circuit achieves bidirectional protection against voltage anomalies by integrating undervoltage and overvoltage protection mechanisms. The undervoltage protection circuit is responsible for monitoring and responding to low voltage conditions to prevent the chip from malfunctioning or being damaged due to insufficient voltage. The overvoltage protection circuit is responsible for monitoring and responding to high voltage conditions to avoid damage to the chip caused by excessive voltage.

[0072] The undervoltage protection circuit includes an undervoltage control subcircuit and an undervoltage protection subcircuit;

[0073] The undervoltage control subcircuit has a reference terminal connected to the target area, an input terminal connected to an external high level, and an output terminal connected to the detection terminal of the undervoltage protection subcircuit; the undervoltage control subcircuit is used to obtain the voltage of the target area, and when the voltage of the target area is lower than the preset undervoltage protection voltage, introduce an external high level from the input terminal and output it from the output terminal; the input terminal and output terminal of the undervoltage control subcircuit are the same terminal;

[0074] The target area is the monitoring point of the circuit that needs to be protected.

[0075] The undervoltage control subcircuit collects the voltage of the target area in real time through its reference terminal. It compares this voltage with the internally set undervoltage protection voltage. When it detects that the voltage of the target area is lower than the preset undervoltage protection voltage, the undervoltage control subcircuit activates its internal switch or logic circuit and introduces an external high-level signal from the input terminal.

[0076] In other specific embodiments, a three-terminal adjustable shunt shunt regulator, such as TL431, is selected; the cathode terminal K of the regulator is connected to the positive pole of the power supply through a current-limiting resistor, and the anode terminal A of the regulator is connected to a low potential (for example, ground); the reference terminal R of the regulator is connected to the target area for collecting real-time voltage; a simple voltage divider circuit is designed to reduce the voltage of the target area to a range acceptable to the regulator (usually 0-2.5V); and a pull-up resistor is added to the K terminal to provide a high-level output in the high-impedance state. The working principle of this circuit is as follows: when the voltage at the reference terminal R is greater than 2.5V (that is, the voltage in the target area is normal), the internal op amp of the voltage regulator outputs a low level, making the base voltage of the internal transistor high. At this time, the collector junction and emitter junction of the internal transistor are turned on, which is equivalent to the cathode K terminal and the anode A terminal being turned on. The voltage at the K terminal is lower than 2.5V, and the output is a low level; when the voltage at the reference terminal R is less than 2.5V (that is, undervoltage occurs), the internal op amp of the voltage regulator outputs a high level, making the base voltage of the internal transistor low. At this time, the collector junction and emitter junction of the internal transistor are both reverse biased, the transistor is cut off, and the internal parallel diode is also in the cut-off state. In this case, the voltage between the K terminal and the A terminal is equal to the power supply voltage, the K terminal is in a high impedance state, and a high level output is obtained through the pull-up resistor, indicating that an undervoltage condition has occurred.

[0077] In this way, under different circumstances, the K terminal of the three-terminal adjustable shunt shunt regulator can output a clear high-level or low-level signal; the stability is high, the difference in output level is obvious, the value is very stable, and it is not affected by external factors and hardly fluctuates.

[0078] The input end of the undervoltage protection subcircuit is connected to the first pin of the chip, and the output end is connected to the external low level. When the detection end detects an external high level, the first pin is connected to the external low level. The level of the first pin is required to be greater than the external low level.

[0079] When the undervoltage control subcircuit detects that the voltage in the target area is lower than the preset undervoltage protection voltage, it will output a high-level signal at its output terminal (i.e., the detection terminal of the undervoltage protection subcircuit). After receiving this high-level signal, the undervoltage protection subcircuit will immediately change its internal state, switching the input terminal originally connected to the first pin of the chip to the output terminal connected to the external low level. This switching will rapidly reduce the voltage applied to the first pin of the chip, making it close to but slightly higher than the external low level. This slightly higher voltage difference is caused by the voltage drop of the internal components of the undervoltage protection subcircuit, which ensures that the chip can still maintain minimum operating capacity or standby state when protected.

[0080] The overvoltage protection circuit includes an overvoltage control subcircuit and an overvoltage protection subcircuit;

[0081] The reference terminal of the overvoltage control subcircuit is connected to the target area, the input terminal is connected to the external high level, and the output terminal is connected to the detection terminal of the overvoltage protection subcircuit. The overvoltage control subcircuit is used to obtain the voltage of the target area. When the voltage of the target area is higher than the preset overvoltage protection voltage, the output terminal switches from outputting the external high level to outputting the preset control voltage. The input terminal and output terminal of the overvoltage control subcircuit are the same terminal.

[0082] It should be noted that the principles and steps of the overvoltage control subcircuit are the same as those of the undervoltage control subcircuit. The relevant principles and steps can be used as reference. Only the specific settings are different. The preset overvoltage protection voltage must be higher than the preset undervoltage protection voltage, which will not be repeated here.

[0083] The input end of the overvoltage protection subcircuit is connected to the external high level, and the output end is connected to the second pin of the chip. It is used to cut off the connection between the second pin and the external high level when the detection end detects a preset control voltage, where the level requirement of the second pin is greater than that of the first pin.

[0084] It should be noted that the principles and steps of the overvoltage protection subcircuit are the same as those of the undervoltage protection subcircuit, and the relevant principles and steps can be used for reference.

[0085] The first pin is the chip dimming pin, enable pin, COMP compensation pin and other pins with high and low levels; the first pin is the control chip PWM pin, enable pin, COMP compensation pin and other pins with high and low levels.

[0086] It should be explained that the second pin is usually designed to be valid at high level. When these pins are at a high level, the chip works normally; when they are at a low level, the chip stops working. There are usually pull-down resistors inside the chip to ensure that when there is no external signal input, these pins default to a low level state, thereby putting the chip in a safe non-working state.

[0087] As can be seen, the undervoltage control subcircuit and the overvoltage control subcircuit respectively monitor the voltage in the target area. When an undervoltage or overvoltage condition is detected, the corresponding protection subcircuit is activated. The undervoltage protection subcircuit implements protection by connecting the first pin of the chip to an external low voltage, reducing the output power or completely shutting down the output. This utilizes the internal logic of the control chip and achieves accurate undervoltage protection without the need for complex ADC conversion. The overvoltage protection subcircuit implements protection by disconnecting the second pin from the external high voltage. By disconnecting the external high voltage connection, these pins return to a low state due to the action of internal pull-down resistors, thus stopping the chip from operating. Since a high-bit ADC is not required, the quantization error and nonlinear error associated with the ADC are eliminated. At the same time, the key control pins of the chip are directly operated instead of through a complex analog-to-digital conversion process. This direct control can reduce intermediate links and reduce the possibility of error accumulation. Therefore, this solution reduces cost while maintaining high accuracy, achieving a balance between accuracy and cost.

[0088] In some embodiments, the undervoltage protection circuit further includes an undervoltage difference adjustable subcircuit;

[0089] The detection end of the undervoltage hysteresis adjustable subcircuit is connected to the output end of the undervoltage control subcircuit, and the input end is interconnected with the reference end and the target area of ​​the undervoltage control subcircuit; when the detection end detects an external high level, a feedback network is formed between the reference end and the target area of ​​the undervoltage control subcircuit, so that the voltage obtained by the detection end of the undervoltage protection subcircuit is reduced.

[0090] When the undervoltage control subcircuit detects an undervoltage condition and outputs a high-level signal, the adjustable undervoltage hysteresis subcircuit is activated. This circuit forms a feedback network between the undervoltage control subcircuit's reference terminal and the target region. This feedback network reduces the voltage perceived by the undervoltage control subcircuit. This ensures that even a slight increase in the actual voltage does not immediately trigger the undervoltage protection release. The undervoltage protection is only released when the actual voltage increases significantly, exceeding the set hysteresis value.

[0091] In some specific embodiments, an operational amplifier with low bias current is selected; the non-inverting input of the operational amplifier is connected to the target region; the inverting input of the operational amplifier is connected to the reference terminal of the undervoltage control subcircuit through a resistor; a feedback resistor is connected between the output and the inverting input of the operational amplifier; a small resistor controlled by a MOSFET switch is connected in parallel with the feedback resistor; the gate of the MOSFET is connected to the output of the undervoltage control subcircuit, and when undervoltage is detected, the MOSFET is turned on, changing the gain of the feedback network, thereby reducing the voltage sensed by the undervoltage control subcircuit.

[0092] In some embodiments, an appropriate NPN transistor and several resistors R are selected; a resistor A is connected between the target region and the reference terminal of the undervoltage control subcircuit; a series circuit is connected in parallel across resistor A, consisting of the transistor's collector-emitter channel and another resistor B in series; the transistor's base is connected to the output terminal of the undervoltage control subcircuit through a current-limiting resistor; and the resistance values ​​of resistors A and B are selected based on the desired hysteresis value. When an undervoltage condition is detected, the transistor conducts, connecting resistor B in parallel with resistor A to form a voltage divider network, thereby reducing the voltage sensed by the undervoltage control subcircuit and achieving hysteresis regulation.

[0093] It can be seen that when the undervoltage control subcircuit detects undervoltage and outputs a high level, the undervoltage hysteresis adjustable subcircuit will form a feedback network between the reference end of the undervoltage control subcircuit and the target area. The function of this feedback network is to reduce the voltage obtained by the detection end of the undervoltage protection subcircuit, which can prevent the protection circuit from frequently switching when the voltage fluctuates repeatedly near the critical point. Specifically, when the voltage recovers from the undervoltage state, it needs to reach a higher threshold before the protection state is released. This avoids the frequent switching phenomenon that may occur during the slow recovery of the voltage.

[0094] In some embodiments, the undervoltage protection circuit further includes an undervoltage compensation subcircuit;

[0095] The input end of the undervoltage compensation subcircuit is interconnected with the reference end and the target area of ​​the undervoltage control subcircuit, and the output end of the undervoltage compensation subcircuit is interconnected with the input end and the output end of the undervoltage control subcircuit, so as to slow down the voltage rise speed when the voltage at the input end of the undervoltage control subcircuit increases, and slow down the voltage fall speed when the voltage at the output end of the undervoltage control subcircuit decreases.

[0096] When the voltage in the target area begins to rise, the undervoltage compensation subcircuit exerts an influence on the input of the undervoltage control subcircuit through its output, slowing the rise of the input voltage. This delay prevents the undervoltage protection from being falsely triggered by transient voltage fluctuations. Similarly, when the output voltage of the undervoltage control subcircuit begins to drop, the undervoltage compensation subcircuit also slows the rate of decline of the output voltage through its output, preventing the undervoltage protection from being immediately triggered by a temporary, small voltage drop, thereby improving stability and anti-interference capabilities. The presence of the undervoltage compensation subcircuit gives the undervoltage protection circuit a certain degree of "inertia," enabling it to better adapt to voltage fluctuations in actual operating environments and reduce the occurrence of false trips.

[0097] In some specific embodiments, an operational amplifier with high input impedance is selected; the operational amplifier is configured as a voltage follower with its non-inverting input connected to the target region; an RC low-pass filter network is connected between the output of the operational amplifier and the input of the undervoltage control subcircuit; the resistor and capacitor values ​​are selected so that the time constant of the RC network effectively smooths voltage fluctuations; and a Zener diode is connected in parallel with the output of the RC network to limit the voltage variation range. This can effectively slow down rapid voltage changes and provide a more stable reference signal for undervoltage control.

[0098] In some specific embodiments, a capacitor of suitable capacitance is selected, one end of which is connected to the input of the undervoltage control subcircuit and the other end to ground. A small resistor is connected in series between the capacitor and the target area to limit the charge and discharge current. A diode is connected between the connection point of the resistor and capacitor and the output of the undervoltage control subcircuit, with the positive terminal of the diode facing the capacitor. The capacitance of the capacitor is adjusted as required to obtain the ideal voltage change response characteristics. A large discharge resistor is connected in parallel across the capacitor to slowly release the charge on the capacitor. This simple design uses the charge and discharge characteristics of the capacitor to naturally slow the speed of voltage changes, providing basic undervoltage compensation.

[0099] It can be seen that by connecting to the input and output terminals of the undervoltage control subcircuit, it plays a buffering role when the voltage changes. When the input voltage of the undervoltage control subcircuit increases, the undervoltage compensation subcircuit will slow down the voltage rise rate; when the output voltage decreases, it will slow down the voltage fall rate, making the voltage change smoother. This not only avoids the voltage jump problem at the critical point, but also improves the response speed of the circuit near the undervoltage point.

[0100] In some embodiments, the undervoltage protection circuit further includes a rectifier and filter subcircuit;

[0101] The reference end of the undervoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit, and the reference end of the overvoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit; the voltage of the target area is rectified and filtered and then input into the reference end of the undervoltage control subcircuit and the reference end of the overvoltage control subcircuit respectively.

[0102] The rectifier and filter subcircuit first receives a voltage signal from the target area that may contain AC components or noise, and converts the AC voltage into a unidirectional pulsating DC voltage through a rectifier circuit, such as a diode bridge rectifier. Subsequently, the filter circuit (usually including capacitors and inductors) smoothes these pulsations and reduces the ripple components in the voltage. The voltage signal after rectification and filtering becomes more stable and smooth, which helps to improve the operating accuracy and reliability of the undervoltage control subcircuit and the overvoltage control subcircuit. The output of the rectifier and filter subcircuit is connected to the reference terminals of the undervoltage control subcircuit and the overvoltage control subcircuit, respectively, providing these two subcircuits with processed and reliable voltage reference signals, which can effectively reduce the impact of power supply fluctuations and electromagnetic interference on the voltage protection function and improve the overall anti-interference ability and operating stability.

[0103] In some specific embodiments, four rectifier diodes of the same specification are selected to form a full-wave bridge rectifier circuit; the AC input end of the bridge rectifier circuit is connected to the target area; a large-capacity electrolytic capacitor is connected in parallel to the DC output end of the bridge rectifier circuit for preliminary filtering; an inductor is connected in series after the electrolytic capacitor to form an LC filter circuit; a small-capacity ceramic capacitor is connected in parallel to the output end of the LC filter circuit to filter high-frequency noise; and the filtered output is connected to the reference terminals of the undervoltage control subcircuit and the overvoltage control subcircuit, respectively.

[0104] In some specific embodiments, a fast recovery rectifier diode is selected, with its positive electrode connected to the target area and its negative electrode serving as the output end; a large-capacity electrolytic capacitor is connected in parallel to the output end of the diode for primary filtering; when selecting the capacitance of the electrolytic capacitor, the load current and the allowable ripple voltage are considered to ensure sufficient filtering effect; a small-capacity ceramic capacitor is connected in parallel to both ends of the electrolytic capacitor to filter out high-frequency noise; if needed, a medium-capacity tantalum capacitor can be added between the electrolytic capacitor and the ceramic capacitor to further improve the filtering effect; the filtered output end is connected to the reference end of the undervoltage control subcircuit and the overvoltage control subcircuit respectively.

[0105] As can be seen, the rectifier-filter subcircuit is located between the target area and the reference terminals of the undervoltage and overvoltage control subcircuits, ensuring that only positive voltage is transmitted, preventing potential damage to the circuits caused by negative voltage. Secondly, the filtering function can smooth voltage fluctuations and filter out high-frequency noise and transient interference. This processed voltage signal is more stable and reliable, providing an accurate reference voltage for the undervoltage and overvoltage control subcircuits, thereby reducing false triggering and improving detection accuracy.

[0106] In conjunction with some embodiments of the first aspect, in some embodiments, the overvoltage protection circuit further includes a voltage stabilization subcircuit;

[0107] The input end of the voltage stabilization subcircuit is interconnected with the output end of the overvoltage protection subcircuit and the second pin, and is used to stabilize the voltage received by the second pin to a preset stable voltage when the voltage in the target area is not higher than the preset overvoltage protection voltage.

[0108] As can be seen, the voltage stabilization subcircuit, which connects the output terminals of the overvoltage protection subcircuit and the chip's second pin, plays a key role in normal operation (i.e., when the voltage in the target region is no higher than the preset overvoltage protection voltage). The voltage stabilization subcircuit stabilizes the voltage received by the second pin at a preset stable voltage value. This ensures that the chip's second pin receives a stable power supply within its normal operating range, improving the chip's operating efficiency and lifespan.

[0109] In some embodiments, the overvoltage protection circuit further includes an overvoltage difference adjustable subcircuit;

[0110] The detection end and input end of the overvoltage hysteresis adjustable subcircuit are interconnected with the output end of the overvoltage control subcircuit, and the output end is interconnected with the reference end and target area of ​​the overvoltage control subcircuit; when the detection end detects a preset voltage, a feedback network is formed between the reference end and the target area of ​​the overvoltage control subcircuit, so that the voltage obtained by the detection end of the overvoltage protection subcircuit is reduced.

[0111] It should be noted that the overvoltage hysteresis adjustable sub-circuit is similar to the undervoltage hysteresis adjustable sub-circuit, and the relevant principles and steps are the same. The relevant principles and steps can be referred to and will not be repeated here.

[0112] It can be seen that when the overvoltage control subcircuit detects overvoltage and outputs a preset voltage, the overvoltage hysteresis adjustable subcircuit forms a feedback network between the reference end of the overvoltage control subcircuit and the target area. The function of this feedback network is to reduce the voltage obtained by the detection end of the overvoltage protection subcircuit, thereby preventing the protection circuit from frequently switching when the voltage fluctuates repeatedly near the critical point. When the voltage drops from the overvoltage state, it needs to drop to a lower threshold before the protection state can be released. This avoids the frequent switching phenomenon that may occur during the slow decline of voltage.

[0113] In some embodiments, the overvoltage protection circuit further includes an overvoltage compensation subcircuit;

[0114] The input end of the overvoltage compensation subcircuit is interconnected with the reference end and the target area of ​​the overvoltage control subcircuit, and the output end of the overvoltage compensation subcircuit is interconnected with the input end and the output end of the overvoltage control subcircuit, so as to slow down the voltage rise speed when the voltage at the input end of the overvoltage control subcircuit increases, and slow down the voltage fall speed when the voltage at the output end of the overvoltage control subcircuit decreases.

[0115] It should be noted that the overvoltage protection circuit is similar to the undervoltage protection circuit, and the relevant principles and steps are the same. The relevant principles and steps can be used for reference and will not be repeated here.

[0116] By adopting the above technical solution, the overvoltage compensation subcircuit is connected to the input and output terminals of the overvoltage control subcircuit, and acts as a buffer when the voltage changes. When the input voltage of the overvoltage control subcircuit increases, the overvoltage compensation subcircuit slows down the voltage rise rate; when the output voltage decreases, it slows down the voltage fall rate, making the voltage change smoother. This not only avoids the voltage jump problem at the critical point, but also improves the response speed of the circuit near the overvoltage point.

[0117] refer to Figure 2 , Figure 2 This is another circuit diagram of the over-voltage and under-voltage protection circuit in an embodiment of the present application;

[0118] In a second aspect, the present application provides an over-voltage and under-voltage protection circuit, comprising: a three-terminal adjustable shunt shunt regulator Q1, a voltage regulator D5, a transistor Q2, a three-terminal adjustable shunt shunt regulator Q6, a voltage regulator D7, a transistor Q4, and a transistor Q5;

[0119] The reference terminal of the three-terminal adjustable shunt shunt regulator Q1 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator D5, and the external high level is interconnected, and the output terminal is grounded;

[0120] Under normal operating conditions, when the voltage in the target region is no less than the preset undervoltage protection voltage of the three-terminal adjustable shunt shunt regulator Q1, the input and output terminals of the three-terminal adjustable shunt shunt regulator Q1 are internally connected. This configuration pulls the voltage at the input terminal down to a preset low level, which is less than the internal breakdown voltage of the Zener diode D5. At this point, Zener diode D5 remains in the reverse cutoff state.

[0121] When an undervoltage condition occurs—that is, the voltage in the target region drops below the preset undervoltage protection voltage of the three-terminal adjustable shunt shunt regulator Q1—the internal switch of the three-terminal adjustable shunt shunt regulator Q1 activates, disconnecting the input and output terminals. This causes the voltage at the input to rise to an externally high level. This high voltage exceeds the breakdown voltage of Zener diode D5, causing it to enter reverse breakdown.

[0122] The output end of the voltage regulator D5 is connected to the base of the transistor Q2;

[0123] Under normal operating conditions, Zener diode D5 is in reverse cutoff. In this state, the cathode voltage of Zener diode D5 is lower than its breakdown voltage, so Zener diode D5 does not conduct. Since Zener diode D5 is not conducting, the voltage at its output (anode) is very low, close to zero. This results in insufficient voltage driving the base of transistor Q2, causing transistor Q2 to be cut off and non-conducting.

[0124] In the case of undervoltage, the Zener diode D5 enters the reverse breakdown state. In this state, the Zener diode D5 begins to conduct.

[0125] The sending stage of transistor Q2 is connected to the first pin, and the collector stage is grounded;

[0126] Transistor Q2 is configured as a switch circuit. Under normal operating conditions, transistor Q2 is cut off, presenting a high impedance between its emitter and collector, and pin 1 remains high. When an undervoltage condition occurs, the base of transistor Q2 is driven by Zener diode D5, turning transistor Q2 on. Once turned on, the emitter voltage of transistor Q2 approaches the voltage of its grounded collector, effectively pulling pin 1 down to near ground potential.

[0127] The reference terminal of the three-terminal adjustable shunt shunt regulator Q6 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator tube D7, and the external high level is interconnected, and the output terminal is grounded;

[0128] Under normal operating conditions, the voltage in the target region is lower than the preset overvoltage protection voltage of the three-terminal adjustable shunt shunt regulator Q6, and the internal switch of the three-terminal adjustable shunt shunt regulator Q6 is in the off state. At this point, a high impedance exists between its input and output terminals, and the input terminal remains in a high-level state connected to the external high voltage level. This high-level voltage is lower than the breakdown voltage of Zener diode D7, keeping Zener diode D7 in the reverse blocking state. In the event of an overvoltage condition, the internal switch of the three-terminal adjustable shunt shunt regulator Q6 closes, connecting the input and output terminals, causing the input voltage to rapidly drop to a low level close to ground potential, triggering the subsequent overvoltage protection mechanism.

[0129] The output end of the voltage regulator tube D7 is connected to the base of the Darlington tube composed of the transistor Q4 and the transistor Q5;

[0130] Under normal operating conditions, Zener diode D7 is in the on state and maintains its breakdown voltage, providing a stable drive voltage for the base of the Darlington transistor (composed of transistors Q4 and Q5). This stable voltage ensures that the Darlington transistor remains in the on state, allowing current to flow from the emitter to the collector, maintaining the power supply of the second pin.

[0131] When an overvoltage condition occurs, the three-terminal adjustable shunt shunt regulator Q6 turns on, causing its input voltage to drop rapidly. This causes the voltage difference across Zener diode D7 to fall below its breakdown voltage, causing Zener diode D7 to enter a reverse cutoff state. After Zener diode D7 turns off, the voltage at its output (anode) drops rapidly, cutting off the drive voltage to the Darlington diode base.

[0132] The sending stage of the Darlington tube is connected to the external high level, and the collector stage of the Darlington tube is connected to the second pin.

[0133] Under normal working conditions: the Darlington tube is in the on state, allowing the external high level to pass through the collector-emitter channel of the Darlington tube, providing a stable power supply for the subsequent circuit connected to the second pin.

[0134] In the event of overvoltage, the Darlington transistor switches from the on state to the off state, cutting off the connection between the second pin and the external high level and quickly interrupting the power supply to the subsequent circuits.

[0135] refer to Figure 2 , Figure 2 This is another circuit diagram of the over-voltage and under-voltage protection circuit in an embodiment of the present application;

[0136] In a third aspect, the present application provides an over-voltage and under-voltage protection circuit, including: a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a rectifier diode D1, a rectifier diode D2, a rectifier diode D3, a rectifier diode D4, a rectifier diode D6, a Zener diode D5, a Zener diode D7, a Zener diode D8, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C7, a three-terminal adjustable shunt shunt regulator Q1, a three-terminal adjustable shunt shunt regulator Q6, a transistor Q2, a transistor Q3, a transistor Q4, a transistor Q5, and a MOS tube Q7;

[0137] The anode of the rectifier diode D1 and the anode of the rectifier diode D3 are both connected to the target area, the cathode of the rectifier diode D1 and the cathode of the rectifier diode D3 are both grounded through the capacitor C2, and are both connected to the anode of the rectifier diode D4 through the resistor R1, the resistor R2, and the resistor R3 connected in series in sequence;

[0138] The parallel configuration of rectifier diodes D1 and D3 provides bidirectional reverse voltage protection. Regardless of the polarity of the input voltage, there is always a diode that blocks the reverse current, effectively preventing circuit damage. Capacitor C2 is grounded to form a low-pass filter, which can effectively filter out high-frequency noise and transient interference. The series connection of resistors R1, R2, and R3 not only limits the current but also forms a voltage divider network.

[0139] The cathode of the rectifier diode D4 is interconnected with the first end of the resistor R7, the first end of the capacitor C3, and the first end of the resistor R13;

[0140] The cathode of the rectifier diode D4 provides a stable positive voltage source, which is distributed to the undervoltage protection circuit (through R7) and the overvoltage protection circuit (through R13) at the same time. Capacitor C3 provides decoupling and filtering functions at this node. R7 controls the current of the undervoltage protection circuit, and R13 controls the current of the overvoltage protection circuit.

[0141] The second end of the resistor R7 is interconnected with the first end of the resistor R9, the first end of the resistor R10, the first end of the capacitor C4, the first end of the capacitor C1, and the reference end of the three-terminal adjustable shunt shunt regulator Q1;

[0142] Resistors R9 and R10 are connected in parallel to form a voltage divider network; capacitor C4 provides the key filtering function; and capacitor C1 performs dynamic compensation.

[0143] An input end of a three-terminal adjustable shunt shunt regulator Q1, a second end of a capacitor C1, a first end of a resistor R4, and a cathode of a voltage regulator D5 are interconnected, and an output end of the three-terminal adjustable shunt shunt regulator Q1 is grounded;

[0144] Resistor R4 is used to limit the external high-level current;

[0145] The second end of the resistor R4 is connected to the cathode of the rectifier diode D2;

[0146] The main function of the rectifier diode D2 is to prevent reverse voltage;

[0147] The anode of the rectifier diode D2 is connected to the external high level;

[0148] The anode of the voltage regulator tube D5 is connected to the first end of the resistor R5;

[0149] Resistor R5 is used to stabilize the output voltage of Zener diode D5;

[0150] The second end of the resistor R5 is interconnected with the first end of the resistor R8, the base of the transistor Q2, and the base of the transistor Q3;

[0151] The main function of resistor R8 is to provide a safe discharge path for transistor Q2, while preventing the voltage from transistor Q3 from directly affecting the working state of transistor Q2, and preventing the voltage signal passing through resistors R9, R10 and transistor Q3 from directly entering the base of transistor Q2.

[0152] The emitter of transistor Q2 is connected to the first pin of the chip through resistor R6, and the collector of transistor Q2 is grounded;

[0153] Resistor R6 controls and limits the current flowing to the first pin;

[0154] The emitter of the transistor Q3 is connected to the second end of the resistor R10, and the collector of the transistor Q3 is grounded;

[0155] When the cathode output of the three-terminal adjustable shunt shunt regulator Q1 is high, transistor Q3 is turned on. Resistor R10 is connected directly in parallel with resistor R9. This configuration allows for flexible adjustment of current distribution and voltage division. Transistor Q3 and resistor R10 form a feedback network that further reduces the voltage at the reference pin of the three-terminal adjustable shunt shunt regulator Q1 when the cathode output of the three-terminal adjustable shunt shunt regulator Q1 is high. This mechanism ensures that the cathode output of the three-terminal adjustable shunt shunt regulator Q1 can continuously output a high voltage, achieving adjustable hysteresis. By adjusting the resistance values ​​of resistors R10 and R9, the hysteresis can be precisely controlled to meet different application requirements.

[0156] The second end of the resistor R13 is connected to the first end of the resistor R16, the first end of the resistor R17, the first end of the capacitor C5, the first end of the capacitor C6, and the reference end of the three-terminal adjustable shunt shunt regulator Q6;

[0157] Resistor R16 and resistor R17 are configured in parallel to form a feedback network. Capacitor C6 plays a filtering role in the circuit, and capacitor C5 is specifically used to achieve the hysteresis function of overvoltage protection.

[0158] A second end of the resistor R16 and a second end of the capacitor C6 are grounded;

[0159] An input end of the three-terminal adjustable shunt shunt regulator Q6 is interconnected with the second end of the capacitor C5, the first end of the resistor R12, and the cathode of the voltage regulator D7; an output end of the three-terminal adjustable shunt shunt regulator Q6 is grounded;

[0160] Resistor R12 is used to limit the current or set the voltage at the cathode of the three-terminal adjustable shunt shunt regulator Q6;

[0161] The second end of the resistor R12 is connected to the cathode of the rectifier diode D6;

[0162] Rectifier diode D6 is used to protect the circuit from external high-level reverse current.

[0163] The anode of the rectifier diode D6 is connected to the external high level;

[0164] The anode of the voltage regulator tube D7 is connected to the first end of the resistor R14;

[0165] Resistor R14 is used to stabilize the voltage at the anode of Zener diode D7.

[0166] The second end of the resistor R14 is connected to the base of the Darlington transistor composed of the transistor Q4 and the transistor Q5 and the first end of the resistor R15;

[0167] The emitter of the Darlington transistor is connected to the external high level through the resistor R11, and the collector of the transistor Q4 is interconnected with the first end of the capacitor C7, the second end of the resistor R15, the first end of the resistor R18, the cathode of the voltage regulator D8, and the second pin of the chip;

[0168] The resistor R11 is used to control the current of the second pin.

[0169] The second end of the capacitor C7, the anode of the voltage regulator tube D8 and the gate of the MOS tube Q7 are connected;

[0170] Capacitor C7 and voltage regulator D8 together form a clamping circuit, which cooperates with the voltage regulator D8 to clamp the voltage received by the second pin to a preset stable voltage value, ensuring that the voltage does not exceed the preset stable voltage value;

[0171] The source of the MOS transistor Q7 is connected to the second end of the resistor R17;

[0172] The second end of the resistor R18 is grounded via the resistor R19 ; the second end of the resistor R18 is connected to the drain of the MOS transistor Q7 .

[0173] Resistor R18 controls the current entering the gate of MOS transistor Q7. Resistor R19 is connected between the source of MOS transistor Q7 and ground to pull down or set the threshold voltage of Q7.

Claims

1. Overvoltage and undervoltage protection circuit, characterized in that: include: Undervoltage protection circuit and overvoltage protection circuit; The undervoltage protection circuit includes an undervoltage control subcircuit and an undervoltage protection subcircuit; The undervoltage control subcircuit has a reference terminal connected to the target area, an input terminal connected to an external high level, and an output terminal connected to the detection terminal of the undervoltage protection subcircuit; the undervoltage control subcircuit is used to obtain the voltage of the target area, and when the voltage of the target area is lower than the preset undervoltage protection voltage, introduce an external high level from the input terminal and output it from the output terminal; the input terminal and output terminal of the undervoltage control subcircuit are the same terminal; The input end of the undervoltage protection sub-circuit is connected to the first pin of the chip, and the output end is connected to the external low level, and is used to connect the first pin to the external low level when the detection end detects the external high level, and the level requirement of the first pin is greater than the external low level; The overvoltage protection circuit includes an overvoltage control subcircuit and an overvoltage protection subcircuit; The overvoltage control subcircuit has a reference terminal connected to the target area, an input terminal connected to an external high level, and an output terminal connected to a detection terminal of the overvoltage protection subcircuit, for obtaining the voltage of the target area, and when the voltage of the target area is higher than a preset overvoltage protection voltage, the output terminal switches from outputting the external high level to outputting a preset control voltage; the input terminal and the output terminal of the overvoltage control subcircuit are the same terminal; The input end of the overvoltage protection subcircuit is connected to an external high level, and the output end is connected to the second pin of the chip, and is used to cut off the connection between the second pin and the external high level when the detection end detects a preset control voltage, wherein the level requirement of the second pin is greater than that of the first pin.

2. The circuit according to claim 1, wherein: The undervoltage protection circuit also includes an undervoltage hysteresis adjustable subcircuit; The detection terminal of the undervoltage hysteresis adjustable subcircuit is connected to the output terminal of the undervoltage control subcircuit, and the input terminal is interconnected with the reference terminal of the undervoltage control subcircuit and the target area; When the detection end detects an external high level, a feedback network is formed between the reference end of the undervoltage control subcircuit and the target area, so that the voltage obtained by the detection end of the undervoltage protection subcircuit is reduced.

3. The circuit according to claim 1, wherein: The undervoltage protection circuit also includes an undervoltage compensation subcircuit; The input end of the undervoltage compensation subcircuit is interconnected with the reference end of the undervoltage control subcircuit and the target area, and the output end of the undervoltage compensation subcircuit is interconnected with the input end and the output end of the undervoltage control subcircuit, and is used to slow down the voltage rise rate when the input end voltage of the undervoltage control subcircuit increases, and to slow down the voltage fall rate when the output end voltage of the undervoltage control subcircuit decreases.

4. The circuit according to claim 1, wherein: The undervoltage protection circuit also includes a rectifier and filter sub-circuit; The reference end of the undervoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit, and the reference end of the overvoltage control subcircuit is connected to the target area through the rectifier and filter subcircuit; It is used to rectify and filter the voltage of the target area and then input the voltage into the reference end of the undervoltage control subcircuit and the reference end of the overvoltage control subcircuit respectively.

5. The circuit according to claim 1, wherein: The overvoltage protection circuit also includes a voltage stabilization subcircuit; The input end of the voltage stabilization subcircuit is interconnected with the output end of the overvoltage protection subcircuit and the second pin, and is used to stabilize the voltage received by the second pin to a preset stable voltage when the voltage in the target area is not higher than the preset overvoltage protection voltage.

6. The circuit according to claim 1, wherein: The overvoltage protection circuit also includes an overvoltage hysteresis adjustable subcircuit; The detection terminal and the input terminal of the overvoltage hysteresis adjustable subcircuit are interconnected with the output terminal of the overvoltage control subcircuit, and the output terminal is interconnected with the reference terminal of the overvoltage control subcircuit and the target area; When a preset voltage is detected at the detection end, a feedback network is formed between the reference end of the overvoltage control subcircuit and the target area, so that the voltage obtained by the detection end of the overvoltage protection subcircuit is reduced.

7. The circuit according to claim 1, wherein: The overvoltage protection circuit also includes an overvoltage compensation subcircuit; The input end of the overvoltage compensation subcircuit is interconnected with the reference end of the overvoltage control subcircuit and the target area, and the output end of the overvoltage compensation subcircuit is interconnected with the input end and the output end of the overvoltage control subcircuit, and is used to slow down the voltage rise rate when the input end voltage of the overvoltage control subcircuit increases, and to slow down the voltage fall rate when the output end voltage of the overvoltage control subcircuit decreases.

8. Over-voltage and under-voltage protection circuit, characterized in that: include: Three-terminal adjustable shunt shunt regulator Q1, voltage regulator D5, transistor Q2, three-terminal adjustable shunt shunt regulator Q6, voltage regulator D7, transistor Q4, transistor Q5; The reference terminal of the three-terminal adjustable shunt shunt regulator Q1 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator tube D5 and the external high level, and the output terminal is grounded; The output end of the voltage regulator D5 is connected to the base of the transistor Q2; The transmitting stage of the transistor Q2 is connected to the first pin, and the collector stage is grounded; The reference terminal of the three-terminal adjustable shunt shunt regulator Q6 is connected to the target area, the input terminal is connected to the cathode of the voltage regulator tube D7 and the external high level, and the output terminal is grounded; The output end of the voltage regulator tube D7 is connected to the base of the Darlington tube composed of the transistor Q4 and the transistor Q5; The sending stage of the Darlington tube is connected to an external high level, and the collector stage of the Darlington tube is connected to the second pin.

9. Over-voltage and under-voltage protection circuit, characterized in that: include: Resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, resistor R15, resistor R16, resistor R17, resistor R18, resistor R19, rectifier diode D1, rectifier diode D2, rectifier diode D3, rectifier diode D4, rectifier diode D6, Zener diode D5, Zener diode D7, Zener diode D8, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, three-terminal adjustable shunt shunt regulator Q1, three-terminal adjustable shunt shunt regulator Q6, transistor Q2, transistor Q3, transistor Q4, transistor Q5, MOS transistor Q7; The anode of the rectifier diode D1 and the anode of the rectifier diode D3 are both connected to the target area, the cathode of the rectifier diode D1 and the cathode of the rectifier diode D3 are both grounded through the capacitor C2, and are both connected to the anode of the rectifier diode D4 through the resistor R1, the resistor R2, and the resistor R3 connected in series in sequence; The cathode of the rectifier diode D4 is interconnected with the first end of the resistor R7, the first end of the capacitor C3, and the first end of the resistor R13; The second end of the resistor R7 is interconnected with the first end of the resistor R9, the first end of the resistor R10, the first end of the capacitor C4, the first end of the capacitor C1, and the reference end of the three-terminal adjustable shunt shunt regulator Q1; The input end of the three-terminal adjustable shunt shunt regulator Q1, the second end of the capacitor C1, the first end of the resistor R4, and the cathode of the voltage regulator D5 are interconnected, and the output end of the three-terminal adjustable shunt shunt regulator Q1 is grounded; The second end of the resistor R4 is connected to the cathode of the rectifier diode D2; The anode of the rectifier diode D2 is connected to an external high level; The anode of the voltage regulator tube D5 is connected to the first end of the resistor R5; The second end of the resistor R5 is interconnected with the first end of the resistor R8, the base of the transistor Q2, and the base of the transistor Q3; The emitter of the transistor Q2 is connected to the first pin of the chip through the resistor R6, and the collector of the transistor Q2 is grounded; The emitter of the transistor Q3 is connected to the second end of the resistor R10, and the collector of the transistor Q3 is grounded; The second end of the resistor R13 is connected to the first end of the resistor R16, the first end of the resistor R17, the first end of the capacitor C5, the first end of the capacitor C6, and the reference end of the three-terminal adjustable shunt shunt regulator Q6; The second end of the resistor R16 and the second end of the capacitor C6 are grounded; The input end of the three-terminal adjustable shunt shunt regulator Q6 is interconnected with the second end of the capacitor C5, the first end of the resistor R12, and the cathode of the voltage regulator D7; the output end of the three-terminal adjustable shunt shunt regulator Q6 is grounded; The second end of the resistor R12 is connected to the cathode of the rectifier diode D6; The anode of the rectifier diode D6 is connected to an external high level; The anode of the voltage regulator tube D7 is connected to the first end of the resistor R14; The second end of the resistor R14 is connected to the base of the Darlington transistor composed of the transistor Q4 and the transistor Q5 and the first end of the resistor R15; The emitter of the Darlington transistor is connected to the external high level through the resistor R11, and the collector of the transistor Q4 is interconnected with the first end of the capacitor C7, the second end of the resistor R15, the first end of the resistor R18, the cathode of the voltage regulator D8, and the second pin of the chip; The second end of the capacitor C7, the anode of the voltage regulator tube D8 and the gate of the MOS tube Q7 are connected; The source of the MOS transistor Q7 is connected to the second end of the resistor R17; The second end of the resistor R18 is grounded via the resistor R19 ; the second end of the resistor R18 is connected to the drain of the MOS transistor Q7 .

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