Device for measuring video image delay of display equipment

Abstract

The utility model relates to a device for measuring video image delay of display equipment. The device comprises a Scaler chip and a photosensitive probe, the Scaler chip comprises a graph generation module, an operation processing module and a video data integration module; the graph generation module is electrically connected with the operation processing module and the display device. The operation processing module is also electrically connected with the video data integration module and the photosensitive probe. The video data integration module is also electrically connected with the display equipment; a graph generation module of a Scaler chip is used as an image signal generator, an operation processing task is completed through an integration operation processing module, a corresponding calculation result is directly output to a display device through a video data integration module, an expensive video signal generator or a special PC is replaced, the measurement effect is guaranteed, and the measurement accuracy is improved. And the application and design cost of measurement equipment is effectively reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of image display, and more particularly to a device for measuring video image delay of a display device. Background Art

[0002] Video image delay (Display Latency) refers to the time ΔT consumed by the image signal generated by the video source to be transmitted through the channel to the display receiving device, the display receiving device to decode and process the image signal, and restore it to the image visible to the human eye on the display terminal. Figure 1 As shown in the figure, video image delay is an important indicator of nominal display device performance. This indicator is widely used in fields such as e-sports and high-frame-rate film and television playback. Generally, the smaller the delay value ΔT, the better the real-time image restoration of the display device. Therefore, accurately measuring the delay value ΔT can provide objective data support for analyzing and improving video image delay. However, since the existing technology usually uses expensive video signal generators and dedicated PCs with independent computing processing to achieve the purpose of measuring the video image delay of display devices, the measurement system is relatively complex and the measurement cost is also high, so it is urgently needed to be improved. Utility Model Content

[0003] The technical problem to be solved by the present invention is to provide a device for measuring the delay of a video image of a display device in view of the above-mentioned defects of the prior art.

[0004] The technical solution adopted by the utility model to solve its technical problems is: a device for measuring the delay of video images of a display device, comprising a scaler chip and a photosensitive probe; the scaler chip comprises a graphics generation module, an operation processing module and a video data integration module; the graphics generation module is electrically connected to the operation processing module and the display device respectively; the operation processing module is also electrically connected to the video data integration module and the photosensitive probe respectively; the video data integration module is also electrically connected to the display device; the graphics generation module is used to output display parameters matching the display timing specifications of the display device, and output a frame sequence to the operation processing module to start frame synchronization event processing; the photosensitive probe is used to detect the video image data of the display device; the operation processing module is used to obtain the frame sequence and video image data to output the operation result to the video data integration module; the video data integration module is used to integrate the video data according to the operation result and output it to the display device.

[0005] In some embodiments, the graphics generation module is a PG module.

[0006] In some embodiments, the operation processing module is an MCU module.

[0007] In some embodiments, the video data integration module is an OSD module.

[0008] In some embodiments, the display timing specification is a 1920x1080@60Hz progressive signal.

[0009] In some embodiments, the scaler chip model is RTD2785T.

[0010] The beneficial effect of the present invention is that, unlike the prior art, the device for measuring video image delay of a display device of the present invention adopts a Scaler chip to realize the functions of signal source transmission and operation processing. This is mainly achieved by using the graphics generation module of the Scaler chip as an image signal generator and integrating the operation processing module to complete the operation processing task. The corresponding calculation results are directly output to the display device through the video data integration module, replacing expensive video signal generators or dedicated PCs. This not only ensures measurement results, but also effectively reduces the application and design costs of the measuring equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a test diagram of video image delay in the prior art;

[0012] Figure 2 Schematic diagram of a device for measuring video image delay of a display device according to an embodiment of the present invention;

[0013] Figure 3 This is a schematic diagram of frame synchronization processing in an embodiment of the present invention;

[0014] Figure 4 This is a schematic diagram of image delay measurement in an embodiment of the present invention;

[0015] Figure 5 It is a schematic diagram showing the test results in an embodiment of the present utility model;

[0016] Figure 6 This is a logic flow chart of a device test for measuring video image delay of a display device according to an embodiment of the present invention;

[0017] Names and serial numbers in the figure: Scaler chip-1; Photosensitive probe-2; Graphics generation module-11; Calculation processing module-12; Video data integration module-13; Display device-3. DETAILED DESCRIPTION

[0018] The terms "first," "second," "third," and "fourth," etc., in the specification, claims, and accompanying drawings of the present invention are used to distinguish between different items, not to describe a specific order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0019] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0020] "Multiple" refers to two or more. "And / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, or B exists alone. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0021] Moreover, the terms "up, down, front, back, left, right, upper end, lower end" and the like indicating directions are all based on the posture and position of the device or apparatus described in this solution during normal use.

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the following will be described clearly and completely in conjunction with the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] The present utility model is implemented as follows Figures 2 to 6As shown in, a device for measuring the video image delay of a display device includes a scaler chip 1 and a photosensitive probe 2; the scaler chip 1 includes a graphics generation module 11, an operation processing module 12 and a video data integration module 13; the graphics generation module 11 is electrically connected to the operation processing module 12 and the display device 3 respectively; the operation processing module 12 is also electrically connected to the video data integration module 13 and the photosensitive probe 2 respectively; the video data integration module 13 is also electrically connected to the display device 3; the graphics generation module 11 is used to output display parameters that match the display timing specifications of the display device 3, and output a frame sequence to the operation processing module 12 to start frame synchronization event processing; the photosensitive probe 2 is used to detect the video image data of the display device 3; the operation processing module 12 is used to obtain the frame sequence and video image data to output the operation result to the video data integration module 13; the video data integration module 13 is used to integrate the video data according to the operation result and output it to the display device 3.

[0024] Specifically, in this embodiment, the graphics generation module 11 is a PG module. The display timing specification is a 1920x1080@60Hz progressive signal. The workflow steps of the PG module are as follows:

[0025] Step a. The PG module sets the output display parameters, which must be consistent with the display timing specifications of the display device 3 to be tested.

[0026] For example, if the display timing specification of the display device 3 to be tested is a 1920x1080@60Hz progressive signal, the PG must also be set with parameters that match it.

[0027] Step b. The PG module outputs a stable frame sequence, so that the operation processing module 12 starts the frame synchronization event processing at the same time.

[0028] Step c. When the frame synchronization arrives, the PG module will calculate and generate a full white or full black picture according to the odd or even flag in each frame image parameter, and then bind the white or black picture with the odd or even flag and send them out alternately, as shown in the attached figure. Figure 3 shown.

[0029] This event takes very little time and can be completed before the frame synchronization ends.

[0030] Step d. When the PG module sends out each frame, it transmits the frame synchronization to the calculation processing module 12.

[0031] Specifically, in this embodiment, the operation processing module 12 is an MCU module. The workflow steps of the MCU module are as follows:

[0032] Step e. After the MCU module receives the frame synchronization, it immediately clears the old data in the timer and starts the timer again. This time point is recorded as T1.

[0033] Step f. After the timer starts working, the MCU module controls the light sensor 2 to obtain the change in the light signal of the display device 3.

[0034] Step g: When the MCU module captures the response from the display terminal (ie, display device 3), it immediately stops the timer and reads the count value. This time point is recorded as T2.

[0035] Step h. Single image delay value: ΔT=T2-T1=timer count value*count time base.

[0036] Image delay measurement is shown in the attached Figure 4 shown.

[0037] Step i. Repeat steps e to i several times and calculate ΔTmax, ΔTmin, and ΔTaverage.

[0038] Specifically, in this embodiment, the video data integration module 13 is an OSD module. The workflow steps of the OSD module are as follows:

[0039] Step j. After the MCU module completes the calculation, it notifies the PG module to stop sending the black and white alternating frame sequence, and the screen stops flickering.

[0040] Step k. The MCU module converts the calculation result into ASCII code data and transmits it to the display buffer of the OSD module.

[0041] Step 1. The OSD module plans and organizes the data in the display buffer and integrates it with the background image generated by the PG.

[0042] Step m. The PG module outputs the screen with the measurement results to the display device 3 under test. The test results are shown in the attached figure. Figure 5 shown.

[0043] In this embodiment, the model of the Scaler chip 1 is RTD2785T.

[0044] It should be noted that the circuit layout for realizing the corresponding functions of the PG module, MCU module and OSD module may refer to an existing appropriate circuit design, and is not specifically limited in this embodiment and shall be subject to actual application.

[0045] The device for measuring the delay of video images of a display device according to the present invention uses a Scaler chip 1 to realize the functions of signal source transmission and operation processing. The above description of the process steps of the PG module, MCU module and OSD module is to explain the implementation method of the functions of the corresponding modules. The specific logical flow of the device when in use is as shown in the attached figure. Figure 6 As shown, in the specific implementation, the actual application should prevail.

[0046] It should be understood that ordinary technical workers in this field can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the claims attached to this utility model.

Claims

1. A device for measuring video image delay of a display device, characterized by: It includes a Scaler chip and a photosensitive probe; the Scaler chip includes a graphics generation module, an operation processing module and a video data integration module; the graphics generation module is electrically connected to the operation processing module and the display device respectively; the operation processing module is also electrically connected to the video data integration module and the photosensitive probe respectively; the video data integration module is also electrically connected to the display device; the graphics generation module is used to output display parameters that match the display timing specifications of the display device, and output frame sequences to the operation processing module to start frame synchronization event processing; the photosensitive probe is used to detect video image data of the display device; the operation processing module is used to obtain frame sequences and video image data to output operation results to the video data integration module; the video data integration module is used to integrate video data according to the operation results and output them to the display device.

2. The device for measuring video image delay of a display device according to claim 1, wherein: The graphic generation module is a PG module.

3. The device for measuring video image delay of a display device according to claim 1, wherein: The operation processing module is an MCU module.

4. The device for measuring video image delay of a display device according to claim 1, wherein: The video data integration module is an OSD module.

5. The device for measuring video image delay of a display device according to claim 1, wherein: The display timing specification is 1920x1080@60Hz progressive signal.

6. The device for measuring video image delay of a display device according to claim 1, wherein: The model of the Scaler chip is RTD2785T.

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