Peripheral sensor signal simulation device and hardware-in-loop simulation test system

Abstract

The utility model provides a peripheral sensor signal simulation device and hardware-in-the-loop simulation test system, the peripheral sensor signal simulation device comprises an FPGA processor and at least one signal channel, each signal channel comprises an input part and an output part which are respectively connected with the FPGA processor, the input part of each signal channel comprises a signal detection module and a conversion control module, and the output part of each signal channel comprises a signal processing module and a signal conversion module. The hardware-in-the-loop simulation test system comprises an upper computer, a controller and the peripheral sensor signal simulation device. A hardware-in-the-loop simulation test constructs a test system for related functions of the vehicle controller, and a peripheral sensor signal simulation device establishes effective connection with the vehicle controller by fully simulating behaviors of a real sensor, so that the purpose of supporting development of various vehicle systems such as a vehicle safety airbag and a chassis system is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of signal simulation, in particular to a peripheral sensor signal simulation device and a hardware-in-the-loop simulation test system. Background Art

[0002] PSI5 (Peripheral Sensor Interface 5), also known as the peripheral sensor interface, is widely used in vehicle systems such as airbags, chassis control, and powertrain systems. PSI5 connects vehicle peripheral sensors to the electronic control unit (ECU) via a bus, enabling the ECU to make control decisions based on sensor data.

[0003] Verifying the data processing capabilities of controllers is a crucial step in vehicle development. Hardware-in-the-loop testing is a common method used in the automotive industry to verify controller functionality. For controllers of peripheral sensors, simulation devices are typically used to simulate the data sent by real sensors to verify controller functionality. However, existing simulation devices are still immature and cannot effectively support the development of various vehicle systems, such as airbags and chassis systems. Utility Model Content

[0004] This utility model aims to at least partially address one of the technical problems in the related art. To this end, the utility model provides a peripheral sensor signal simulation device and a hardware-in-the-loop (HIL) simulation test system. The HIL simulation test system establishes a test system for vehicle controller-related functions. The peripheral sensor signal simulation device employed in this test system effectively simulates the behavior of real sensors and establishes an effective connection with the vehicle controller, thereby supporting the development of various vehicle systems, such as airbags and chassis systems.

[0005] To achieve the above-mentioned purpose, the present invention proposes, on the one hand, a peripheral sensor signal simulation device, comprising: an FPGA processor and at least one signal channel, each signal channel comprising: an input part and an output part respectively connected to the FPGA processor, the input part of each signal channel comprising: a signal detection module and a conversion control module, and the output part of each signal channel comprising: a signal processing module and a signal conversion module.

[0006] The conversion control module is connected to the signal detection module and the FPGA processor respectively, the signal detection module is connected to the FPGA processor, and the signal processing module is connected to the signal conversion module and the FPGA processor respectively.

[0007] The signal detection module is configured to process the controller synchronization signal based on the comparison threshold configured by the conversion control module, generate a target synchronization signal, and transmit the target synchronization signal to the FPGA processor. The conversion control module is configured to calculate a current value based on the configuration data of the target simulation signal and transmit the current value to the FPGA processor. The FPGA processor is configured to generate a digital voltage based on the current value and transmit the digital voltage to the signal processing module after receiving the target synchronization signal. The signal processing module is configured to convert the digital voltage into a target analog voltage and transmit the target analog voltage to the signal conversion module, causing the signal conversion module to generate a target current, which represents the target simulation signal.

[0008] Based on the above embodiments, the peripheral sensor signal simulation device of the present invention may also have the following embodiments:

[0009] In one possible implementation, the FPGA processor is also connected to a host computer to send the comparison threshold configured by the host computer and the configuration data of the target simulation signal to the conversion control module, so that the conversion control module calculates the current value and configures the comparison threshold to the signal detection module.

[0010] In a possible implementation, the signal detection module is further connected to the controller to receive a controller synchronization signal, and converts the controller synchronization signal into a target synchronization signal based on a comparison threshold and outputs it to the FPGA processor.

[0011] Based on the above possible implementations, the signal processing module of the peripheral sensor signal simulation device of the present invention includes a digital-to-analog converter connected to the FPGA processor and configured to convert a digital voltage into an analog voltage.

[0012] The signal processing module further includes: a first operational amplifier, a first resistor, and a second resistor. The first operational amplifier has a first input connected to the digital-to-analog converter, a second input connected to the first end of the first resistor and the first end of the second resistor, respectively, and an output connected to the signal conversion module and the second end of the first resistor, respectively. The second end of the second resistor is grounded. The first operational amplifier is configured to amplify the analog voltage output by the digital-to-analog converter based on the resistance values ​​of the first resistor and the second resistor to obtain a target analog voltage.

[0013] Based on the above possible implementations, the FPGA processor of the peripheral sensor signal simulation device of the present invention is further connected to a host computer. The FPGA processor is configured to transmit configuration data of multiple target simulation signals configured by the host computer to the conversion control module of each signal channel, receive current values ​​calculated by the conversion control module of each signal channel based on the configuration data of the configured target simulation signals, generate digital voltages based on each current value, and output the multiple digital voltages to the signal processing module of each signal channel.

[0014] The signal processing module also includes an isolation module. The isolation module is connected between the FPGA processor and the digital-to-analog converter. The isolation module is configured to isolate and output digital voltages transmitted in multiple signal channels.

[0015] The signal conversion module includes: a second operational amplifier, a switching transistor, a third resistor, and a fourth resistor. The first input terminal of the second operational amplifier is connected to the output terminal of the first operational amplifier, the second input terminal is connected to the output terminal of the switching transistor and the first terminal of the fourth resistor respectively, the output terminal of the second operational amplifier is connected to the first terminal of the third resistor, the second terminal of the third resistor is connected to the control terminal of the switching transistor, the input terminal of the switching transistor is connected to the output terminal of the controller, and the second terminal of the fourth resistor is grounded. The second operational amplifier is configured to control the conduction or cutoff of the switching transistor based on the target analog voltage.

[0016] The second end of the fourth resistor is also connected to the input end of the controller. When the switch is in the on state, the switch, the fourth resistor and the controller form a current loop of the target current, so that the controller uses the target current as the target simulation signal.

[0017] It can be seen that the peripheral sensor signal simulation device of the embodiment of the utility model establishes an effective connection with the controller by fully simulating the behavior of real sensors, thereby effectively supporting the development of various vehicle systems such as airbags and chassis systems. For example, the initialization data configured by the host computer is sent to the controller to simulate the initialization process of the real sensor. For another example, it can effectively simulate the signals of various peripheral sensors of the vehicle and send the target simulation signal to the controller in a current-modulated manner, so that the controller can receive and utilize the target simulation signal. In addition, the above-mentioned simulation device includes multiple signal channels, supports multiple signal channels to output target simulation signals simultaneously, and the multiple target simulation signals are isolated from each other during the output process.

[0018] To achieve the above-mentioned object, the present invention proposes a hardware-in-the-loop simulation test system on the other hand, comprising: a host computer, a controller, and a peripheral sensor signal simulation device as described in any one of the above embodiments.

[0019] It can be seen that the hardware-in-the-loop simulation test system of the present invention constructs a test system for vehicle controller-related functions. The peripheral sensor signal simulation device used in the test system establishes an effective connection with the vehicle controller by fully simulating the behavior of the real sensor, thereby achieving the purpose of supporting the development of various vehicle systems such as vehicle airbags and chassis systems.

[0020] Additional aspects and advantages of the present invention will be given in part in the following description and in part will become apparent from the following description or learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the structure of a hardware-in-the-loop simulation test system according to some embodiments of the present invention;

[0022] Figure 2 This is a schematic structural diagram of a peripheral sensor signal simulation device according to some embodiments of the present invention;

[0023] Figure 3 A schematic diagram of the structure of a peripheral sensor signal simulation device and a signal channel thereof in some embodiments of the present invention;

[0024] Figure 4 A schematic structural diagram of a signal processing module in some embodiments of the present invention;

[0025] Figure 5 Another structural diagram of a signal processing module in some embodiments of the present invention;

[0026] Figure 6 This is a structural diagram of a signal conversion module in some embodiments of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0028] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present invention should have the usual meanings understood by people with ordinary skills in the field to which the present invention belongs. The "first", "second" and similar words used in the embodiments of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include: electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative position relationships. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

[0029] As mentioned in the background technology section, PSI5 is widely used in vehicle airbags, chassis control, powertrain and other systems. PSI5 is used to connect the vehicle's peripheral sensors to the controller through a bus, so that the controller can control and make decisions based on the sensor data. Verifying the data processing function of the controller is an important part of the vehicle development process, and hardware-in-the-loop testing is a method commonly used in the vehicle industry to verify the controller. For the controller of the peripheral sensor, a simulation device is generally used to simulate the data sent by the real sensor to the controller in order to achieve the purpose of verifying the controller function. In the related art, the current bus simulation system has a single function, and the effect of the output simulation signal cannot meet the needs of fully verifying the function of the vehicle controller.

[0030] Based on the above, the embodiments of the present invention provide a peripheral sensor signal simulation device and a hardware-in-the-loop simulation test system, which can improve the problem of single function of the existing simulation system and thus meet the actual needs of fully verifying the function of the vehicle controller.

[0031] Please see the attached Figure 1 The embodiment of the present invention exemplifies a schematic diagram of the structure of a hardware-in-the-loop simulation test system. As shown in the figure, the hardware-in-the-loop simulation test system 1000 includes: a controller 300, a peripheral sensor signal simulation device 100, and a host computer 200 connected in sequence.

[0032] In this test system, the peripheral sensor signal simulation device 100 is connected to the controller 300 via a bus and is used to simulate the signals detected by the vehicle's actual peripheral sensors when sensing the environment. When multiple sensors need to be simulated, multiple peripheral sensor simulation devices 200 can be set between the host computer 200 and the controller 300. In order to reduce the complexity of the hardware-in-the-loop simulation test system 1000, the simulation of multiple sensors can also be achieved through the multiple signal channels included in the peripheral sensor signal simulation device 100 itself, such as Figure 2 shown.

[0033] Each peripheral sensor signal simulation device 100 includes an FPGA processor 10 and at least one signal channel. The number of signal channels can be set based on actual simulation requirements and are denoted as signal channel 1 through signal channel n. Furthermore, each signal channel includes an input portion and an output portion, each connected to the FPGA processor 10. This allows instructions issued by the controller 300 and simulation signals generated by the peripheral sensor signal simulation device 100 to be transmitted through these signal channels.

[0034] See also Figure 3 The input portion of each signal channel includes a signal detection module 30 and a conversion control module 20, and the output portion of each signal channel includes a signal processing module 40 and a signal conversion module 50. Specifically, the conversion control module 20 is connected to the signal detection module 30 and the FPGA processor 10, respectively. The signal detection module 30 is connected to the FPGA processor 10, and the signal processing module 40 is connected to the signal conversion module 50 and the FPGA processor 10, respectively.

[0035] The signal detection module 30 is configured to process the controller synchronization signal based on the comparison threshold configured by the conversion control module 20, obtain a target synchronization signal, and send the target synchronization signal to the FPGA processor 10. The conversion control module 20 is configured to calculate the current value based on the configuration data of the target simulation signal and send the current value to the FPGA processor 10. The FPGA processor 10 is configured to generate a digital voltage based on the current value and send the digital voltage to the signal processing module 40 after receiving the target synchronization signal. The signal processing module 40 is configured to convert the digital voltage into a target analog voltage and send the target analog voltage to the signal conversion module 50, causing the signal conversion module 50 to generate a target current, which is used to represent the target simulation signal. In actual applications, a real sensor based on the PSI5 protocol is connected to the controller via two lines. The controller uses these two lines to power the real sensor and complete data transmission. The controller provides a pre-regulated voltage to the real sensor, and data transmission from the real sensor to the controller is completed through current modulation on these two lines. Therefore, in order to simulate the above process, the peripheral sensor signal simulation device 100 of an embodiment of the present invention receives the controller synchronization signal sent by the controller through the CH+ end of the controller 300, and then outputs the target current to the controller 300 through the CH- end of the controller 300 as a simulation of the peripheral sensor signal.

[0036] Specifically, the FPGA processor 10 is connected to the host computer 200 to receive the comparison threshold configured by the host computer 200 and send the comparison threshold to the signal detection module 30, so that the signal detection module 30 connected to the output terminal (CH+ terminal) of the controller 300 can convert the controller synchronization signal into the target synchronization signal based on the comparison threshold. Exemplarily, the signal detection module 30 compares the voltage value of the controller synchronization signal with the comparison threshold. When the voltage value of the controller synchronization signal is higher than the comparison threshold, it outputs a high level. When the voltage value of the controller synchronization signal is lower than the comparison threshold, it outputs a low level, thereby obtaining the target synchronization signal.

[0037] Another aspect of the connection between the FPGA processor 10 and the host computer 200 is to receive configuration data of the target simulation signal configured by the host computer 200 and send this configuration data to the conversion control module 20, so that the conversion control module 20 calculates the current value corresponding to the target simulation signal. It should be noted that when the FPGA processor 10 sends the above-mentioned configuration data to the conversion control module 20, when the conversion control module 20 calculates the current value, when the conversion control module 20 sends the current value to the FPGA processor 10, and when the FPGA processor 10 generates the digital voltage may not be completely affected by whether the FPGA processor 10 receives the target synchronization signal.

[0038] For example, if the FPGA processor 10 has not yet received the target synchronization signal, the FPGA processor 10 can first send the configuration data of the target simulation signal to the conversion control module 20, so that the conversion control module 20 can calculate the current value and send the current value to the FPGA processor 10. The FPGA processor 10 can first generate a digital voltage based on the current value, or generate the digital voltage after receiving the target synchronization signal; alternatively, the conversion control module 20 can also calculate the current value after the FPGA processor 10 receives the target synchronization signal, and send the current value to the FPGA processor 10, so that the FPGA processor 10 can generate and output the corresponding digital voltage based on the current value.

[0039] For another example, after receiving the target synchronization signal, the FPGA processor 10 may send the configuration data of the target simulation signal to the conversion control module 20, causing the conversion control module 20 to calculate the current value and send the current value to the FPGA processor 10. In any of the above situations, after the FPGA processor 10 receives the target synchronization signal, the FPGA processor 10 needs to output the digital voltage to the signal processing module 40.

[0040] In addition, in order to fully simulate the behavior of real sensors and better establish a connection between the peripheral sensor signal simulation device 100 and the controller 300, another aspect of the connection between the FPGA processor 10 and the host computer 200 is to send the initialization data configured by the host computer 200 to the controller 300 through the peripheral sensor signal simulation device 100. The initialization data is sent to the controller 300 by the real sensor during the initialization phase. It can be seen that the peripheral sensor signal simulation device 100 of the embodiment of the present invention can also simulate the initialization process of the real sensor, and the configuration of the initialization data can be modified by the host computer 200. For example, the initialization data can represent the parameters of the real simulated sensor, such as measurement range, resolution, accuracy, operating voltage, response time, and output voltage.

[0041] See also Figure 4In some embodiments of the peripheral sensor signal simulation device 100 of the present invention, the signal processing module 40 includes: a digital-to-analog converter 42 (DAC), a first operational amplifier OP1, a first resistor R1, and a second resistor R2. The input end of the DAC 42 is connected to the output end of the FPGA processor 10, and the output end of the DAC 42 is connected to the first input end of the first operational amplifier OP1; the second input end of the first operational amplifier OP1 is respectively connected to the first end of the first resistor R1 and the first end of the second resistor R2; the output end of the first operational amplifier OP1 is connected to the signal conversion module 50; the second end of the first resistor R1 is connected to the output end of the first operational amplifier OP1; and the second end of the second resistor R2 is grounded.

[0042] Specifically, the DAC 42 is configured to convert the digital voltage generated by the FPGA processor 10 into an analog voltage. The first operational amplifier OP1 is configured to amplify the analog voltage output by the DAC 42 to obtain a target analog voltage, wherein the amplification factor is determined by the resistance values ​​of the first resistor R1 and the second resistor R2.

[0043] In some embodiments of the peripheral sensor signal simulation device of the present invention, when multiple real sensor signals need to be simulated, the FPGA processor 10 will receive the configuration data of multiple target simulation signals configured by the host computer 200. At this time, the FPGA processor 10 will send the configuration data of these target simulation signals to the conversion control module 20 of the corresponding signal channel in the order of the signal channels. Each conversion control module 20 processes the configuration data of its own target simulation signal and sends the calculated current value to the FPGA processor 10. The FPGA processor 10 can calculate multiple digital voltages based on the received current values, and then output these digital voltages to the signal processing module 40 of the output part of the signal channel in the same order of the signal channels.

[0044] In the above situation, the signal processing module 40 of the peripheral sensor signal simulation device according to the embodiment of the present invention may further include: an isolation module 41. Figure 5 As shown, the input of isolation module 41 is connected to the output of FPGA processor 10, and the output of isolation module 41 is connected to the input of digital-to-analog converter 42. Isolation module 41 is used to isolate the digital voltage in each signal channel when receiving multiple digital voltages transmitted. This allows multiple signal channels to simultaneously output target simulation signals without interference from other signal channels. Furthermore, isolation module 41 simplifies the circuit structure of a peripheral sensor signal simulation device with a multi-signal channel structure.

[0045] As mentioned above, the first operational amplifier OP1 outputs the target analog voltage to the signal conversion module 50. The signal conversion module 50 generates a target current based on the received target analog voltage. The target current represents the target simulation signal. Specifically, in some embodiments of the present invention, the structure of the signal conversion module 50 of the peripheral sensor signal simulation device 100 is as follows: Figure 6 As shown, the controller includes: a second operational amplifier OP2, a switch Q1, a third resistor R3, and a fourth resistor R4. The first input terminal of the second operational amplifier OP2 is connected to the output terminal of the first operational amplifier OP1, the second input terminal of the second operational amplifier OP2 is connected to the output terminal of the switch Q1 and the first terminal of the fourth resistor R4 respectively, and the output terminal of the second operational amplifier OP2 is connected to the first terminal of the third resistor R3; the second terminal of the third resistor R3 is connected to the control terminal of the switch Q1; the input terminal of the switch Q1 is connected to the output terminal of the controller 300; the second terminal of the fourth resistor R4 is connected to the input terminal of the controller 300, and the second terminal of the fourth resistor R4 is grounded.

[0046] As can be seen from the above embodiments, the signal conversion module 50 is a voltage-to-constant current circuit, which is an adjustable constant current source controlled by a target analog voltage for outputting a target current. Specifically, when the switch tube Q1 is in the on state, the switch tube Q1 and the fourth resistor R4 form a current loop of the target current with the controller 300, so that the controller 300 uses the target current as the target simulation signal.

[0047] The second operational amplifier OP2 is configured to control the on / off switching of the switch Q1 based on the target analog voltage. The switch Q1 can be a transistor, such as an NPN transistor, or a MOS transistor, such as an NMOS transistor, to improve circuit accuracy. The third resistor R3 is used to provide current to the control terminal of the switch Q1, and the fourth resistor R4 is a sampling resistor.

[0048] Taking Q1 as an NPN transistor as an example, the first input of OP2 inputs the target analog voltage. Assuming that Q1 is not yet turned on at this time, the second input of OP2 is equivalent to the input being zero. The output of OP1 generates an in-phase output voltage. The voltage difference between the base and emitter of Q1 reaches Q1's turn-on voltage, turning Q1 on. The controller 300 forms a current loop for the target current through its CH+ and CH- terminals, Q1, and R4. The target current flows into the controller 300 through the CH- terminal of the controller 300 and is received by the controller 300 as the target simulation signal. In addition, the target current flows through R4, causing the voltage of R4 to change. The sampling resistor R4 feeds back its voltage change to the second input of OP2 in real time. The voltage difference between the first input of OP2 and the second input of OP2 determines the output voltage of OP2. The output voltage of OP2 affects the voltage difference between the base and emitter of Q1, which in turn affects the magnitude of the target current flowing into the controller 300 in the loop.

[0049] In summary, the peripheral sensor signal simulation device 100 of the embodiment of the present invention establishes an effective connection with the controller 300 by fully simulating the behavior of the real sensor, thereby effectively supporting the development of various vehicle systems such as airbags and chassis systems. For example, the initialization data configured by the host computer 200 is sent to the controller 300 to simulate the initialization process of the real sensor. For another example, it can effectively simulate the signals of various peripheral sensors of the vehicle, and send the target simulation signal to the controller 300 in the form of current modulation, so that the controller 300 can receive and utilize the target simulation signal. In addition, the simulation device 100 can include multiple signal channels, support multiple signal channels to output target simulation signals at the same time, and multiple target simulation signals are isolated from each other during the output process.

[0050] In addition, although the circuit structure features of the present invention are described in a specific combination in the drawings, this does not require or imply that the structure of the present invention must be constructed in this combination, or that all the shown modules must be applied to achieve the desired results.

[0051] It should be understood that the various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used to implement: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0052] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present invention should have the usual meanings understood by people with ordinary skills in the field to which the present invention belongs. The "first", "second" and similar words used in the embodiments of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include: electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative position relationships. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

[0053] Although the spirit and principles of the present invention have been described with reference to several specific embodiments, it should be understood that the present invention is not limited to the specific embodiments disclosed, and the division into various aspects does not mean that the features of these aspects cannot be combined to benefit. Such division is merely for the convenience of expression. The present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the appended claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. A peripheral sensor signal simulation device, characterized in that: include: An FPGA processor (10) and at least one signal channel, each signal channel comprising an input portion and an output portion respectively connected to the FPGA processor (10), the input portion of each signal channel comprising a signal detection module (30) and a conversion control module (20), and the output portion of each signal channel comprising a signal processing module (40) and a signal conversion module (50); The conversion control module (20) is connected to the signal detection module (30) and the FPGA processor (10) respectively, the signal detection module (30) is connected to the FPGA processor (10), and the signal processing module (40) is connected to the signal conversion module (50) and the FPGA processor (10) respectively; The signal detection module (30) is configured to process a controller synchronization signal based on a comparison threshold configured by the conversion control module (20) to obtain a target synchronization signal, and send the target synchronization signal to the FPGA processor (10); the conversion control module (20) is configured to calculate a current value based on configuration data of a target simulation signal, and send the current value to the FPGA processor (10); the FPGA processor (10) is configured to generate a digital voltage based on the current value, and send the digital voltage to the signal processing module (40) after receiving the target synchronization signal; the signal processing module (40) is configured to convert the digital voltage into a target analog voltage, and send the target analog voltage to the signal conversion module (50), so that the signal conversion module (50) generates a target current, and the target current represents the target simulation signal.

2. The peripheral sensor signal simulation device according to claim 1, characterized in that: The FPGA processor (10) is also connected to a host computer (200) to send the comparison threshold configured by the host computer (200) and the configuration data of the target simulation signal to the conversion control module (20), so that the conversion control module (20) calculates the current value and configures the comparison threshold to the signal detection module (30).

3. The peripheral sensor signal simulation device according to claim 1, characterized in that: The signal detection module (30) is also connected to the controller (300) to receive the controller synchronization signal, and converts the controller synchronization signal into a target synchronization signal based on the comparison threshold and outputs it to the FPGA processor (10).

4. The peripheral sensor signal simulation device according to claim 3, characterized in that: The signal processing module (40) comprises: a digital-to-analog converter (42); the digital-to-analog converter (42) is connected to the FPGA processor (10); and the digital-to-analog converter (42) is configured to convert the digital voltage into an analog voltage.

5. The peripheral sensor signal simulation device according to claim 4, characterized in that: The signal processing module (40) further includes: a first operational amplifier (OP1), a first resistor (R1), and a second resistor (R2); a first input end of the first operational amplifier (OP1) is connected to the digital-to-analog converter (42), a second input end is respectively connected to the first end of the first resistor (R1) and the first end of the second resistor (R2), an output end is respectively connected to the signal conversion module (50) and the second end of the first resistor (R1), and the second end of the second resistor (R2) is grounded; the first operational amplifier (OP1) is configured to amplify the analog voltage output by the digital-to-analog converter (42) based on the resistance values ​​of the first resistor (R1) and the second resistor (R2) to obtain the target analog voltage.

6. The peripheral sensor signal simulation device according to claim 5, characterized in that: The FPGA processor (10) is also connected to a host computer (200); the FPGA processor (10) is configured to send the configuration data of the multiple target simulation signals configured by the host computer (200) to the conversion control module (20) of each signal channel, receive the current value calculated by the conversion control module (20) of each signal channel according to the configuration data of the configured target simulation signal, generate the digital voltage based on each current value, and output the multiple digital voltages to the signal processing module (40) of each signal channel.

7. The peripheral sensor signal simulation device according to claim 6, characterized in that: The signal processing module (40) further includes: an isolation module (41); the isolation module (41) is connected between the FPGA processor (10) and the digital-to-analog converter (42); the isolation module (41) is configured to isolate and output the digital voltage transmitted in the multiple signal channels.

8. The peripheral sensor signal simulation device according to claim 7, characterized in that: The signal conversion module (50) comprises: a second operational amplifier (OP2), a switch tube (Q1), a third resistor (R3), and a fourth resistor (R4); a first input end of the second operational amplifier (OP2) is connected to the output end of the first operational amplifier (OP1), a second input end is respectively connected to the output end of the switch tube (Q1) and the first end of the fourth resistor (R4), an output end is connected to the first end of the third resistor (R3), a second end of the third resistor (R3) is connected to the control end of the switch tube (Q1), an input end of the switch tube (Q1) is connected to the output end of the controller (300), and a second end of the fourth resistor (R4) is grounded; wherein the second operational amplifier (OP2) is configured to control the conduction or cutoff of the switch tube (Q1) based on the target analog voltage.

9. The peripheral sensor signal simulation device according to claim 8, characterized in that: The second end of the fourth resistor (R4) is also connected to the input end of the controller (300); when the switch tube (Q1) is in an on state, the switch tube (Q1), the fourth resistor (R4) and the controller (300) form a current loop of the target current, so that the controller (300) uses the target current as the target simulation signal.

10. A hardware-in-the-loop simulation test system, characterized in that: include: A host computer (200), a controller (300), and a peripheral sensor signal simulation device according to any one of claims 1 to 9.

Images