Light-emitting display device

Abstract

A light emitting display device is provided. The light emitting display device includes a pixel driving portion including a transistor, a planarization layer covering the pixel driving portion, an anode of a light emitting diode disposed on the planarization layer, a pixel defining layer including an opening overlapping the anode of the light emitting diode in a plan view, a wall including an opening overlapping the opening of the pixel defining layer, the display device includes a pixel defining layer, a planarization layer disposed on the pixel defining layer, a light emitting layer disposed in an opening of the pixel defining layer, a cathode of a light emitting diode disposed on the light emitting layer, and a separator dividing a wall into a first wall and a second wall, in which the first wall is electrically connected to a transistor of a pixel driving portion through a first contact hole passing through the pixel defining layer and the planarization layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2023-0161052, filed with the Korean Intellectual Property Office on November 20, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The embodiments relate to light-emitting display devices. Background Technology

[0004] Display devices are devices that display screens and include liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs). These display devices are used in a variety of electronic devices such as mobile phones, navigation devices, digital cameras, e-books, portable game consoles, and various terminals.

[0005] Organic light-emitting displays (OLEDs) are self-emissive and, unlike liquid crystal displays (LCDs), do not require a separate light source, thus reducing thickness and weight. Furthermore, OLEDs offer high-quality characteristics such as low power consumption, high brightness, and fast response times. Utility Model Content

[0006] The embodiments provide a light-emitting display device capable of applying electrical voltage to the anode of a light-emitting diode using a separator.

[0007] Furthermore, the embodiments provide a light-emitting display device that has high resolution or shields or blocks noise transmission to touch sensing electrodes by applying a selected voltage to a portion of the separator.

[0008] The light-emitting display device according to an embodiment may include a pixel driving unit including a transistor, a planarization layer covering the pixel driving unit, an anode of a light-emitting diode disposed on the planarization layer, a pixel defining layer including an opening overlapping the anode of the light-emitting diode in a plan view, a wall including an opening overlapping the opening of the pixel defining layer, a light-emitting layer disposed in the opening of the pixel defining layer, a cathode of a light-emitting diode disposed on the light-emitting layer, and a separator dividing the wall into a first wall and a second wall. The first wall is electrically connected to the transistor of the pixel driving unit through a first contact hole passing through the pixel defining layer and the planarization layer, and the cathode of the light-emitting diode contacts the side of the first wall and is electrically connected to the transistor.

[0009] The first wall may include a first conductive wall and a second conductive wall disposed on the first conductive wall, and the second conductive wall may have a pointed portion protruding from the first conductive wall.

[0010] The tip may protrude toward the opening of the first wall that overlaps with the opening of the pixel-defining layer.

[0011] The first wall can be an inner conductive wall, and the second wall can be an outer conductive wall. The inner conductive wall can surround the opening of the pixel defining layer in the planar view, and the outer conductive wall can be electrically separated from the inner conductive wall. The inner conductive wall can include a first inner conductive wall and a second inner conductive wall disposed on the first inner conductive wall, and the outer conductive wall can include a first outer conductive wall and a second outer conductive wall disposed on the first outer conductive wall.

[0012] The inner conductive wall can be electrically connected to the transistor of the pixel driving section through the first contact hole, and the outer conductive wall can receive a constant voltage through the second contact hole passing through the pixel defining layer and the planarization layer.

[0013] The separate light-emitting layer and the separate cathode can be formed on the outer conductive wall, and can be separated from the light-emitting layer and the cathode by a separator.

[0014] The light-emitting display device may also include an encapsulation layer covering the wall and the cathode, and the separator may include an empty space through the encapsulation layer and the wall.

[0015] The light-emitting display device may also include an encapsulation layer covering the wall and the cathode, a separator passing through the wall and disposed between the first wall and the second wall, and the encapsulation layer disposed on the separator.

[0016] The light-emitting display device according to an embodiment may include a pixel driving unit including a transistor, a planarization layer covering the pixel driving unit, an anode of a light-emitting diode disposed on the planarization layer, a pixel defining layer including an opening overlapping the anode of the light-emitting diode in a plan view and including a black pixel defining layer and a transparent pixel defining layer, a wall including an opening overlapping the opening of the pixel defining layer, a light-emitting layer disposed in the opening of the pixel defining layer, a cathode of a light-emitting diode disposed on the light-emitting layer, and a separator dividing the wall into a first wall and a second wall. The first wall may be electrically connected to the transistor of the pixel driving unit through a first contact hole passing through the pixel defining layer and the planarization layer, and the cathode of the light-emitting diode may contact the side of the first wall and be electrically connected to the transistor.

[0017] The pixel defining layer may also include an intermediate pixel defining layer, which may be an inorganic insulating layer and may be disposed between the black pixel defining layer and the transparent pixel defining layer.

[0018] The first wall may include a first conductive wall and a second conductive wall disposed on the first conductive wall, the second conductive wall may have a pointed portion protruding from the first conductive wall, and the pointed portion may protrude toward an opening of the first wall that overlaps with the opening of the pixel defining layer.

[0019] The first conductive wall may contain aluminum, and the second conductive wall may contain titanium.

[0020] The first wall can be an inner conductive wall, and the second wall can be an outer conductive wall. The inner conductive wall can surround the opening of the pixel defining layer in the planar view. The outer conductive wall can be electrically separated from the inner conductive wall. The inner conductive wall can include a first inner conductive wall and a second inner conductive wall disposed on the first inner conductive wall. The outer conductive wall can include a first outer conductive wall and a second outer conductive wall disposed on the first outer conductive wall. The inner conductive wall can be electrically connected to the transistor of the pixel driving part through the first contact hole, and the outer conductive wall can receive a constant voltage through the second contact hole passing through the pixel defining layer and the planarization layer.

[0021] The separate light-emitting layer and the separate cathode can be formed on the outer conductive wall, and can be separated from the light-emitting layer and the cathode by a separator.

[0022] The light-emitting display device may also include an encapsulation layer covering the wall and the cathode, and the separator may include an empty space through the encapsulation layer and the wall.

[0023] The empty space of the separated parts can be filled with insulating material.

[0024] The light-emitting display device may also include an encapsulation layer covering the wall and the cathode, a separator passing through the wall and disposed between the first wall and the second wall, and the encapsulation layer disposed on the separator.

[0025] According to an embodiment, a separator can be formed by etching a wall comprising at least two layers made of conductive material to form an empty space or by filling the space of the hole with an insulating material, so that the layers can be separated by the separator, and a voltage can be applied to the electrodes of the light-emitting diode by electrically connecting the electrodes of the light-emitting diode to the wall.

[0026] According to an embodiment, a voltage line can be removed by allowing a selected voltage to be applied to another part of the separator, thereby providing a high-resolution light-emitting display device.

[0027] According to an embodiment, the aim is to provide a light-emitting display device that shields noise from being transmitted to touch-sensing electrodes disposed on the front surface by allowing a selected voltage to be applied to another part of a separator. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the equivalent circuit of a pixel included in a light-emitting display device according to an embodiment.

[0029] Figure 2 It shows that it is applied to Figure 1 The waveform of the signal of the pixel.

[0030] Figure 3 This is a schematic diagram of an equivalent circuit of a pixel included in a light-emitting display device according to another embodiment.

[0031] Figure 4 This is a schematic plan view showing the connection between the pixel driving unit and the light-emitting display device according to an embodiment.

[0032] Figure 5 It is shown Figure 4 The light-emitting display device in the embodiment along Figure 4 A schematic cross-sectional view taken from line I-I'.

[0033] Figure 6 and Figure 7A as well as Figure 7B It is shown Figure 3 and Figure 4 A schematic diagram illustrating the effect of an embodiment.

[0034] Figure 8 , Figure 9 and Figure 10 This illustrates the edge of a light-emitting display device according to other embodiments. Figure 4 A schematic cross-sectional view taken from line I-I'.

[0035] Figure 11 This is a schematic plan view showing the connection between a pixel driving unit and a light-emitting display device according to another embodiment.

[0036] Figure 12 This illustrates the edge of a light-emitting display device according to another embodiment. Figure 11 A schematic cross-sectional view taken from line II-II'.

[0037] Figure 13 This is a schematic perspective view of an electronic device according to an embodiment.

[0038] Figure 14 This is a schematic perspective view of a light-emitting display device included in an electronic device according to an embodiment.

[0039] Figure 15 yes Figure 14 A schematic cross-sectional view of a light-emitting display device.

[0040] Figure 16 This is a schematic plan view showing the connection relationship between the components of the light-emitting display device according to an embodiment.

[0041] Figure 17 This is a block diagram of an electronic device according to an embodiment. Detailed Implementation

[0042] In the following, various embodiments will be described in detail with reference to the accompanying drawings to enable those skilled in the art to readily implement this application.

[0043] This application can be implemented in many different forms and is not limited to the embodiments described herein.

[0044] To clearly explain this application, parts unrelated to the description have been omitted, and identical or similar parts are given the same reference numerals throughout the specification.

[0045] Furthermore, for ease of explanation, the dimensions and thicknesses of each component shown in the accompanying drawings are arbitrarily depicted, and therefore this application is not necessarily limited to the contents shown.

[0046] In the accompanying drawings, the thickness is magnified to clearly show the individual layers and regions.

[0047] Furthermore, for ease of explanation, the thickness of some layers and regions has been exaggerated in the accompanying drawings.

[0048] Furthermore, when a part such as a layer, membrane, region, plate, or component is said to be "above" or "on" another part, it not only means that it is "directly above" another part, but also that there are other parts in between.

[0049] Conversely, when one part is said to be "right" on top of another part, it means that there are no other parts in between.

[0050] Furthermore, "above" or "on" the reference section means set above or below the reference section, and does not necessarily mean set "above" or "on" the reference section in the direction opposite to gravity.

[0051] Furthermore, throughout the instruction manual, when a part is said to "include" certain components, unless otherwise expressly stated to the contrary, this means that it may also include other components, rather than excluding other components.

[0052] Furthermore, throughout the instruction manual, when "in a plan view" is mentioned, it means when the target part is viewed from above, and when "in a section" is mentioned, it means when the target part is cut vertically and viewed from the side.

[0053] Furthermore, throughout this specification, the use of the term "connected" means not only when two or more components are directly connected, but also when two or more components are indirectly connected (physically connected) through other components. This includes not only cases of direct or electrical connection, but also cases where each part is substantially connected to other parts (as referred to by different names depending on location or function).

[0054] Furthermore, throughout the specification, when a part such as wiring, layer, film, area, plate or component is described as "extending in a first direction or a second direction", this means not only a straight shape extending in that direction, but also a structure that extends as a whole along the first or second direction, and also includes structures that are bent at some parts, have a serrated structure, or extend while incorporating a bent structure.

[0055] Furthermore, electronic devices including display devices, display panels, etc., described in the specification (e.g., mobile phones, televisions, monitors, laptop computers, etc.) or display devices, display panels, etc., manufactured by the manufacturing methods described in the specification are not excluded from the scope of the claims herein.

[0056] The light-emitting display device may include a display area, and pixels may be disposed within the display area.

[0057] In the following text, it will be through Figures 1 to 3 The circuit structure of the light-emitting diode (LED) and the pixel driver (PC) included in the pixel PX is described.

[0058] For example, based on the reference Figure 1 and Figure 2 The embodiments describe in detail the pixel PX, the signal applied to the pixel PX, and the operation of the pixel PX.

[0059] Figure 1 This is a schematic diagram of the equivalent circuit of a pixel PX included in a light-emitting display device according to an embodiment.

[0060] Reference Figure 1 A pixel PX may include a light-emitting diode (LED) and a pixel driver unit PC that drives the LED. The pixel driver unit PC may include... Figure 1 All components except light-emitting diodes (LEDs), and according to Figure 1 The pixel driving unit PC of the pixel PX in the embodiment may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a first capacitor C1, and a second capacitor C2.

[0061] For example, the pixel driving unit PC may include a first scan line 161 on which a first scan signal GW is applied, a second scan line 162 on which a second scan signal GC is applied, a third scan line 163 on which a third scan signal GR is applied, a fourth scan line 166 on which a fourth scan signal GI is applied, a light emission signal line 164 on which a light emission signal EM1 is applied, and a data line 171 on which a data voltage VDATA is applied.

[0062] For example, a pixel PX can be connected to a drive voltage line 172 with an applied drive voltage (ELVDD; also known as a first drive voltage), a drive low voltage line 174 with an applied drive low voltage (ELVSS; also known as a second drive voltage), a reference voltage line 173 with an applied reference voltage Vref, a first initialization voltage line 177 with an applied first initialization voltage Vint, and a second initialization voltage line 176 with an applied second initialization voltage Vcint. The circuit structure of the pixel is as follows, focusing on each element included in the pixel (e.g., transistors, capacitors, and light-emitting elements).

[0063] The first transistor T1 (hereinafter also referred to as the driving transistor) may include a gate electrode, a first electrode, and a second electrode. The gate electrode of the first transistor T1 may be connected to the first electrode of the first capacitor C1, the second electrode of the second transistor T2, and the second electrode of the fourth transistor T4. The first electrode of the first transistor T1 (e.g., the input-side electrode) may be connected to the second electrode of the third transistor T3 and the second electrode of the fifth transistor T5. The second electrode of the first transistor T1 (e.g., the output-side electrode) may be connected to the first electrode of the sixth transistor T6, the second electrode of the eighth transistor T8, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2.

[0064] The conduction level of the first transistor T1 can be determined by the voltage at its gate electrode. The conduction level of the first transistor T1 can be adjusted to control the magnitude of the current flowing from its first electrode to its second electrode. This current flowing from the first electrode to the second electrode can be the same as the current flowing through the light-emitting diode (LED) during the light-emitting period, and can also be referred to as the luminous current. For example, the first transistor T1 can be configured as an n-type transistor. As the gate electrode voltage increases, the luminous current increases. With a high luminous current, the LED can display high brightness.

[0065] The second transistor T2 (hereinafter also referred to as the data input transistor) may include a gate electrode, a first electrode, and a second electrode. The gate electrode of the second transistor T2 may be connected to a first scan line 161 where a first scan signal GW is applied. The first electrode of the second transistor T2 (e.g., an input-side electrode) may be connected to a data line 171 where a data voltage VDATA is applied. The second electrode of the second transistor T2 (e.g., an output-side electrode) may be connected to the second electrode of the fourth transistor T4, the first electrode of the first capacitor C1, and the gate electrode of the first transistor T1. The second transistor T2 may transmit the data voltage VDATA to the pixel PX according to the first scan signal GW, and may apply the data voltage VDATA to the gate electrode of the first transistor T1, and the data voltage VDATA may be stored in the first electrode of the first capacitor C1.

[0066] The third transistor T3 (hereinafter also referred to as the first voltage transfer transistor or the second initialization voltage transfer transistor) may include a gate electrode, a first electrode, and a second electrode. The gate electrode of the third transistor T3 may be connected to a second scan line 162 on which a second scan signal GC is applied. The first electrode of the third transistor T3 (e.g., the input-side electrode) may be connected to a second initialization voltage line 176 on which a second initialization voltage Vcint is applied. The second electrode of the third transistor T3 (e.g., the output-side electrode) may be connected to the first electrode of the first transistor T1 and the second electrode of the fifth transistor T5. The third transistor T3 can transfer the second initialization voltage Vcint to the first transistor T1 without passing through a light-emitting diode (LED).

[0067] For example, the second initialization voltage Vcint may have a positive voltage value similar to the drive voltage ELVDD. According to an embodiment, the drive voltage ELVDD or a bias voltage (Vbias) may be applied instead of the second initialization voltage Vcint. When current flows through the LED, the third transistor T3 may cause the LED to emit light unnecessarily; therefore, the second initialization voltage Vcint can be connected to the third transistor T3 via a separate path to transfer the second initialization voltage Vcint to the first transistor T1. Thus, the third transistor T3 may not conduct during the light-emitting period, but may conduct during other periods.

[0068] The fourth transistor T4 (hereinafter also referred to as the reference voltage transfer transistor) may include a gate electrode connected to a third scan line 163 on which a third scan signal GR is applied, a first electrode connected to a reference voltage line 173, and a second electrode connected to the first electrode of the first capacitor C1, the gate electrode of the first transistor T1, and the second electrode of the second transistor T2. The fourth transistor T4 can be used to initialize the gate electrode of the first transistor T1 by transferring the reference voltage Vref to the first electrode of the first capacitor C1 and the gate electrode of the first transistor T1.

[0069] The fifth transistor T5 (hereinafter also referred to as the cathode-connected transistor) may include a gate electrode connected to a light-emitting signal line 164 on which a light-emitting signal EM1 is applied, a first electrode connected to the cathode of the light-emitting diode LED and the second electrode of the seventh transistor T7, and a second electrode connected to the first electrode of the first transistor T1 and the second electrode of the third transistor T3. The fifth transistor T5 may provide a current path based on the light-emitting signal EM1 by connecting the first electrode of the first transistor T1 to the light-emitting diode LED, thereby enabling the light-emitting diode LED to emit light.

[0070] The sixth transistor T6 (hereinafter also referred to as the drive low voltage application transistor) may include a gate electrode connected to a light-emitting signal line 164 on which a light-emitting signal EM1 is applied, a second electrode connected to the first transistor T1, a second electrode connected to the eighth transistor T8, a first electrode connected to the second electrode of the first capacitor C1 and the second electrode of the second capacitor C2, and a second electrode for receiving the drive low voltage ELVSS. The sixth transistor T6 can be used to transmit the drive low voltage ELVSS to the second electrode of the first transistor T1 based on the light-emitting signal EM1 or to block the drive low voltage ELVSS from being transmitted to the second electrode of the first transistor T1.

[0071] The seventh transistor T7 (hereinafter also referred to as the second voltage transfer transistor) may include a gate electrode connected to a second scan line 162 on which a second scan signal GC is applied, a first electrode (e.g., an input-side electrode) connected to a second initialization voltage line 176 on which a second initialization voltage Vcint is applied, and a second electrode (e.g., an output-side electrode) connected to the cathode of the light-emitting diode (LED) and the first electrode of the fifth transistor T5. The seventh transistor T7 can be used to transfer the second initialization voltage Vcint to the cathode of the LED and can change the voltage level of the cathode of the LED to the second initialization voltage Vcint, thereby solving the problem of unclear black display caused by residual charge on the cathode of the LED.

[0072] For example, the second initialization voltage Vcint may have a positive voltage value similar to the drive voltage ELVDD. In another instance, the drive voltage ELVDD or the bias voltage (Vbias) may be used instead of the second initialization voltage Vcint.

[0073] The eighth transistor T8 (hereinafter referred to as the first initialization voltage transfer transistor) may include a gate electrode connected to a fourth scan line 166 on which a fourth scan signal GI is applied, a first electrode (e.g., an input-side electrode) connected to a first initialization voltage line 177 on which a first initialization voltage Vint is applied, and a second electrode (e.g., an output-side electrode) connected to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2. The eighth transistor T8 can be used to initialize the second electrode of the first transistor T1 by applying the first initialization voltage Vint to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2.

[0074] exist Figure 1In this embodiment, all transistors may be formed as n-type transistors, and each transistor may be turned on when the voltage of the gate electrode is high and turned off when the voltage of the gate electrode is low.

[0075] For example, the semiconductor layer included in each transistor may be formed of polycrystalline silicon semiconductor or oxide semiconductor. In another example, the semiconductor layer included in each transistor may be formed of amorphous semiconductor or single-crystal semiconductor.

[0076] According to an embodiment, the semiconductor layer included in each transistor may further include an overlay layer (or an additional gate electrode) overlapping the gate electrode. For example, the characteristics of the transistor can be altered by applying a voltage to the overlay layer (or the additional gate electrode) to improve the display quality of the pixel PX.

[0077] The first capacitor C1 may include a first electrode connected to the gate electrode of the first transistor T1, the second electrode of the second transistor T2, and the second electrode of the fourth transistor T4. The first capacitor C1 may also include a second electrode connected to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the eighth transistor T8, and the second electrode of the second capacitor C2. The first electrode of the first capacitor C1 can be used to receive and store the data voltage VDATA from the second transistor T2.

[0078] The second capacitor C2 may include a first electrode connected to a drive low voltage line 174 on which a drive low voltage ELVSS is applied, and a second electrode connected to the second electrodes of the first capacitor C1, the first transistor T1, the sixth transistor T6, and the eighth transistor T8. The second capacitor C2 can be used to maintain a constant voltage between the second electrodes of the first transistor T1 and the second electrodes of the first capacitor C1. For example, according to an embodiment, the first electrode of the second capacitor C2 may be connected to the drive voltage line 172. In another example, the second capacitor C2 may be omitted.

[0079] A light-emitting diode (LED) may include an anode connected to a drive voltage line 172 to which a drive voltage ELVDD is applied, and a cathode connected to a first electrode of a fifth transistor T5 and a second electrode of a seventh transistor T7. The cathode of the LED may be connected to the first transistor T1 via the fifth transistor T5, which is turned on by the light-emitting signal EM1. The LED may be disposed between a pixel driving section PC and the drive voltage ELVDD, such that the same current can flow through the first transistor T1 of the pixel driving section PC, and the brightness of the LED may be determined according to the magnitude of the current. The LED may include a light-emitting layer comprising at least one of an organic light-emitting material and an inorganic light-emitting material disposed between the anode and the cathode. A specific stacking structure of the LED according to an embodiment may be as follows: Figure 5 As shown in the figures.

[0080] according to Figure 1 In one embodiment, the pixel PX can perform a compensation operation to detect changes in the characteristics of the first transistor T1 (e.g., threshold voltage) so that the display brightness can remain constant regardless of changes in the characteristics of the first transistor T1. For example, in Figure 1 In this configuration, the light-emitting diode (LED) can be positioned between the first electrode of the first transistor T1 and the driving voltage line 172.

[0081] According to this embodiment, the pixel PX is also called an inverted pixel, which differs from the pixel PX in which the light-emitting element is disposed between the first transistor T1 and the driving low voltage ELVSS. The light-emitting diode (LED) can display brightness based on the magnitude of the current flowing through the current path from the driving voltage ELVDD through the first transistor T1 to the driving low voltage ELVSS. Therefore, as the current increases, the displayed brightness can increase. Figure 1 In the inverted pixel structure, the first electrode of the first transistor T1 can be connected to the light-emitting diode (LED) and can be separated from the second electrode (e.g., the source electrode) of the first transistor T1. This has the advantage that the voltage of the second electrode (e.g., the source electrode) of the first transistor T1 does not change even when the voltage of each part of the pixel driving unit PC changes.

[0082] When the sixth transistor T6 is turned on, the voltage at the second electrode of the first capacitor C1 decreases, and the voltage at the first electrode of the first capacitor C1 also decreases. This causes a decrease in the output current output by the first transistor T1. However, in this embodiment, the problem of a decrease in the output current of the first transistor T1 can be prevented. (The explanation continues...) Figure 2 The operation will be described in detail.

[0083] exist Figure 1 In one embodiment, pixel PX is described as comprising eight transistors T1 to T8 and two capacitors (e.g., a first capacitor C1 and a second capacitor C2), but the embodiment is not limited thereto. In another instance, additional capacitors or transistors may be included, and some capacitors or transistors may be omitted.

[0084] Above, through Figure 1 The circuit structure of pixel PX is described. In the following text, reference will be made to... Figure 2 Detailed description of what is applied to Figure 1 The waveform of the signal of pixel PX and the corresponding operation of pixel PX.

[0085] Figure 2 It shows that it is applied to Figure 1 The waveform of the signal of pixel PX.

[0086] Reference Figure 2 When the signal applied to pixel PX is divided into multiple time periods, it is divided into an initialization time period (or reset time period), a compensation time period, a writing time period, and a light emission time period.

[0087] For example, the light-emitting period can be the period during which the LED emits light, and a gate turn-on voltage (e.g., a high-level voltage) can be applied by the light-emitting signal EM1, thereby turning on the fifth transistor T5 and the sixth transistor T6. For example, a gate turn-off voltage (e.g., a low-level voltage) can be applied by the first scan signal GW, the second scan signal GC, the third scan signal GR, and the fourth scan signal GI. As a result, a current path can be formed between the drive voltage ELVDD and the drive low voltage ELVSS through the LED, the fifth transistor T5, the first transistor T1, and the sixth transistor T6. The magnitude of the current flowing through the current path can be determined by the degree of conduction of the channel of the first transistor T1, and the degree of conduction of the channel of the first transistor T1 can be determined by the voltage of the gate electrode of the first transistor T1 (or the first electrode of the first capacitor C1). Therefore, the output current generated according to the voltage of the gate electrode of the first transistor T1 can flow along the current path including the LED, so that the LED can emit light.

[0088] exist Figure 2 The diagram illustrates the emission period during which the emission signal EM1 is subjected to a gate on-state voltage (e.g., a high-level voltage), but the emission period can have the longest duration. However, since the emission period only performs the simple operation described above, it simply... Figure 2 As described in the diagram, the emission period can end and the initialization period can begin as the emission signal EM1 changes to the gate turn-off voltage (e.g., a low-level voltage).

[0089] Reference Figure 2 During the initialization period, the third scan signal GR can be changed to a gate on-voltage (e.g., a high-level voltage), and then the fourth scan signal GI can be changed to a gate on-voltage (e.g., a high-level voltage). For example, a gate off-voltage (e.g., a low-level voltage) can be applied by the first scan signal GW, the second scan signal GC, and the light-emitting signal EM1.

[0090] For example, a fourth transistor T4 connected to a third scan signal GR that has been changed to a gate on-state voltage (e.g., a high-level voltage) can be turned on. Therefore, the gate electrode of the first transistor T1 can be set by a reference voltage Vref, and the first electrode of the first capacitor C1 can be initialized by the reference voltage Vref. For example, the reference voltage Vref can have a voltage value capable of turning on the first transistor T1.

[0091] For example, the fourth scan signal GI can also be applied to turn on the eighth transistor T8 while changing to the gate turn-on voltage (e.g., a high-level voltage), and as a result, the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2 can be initialized by the first initialization voltage Vint.

[0092] For example, at the end of the initialization period, the fourth scan signal GI can be changed to a gate turn-off voltage (e.g., a low-level voltage), and the compensation period begins.

[0093] Reference Figure 2 During the compensation period, the third scan signal GR can maintain the gate on-state voltage (e.g., a high-level voltage), and the second scan signal GC can be changed to the gate on-state voltage (e.g., a high-level voltage). For example, a gate off-state voltage (e.g., a low-level voltage) can be applied by the first scan signal GW, the fourth scan signal GI, and the light-emitting signal EM1.

[0094] As the reference voltage Vref continues to be transmitted through the conducting fourth transistor T4 to the gate electrode of the first transistor T1 and the first electrode of the first capacitor C1, the third transistor T3 and the seventh transistor T7 can also be turned on by the second scan signal GC with an additional gate turn-on voltage (e.g., a high-level voltage), and the second initialization voltage Vcint can be transmitted to the first electrode of the first transistor T1 and the cathode of the light-emitting diode LED.

[0095] For example, the first transistor T1 may be turned on by a reference voltage Vref, so the Vgs value of the first transistor may be the same as the threshold voltage (Vth) value of the first transistor T1. For example, Vgs is a value obtained by subtracting the voltage of the second electrode (e.g., the source electrode) of the first transistor T1 from the voltage of the gate electrode, so the voltage value of the second electrode (e.g., the source electrode) of the first transistor T1 may have a voltage value lower than the voltage of the gate electrode than the threshold voltage (Vth) of the first transistor T1 (e.g., Vref-Vth). For example, the turned-on seventh transistor T7 may change the voltage level of the cathode to the drive voltage ELVDD, so that the voltage of the cathode can be initialized to the drive voltage ELVDD, thereby removing the residual charge in the cathode and preventing the problem of not being able to display black.

[0096] For example, refer to Figure 2 The second scan signal GC can be changed to a gate turn-off voltage (e.g., a low-level voltage), and then the third scan signal GR can also be changed to a gate turn-off voltage (e.g., a low-level voltage) and can enter (or begin) the write phase. During the write phase, a gate turn-on voltage (e.g., a high-level voltage) can be applied by the first scan signal GW.

[0097] For example, the period during which the first scan signal GW is held at the gate on voltage can be 1H. 1H represents one horizontal cycle, and one horizontal cycle can correspond to one horizontal synchronization signal (Hsync). 1H can mean the time after the gate on voltage is applied to one scan line, the gate on voltage is applied to the next scan line. For example, during the write period, the gate off voltage (e.g., a low-level voltage) can be applied by the second scan signal GC, the third scan signal GR, the fourth scan signal GI, and the light emission signal EM1.

[0098] During the write phase, a second transistor T2, to which a gate on-state voltage (e.g., a high-level voltage) is applied, can be turned on, and all other transistors can be turned off. As a result, a data voltage VDATA can be applied to pixel PX and to the gate electrode of the first transistor T1 and the first electrode of the first capacitor C1. For example, similar to the compensation phase, the voltage value at the second electrode of the first transistor T1 can be a voltage value (Vref-Vth) that is lower than the voltage at the gate electrode than the threshold voltage (Vth) of the first transistor T1.

[0099] For example, the third transistor T3 and the fifth transistor T5 can be turned off, thus electrically isolating the first electrode of the first transistor T1, the drive voltage line 172, and the light-emitting diode (LED).

[0100] For example, refer to Figure 2 The light-emitting signal EM1 can be changed to a gate on-state voltage (e.g., a high-level voltage) and can enter or begin a light-emitting period. For example, a gate off-state voltage (e.g., a low-level voltage) can be applied by a first scan signal GW, a second scan signal GC, a third scan signal GR, and a fourth scan signal GI.

[0101] The fifth transistor T5 and the sixth transistor T6 can be turned on by the light-emitting signal EM1, and a current path can be formed from the driving voltage ELVDD through the light-emitting diode LED, the fifth transistor T5, the first transistor T1 and the sixth transistor T6 and connected to the driving low voltage ELVSS.

[0102] The magnitude of the current flowing through the current path can be determined by the conduction level of the first transistor T1, and the conduction level of the first transistor T1 can be determined by the magnitude of the data voltage VDATA applied to the gate electrode. The light-emitting diode (LED) can be determined based on the current flowing through the current path (I... OLED The brightness is displayed differently depending on the size of the object.

[0103] During the light-emitting period (e.g., at the beginning of the light-emitting period), the sixth transistor T6 can be turned on, and as a result, the voltage at the second electrode of the first capacitor C1 and the voltage at the second electrode of the first transistor T1 can be changed to drive the low voltage ELVSS. When the voltage value at the second electrode of the first capacitor C1 changes, the voltage value at the first electrode of the first capacitor C1 can also change. For example, the change in voltage at the first electrode of the first capacitor C1 can be substantially equal to the voltage value at the second electrode of the first capacitor C1.

[0104] For example, during the write period, the voltage value of the second electrode of the first transistor T1 and the voltage value of the second electrode of the first capacitor C1 can be changed from the reference voltage Vref value to the voltage value (Vref-Vth) obtained by subtracting the threshold voltage (Vth) of the first transistor T1 from the reference voltage Vref. Therefore, when changing from the write period to the light emission period, the change value of the voltage of the second electrode of the first capacitor C1 and the change value of the voltage of the first electrode of the first capacitor C1 ΔV are as shown in Equation 1 below.

[0105] [Formula 1]

[0106] ΔV=V ELVSS –(Vref–V th )

[0107] Wherein, Vref can be the reference voltage Vref, Vth can be the threshold voltage of the first transistor T1, and ELVSS can be the driving low voltage ELVSS.

[0108] For example, the current (I) flowing through the light-emitting diode (LED) during the light-emitting period OLED It can be obtained using Equation 2 below.

[0109] [Equation 2]

[0110] I OLED =k / 2x(Vgs–V th ) 2

[0111] =k / 2x[(V data +ΔV–V ELVSS )–V th ] 2

[0112] =k / 2x[(V data +(V ELVSS –Vref+V th )–V ELVSS )–V th ] 2

[0113] =k / 2x(Vdata –Vref) 2

[0114] Here, k can be a constant value, Vdata can be the data voltage value, Vref can be the reference voltage Vref value, Vth can be the threshold voltage value of the first transistor T1, and V ELVSS Vgs can be the voltage value that drives the low voltage ELVSS, Vgs can be the voltage difference between the gate electrode and the second electrode of the first transistor T1, and ΔV can be the value of Equation 1.

[0115] Therefore, the current (I) flowing through the light-emitting diode (LED) OLED The value of ) can be determined solely by the values ​​of the data voltage VDATA and the reference voltage Vref, and is independent of the threshold voltage (Vth) of the first transistor T1. Therefore, it can generate a constant output current (I) even with changes in the characteristics of the first transistor T1. OLED Advantages of ).

[0116] For example, by applying a low driving voltage ELVSS during the light-emitting period, the voltage change value ΔV that occurs at the gate electrode can also be removed as shown in Equation 1. Therefore, it does not need to be considered separately, and only the data voltage VDATA and the reference voltage Vref need to be considered. This has the advantage that the current does not change according to the characteristics of the first transistor T1.

[0117] In the above, the driving voltage ELVDD can be set to a voltage value higher than that obtained by subtracting the threshold voltage value of the first transistor T1 from the reference voltage Vref, and the driving low voltage ELVSS can be set to a voltage value lower than that obtained by subtracting the threshold voltage value of the first transistor T1 from the reference voltage Vref.

[0118] The above describes the situation based on Figure 1 PX pixels and Figure 2 The operation of waveforms.

[0119] In the following text, reference will be made to Figure 3 The circuit structure of a light-emitting diode (LED) and a pixel driving unit (PC) according to another embodiment is described.

[0120] Figure 3 This is a schematic diagram of the equivalent circuit of a pixel PX included in a light-emitting display device according to another embodiment. (Refer to...) Figure 3 A pixel PX may include a light-emitting diode (LED) and a pixel driver PC that drives the LED.

[0121] The pixel driver PC may include Figure 3 All components except light-emitting diodes (LEDs), and according to Figure 3The pixel driving unit PC of the pixel PX in the embodiment may include a first transistor T1, a second transistor T2 and a first capacitor C1.

[0122] For example, the pixel driving unit PC can be connected to a first scan line 161 on which a first scan signal GW is applied and a data line 171 on which a data voltage VDATA is applied. For example, the pixel PX can be connected to a driving voltage line 172 on which a driving voltage ELVDD (e.g., a first driving voltage) is applied and a driving low voltage line 174 on which a driving low voltage ELVSS (e.g., a second driving voltage) is applied. The circuit structure of the pixel is as follows, focusing on each element (e.g., transistor, capacitor, and light-emitting element) included in the pixel PX.

[0123] The first transistor T1 (e.g., a driving transistor) may include a gate electrode connected to a first electrode of the first capacitor C1 and a second electrode of the second transistor T2, a first electrode connected to the cathode of the light-emitting diode LED (e.g., an input-side electrode), and a second electrode receiving a driving low voltage ELVSS (e.g., an output-side electrode).

[0124] The conduction level of the first transistor T1 can be determined by the voltage of its gate electrode, and also by the current flowing from the first electrode to the second electrode of the first transistor T1. This current can be the same as the current flowing through the light-emitting diode (LED), and can also be called the luminous current. For example, the first transistor T1 can be configured as an n-type transistor, and the higher the voltage of its gate electrode, the greater the luminous current that can flow. With a large luminous current, the LED can display high brightness.

[0125] The second transistor T2 (e.g., a data input transistor) may include a gate electrode connected to a first scan line 161 on which a first scan signal GW is applied, a first electrode (e.g., an input-side electrode) connected to a data line 171 on which a data voltage VDATA is applied, and a second electrode (e.g., an output-side electrode) connected to the first electrode of the first capacitor C1 and the gate electrode of the first transistor T1. The second transistor T2 may transmit the data voltage VDATA to the pixel PX according to the first scan signal GW, and may apply the data voltage VDATA to the gate electrode of the first transistor T1, thereby allowing the data voltage VDATA to be stored in the first electrode of the first capacitor C1.

[0126] All transistors can be formed as n-type transistors, and each transistor can be turned on when the voltage at the gate electrode is high and turned off when the voltage at the gate electrode is low. For example, the semiconductor layer included in each transistor can be polycrystalline silicon semiconductor or oxide semiconductor, and can be amorphous semiconductor or single-crystal semiconductor.

[0127] According to an embodiment, the semiconductor layer included in each transistor may further include an overlap layer (or an additional gate electrode) that overlaps with the gate electrode, and by applying a voltage to the overlap layer (or the additional gate electrode), the characteristics of the transistor can be altered to improve the display quality of the pixel.

[0128] The first capacitor C1 may include a first electrode connected to the gate electrode of the first transistor T1 and the second electrode of the second transistor T2, and a second electrode for receiving a drive low voltage ELVSS. The first electrode of the first capacitor C1 can be used to receive and store the data voltage VDATA from the second transistor T2. According to an embodiment, the second electrode of the first capacitor C1 can receive a drive voltage ELVDD.

[0129] The light-emitting diode (LED) may include an anode connected to the driving voltage line 172 and receiving the driving voltage ELVDD, and a cathode connected to the first electrode of the first transistor T1. The LED may be disposed between the pixel driving section PC and the driving voltage ELVDD, such that the same current can flow through the first transistor T1 of the pixel driving section PC, and the brightness of the LED can be determined according to the magnitude of the current. The LED may include a light-emitting layer comprising at least one of organic and inorganic light-emitting materials between the anode and the cathode. A specific stacking structure of the LED according to an embodiment may be as follows: Figure 5 As shown in the figures.

[0130] For example, in Figure 3 In this embodiment, a light-emitting diode (LED) can be disposed between the first electrode of the first transistor T1 and the driving voltage line 172. The pixel PX according to this embodiment is also referred to as an inverted pixel PX to distinguish it from the pixel PX in which the light-emitting element is disposed between the first transistor T1 and the driving low voltage ELVSS. The LED can display brightness based on the magnitude of the current flowing through the current path from the driving voltage ELVDD through the first transistor T1 to the driving low voltage ELVSS. For example, as the current increases, the displayed brightness can increase.

[0131] exist Figure 3 In one embodiment, a pixel PX is described as comprising two transistors T1 and T2 and a capacitor (e.g., a first capacitor C1), but the embodiment is not limited thereto, and depending on the embodiment, a capacitor or transistors may be included.

[0132] In the following text, pixels may be formed in the display area and will be referred to as Figure 4 The planar structure of the light-emitting diode (LED) and the pixel driving unit (PC) according to the embodiment is described.

[0133] Figure 4 This is a schematic plan view showing the connection between the pixel driving unit and the light-emitting display device according to an embodiment.

[0134] Figure 4 A portion of the display area is shown, and the light-emitting area is the region in which light is emitted by light-emitting diodes (LEDs), which may include LEDs corresponding to the three primary colors of light. Figure 4 Embodiments may include red light-emitting diodes, green light-emitting diodes, and blue light-emitting diodes.

[0135] Each light-emitting diode (LED) may include an anode, a light-emitting layer, and a cathode. Below each LED may be pixel drivers PCr, PCg, and PCb, electrically connected to each LED. Figure 4 In the diagram, pixel drivers PCr, PCg, and PCb are shown as dashed lines and are arranged alternately in the order of red pixel driver PCr, green pixel driver PCg, and blue pixel driver PCb. The number and arrangement of these pixel drivers PCr, PCg, and PCb can be varied in various ways.

[0136] The pixel driving units PCr, PCg, and PCb may include a red pixel driving unit PCr, a green pixel driving unit PCg, and a blue pixel driving unit PCb. The red pixel driving unit PCr and the red light-emitting diode can be electrically connected through a red contact hole CNTr, the green pixel driving unit PCg and the green light-emitting diode can be electrically connected through a green contact hole CNTg, and the blue pixel driving unit PCb and the blue light-emitting diode can be electrically connected through a blue contact hole CNTb.

[0137] Light-emitting diodes (LEDs) can correspond to pixel-defining layers (see...). Figure 5 The 380-inor apertures OPr, OPg, and OPb in the image correspond to the light-emitting regions (or overlap with the light-emitting regions). In the following explanation, the apertures OPr, OPg, and OPb of the light-emitting regions or pixel-defining layers will be used instead of the light-emitting diodes (LEDs).

[0138] Wall (see) Figure 5 Wall 390 can be disposed on pixel-defining layer 380-inor, and wall 390 may include openings OPcatr, OPcatg, and OPcatb corresponding to openings OPr, OPg, and OPb of pixel-defining layer 380-inor. Figure 4In this embodiment, the openings OPcatr, OPcatg, and OPcatb of the wall 390 may overlap with the openings OPr, OPg, and OPb of the pixel defining layer 380-inor, and may be formed to be larger. According to an embodiment, the openings OPr, OPg, and OPb of the pixel defining layer 380-inor may be formed to be larger than the openings OPcatr, OPcatg, and OPcatb of the wall 390.

[0139] The wall 390 may be formed comprising at least two layers made of a conductive material. The wall 390 may have a pointed structure (e.g., a protruding pointed structure or a pointed portion), and the pointed structure may be disposed in the uppermost layer of the wall 390. Due to this pointed structure, the layer disposed on the top (or upper surface) of the wall 390 may be physically damaged without the need for an additional etching process.

[0140] The separating element SEP forming a closed curve can be formed outside the openings OPcatr, OPcatg, and OPcatb in wall 390. The separating element SEP can be formed within wall 390 (or can pass through wall 390), and can be as follows: Figure 5 The space shown is formed empty within wall 390, or as Figure 9 The space shown may be filled with insulating material. The separator SEP may be formed such that wall 390 is electrically disconnectable. The separator SEP may be formed onto an encapsulation layer disposed on the top (or upper surface) of wall 390 (see [link]). Figure 5 The Encap can be placed in the layer between the Encap layer and the wall 390.

[0141] The openings OPr, OPg, and OPb of the pixel limiting layer 380-inor and the openings OPcatr, OPcatg, and OPcatb of the wall 390 can be disposed inside the separator SEP, thereby forming a closed curve. The cathode of the light-emitting diode (LED) can also be disposed inside the separator SEP, and adjacent cathodes can be electrically separated through the separator SEP. The cathode disposed inside the separator SEP can be electrically connected to at least a portion of the wall 390 surrounding the cathode, and the wall 390 can be connected to transistors and contact holes CNTr, CNTg, and CNTb disposed in the pixel driving units PCr, PCg, and PCb, so that the output current of the pixel driving units PCr, PCg, and PCb can be transmitted to the cathode of the LED.

[0142] Contact holes CNTr, CNTg, and CNTb can also be disposed in the pixel defining layer 380-inor to electrically connect the wall 390 to the pixel driving units PCr, PCg, and PCb. For example, according to an embodiment, the wall 390 can be electrically connected to the anode, which serves as an electrode of a light-emitting diode. The specific stacking structure of the wall 390, the pixel defining layer 380-inor, and the separator SEP will be discussed later. Figure 5 Detailed description in [etc.].

[0143] For example, the separate cathode Cathodesl can be formed entirely outside the separator SEP and can extend throughout the entire display area. According to an embodiment, a voltage with a constant voltage level (e.g., a driving low voltage ELVSS) can be applied to the separate cathode Cathodesl. The separate cathode Cathodesl can have a mesh structure. The separate cathode Cathodesl can be electrically separated from the cathode via the separator SEP.

[0144] Reference Figure 4 In one embodiment, the red opening OPr of the pixel-defining layer 380-inor corresponding to the red emitting region and the green opening OPg of the pixel-defining layer 380-inor corresponding to the green emitting region are each formed within a separator SEP (e.g., a single separator). However, multiple blue openings OPb of the pixel-defining layer 380-inor corresponding to the blue emitting region can be formed within a single separator SEP, and... Figure 4 In some embodiments, two blue openings (OPb; each corresponding to a light-emitting region) are included. For example, only one cathode included in the blue light-emitting diode (LED) may be formed corresponding to the two blue openings OPb, and this is because the cathode is separated by a separator SEP. For example, the cathode included in the blue light-emitting diode (LED) may be electrically connected to the blue pixel driver PCb via a contact hole CNTb, and the output current of the blue pixel driver PCb may be transmitted through the two blue openings OPb.

[0145] For example, in Figure 4 In this configuration, adjacent separate components (SEPs) can be separated from each other. However, according to an embodiment, some adjacent separate components (SEPs) may have a connected structure.

[0146] Reference Figure 5 Detailed description as described above Figure 4 The cross-sectional structure of the structure.

[0147] Figure 5 It is shown Figure 4 The light-emitting display device in the embodiment along Figure 4 A schematic cross-sectional view taken from line I-I'.

[0148] exist Figure 5 In the diagram, the red pixel can be centered, and the red pixel driving part PCr can be connected to the cathode Cathoder of the light-emitting diode LED through the contact hole CNTr. The structure in which a driving low voltage ELVSS is applied to the discrete cathode Cathodesl is described in detail.

[0149] exist Figure 5The structure below the planarization layer 181 is shown only briefly, and only one transistor is shown. A brief description of the structure from the substrate 110 to the planarization layer 181 is as follows.

[0150] The substrate 110 may include a material that is rigid and non-bending, such as glass, or may include a flexible material that is bendable, such as plastic or polyimide. In the case of a flexible substrate, it may have a structure in which a bilayer structure of polyimide and a barrier layer formed thereon by an inorganic insulating material is repeatedly formed.

[0151] A metal-containing lower shielding layer BML1 may be disposed on the substrate 110, and the lower shielding layer BML1 may overlap in a plane with the channels of transistors disposed in the pixel driving portions PCr, PCg, and PCb included in the display unit. According to an embodiment, the lower shielding layer BML1 may be omitted.

[0152] The substrate 110 and the lower shielding layer BML1 may be covered by a buffer layer 111. The buffer layer 111 can be used to prevent impurities from penetrating into the first semiconductor layer ACT1, and may contain silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiON) x Inorganic insulating layer.

[0153] A first semiconductor layer ACT1, formed of polycrystalline silicon semiconductor (P-Si) or oxide semiconductor, may be disposed on the buffer layer 111. The first semiconductor layer ACT1 may be a semiconductor layer disposed in the pixel driving portions PCr, PCg, and PCb included in the display unit, and may include a channel containing a driving transistor and a first region and a second region disposed on both sides (e.g., opposite sides) of the channel. For example, the transistor may be a driving transistor included in the pixel driving portions PCr, PCg, and PCb, or another switching transistor.

[0154] For example, the first semiconductor layer ACT1 may include regions on both sides (e.g., opposite sides) of a channel that has conductive layer characteristics through plasma treatment or doping, and may be used as the first electrode and the second electrode of a transistor.

[0155] The first gate insulating layer 141 may be disposed on the first semiconductor layer ACT1. The first gate insulating layer 141 may be composed of silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiON) x An inorganic insulating layer. A first gate conductive layer, including the gate electrode GE1 of the transistor disposed in the red pixel driving section PCr, may be disposed on the first gate insulating layer 141.

[0156] In addition to the gate electrode GE1 of the transistor disposed in the red pixel driving unit PCr, the first gate conductive layer may also include a scan line, an emission control line, or the first electrode of a capacitor disposed in the red pixel driving unit PCr.

[0157] After the first gate conductive layer is formed, a plasma treatment or doping process can be performed to make the exposed regions of the first semiconductor layer ACT1 conductive. For example, the first semiconductor layer ACT1 covered by the gate electrode GE1 may be non-conductive, and the portion of the first semiconductor layer ACT1 not covered by the gate electrode GE1 may have the same characteristics as the conductive layer.

[0158] The second gate insulating layer 142 may be disposed on the first gate conductive layer and the first gate insulating layer 141. The second gate insulating layer 142 may be composed of silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiON) x The inorganic insulating layer includes a second gate conductive layer, which includes the second electrode of the capacitor disposed in the red pixel driving unit PCr, and may be disposed on the second gate insulating layer 142.

[0159] The second electrode of the capacitor may overlap with the first electrode or the gate electrode GE1 of the capacitor to form a capacitor disposed in the red pixel driving part PCr, and the first electrode of the capacitor may overlap with the gate electrode GE1 of the driving transistor, or they may be electrically connected or formed as one unit.

[0160] The first interlayer insulating layer 151 may be disposed on the second gate conductive layer. x ), silicon nitride (SiN) x ) or silicon oxynitride (SiON) x An inorganic insulating layer. According to an embodiment, the inorganic insulating layer may be formed as thick.

[0161] A first data conductive layer, including connecting electrodes SE1 and DE1 and driving low-voltage line 174, may be disposed on the first interlayer insulating layer 151. The first data conductive layer may include a metal or metal alloy such as aluminum (Al), copper (Cu), molybdenum (Mo), or titanium (Ti), and may consist of a single layer or multiple layers.

[0162] For example, the connecting electrodes SE1 and DE1 can be connected to a transistor included in the red pixel driving section PCr, and for example, the connecting electrode SE1 can be connected to a first region of the first semiconductor layer ACT1, and the connecting electrode DE1 can be connected to a second region of the first semiconductor layer ACT1. For example, the connecting electrode DE1 can be connected to the cathode Cathoder through wall 390.

[0163] For example, the first data conductive layer may also include a drive low voltage line 174. The drive low voltage line 174 can transmit a drive low voltage ELVSS and can be transmitted through wall 390 to the discrete cathode Cathodesl.

[0164] According to an embodiment, the driving low voltage line 174 may be formed of a lower shielding layer or a first gate conductive layer. For example, the connection electrode for transmitting the driving low voltage ELVSS may be disposed in the first data conductive layer. For example, according to an embodiment, the first driving low voltage line may be disposed in the first data conductive layer, and the second driving low voltage line may be disposed in the lower shielding layer or the first gate conductive layer. For example, the extension direction of the first driving low voltage line may be perpendicular to the extension direction of the second driving low voltage line, the extension direction of the first driving low voltage line may be on the second direction DR2, and the extension direction of the second driving low voltage line may be on the first direction DR1.

[0165] Planarization layer 181 may be disposed on the first data conductive layer. Planarization layer 181 may be an organic insulating layer containing organic materials, and the organic materials may include one or more materials selected from the cluster of polyimide, polyamide, acrylic resin, benzocyclobutene and phenolic resin.

[0166] The pixel driving part PC described above can be formed on the substrate 110, and the planarization layer 181 can cover the top (or upper surface) of the pixel driving part PC.

[0167] The structure including a light-emitting diode (LED) and a discrete component (SEP) can be formed on the planarization layer 181. The structure above the planarization layer 181 is detailed below.

[0168] An anode may be formed on planarization layer 181. The anode may form an electrode of a light-emitting diode (LED), and in embodiments where the LED has an inverted pixel structure, a driving voltage ELVDD may be applied to the anode. For example, the anode may be electrically connected to or integrated with a driving voltage line 172 on which the driving voltage ELVDD is applied. For example, the same driving voltage ELVDD may be applied to all anodes.

[0169] A pixel defining layer 380-inor having a red opening OPr overlapping at least a portion of the anode can be disposed on the planarization layer 181 and the anode. The pixel defining layer 380-inor may be composed of an inorganic insulating layer comprising an inorganic insulating material, wherein the inorganic insulating material forming the pixel defining layer 380-inor may include silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiON) xFurthermore, the pixel-defined layer 380-inor may have a multilayer structure comprising multiple layers made of inorganic insulating material.

[0170] The planarization layer 181 and the pixel defining layer 380-inor may include contact holes CNTr and CNTsl that expose at least a portion of the pixel driving portion PC disposed beneath the planarization layer 181. (See reference...) Figure 5 A cathode contact hole (CNTr; hereinafter also referred to as a first opening or first contact hole) may be formed in (or pass through) the pixel defining layer 380-inor and the planarization layer 181, and may be included in the pixel driving section PC. It may overlap with a portion of the connection electrode DE1 electrically connected to the electrode of the transistor in a planar view. For example, a contact hole (CNTsl; hereinafter also referred to as a second opening or second contact hole) for voltage transmission may be formed in (or pass through) the pixel defining layer 380-inor and the planarization layer 181 to provide a driving low voltage provided in the pixel driving section PC, and the contact hole CNTsl may overlap with a portion of the driving low voltage line 174 in a planar view.

[0171] Wall 390 may be disposed on pixel defining layer 380-inor, and wall 390 may include an opening OPcatr corresponding to the red opening OPr of pixel defining layer 380-inor, and may also include a portion of separator SEP. For example, the opening OPcatr of wall 390 may overlap with the red opening OPr of pixel defining layer 380-inor in a planar view, and may be formed to be larger.

[0172] The wall 390 may be formed comprising at least two layers made of a conductive material, and the conductive material forming the wall 390 may include various metals and their alloys. The wall 390 may include metals or metal alloys such as aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), etc. Figure 5Embodiments may include lower conductive walls 390a and 390ac (hereinafter also referred to as first conductive walls) and upper conductive walls 390b and 390bc (hereinafter also referred to as second conductive walls). The lower conductive walls 390a and 390ac may be formed of a metal comprising aluminum (Al), and the upper conductive walls 390b and 390bc may be formed of a metal comprising titanium (Ti). The lower conductive walls 390a and 390ac may be in contact with the upper conductive walls 390b and 390bc and are divided into electrically separated inner conductive walls (or first / inner walls) 390a and 390b and outer conductive walls (or second / outer walls) 390ac and 390bc. For example, the inner conductive walls 390a and 390b are portions including and surrounding the opening OPcatr of wall 390, and the outer conductive walls 390ac and 390bc are portions separated from the opening OPcatr of wall 390. The inner conductive walls 390a and 390b and the outer conductive walls 390ac and 390bc can be electrically separated by the separator SEP, and the outer conductive walls 390ac and 390bc can have a structure that connects the entire area.

[0173] The inner conductive walls 390a and 390b can be divided into a lower inner conductive wall 390a (hereinafter referred to as the first inner conductive wall) and an upper inner conductive wall 390b (hereinafter referred to as the second inner conductive wall), and the outer conductive walls 390ac and 390bc can be divided into a lower outer conductive wall 390ac (hereinafter referred to as the first outer conductive wall) and an upper outer conductive wall 390bc (hereinafter referred to as the second outer conductive wall).

[0174] Lower conductive walls 390a and 390ac may contact upper conductive walls 390b and 390bc, and the side surfaces of lower conductive walls 390a and 390ac may coincide (or align) with the side surfaces of upper conductive walls 390b and 390bc. The side surfaces of lower conductive walls 390a and 390ac may not coincide (or may not align) with the side surfaces of upper conductive walls 390b and 390bc around the opening OPcatr of wall 390. For example, in the inner conductive walls 390a and 390b, the opening OPcatr side of wall 390 may have a pointed structure in which the upper inner conductive wall 390b protrudes much more than the lower inner conductive wall 390a. (Refer to...) Figure 5 The side surface of the lower inner conductive wall 390a may have a structure that contacts the cathode cathoder and is electrically connected to the cathode cathoder. For example, according to an embodiment, the side surfaces of the lower conductive walls 390a and 390ac may not coincide with (or may not be aligned with) the side surfaces of the upper conductive walls 390b and 390bc.

[0175] The inner conductive walls 390a and 390b can be electrically connected to the connection electrode DE1, which is electrically connected to the electrode of the transistor included in the pixel driving unit PC, through the cathode contact hole CNTr formed in the pixel defining layer 380-inor and the planarization layer 181. As a result, the output current of the pixel driving unit PC can be transmitted to the cathode Cathoder through the inner conductive walls 390a and 390b.

[0176] The outer conductive walls 390ac and 390bc can be electrically connected to the low-voltage drive line 174 disposed in the pixel driving section PC via contact holes CNTsl formed in the pixel defining layer 380-inor and the planarization layer 181 for voltage transmission. As a result, a low-voltage drive ELVSS can be applied to the outer conductive walls 390ac and 390bc.

[0177] The light-emitting layer EMLr can be disposed on the anode inside the opening OPcatr of wall 390. For example, separate light-emitting layers EMLri and / or separate light-emitting layers EMLgi and EMLbi of different colors corresponding to the light-emitting layers EMLr disposed in the opening OPcatr of adjacent wall 390 can be disposed on the upper conductive walls 390b and 390bc. For example, only the separate light-emitting layer EMLri, formed of the same material as the light-emitting layer EMLr disposed in the opening OPcatr of adjacent wall 390, can be disposed on the upper inner conductive wall 390b, but separate light-emitting layers EMLgi and EMLbi of different colors corresponding to the light-emitting layers EMLr disposed in the opening OPcatr can also be disposed on the top (or upper surface) of the upper outer conductive wall 390bc.

[0178] The light-emitting layer EMLr and the separate light-emitting layers EMLri, EMLgi and EMLbi disposed within the opening OPcatr of wall 390 can be separated by a tip structure using the upper inner conductive wall 390b protruding above the lower inner conductive wall 390a without a separate etching process.

[0179] The cathode Cathoder may be located inside the opening OPcatr in wall 390 and above the light-emitting layer EMLr. For example, a separate cathode Cathodesl formed of the same material as the cathode Cathoder may be disposed on the separate light-emitting layers EMLri, EMLgi, and EMLbi.

[0180] The cathodesl can be separated without a separate etching process using a pointed structure in which the upper inner conductive wall 390b protrudes above the lower inner conductive wall 390a.

[0181] The separate light-emitting layers EMLri, EMLgi, and EMLbi, and the separate cathode Cathodesl can be disposed over the entire area of ​​the upper conductive walls 390b and 390bc, and can also be disposed on the tip structure of the protruding upper inner conductive wall 390b. The separate light-emitting layers EMLri, EMLgi, and EMLbi, and the separate cathode Cathodesl can be applied with the same voltage as the adjacent wall 390. For example, the portion of the separate cathode Cathodesl disposed above the inner conductive walls 390a and 390b can be electrically connected to the cathode Cathodesl through the inner conductive walls 390a and 390b and the separate light-emitting layer EMLri, and can be connected to receive the output current of the pixel driving unit PC. The portion of the separate cathode Cathodesl disposed above the outer conductive walls 390ac and 390bc can be connected to the outer conductive walls 390ac and 390bc and the separate light-emitting layers EMLri, EMLgi, and EMLbi, and the driving low voltage ELVSS can be transmitted through the separate light-emitting layers EMLri, EMLgi, and EMLbi.

[0182] For example, the stacking angle of the light-emitting layer material can differ from the stacking angle of the cathode material, and the angle of the cathode material stacked relative to the third-direction DR3 is the direction of the light-emitting layer material stacking, and it can be greater than the angle formed relative to the third-direction DR3. As a result, the material for the light-emitting layer EML can be formed by covering a large area through the tip structure of the upper inner conductive wall 390b, and the material for the cathode can be formed by covering a relatively narrow area. Therefore, as... Figure 5 As shown, the light-emitting layer EMLr disposed within the opening OPcatr of wall 390 may not be completely formed on the side surface of the lower inner conductive wall 390a, but may be centrally disposed on the anode, and the cathode may be in contact with the side surface of the lower inner conductive wall 390a for electrical connection. By adjusting the angle of the cathode material, and... Figure 5 Unlike other cathodes, the separate cathode Cathodesl can be formed with a structure that is connected to the cathode Cathoder without being separated from the cathode Cathoder.

[0183] The light-emitting layers EMLri, EMLgi, and EMLbi, as well as the separate cathode Cathodesl, can be separated via the separation element SEP, and according to... Figure 5 The separation element SEP in an embodiment may include a wall 390, separation light-emitting layers EMLri, EMLgi and EMLbi, separation cathode Cathodesl and encapsulation layer Encap.

[0184] For example, refer to Figure 5In one embodiment, the encapsulation layer Encap may be formed on the cathode Cathodesl and the discrete cathode Cathodesl, and after the encapsulation layer Encap is formed, the discrete element SEP may be formed by an etching process. The discrete element SEP may be used for the discrete wall 390 and may span the encapsulation layer Encap, the discrete cathode Cathodesl, the discrete light-emitting layers EMLri, EMLgi and EMLbi, and the wall 390 (or extend along them), and may additionally be formed in a portion of the pixel defining layer 380-inor.

[0185] according to Figure 5 In one embodiment, the separator SEP can be formed as an empty space.

[0186] However, according to an embodiment, the SEP (Separator Epiplate) can fill the empty space with an insulating material, and according to an embodiment, the SEP may not be formed in the encapsulation layer. Although a void is created in a portion of the encapsulation layer by the SEP, in this embodiment, the wall 390 can be formed of a conductive material to prevent air or moisture from penetrating into the light-emitting layer EMLr, thereby reducing the possibility of degradation of the light-emitting layer's properties. Figure 5 In one embodiment, the encapsulation layer is shown as relatively thin, but because it is etched to form the separator SEP, it can be formed to be partially thin, and according to an embodiment, it can be formed to be thicker than shown in the figures.

[0187] The above Figure 4 and Figure 5 Other features of the embodiments shown will be explained by Figure 6 and Figure 7A as well as Figure 7B Provide a detailed description.

[0188] Figure 6 and Figure 7A as well as Figure 7B It is shown Figure 3 and Figure 4 A schematic diagram illustrating the effect of an embodiment.

[0189] For example, in Figure 6 The diagram shows that the separate cathode Cathodesl disposed on the outer conductive walls 390ac and 390bc can be disposed on the encapsulation layer Encap, and can form a structure with a capacitor having a sensing electrode 540 that allows the light-emitting display device to detect touch. Figure 6 In the diagram, the sensing electrode 540 is shown floating in the air, but this is because the intermediary layer is omitted and the encapsulation layer and various insulating layers can be disposed between them.

[0190] like Figure 6As shown, a sensing electrode 540 for detecting touch can be disposed on the front of the light-emitting display device. The sensing electrode 540 can be connected to the inner conductive walls 390a and 390b and the discrete cathode Cathodesl disposed thereon to prevent problems caused by variations in the output current of the pixel driving unit PC. For example, a voltage with a constant voltage level can be applied to the outer conductive walls 390ac and 390bc and the discrete cathode Cathodesl disposed thereon. For example, by applying a low driving voltage ELVSS, voltage fluctuations in the sensing electrode 540 can be reduced and noise can be prevented from entering from the outside. As a result, the sensing operation of the light-emitting display device can have the advantage of becoming more accurate.

[0191] For example, in Figure 7A and Figure 7B In this embodiment, voltage can be applied via the outer conductive walls 390ac and 390bc, which are parts of the wall 390, instead of voltage lines. Therefore, voltage lines disposed adjacent to the pixel driving unit PC can be used. The advantage of improving resolution by removing identical areas is described.

[0192] For example, Figure 7A A comparative example is shown, and Figure 7B An example is shown.

[0193] In the comparative example Figure 7A The diagram shows a reference voltage line 173 and a driving low voltage line 174 extending in the second direction DR2, as well as three pixel driving units PCr, PCg and PCb.

[0194] exist Figure 7B In this embodiment, the driving low-voltage line 174 can be omitted, and the corresponding portion can form an idle space Spc. Since the corresponding idle space Spc is removed, adjacent pixel driving portions PCr, PCg, and PCb can be formed and positioned closer together. As a result, a light-emitting display device with the same area can be formed to have a higher resolution.

[0195] For example, refer to Figure 7B The idle space Spc may extend in the first direction DR1. This may include a first voltage line extending in the second direction DR2 and having the same voltage applied thereon, and a second voltage line extending in the first direction DR1. For example, the first voltage line and the second voltage line may be disposed in different conductive layers (or formed as different conductive layers). For example, the driving low voltage line 174 may be divided into a first driving low voltage line extending in the second direction DR2 and a second driving low voltage line extending in the first direction DR1. The first driving low voltage line may be disposed in the first data conductive layer (or formed as the first data conductive layer), and the second driving low voltage line may be disposed in the lower shielding layer (or formed as the lower shielding layer).

[0196] In this embodiment, two voltage lines can be removed, and as a result, the unused space Spc extending in the first direction DR1 can be removed and formed with increased density. Consequently, a light-emitting display device with the same area can be formed with higher resolution.

[0197] In the above text, attention was focused on Figure 4 and Figure 5 In the embodiments.

[0198] In the following text, it will be through Figures 8 to 12 Let's observe the various modified implementation examples.

[0199] Figures 8 to 10 This illustrates the edge of a light-emitting display device according to other embodiments. Figure 4 A schematic cross-sectional view taken from line I-I'.

[0200] will describe Figure 8 Examples of implementations.

[0201] Figure 8 yes Figure 5 Modified instances, and with Figure 5 Unlike other embodiments, the separation element SEP may not form an empty space, but the space can be filled with organic material.

[0202] exist Figure 8 In one embodiment, the separator SEP can be formed into a columnar shape of organic material. In another example, the separator SEP can be formed of inorganic material instead of organic material. Figure 8 The separated SEP, compared to a separated SEP with an empty space, can further improve the ability to prevent moisture or air from flowing into the light-emitting layer EML. For example, although the separated SEP is formed in the encapsulation layer, when filled with insulating material, it is different from a separated SEP with an empty space. Figure 5 Compared to the separate element SEP, no air or moisture can penetrate into the separate element SEP, so the separate element SEP can have the characteristic of easily protecting the light-emitting layer.

[0203] The following will describe Figure 9 Examples of implementations.

[0204] exist Figure 9 In some embodiments, the transparent electrode PLEC may be additionally formed on the encapsulation layer Encap and such Figure 8 The separator SEP shown is filled with insulating material. For example, the transparent electrode PLEC can be formed of a transparent conductive material such as indium tin oxide (ITO), polyITO, indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO).

[0205] Transparent electrode PLECs can be formed across the entire surface. The transparent electrode PLECs can be electrically connected to the outer conductive walls 390ac and 390bc through openings CNTp through the separate light-emitting layers EMLri, EMLgi, and EMLbi, the separate cathode Cathodesl, and the encapsulation layer Encap.

[0206] Since the outer conductive walls 390ac and 390bc are connected to the drive low voltage line 174 through the contact hole CNTsl, the drive low voltage ELVSS can be applied to the transparent electrode PLEC.

[0207] according to Figure 9 The embodiment shown affects the sensing electrode (refer to...) Figure 6 The noise in the 540) can be completely shielded or blocked by the transparent electrode PLEC that receives the low-voltage ELVSS. For example, as Figure 6 As shown, when the sensing electrode 540 is provided, the output current applied to the inner conductive walls 390a and 390b and the pixel driving section PC of the separated cathode Cathodesl can cause noise to be applied to the sensing electrode 540. However, in Figure 9 In the process, the transparent electrode PLEC can be used in the sensing electrode (refer to...) Figure 6 Below 540), and can be positioned across the inner conductive walls 390a and 390b and in front of the separate cathode Cathodesl. Therefore, the sensing electrode (refer to...) Figure 6 (540) can be electrically separated and shielded from the inner conductive walls 390a and 390b and the separate cathode Cathodesl via the transparent electrode PLEC, thereby preventing noise from entering the sensing electrode (see reference). Figure 6 (540 in the middle).

[0208] The following will describe Figure 10 Examples of implementations.

[0209] exist Figure 10 In one embodiment, the pixel-defining layer 380-inor is formed of an inorganic insulating material. Figure 5 Unlike other examples, the pixel-defining layer 380 can be formed from an organic insulating material.

[0210] The pixel-defining layer 380, which contains organic insulating material, can be composed of a single layer, but in Figure 10 In some embodiments, a pixel defining layer 380 consisting of three layers may be included.

[0211] according to Figure 10The pixel defining layer 380 of the embodiment may include a first pixel defining layer 380-orb (hereinafter also referred to as a black pixel defining layer), a second pixel defining layer 380-pl (hereinafter also referred to as an intermediate pixel defining layer) and a third pixel defining layer 380-ort (hereinafter also referred to as a transparent pixel defining layer).

[0212] The first pixel defining layer 380-orb may be black to prevent light transmission. According to an embodiment, the first pixel defining layer 380-orb may be formed of a negative black organic material. The black organic material may include a light-blocking material, and the light-blocking material may include carbon black, carbon nanotubes, resins or pastes containing black dyes, metal particles such as nickel, aluminum, molybdenum and their alloys, metal oxide particles, and / or metal nitrides (e.g., chromium nitride). The first pixel defining layer 380-orb may contain a light-blocking material and may be black, and may have the property of absorbing / blocking light rather than reflecting light. Because the negative uses an organic material, the first pixel defining layer 380-orb may have the property of removing portions covered by a mask.

[0213] The second pixel defining layer 380-pl can be a temporary protective layer to protect the first pixel defining layer 380-orb during the process, and can be made of silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiON) x It can be made of materials such as (e.g., the second pixel defining layer 380-pl). For example, the second pixel defining layer 380-pl can be an inorganic insulating layer. For example, according to an embodiment, the second pixel defining layer 380-pl can contain organic materials. For example, the second pixel defining layer 380-pl can also be used to improve the contact characteristics between the first pixel defining layer 380-orb and the third pixel defining layer 380-ort.

[0214] The third pixel defining layer 380-ort may have properties that allow light to pass through, and according to an embodiment, the third pixel defining layer 380-ort may be formed of a positive photosensitive organic insulating material. As an example, photosensitive polyimide (PSPI) may be used. Because the third pixel defining layer 380-ort has positive properties, portions not covered by the mask can be removed. The third pixel defining layer 380-ort may be transparent so that light can be transmitted and / or reflected.

[0215] The third pixel defining layer 380-ort can be used as a spacer, and can also be used as a contact aid between the first pixel defining layer 380-orb and the light-emitting layer EMLr.

[0216] The second pixel defining layer 380-pl and the third pixel defining layer 380-ort can be formed to have a width narrower than that of the first pixel defining layer 380-orb. For example, in Figure 10In one embodiment, the red opening OPr of the pixel defining layer 380 may be disposed in the first pixel defining layer 380-orb, and the second pixel defining layer 380-pl and the third pixel defining layer 380-ort may include openings wider than the red opening OPr.

[0217] According to the embodiment, the second pixel defining layer 380-pl can be omitted, and the pixel defining layer 380 can be formed only by the first pixel defining layer 380-orb and the third pixel defining layer 380-ort.

[0218] Figure 10 Implementation examples and Figure 5 The difference in the embodiments is that the pixel defining layer 380 is formed of an organic material, and all other features may be substantially the same.

[0219] Next, we will observe Figure 11 Examples of implementations. Figure 11 This is a schematic plan view showing the connection between a pixel driving unit and a light-emitting display device according to another embodiment.

[0220] exist Figure 11 In the embodiments, the anodes Anode-r, Anode-g, and Anode-b are in Figure 4 The planar diagram is shown additionally, and the planar structure of the anode may vary depending on the embodiment.

[0221] Reference Figure 11In one embodiment, the boundaries of the red anode Anode-r of the red LED, the green anode Anode-g of the green LED, and the blue anode Anode-b of the blue LED can be positioned between the separator SEP and the openings OPcatr, OPcatg, and OPcatb of the wall 390. As a result, each anode Anode-r, Anode-g, and Anode-b can overlap in a plane with the openings OPcatr, OPcatg, and OPcatb of the wall 390 and the openings OPr, OPg, and OPb of the pixel defining layer 380. For example, the red anode Anode-r of the red LED and the green anode Anode-g of the green LED can each overlap with the openings OPr and OPg of the pixel defining layer 380 in a planar view, but the blue anode Anode-b of the blue LED can overlap with the two blue openings OPb of the pixel defining layer 380. For example, the blue anode Anode-b of the blue LED can have a structure that does not overlap with the contact hole CNTb disposed between the two blue openings OPb of the pixel defining layer 380. For example, the blue anode Anode-b of a blue light-emitting diode may include an extension Anode-b1 that overlaps with each blue opening OPb of the pixel defining layer 380 in a plan view, and a connecting portion Anode-b2 that connects the extension Anode-b1, and the connecting portion Anode-b2 may have a structure that does not overlap with the contact hole CNTb in a plan view. The position and shape of the connecting portion Anode-b2 connecting the two extensions Anode-b1 may vary depending on the embodiment.

[0222] The following will describe Figure 12 Examples of implementations. Figure 12 This illustrates the edge of a light-emitting display device according to another embodiment. Figure 11 A schematic cross-sectional view taken from line II-II'.

[0223] Figure 12 The embodiment is as follows Figure 8 A modified example is shown, and a structure in which the split component SEP is not formed in the encap (or does not pass through the encap).

[0224] exist Figure 12 In some embodiments, the separator SEP can be formed through the separator cathode Cathodesl, the separator light-emitting layers EMLri, EMLgi, and EMLbi, and the wall 390, and can be additionally formed on a portion of the pixel defining layer 380-inor. For example, the separator SEP can be filled with an insulating material. In another example, the separator SEP can be formed as an empty space.

[0225] exist Figure 12In one embodiment, the encapsulation layer Encap may extend across the separation element SEP, the separation cathode Cathodesl, and the cathode Cathoder.

[0226] Since the separation element SEP is not formed in the encapsulation layer (or does not penetrate the encapsulation layer), it can improve the effect of preventing moisture and air from entering the light-emitting layer EML from the outside.

[0227] In the following text, through Figures 13 to 17 Focusing on embodiments, the structure of the electronic device in which the above-described light-emitting display device can be used, as well as the structure of other parts of the light-emitting display device, will be described.

[0228] Figure 13 This is a schematic perspective view of an electronic device according to an embodiment.

[0229] Reference Figure 13 Electronic device 1 may be an electronic device that provides a display screen capable of displaying moving or still images on a third party to DR3. For example, electronic device 1 may include televisions, laptops, monitors, billboards, Internet of Things devices, mobile phones, smartphones, tablet PCs, electronic watches, smartwatches, watch phones, head-mounted displays, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation systems, game consoles, digital cameras, camcorders, etc.

[0230] like Figure 14 As shown, the electronic device 1 may include a cover window WIN and a housing HM, and a light-emitting display device 10 disposed inside the cover window WIN and the housing HM. Therefore, the cover window WIN and the housing HM can be combined to form the exterior of the electronic device 1.

[0231] The cover window WIN may include an insulating panel. For example, the cover window WIN may be made of glass, plastic, or a combination thereof. According to an embodiment, the cover window WIN may include a touch detection unit capable of detecting touch.

[0232] The front of the cover window WIN can be limited to the front of electronic device 1.

[0233] The housing HM can be combined with the cover window WIN. The cover window WIN can be placed on the front of the housing HM.

[0234] The housing HM can be combined with the cover window WIN to provide a receiving space. The light-emitting display device 10 can be housed in the receiving space provided between the housing HM and the cover window WIN.

[0235] The housing HM may comprise a material with relatively high rigidity. For example, the housing HM may comprise a frame and / or plate made of glass, plastic, or metal, or a combination thereof. The housing HM may have a back and sides, a cover window WIN may be disposed on the upper part of the housing HM, and the light-emitting display device 10 may be housed within the internal space formed by the housing HM and the cover window WIN. Therefore, the components of the light-emitting display device 10 can be reliably protected from external impacts.

[0236] Electronic device 1 may include a light-emitting display device that provides a display screen to DR3 by a third party (see reference). Figure 14 (10) The display device included in electronic device 1 can be a variety of display devices, such as inorganic light-emitting display devices, organic light-emitting display devices, and quantum dot light-emitting display devices. In the following description, the application of a light-emitting display device including an organic light-emitting element as an example of a display device will be emphasized, but the embodiments are not limited thereto, and the same technical concept can be applied to other display devices.

[0237] The shape of electronic device 1 can be modified in various ways. For example, electronic device 1 can have shapes such as a long rectangle, a square, a square with rounded corners, other polygons, or a circle. The shape of the display area DA of electronic device 1 can also be similar to the overall shape of electronic device 1. Figure 13 In the illustration, electronic device 1 is shown as a rectangular shape having a relatively long length in the first direction DR1, but the embodiment is not limited to this.

[0238] The electronic device 1 may include a display area DA and a non-display area NDA. Figure 13 The display area DA and the non-display area NDA shown can correspond to the display area DA and the non-display area NDA of the light-emitting display device 10. The display area DA can be the area where a screen is displayed, and the non-display area NDA can be the area where a screen is not displayed. The display area DA can occupy most of the area surrounding the central portion of the electronic device 1, and the non-display area NDA can have a structure surrounding the display area DA.

[0239] The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The second display area DA2 and the third display area DA3 may include areas on a surface (e.g., the surface at its bottom on a third-party DR3) where components such as sensors or cameras that provide various functions to the electronic device 1 can be disposed, and the second display area DA2 and the third display area DA3 may correspond to (or overlap with) the component areas.

[0240] The second display area DA2 and the third display area DA3 may be surrounded by the first display area DA1. In addition to the first display area DA1, the second display area DA2 and the third display area DA3 may display images. The position and number of the second display area DA2 and the third display area DA3 may vary depending on the embodiment.

[0241] In the following text, reference will be made to Figure 14 Describe the structure of a light-emitting display device as an example of a display device.

[0242] Figure 14 This is a schematic perspective view of a light-emitting display device included in an electronic device according to an embodiment.

[0243] Reference Figure 14 According to an embodiment, the electronic device 1 may include a light-emitting display device 10. The light-emitting display device 10 can display a screen on the electronic device 1 and can detect or photograph the front of the electronic device 1. The light-emitting display device 10 may have a planar shape similar to the planar shape of the electronic device 1. For example, the light-emitting display device 10 may have a shape similar to a rectangle having an edge in a first direction DR1 and an edge in a second direction DR2. The edge portions where the edge in the first direction DR1 intersects with the edge in the second direction DR2 may be rounded to have a certain curvature, but the embodiment is not limited to this, and may also be formed as right angles. The planar shape of the light-emitting display device 10 is not limited to a square shape, and may be similar to other polygonal, circular, or elliptical shapes.

[0244] The light-emitting display device 10 may include a display panel 100, a display driver 200, a circuit board 300, and a touch driver 400.

[0245] Display panel 100 may include a main area MA and a sub-area SBA.

[0246] The main region MA may include a display region DA containing pixels for displaying images, and a non-display region NDA disposed around the display region DA. The display region DA may include a first display region DA1, a second display region DA2, and a third display region DA3. The second display region DA2 and the third display region DA3 not only include pixels, but components such as sensors or cameras may also be disposed below the third display region DA3, and the second display region DA2 and the third display region DA3 may correspond to (or overlap with) the component region.

[0247] The display area DA can emit light from the light-emitting area corresponding to the light-emitting diode (LED) onto the third-party direction DR3. For example, the display panel 100 may include a pixel circuit portion containing transistors and a pixel defining layer 380 containing LEDs and having an opening defining the light-emitting area of ​​the LEDs. For example, the LEDs may include organic light-emitting diodes containing organic light-emitting layers, quantum dot light-emitting diodes containing quantum dot light-emitting layers (e.g., quantum dot LEDs), inorganic light-emitting diodes containing inorganic semiconductors (e.g., inorganic LEDs), and micro LEDs. The LEDs may include at least one device (e.g., micro LEDs), but the embodiments are not limited thereto.

[0248] The non-display area NDA can be a region outside and surrounding the display area DA. The non-display area NDA can be defined as the edge region of the main area MA of the display panel 100. The non-display area NDA may include a gate driver (e.g., for supplying gate signals to gate lines) Figure 16 (210 in the middle) and the fan-out line connecting the display driver 200 and the display area DA.

[0249] The sub-region SBA may be a region extending from one side of the main region MA. The sub-region SBA may include a flexible material capable of being bent, folded, rolled, etc. For example, in the case of a bent sub-region SBA, the sub-region SBA may overlap with the main region MA in the thickness direction (e.g., the third direction DR3). The sub-region SBA may include a display driver 200 and pad portions connected to the circuit board 300. In another embodiment, the sub-region SBA may be omitted, and the display driver 200 and pad portions may be placed in a non-display area NDA.

[0250] The display driver 200 can output signals and voltages for driving the display panel 100. The display driver 200 can supply data voltages to data lines. The display driver 200 can supply power voltages to power lines and supply gate control signals to the gate driver 210. The display driver 200 can be formed by an integrated circuit (IC) and mounted on the display panel 100 using a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or an ultrasonic bonding method. For example, the display driver 200 can be disposed in a sub-region SBA and can overlap with the main region MA in the thickness direction (e.g., third-direction DR3) by bending the sub-region SBA. As another example, the display driver 200 can be mounted on a circuit board 300.

[0251] The circuit board 300 can be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). Leads of the circuit board 300 can be electrically connected to the pad portion of the display panel 100. The circuit board 300 can be a flexible printed circuit board or a flexible film (such as chip-on-film). Alternatively, the circuit board 300 can be a rigid printed circuit board.

[0252] Touch driver 400 can be mounted on circuit board 300. Touch driver 400 can be electrically connected to touch sensor included in electronic device 1. Touch driver 400 can supply touch drive signals to sensing electrodes of touch driver 400 (see reference). Figure 6 (540 in the middle), and sense the sensing electrode (refer to 540). Figure 6 The change in capacitance between the 540 (in the image) and the touch driver 400. For example, the touch drive signal could be a pulse signal with a selected frequency. The touch driver 400 could be based on the sensing electrodes (refer to the image). Figure 6 The change in capacitance between 540 and 540 is used to determine whether there is an input and to calculate the input coordinates. The touch driver 400 can be formed as an integrated circuit (IC).

[0253] In the following text, reference will be made to Figure 15 Describe the cross-sectional structure of the light-emitting display device 10.

[0254] Figure 15 yes Figure 14 A schematic cross-sectional view of a light-emitting display device.

[0255] Reference Figure 15 The display panel 100 may include a display layer DU and an external light reduction layer CFL.

[0256] The display layer DU may include a substrate SUB, a driving layer TFTL, a light-emitting layer EML, and a cover encapsulation layer TFEL. The substrate SUB may be a base substrate or a base component. The substrate SUB may be a flexible substrate capable of being bent, folded, rolled, etc. For example, the substrate SUB may include a polymer resin such as polyimide (PI), but the embodiments are not limited thereto. In another embodiment, the substrate SUB may include a glass material or a metal material.

[0257] The driving layer TFTL can be disposed on the substrate SUB. The driving layer TFTL may include transistors and capacitors forming pixel circuit units that output and transmit current to the light-emitting element. The driving layer TFTL may include gate lines, data lines, power lines, gate control lines, fan-out lines connecting the display driver 200 to the data lines, and leads connecting the display driver 200 to the pad portion. Each transistor may include a semiconductor comprising a channel region, a source region, and a drain region, and a gate electrode disposed on one side of the semiconductor. For example, the source region and drain region of the semiconductor may be used as the source electrode (e.g., a first electrode) and drain electrode (e.g., a second electrode) of the transistor, respectively. For example, in the gate driver (e.g., Figure 16 When 210 is formed on one side of the non-display area NDA of the display panel 100, the gate driver (e.g., Figure 16 210 in the text may include transistors.

[0258] The driving layer TFTL can be disposed in the display area DA, the non-display area NDA, and the sub-area SBA. The transistors, gate lines, data lines, and power lines of the driving layer TFTL can be disposed in the display area DA. The gate control lines and fan-out lines of the driving layer TFTL can be disposed in the non-display area NDA. The leads of the driving layer TFTL can be disposed in the sub-area SBA.

[0259] The light-emitting layer (EML) may include a light-emitting diode (LED) and a corresponding light-emitting area, and may be disposed on the driving layer (TFTL). The EML may include a light-emitting diode comprising a first electrode, a second electrode, and an emitting layer, and a pixel defining layer 380 having an opening defining the light-emitting area. The EML may be disposed in the display area (DA). In an embodiment, the EML may be an organic light-emitting layer comprising organic materials. A functional layer comprising at least one of an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer may be disposed on both sides (e.g., opposite sides) of the EML. For example, a combination of the EML and the functional layer may be referred to as an intermediate layer. When the first electrode receives a voltage through the transistor of the driving layer (TFTL) and the second electrode receives a low driving voltage, holes and electrons are transported through the hole transport layer and the electron transport layer, respectively, and the holes and electrons can move to the EML, which is an organic light-emitting layer, and can combine with each other in the EML to emit light. For example, one of the first electrode and the second electrode may be an anode, and the other may be a cathode.

[0260] In another embodiment, the light-emitting diode (LED) may be a quantum dot LED including a quantum dot light-emitting layer, an inorganic LED including inorganic semiconductors, or a micro LED.

[0261] The TFEL (Top-Level Encapsulation Layer) can cover the top and side surfaces of the EML (Emitting Layer), and prevent external moisture and air from entering the EML. The TFEL may include at least one inorganic layer and at least one organic layer to encapsulate the EML.

[0262] An external light reduction layer (CFL) may be disposed on the overlay encapsulation layer (TFEL). The external light reduction layer (CFL) may include a color filter corresponding to each of the emitting regions. For example, a light blocking layer may be disposed between color filters adjacent to the external light reduction layer (CFL) or in the overlapping portion of adjacent color filters therein. The light blocking layer may be disposed on the third-direction DR3 above or below the color filters, or may be disposed on both sides (e.g., opposite sides).

[0263] Since the external light reduction layer (CFL) is disposed (e.g., directly disposed) on the overlay encapsulation layer (TFEL), the light-emitting display device 10 may not require a separate substrate for the CFL. For example, the polarizer may not be attached to the top (or upper surface) of the CFL. As a result, the thickness of the light-emitting display device 10 can be relatively small. For example, since the light-emitting display device 10 does not include a polarizer, there may be a disadvantage of direct reflection of external light; however, the reflection of external light can be reduced by including a color filter or a light-blocking layer in the CFL. For example, a color filter can selectively transmit light of a specific wavelength and block or absorb light of other wavelengths, and a light-blocking layer can absorb external light. Therefore, the amount of external light flowing into the light-emitting display device 10 can be varied, and the amount of reflected light can also be reduced, thereby reducing the disadvantages caused by the reflection of external light.

[0264] According to an embodiment, the light-emitting display device 10 may further include an optical element 500. The optical element 500 may be disposed on the back side of the second display area DA2 or the third display area DA3. The optical element 500 may emit or receive light in the infrared, ultraviolet, and visible light wavelength bands. For example, the optical element 500 may be an optical sensor for detecting light incident on the light-emitting display device 10, such as a proximity sensor, illuminance sensor, camera sensor, or image sensor.

[0265] In the following text, reference will be made to Figure 16 The connection relationships of the components included in the light-emitting display device 10 are described in detail.

[0266] Figure 16 This is a schematic plan view showing the connection relationship between the components of the light-emitting display device according to an embodiment.

[0267] Reference Figure 16 The display layer DU of the light-emitting display device 10 may include a display area DA and a non-display area NDA.

[0268] The display area DA can be located at the center of the display panel 100. Pixel cells PX, gate lines GL, data lines DL, and power lines VL can be arranged within the display area DA. Each pixel cell PX can be the smallest unit emitting light and may include a pixel circuit unit containing a transistor and a capacitor, as well as a light-emitting element that receives current from the pixel circuit unit.

[0269] Each unit pixel PX can be connected to a gate line GL, a data line DL, and a power line VL, and the gate line GL and the power line VL can each include multiple lines.

[0270] The gate line GL can supply the gate signal received from the gate driver 210 to the unit pixel PX. The gate line GL can extend in a first direction DR1 and can be spaced apart from each other in a second direction DR2 that intersects the first direction DR1.

[0271] The data lines DL can supply the data voltage received from the display driver 200 to the unit pixel PX. The data lines DL can extend in the second direction DR2 and can be spaced apart from each other in the first direction DR1.

[0272] The power lines VL can supply electrical voltage received from the display driver 200 to the unit pixel PX. For example, the electrical voltage can be at least one of a drive voltage, an initialization voltage, a reference voltage, and a drive low voltage, and these electrical voltages can be transmitted to the unit pixel PX. The power lines VL can extend in the second direction DR2 and can be spaced apart from each other in the first direction DR1.

[0273] The non-display area NDA can surround the display area DA. The gate driver 210, fan-out line FOL, and gate control line GCL can be located in the non-display area NDA.

[0274] The gate driver 210 can generate a gate signal based on a gate control signal and sequentially supply the gate signal to the gate line GL in a certain order.

[0275] The fan-out line FOL can extend from the display driver 200 to the display area DA. The fan-out line FOL can supply the data voltage received from the display driver 200 to the data line DL.

[0276] A gate control line GCL can extend from the display driver 200 to the gate driver 210. The gate control line GCL can supply gate control signals received from the display driver 200 to the gate driver 210.

[0277] Reference Figure 16 The light-emitting display device 10 may also include a sub-region SBA.

[0278] The sub-region SBA may include a display driver 200, a pad area PA, a first touch pad area TPA1, and a second touch pad area TPA2.

[0279] The display driver 200 can output signals and voltages for driving the display panel 100 to the fan-out line FOL. The display driver 200 can supply data voltages to the data line DL via the fan-out line FOL. The data voltages can be supplied to the unit pixels PX, and the brightness of the unit pixels PX can be controlled. The display driver 200 can supply gate control signals to the gate driver 210 via the gate control line GCL.

[0280] Pad area PA, first touch pad area TPA1, and second touch pad area TPA2 may be located at the edge of sub-area SBA. Pad area PA may include display pad portion DP. Display pad portion DP can be connected to a graphics system via circuit board 300. Display pad portion DP can be connected to circuit board 300 to receive digital video data and can supply digital video data to display driver 200. First touch pad area TPA1 and second touch pad area TPA2 may each include multiple touch pads TP1 and TP2, and can be connected to touch driver 400 disposed on circuit board 300, thereby enabling them to detect touch. Pad area PA, first touch pad area TPA1, and second touch pad area TPA2 may be electrically connected to circuit board 300 using materials such as anisotropic conductive film or self-assembling anisotropic conductive paste (SAP).

[0281] I am in Chinese, and will refer to Figure 17 The description includes an embodiment of an electronic device comprising a light-emitting display device according to this embodiment.

[0282] Figure 17 This is a block diagram of an electronic device according to an embodiment.

[0283] Electronic device 1 can output various information via display module MD2 using an operating system. When the processor PROC executes an application program stored in memory MM, display module MD2 can provide the application information to the user via display panel MD21. For example, display panel MD21 can be the aforementioned light-emitting display device.

[0284] The processor PROC can obtain external input through the input module MD1 or the sensor module MD41, and can execute the application corresponding to the external input. For example, if the user selects the camera icon displayed on the display panel MD21, the processor PROC can obtain user input through the input sensor MD41-2 and activate the camera module MD51. The processor PROC can then transfer the image data corresponding to the captured image obtained through the camera module MD51 to the display module MD2. The display module MD2 can then display the image corresponding to the captured image through the display panel MD21.

[0285] As another example, when performing personal information authentication in the display module MD2, the fingerprint sensor MD41-1 obtains the input fingerprint information as input data. The processor PROC compares the input data obtained through the fingerprint sensor MD41-1 with the authentication data stored in the memory MM, and executes the application based on the comparison result. The display module MD2 can display the information executed according to the application logic via the display panel MD21. As another example, when a music stream icon displayed on the display module MD2 is selected, the processor PROC obtains user input through the input sensor MD41-2 and can activate the music stream application stored in the memory MM. When a music playback command is entered in the music stream application, the processor PROC can activate the sound output module MD43 to provide the user with sound information matching the music playback command.

[0286] The operation of electronic device 1 has been briefly described above. The configuration of electronic device 1 will now be described in detail. Some of the components of electronic device 1, which will be described later, may be integrated and provided as a single component, or a single component may be provided separately in two or more components.

[0287] Reference Figure 17 Electronic device 1 can communicate with external electronic device 2 via a network (e.g., a short-range wireless communication network or a long-range wireless communication network). According to an embodiment, electronic device 1 may include a processor PROC, a memory MM, an input module MD1, a display module MD2, a power module MD3, an embedded module MD4, and an external module MD5. According to an embodiment, at least one of the aforementioned components may be omitted from electronic device 1, or one or more other components may be added. According to an embodiment, some of the aforementioned components (e.g., sensor module MD41, antenna module MD42, or sound output module MD43) may be connected to another component (e.g., display module MD2).

[0288] The processor PROC can execute software to control at least one other component (e.g., hardware or software component) of the electronic device 1 connected to the processor PROC and perform various data processing or calculations. According to an embodiment, as part of data processing or operation, the processor PROC can store commands or data received from other components (e.g., input module MD1, sensor module MD41, or communication module MD53) in volatile memory MM1, process the commands or data stored in volatile memory MM1, and store the resulting data in non-volatile memory MM2.

[0289] The processor PROC may include a main processor MPROC and an auxiliary processor SPROC. The main processor MPROC may include a central processing unit MPROC-1, such as a central processing unit (CPU) and / or an application processor (AP). The main processor MPROC may also include a graphics processing unit MPROC-2, such as a graphics processing unit (GPU), a communication processor (CP), and / or an image signal processor (ISP). The main processor MPROC may also include a neural network processing unit MPROC-3, such as a neural network processing unit (NPU). The neural network processing unit may be a processor specifically designed to process artificial intelligence models, and the artificial intelligence models may be created through machine learning. The artificial intelligence model may include multiple layers of artificial neural networks. The artificial neural networks may include one or a combination of two or more of the following: deep neural networks (DNN), convolutional neural networks (CNN), recurrent neural networks (RNN), restricted Boltzmann machines (RBM), deep belief networks (DBN), bidirectional recurrent deep neural networks (BRDNN), and deep Q-networks; however, embodiments are not limited to the examples described above. In addition to the hardware architecture, the artificial intelligence model may additionally or alternatively include software architecture. At least two of the aforementioned processing units and processors can be implemented as an integrated configuration (e.g., a single chip), or each can be implemented as an independent configuration (e.g., multiple chips).

[0290] The auxiliary processor SPROC may include a controller SPROC-1. Controller SPROC-1 may include interface conversion circuitry and timing control circuitry. Controller SPROC-1 receives video signals from the main processor MPROC, converts the video signal data format to match the interface specifications of the display module MD2, and outputs video data. Controller SPROC-1 can output various control signals required to drive the display module MD2. The auxiliary processor SPROC may also include a data conversion circuit SPROC-2, a gamma correction circuit SPROC-3, and a rendering circuit SPROC-4. Data conversion circuit SPROC-2 receives image data from controller SPROC-1 and compensates the image data to display an image with selected brightness based on the characteristics of electronic device 1, user settings, or power consumption, and converts the image data to reduce or compensate for image retention. Gamma correction circuit SPROC-3 converts image data or a gamma reference voltage so that the image displayed on electronic device 1 has the desired gamma characteristics. The rendering circuit SPROC-4 receives image data from the controller SPROC-1 and renders the image data taking into account the pixel arrangement of the display panel MD21 applied to the electronic device 1. At least one of the data conversion circuit SPROC-2, the gamma correction circuit SPROC-3, and the rendering circuit SPROC-4 can be integrated into another component (e.g., the main processor MPROC or the controller SPROC-1). At least one of the data conversion circuit SPROC-2, the gamma correction circuit SPROC-3, and the rendering circuit SPROC-4 can be integrated into the data driver MD23, ​​which will be described later.

[0291] The memory MM can store various data used by at least one component of the electronic device 1 (e.g., processor PROC or sensor module MD41), as well as input or output data for instructions associated therewith. The memory MM may include at least one of volatile memory MM1 and non-volatile memory MM2.

[0292] The input module MD1 can receive commands or data to be used in components of electronic device 1 (e.g., processor PROC, sensor module MD41, or sound output module MD43) from outside electronic device 1 (e.g., from a user or external electronic device 2).

[0293] Input module MD1 may include a first input module MD11 for input of commands or data from a user, and a second input module MD12 for input of commands or data from an external electronic device 2. The first input module MD11 may include a microphone, mouse, keyboard, buttons (e.g., keypads), or pen (e.g., a passive or active pen). The second input module MD12 may support a specified protocol for wired or wireless connection to the external electronic device 2. According to embodiments, the second input module MD12 may include an High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital Card (SD) card interface, or an audio interface. The second input module MD12 may include a connector for physical connection to the external electronic device 2, such as an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0294] The display module MD2 visually presents information to the user. The display module MD2 may include a display panel MD21, a scan driver MD22, and a data driver MD23.

[0295] The display module MD2 may also include a window, a chassis, and a bracket to protect the display panel MD21.

[0296] The display panel MD21 may include a liquid crystal display panel, an organic light-emitting display panel, or an inorganic light-emitting display panel, and the type of the display panel MD21 is not limited. The display panel MD21 may be of a rigid type or a flexible type that can be rolled or folded. The display module MD2 may also include a support, bracket, or heat dissipation component that supports the display panel MD21.

[0297] The scan driver MD22 can be mounted as a driver chip on the display panel MD21. For example, the scan driver MD22 can be integrated into the display panel MD21. For example, the scan driver MD22 may include an amorphous silicon thin-film transistor (TFT) gate driver circuit (ASG), a low-temperature polycrystalline silicon (LTPS) TFT gate driver circuit, or an oxide semiconductor TFT gate driver circuit (OSG) embedded in the display panel MD21. The scan driver MD22 can receive control signals from the controller SPROC-1 and can output scan signals to the display panel MD21 in response to the control signals.

[0298] The display panel MD21 may also include a light-emitting driver. The light-emitting driver can output a light-emitting control signal to the display panel MD21 in response to a control signal received from the controller SPROC-1. The light-emitting driver may be formed separately from the scan driver MD22, or it may be integrated into the scan driver MD22.

[0299] The data driver MD23 can receive control signals from the controller SPROC-1 and can convert image data into analog voltages (e.g., data voltages) in response to the control signals, and can then output the data voltages to the display panel MD21.

[0300] The data driver MD23 can be integrated into other components (e.g., the controller SPROC-1). The interface conversion circuitry and timing control circuitry of the aforementioned controller SPROC-1 can be integrated into the data driver MD23.

[0301] The display module MD2 may also include a light-emitting driver and a voltage generation circuit. The voltage generation circuit can output various voltages required to drive the display panel MD21.

[0302] The power module MD3 supplies power to components of the electronic device 1. The power module MD3 may include a battery that can be charged with a power voltage. The battery may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. The power module MD3 may include a power management integrated circuit (PMIC). The PMIC can supply optimized power to each of the modules described above and below. The power module MD3 may include wireless power transmission / reception components electrically connected to the battery.

[0303] Wireless power transmission / reception components may include coil-shaped antenna radiators.

[0304] The electronic device 1 may also include an embedded module MD4 and an external module MD5. The embedded module MD4 may include a sensor module MD41, an antenna module MD42, and a sound output module MD43. The external module MD5 may include a camera module MD51, a lamp module MD52, and a communication module MD53.

[0305] Sensor module MD41 can detect input from the user's body or from a pen in the first input module MD11, and generate an electrical signal or data value corresponding to the input. Sensor module MD41 may include at least one of fingerprint sensor MD41-1, input sensor MD41-2, and digitizer MD41-3.

[0306] The MD41-1 fingerprint sensor generates data values ​​corresponding to a user's fingerprint. The MD41-1 fingerprint sensor can include both optical and capacitive fingerprint sensors.

[0307] The MD41-2 input sensor generates data values ​​corresponding to the coordinate information of input via the user's body or a pen. The MD41-2 input sensor can also generate data values ​​based on the change in capacitance caused by the input. The MD41-2 input sensor can detect input via a passive pen, or transmit and receive data using an active pen.

[0308] The input sensor MD41-2 can also measure vital signs such as blood pressure, water content, or body fat. For example, if a user touches a part of their body to the sensor layer or sensing panel and does not move it for a certain period of time, the input sensor MD41-2 can detect biosignals based on changes in the electric field caused by that part of the body. Therefore, the information desired by the user can be output to the display module MD2.

[0309] The MD41-3 digitizer generates data values ​​corresponding to coordinate information input by a pen. It can also generate data values ​​from electromagnetic changes caused by the input. The MD41-3 can detect input from a passive pen or transmit and receive data using an active pen.

[0310] At least one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be implemented as a sensor layer formed on the display panel MD21 by a continuous process. The fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be disposed on the upper side of the display panel MD21. For example, the digitizer MD41-3 can be disposed below the display panel MD21.

[0311] At least two of the fingerprint sensor MD41-1, input sensor MD41-2, and digitizer MD41-3 can be formed using the same process to integrate into a single sensing panel. When integrated into a single sensing panel, the sensing panel can be placed between the display panel MD21 and a window positioned above the display panel MD21. According to an embodiment, the sensing panel can be placed on the window, and the position of the sensing panel is not limited.

[0312] At least one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be embedded in the display panel MD21. For example, at least one of them can be formed simultaneously by a process that forms the elements (e.g., light-emitting elements, transistors) contained in the display panel MD21, the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3.

[0313] For example, sensor module MD41 can generate electrical signals or data values ​​corresponding to the internal or external state of electronic device 1. Sensor module MD41 may include gesture sensors, gyroscope sensors, pressure sensors, magnetic sensors, accelerometers, grip sensors, proximity sensors, color sensors, infrared (IR) sensors, biosensors, temperature sensors, humidity sensors, or illuminance sensors.

[0314] Antenna module MD42 may include one or more antennas for transmitting or receiving signals or power from or from an external source. According to an embodiment, communication module MD53 may transmit signals to or receive signals from external electronic device 2 via an antenna suitable for a communication method. The antenna pattern of antenna module MD42 may be integrated into a single component of display module MD2 (e.g., display panel MD21) or input sensor MD41-2.

[0315] The sound output module MD43 can be a device for outputting sound signals to the outside of the electronic device 1. For example, it may include a speaker for general purposes such as multimedia playback or recording playback, and a receiver specifically for answering telephone calls. According to an embodiment, the receiver may be integrated with the speaker or formed separately. The sound output mode of the sound output module MD43 may be integrated into the display module MD2.

[0316] The camera module MD51 can capture still images and videos. According to embodiments, the camera module MD51 may include one or more lenses, an image sensor, or an image signal processor. The camera module MD51 may also include an infrared camera capable of measuring the presence or absence of a user, the user's position, and the user's gaze.

[0317] The MD52 lamp module provides light. The MD52 lamp module may include light-emitting diodes (LEDs) or xenon lamps. The MD52 lamp module can operate in conjunction with the MD51 camera module or independently.

[0318] The communication module MD53 supports or provides a wired or wireless communication channel between electronic device 1 and external electronic device 2, and enables communication through the established communication channel. The communication module MD53 may include any or all of the following: wireless communication modules such as cellular communication modules, short-range wireless communication modules, or Global Navigation Satellite System (GNSS) communication modules; and wired communication modules such as local area network (LAN) communication modules or power line communication modules. The communication module MD53 can connect to external electronic device 2 via short-range communication networks such as Bluetooth, WiFi Direct, or Infrared Data Association (IrDA), or long-range communication networks such as cellular networks, the Internet, or computer networks (e.g., LAN or WAN). The various types of communication modules MD53 described above can be implemented on a single chip or on multiple separate chips.

[0319] Input module MD1, sensor module MD41, camera module MD51, etc. can be used in conjunction with processor PROC to control the operation of display module MD2.

[0320] The processor PROC can output commands or data to the display module MD2, sound output module MD43, camera module MD51, or lamp module MD52 based on input data received from the input module MD1. For example, the processor PROC can generate image data in response to input data applied by a mouse or active pen and output the image data to the display module MD2, or it can generate command data in response to input data and output the command data to the camera module MD51 or lamp module MD52. If the processor PROC does not receive input data from the input module MD1 for a certain period of time, the processor PROC can switch the operating mode of the electronic device 1 to a low-power mode or a sleep mode to reduce the power consumed by the electronic device 1.

[0321] The processor PROC can output commands or data to the display module MD2, sound output module MD43, camera module MD51, or lamp module MD52 based on sensing data received from the sensor module MD41. For example, the processor PROC can compare authentication data authorized by the fingerprint sensor MD41-1 with authentication data stored in the memory MM, and then execute the application based on the comparison result. The processor PROC can execute commands or output corresponding image data to the display module MD2 based on sensing data detected by the input sensor MD41-2 or the digitizer MD41-3. If the sensor module MD41 may include a temperature sensor, the processor PROC can receive temperature data for the temperature measured from the sensor module MD41, and also perform brightness correction, etc., on the image data based on the temperature data.

[0322] The processor PROC can receive measurement data from the camera module MD51 regarding the presence or absence of a user, the user's position, and the user's gaze. The processor PROC can also perform brightness correction and other functions on the image data based on the measurement data. For example, the processor PROC, which determines the presence or absence of a user through input from the camera module MD51, can output the brightness-corrected image data to the display module MD2 via the data conversion circuit SPROC-2 or the gamma correction circuit SPROC-3.

[0323] Some of the aforementioned components may use communication methods between peripheral devices (such as bus, general purpose input / output (GPIO), serial peripheral interface (SPI), mobile industry processor interface (MIPI), or ultrapath interconnect (UPI)), and they may be connected to each other via links and exchange signals (e.g., commands or data). The processor PROC may communicate with the display module MD2 via an interface agreed upon by both parties. For example, any of the communication methods described above may be used, and the embodiments are not limited to the communication methods described above.

[0324] The electronic device 1 according to the various embodiments disclosed herein can be of various types. The electronic device 1 may include at least one of, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance. The electronic device 1 according to the embodiments herein is not limited to the devices described above.

[0325] In concluding this detailed description, those skilled in the art will recognize that many variations and modifications can be made to the embodiments without substantially departing from the principles, spirit, and scope of this disclosure. Therefore, the disclosed embodiments are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A light-emitting display device, characterized in that, include: Pixel driving unit, the pixel driving unit including transistor; A planarization layer that covers the pixel driving unit; The anode of a light-emitting diode, wherein the anode of the light-emitting diode is disposed on the planarization layer; A pixel defining layer, the pixel defining layer including an opening that overlaps with the anode of the light-emitting diode in a plan view; A wall, the wall including an opening that overlaps with the opening of the pixel defining layer; A light-emitting layer is disposed in the opening of the pixel defining layer; The cathode of the light-emitting diode is disposed on the light-emitting layer; as well as A separator that divides the wall into a first wall and a second wall. The first wall is electrically connected to the transistor of the pixel driving section through a first contact hole passing through the pixel defining layer and the planarization layer. The cathode of the light-emitting diode is in contact with the side of the first wall and is electrically connected to the transistor.

2. The light-emitting display device according to claim 1, characterized in that, The first wall includes a first conductive wall and a second conductive wall disposed on the first conductive wall, and The second conductive wall has a pointed portion that protrudes from the first conductive wall.

3. The light-emitting display device according to claim 2, characterized in that, The pointed portion protrudes toward the opening of the first wall that overlaps with the opening of the pixel defining layer.

4. The light-emitting display device according to claim 3, characterized in that, The first wall is an inner conductive wall. The second wall is an external conductive wall. The inner conductive wall surrounds the opening of the pixel defining layer in the plan view. The outer conductive wall is electrically separated from the inner conductive wall. The inner conductive wall includes a first inner conductive wall and a second inner conductive wall disposed on the first inner conductive wall, and The outer conductive wall includes a first outer conductive wall and a second outer conductive wall disposed on the first outer conductive wall.

5. The light-emitting display device according to claim 4, characterized in that, The inner conductive wall is electrically connected to the transistor of the pixel driving section through the first contact hole, and The outer conductive wall receives a constant voltage through a second contact hole passing through the pixel defining layer and the planarization layer.

6. The light-emitting display device according to claim 5, characterized in that, The separate light-emitting layer and the separate cathode are respectively formed on the outer conductive wall, and are separated from the light-emitting layer and the cathode by the separating element.

7. The light-emitting display device according to claim 1, characterized in that, Also includes: An encapsulation layer, the encapsulation layer covering the wall and the cathode, wherein, The separator includes an empty space passing through the encapsulation layer and the wall.

8. The light-emitting display device according to claim 1, characterized in that, Also includes: An encapsulation layer that covers the wall and the cathode. The separator passes through the wall and is disposed between the first wall and the second wall, and The encapsulation layer is disposed on the separator.

9. A light-emitting display device, characterized in that, include: Pixel driving unit, the pixel driving unit including transistor; A planarization layer that covers the pixel driving unit; The anode of a light-emitting diode, wherein the anode of the light-emitting diode is disposed on the planarization layer; A pixel defining layer, the pixel defining layer including an opening overlapping the anode of the light-emitting diode in a plan view, the pixel defining layer including a black pixel defining layer and a transparent pixel defining layer; A wall, the wall including an opening that overlaps with the opening of the pixel defining layer; A light-emitting layer is disposed in the opening of the pixel defining layer; The cathode of the light-emitting diode is disposed on the light-emitting layer; as well as A separator that divides the wall into a first wall and a second wall. The first wall is electrically connected to the transistor of the pixel driving section through a first contact hole passing through the pixel defining layer and the planarization layer. The cathode of the light-emitting diode is in contact with the side of the first wall and is electrically connected to the transistor.

10. The light-emitting display device according to claim 9, characterized in that, The pixel defining layer further includes an intermediate pixel defining layer, and The intermediate pixel defining layer is an inorganic insulating layer and is disposed between the black pixel defining layer and the transparent pixel defining layer.

Images