Hall current transmitter with high anti-interference performance
By designing the signal differential output circuit and power supply step-down circuit of the Hall current transmitter, the problems of short transmission distance and weak anti-interference ability of the Hall current transmitter are solved, realizing long-distance DC4-20mA current signal output and multi-voltage power supply to meet the needs of different current detection ranges.
Patent Information
- Application Number
- CN202423122018.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2034-12-18
AI Technical Summary
Existing Hall current transmitters output voltage signals, which have short transmission distances, weak anti-interference capabilities, and variable hardware parameters, making it impossible to achieve wide voltage power supply.
A Hall current transmitter with high anti-interference capability was designed. It adopts a Hall chip signal differential output circuit and a voltage signal to DC4-20mA signal output circuit, combined with an input power supply step-down circuit, supports a wide voltage power supply of DC9-36V, and can achieve different current detection ranges by adjusting the sensitivity through a programmer.
It achieves long-distance transmission of DC4-20mA current signal output, has strong anti-interference ability, fixed hardware parameters, supports multiple power supply voltages, and adapts to different current detection needs.
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Figure CN223650619U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to electrical detection technical field especially relates to a hall current transmitter with high anti -interference. BACKGROUND
[0002] The hall current transmitter is commonly known as integrated current transmitter, and it is a new generation of AC and DC current transmitter which combines current sensor and current transmitter, and it can directly convert the measured main loop current into constant current source standard signal according to linear proportion, and continuously transmit to the receiving device.
[0003] (1) Most of the hall current transmitter signal output is voltage signal, and the transmission distance is short, and the anti-interference ability is weak.
[0004] (2) Most of the hall current transmitter needs pure analog scheme, and the hardware parameters are not fixed, and the circuit parameters need to be changed to realize different current range, which is not convenient for production and storage.
[0005] (3) Most of the hall current transmitter only supports DC12V or DC24V fixed voltage power supply, and cannot realize wide voltage power supply. SUMMARY
[0006] The utility model discloses a hall current transmitter with high anti -interference to overcome the above -mentioned insufficient, solve above -mentioned problem.
[0007] The utility model discloses a hall current transmitter with high anti -interference to overcome the above -mentioned insufficient, solve above -mentioned problem.
[0008] A kind of hall current transmitter with high anti -interference, it includes the outer shell body of upper shell body and lower shell body, the recess of one semicircle ring is equipped in the upper shell body, the recess in the upper shell body is provided with upper magnetic core, the upper part of the lower shell body is provided with one inverted semicircle ring recess, and the lower part is provided with a square recess, the semicircle ring recess and square recess are communicated, the semicircle ring recess in the lower shell body is provided with lower magnetic core, the square recess in the lower shell body is provided with first circuit board and second circuit board, and the first circuit board and second circuit board are oppositely arranged and electrically connected;The first Hall chip and second Hall chip are respectively arranged on the top end left and right sides of the first circuit board;Power module is equipped on the second circuit board;The lower part of the first circuit board is provided with power signal output terminal, and the power signal output terminal is inserted with plug;
[0009] The first circuit board is provided with a Hall chip signal differential output circuit and a voltage signal to DC4-20mA signal output circuit, the second circuit board is provided with an input power voltage reduction circuit; the current signal is transmitted to the Hall chip through the magnetic core, the DC9-36V power supply input is connected to the input power voltage reduction circuit, the input power voltage reduction circuit is connected to the Hall chip, the Hall chip is connected to the Hall chip signal differential output circuit, the Hall chip signal differential output circuit is connected to the voltage signal to DC4-20mA signal output circuit; the Hall chip is connected to an external programmer.
[0010] The voltage signal to DC4-20mA signal output circuit comprises a chip U1B and a chip U2B, the chip U1B is connected to a resistor R17, the resistor R17 is connected to the gate of a MOS tube Q3, the source of the MOS tube Q3 is connected to a resistor R18, the drain of the MOS tube Q3 is connected to a resistor R16, and the resistor R16 is connected to the non-inverting input terminal of the chip U2B; the inverting input terminal of the chip U2B is connected to a resistor R14 and a resistor R9 and a resistor R13 connected in parallel, the resistor R9 and the resistor R13 connected in parallel are connected to a resistor R8, the resistor R8 is connected to a diode D1, the diode D1 is also connected to the non-inverting input terminal of the chip U2B, and the resistor R14 is connected to the emitter of a triode Q1, the base of the triode Q1 is connected to the emitter of a triode Q2, and the base of the triode Q2 is connected to the output terminal of the chip U2B through a resistor R15.
[0011] Further, the collector of the triode Q2 in the voltage signal to DC4-20mA signal output circuit is connected to an inductor L4 and a capacitor C4, respectively, the inductor L4 and the capacitor C4 are connected to both ends of a capacitor C6, respectively, and the capacitor C6 is connected to a diode D2 and a TVS tube D3 in parallel.
[0012] Further, the input power voltage reduction circuit comprises a power supply chip IC2, the power supply chip IC2 is connected to a pressure-sensitive resistor RV1, a TVS tube D11, a capacitor C16 and a capacitor C17 connected in parallel, an inductor L1 is arranged between one end of the pressure-sensitive resistor RV1 and the TVS tube D11, an inductor L3 is arranged between the other end, the inductor L1 is further connected to a diode D10 and a fuse F1 in series.
[0013] Further, a capacitor C15 is connected in series between the pin 1 and the pin 6 of the power supply chip IC2, the pin 6 of the power supply chip IC2 is further connected to an inductor L2, the inductor L2 is connected to a resistor R11, a capacitor C18 and a capacitor C19 connected in parallel, and the resistor R11 and a resistor R12 are connected in series and then connected to the capacitor C18 in parallel.
[0014] Furthermore, the Hall chip signal differential output circuit includes Hall chips H1 and H2 and operational amplifier U1A. Hall chip H1 is connected to resistor R2, and Hall chip H2 is connected to resistor R6. Resistor R2 is connected to parallel resistor R3 and capacitor C1. Resistor R2 is also connected to the inverting input of operational amplifier U1A. Resistor R6 is connected to parallel resistor R7 and capacitor C5.
[0015] Furthermore, the resistor R6 is also connected to the non-inverting input of the operational amplifier U1A; the output of the operational amplifier U1A is connected to the resistor R5.
[0016] Furthermore, the programming interface for the Hall chips H1 and H2 is interface J1.
[0017] Furthermore, a row of pins is provided on the side of the second circuit board, and the second circuit board is electrically connected to the first circuit board through the pins.
[0018] Compared with the prior art, the beneficial effects of this utility model are:
[0019] This invention provides a Hall current transmitter with high anti-interference capability. The Hall current detection chip, power module, and differential output circuit of the Hall chip signal are integrated into two housings. It can measure the current in the circuit and output a DC 4-20mA current signal, with long transmission distance and strong anti-interference ability. The Hall current transmitter uses a programmable Hall chip with fixed hardware parameters. The chip is programmed using a programmer, and different current detection ranges can be achieved by adjusting the sensitivity. The Hall current transmitter supports a wide voltage supply of DC 9-36V and is compatible with DC 12V and DC 24V power supplies in the field. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the structure of this utility model.
[0021] Figure 2 This is a schematic diagram of the principle of this utility model.
[0022] Figure 3 This is a circuit diagram of the input power supply step-down circuit of this utility model.
[0023] Figure 4 This is a circuit diagram of the differential output circuit of the Hall chip signal of this utility model.
[0024] Figure 5 This is a circuit diagram of the voltage signal to DC4-20mA signal output circuit of this utility model.
[0025] in:
[0026] Upper housing 1, lower housing 2, upper magnetic core 4, lower magnetic core 5, first circuit board 6, second circuit board 7, first Hall chip 8, second Hall chip 9, power module 10, pin 11, power signal output terminal 12, plug 13. Detailed Implementation
[0027] To better understand the technical solution of this utility model, a detailed description will be provided below in conjunction with relevant illustrations. It should be understood that the specific embodiments described below are not intended to limit the specific implementation of the technical solution of this utility model, but are merely possible implementations of the technical solution of this utility model. It should be noted that the descriptions of the positional relationships of the components herein, such as component A being located above component B, are based on the relative positions of the components in the illustrations and are not intended to limit the actual positional relationships of the components. Example 1
[0028] See Figures 1-5 , Figure 1 A schematic diagram of the structure of this utility model has been drawn. As shown in the figure, this utility model relates to a Hall current transmitter with high anti-interference capability, which includes an outer shell composed of an upper shell 1 and a lower shell 2. The upper shell 1 and the lower shell 2 are fixedly connected by screws. The upper shell 1 has a semi-circular annular groove, and an upper magnetic core 4 is arranged in the groove of the upper shell 1. The lower shell 2 has an inverted semi-circular annular groove at the top and a square groove at the bottom. The semi-circular annular groove and the square groove are connected. The lower magnetic core 5 is arranged in the semi-circular annular groove of the lower shell 2. A first circuit board 6 and a second circuit board 7 are arranged in the square groove of the lower shell 2. The first circuit board 6 and the second circuit board 7 are arranged opposite to each other, and a row of pins 11 is provided on the side of the second circuit board 7. The second circuit board 7 is electrically connected to the first circuit board 6 through the pins 11.
[0029] The first Hall chip 8 and the second Hall chip 9 are respectively disposed on the top left and right sides of the first circuit board 6.
[0030] The second circuit board 7 is equipped with a power module 10.
[0031] The lower part of the first circuit board 6 is provided with a power signal output terminal 12, and a plug 13 is inserted into the power signal output terminal 12.
[0032] join Figure 2 , Figure 2 This is a schematic diagram of the principle of this utility model. As shown in the figure, the first circuit board 6 is provided with a Hall chip signal differential output circuit and a voltage signal to DC 4-20mA signal output circuit, and the second circuit board 7 is provided with an input power supply step-down circuit.
[0033] The current signal is transmitted to the Hall chip through the magnetic core. The DC 9-36V power input is connected to the input power step-down circuit, which is connected to the Hall chip. The Hall chip is connected to the Hall chip signal differential output circuit, which is connected to the voltage signal to DC 4-20mA signal output circuit. The Hall chip is connected to an external programmer.
[0034] join Figure 3 , Figure 3 This is a circuit diagram of the input power supply step-down circuit of this utility model. As shown in the figure, the input power supply step-down circuit includes a power chip IC2. The power chip IC2 is connected in parallel with a varistor RV1, a TVS diode D11, a capacitor C16, and a capacitor C17. An inductor L1 is connected between one end of the varistor RV1 and the TVS diode D11, and an inductor L3 is connected between the other ends. The inductor L1 is also connected in series with a diode D10 and a fuse F1. A capacitor C15 is connected in series between pin 1 and pin 6 of the power chip IC2. An inductor L2 is also connected between pin 6 of the power chip IC2. The inductor L2 is connected in parallel with a resistor R11, a capacitor C18, and a capacitor C19. The resistors R11 and R12 are connected in series and then in parallel with the capacitor C18.
[0035] Fuse F1, varistor RV1, TVS diode D11, inductor L1, and inductor L3 constitute the EMC protection for the power input. Diode D10 provides reverse connection protection for the power input. Capacitors C16 and C17 filter the power input. Power chip IC2, resistors R11 and R12, inductor L2, and capacitor C15 provide isolated and regulated 5V power output. Capacitors C18 and C19 are filter capacitors for the 5V power output.
[0036] join Figure 4 , Figure 4 This is a circuit diagram of the differential output circuit for Hall effect chip signals according to this invention. As shown in the figure, the differential output circuit for Hall effect chip signals includes Hall effect chips H1 and H2 and operational amplifier U1A. The programming interface for Hall effect chips H1 and H2 is interface J1. Hall effect chip H1 is connected to resistor R2, and Hall effect chip H2 is connected to resistor R6. Resistor R2 is connected to a parallel resistor R3 and a capacitor C1, and resistor R2 is also connected to the inverting input of operational amplifier U1A. Resistor R6 is connected to a parallel resistor R7 and a capacitor C5, and resistor R6 is also connected to the non-inverting input of operational amplifier U1A. The output terminal of operational amplifier U1A is connected to resistor R5.
[0037] Resistors R2, R3, R5, R6, R7 and operational amplifier U1A form a differential amplifier circuit responsible for converting the output signals of Hall chips H1 and H2 into a voltage output signal proportional to the measured current.
[0038] joinFigure 5 , Figure 5 This is a circuit diagram of the voltage signal to DC 4-20mA signal output circuit of this utility model. As shown in the figure, the voltage signal to DC 4-20mA signal output circuit includes chip U1B and chip U2B. Chip U1B is connected to resistor R17, which is connected to the gate of MOSFET Q3. The source of MOSFET Q3 is connected to resistor R18, and the drain of MOSFET Q3 is connected to resistor R16. Resistor R16 is connected to the non-inverting input terminal of chip U2B. The inverting input terminal of chip U2B is connected to resistor R14 and parallel resistors R9 and R13. Resistors R9 and R13 are connected in parallel to resistor R8. Resistor R8 is connected to diode D1, and diode D1 is also connected to the non-inverting input terminal of chip U2B.
[0039] The resistor R14 is connected to the emitter of transistor Q1, the base of transistor Q1 is connected to the emitter of transistor Q2, the base of transistor Q2 is connected to the output terminal of chip U2B through resistor R15, the collector of transistor Q2 is connected to inductor L4 and capacitor C4 respectively, inductor L4 and capacitor C4 are connected to the two ends of capacitor C6 respectively, and capacitor C6 is connected in parallel with diode D2 and TVS diode D3.
[0040] Chip U1B, resistors R18 and R16, and MOSFET Q3 convert the voltage signal output by the Hall chip differentially into a small current signal; chip U2B, resistors R8, R9, R13, and R14, diode D1, and transistors Q1 and Q2 amplify the current signal to the DC 4-20mA range; capacitors C4 and C6 are the output signal filter capacitors; inductor L4 is the output signal filter inductor; TVS diode D3 and diode D2 clamp the output signal and protect the downstream acquisition device.
[0041] Working principle:
[0042] This utility model relates to a Hall current transmitter with high anti-interference capability. The power signal output terminal 12, the first Hall chip 8, and the second Hall chip 9 are soldered onto the first circuit board 6. A plug 13 is inserted into the power signal output terminal 12. The power module 10 and pins 11 are soldered onto the second circuit board 7. The second circuit board 7 is then soldered onto the first circuit board 6 via pins 11. The lower magnetic core 5, the first circuit board 6, and the second circuit board 7 are installed into the lower housing 2. The upper magnetic core 4 is then installed into the upper housing 1. Screws are inserted into the through holes connecting the upper housing 1 and the lower housing 2 to assemble them together. The screws are then tightened at the openings of the upper housing 1 and the lower housing 2. Finally, glue is poured into the upper housing 1 and the lower housing 2 to fix the components.
[0043] The power signal output terminal 12 is the power supply and signal output terminal of the sensor. The input power step-down circuit on the power module 10 converts the input power supply voltage into the power supply voltage of the Hall chip and transmits it to the first circuit board 6 through the pin 11 to power the two Hall chips, the Hall chip signal differential output circuit and the voltage signal to DC4-20mA output circuit.
[0044] The upper magnetic core 4 and the lower magnetic core 5 focus the magnetic field generated by the current. The external programmer programs the two Hall chips to adjust the sensitivity. By sensing the current magnetic field in the air gap of the upper magnetic core 4 and the lower magnetic core 5, the corresponding voltage signal is output. Then, the voltage signal is differentially output and finally converted into a DC4-20mA signal output circuit through the voltage signal to DC4-20mA output circuit.
[0045] The above are merely specific application examples of this utility model and do not constitute any limitation on the scope of protection of this utility model. All technical solutions formed by equivalent transformations or equivalent substitutions fall within the scope of protection of this utility model.
Claims
1. A Hall current transmitter with high anti-interference capability, characterized in that: The housing comprises an upper housing (1) and a lower housing (2). The upper housing (1) has a semi-circular annular groove, and an upper magnetic core (4) is disposed in the groove of the upper housing (1). The lower housing (2) has an inverted semi-circular annular groove at the top and a square groove at the bottom. The semi-circular annular groove and the square groove are connected. A lower magnetic core (5) is disposed in the semi-circular annular groove of the lower housing (2). A first circuit board (6) and a second circuit board (7) are disposed in the square groove of the lower housing (2). The first circuit board (6) and the second circuit board (7) are disposed opposite to each other and electrically connected. A first Hall chip (8) and a second Hall chip (9) are disposed on the left and right sides of the top of the first circuit board (6). A power module (10) is disposed on the second circuit board (7). A power signal output terminal (12) is disposed at the bottom of the first circuit board (6), and a plug (13) is inserted into the power signal output terminal (12). The first circuit board (6) is provided with a Hall chip signal differential output circuit and a voltage signal to DC4-20mA signal output circuit. The second circuit board (7) is provided with an input power supply step-down circuit. The current signal is transmitted to the Hall chip through the magnetic core. The DC9-36V power input is connected to the input power supply step-down circuit, which is connected to the Hall chip. The Hall chip is connected to the Hall chip signal differential output circuit, which is connected to the voltage signal to DC4-20mA signal output circuit. The Hall chip is connected to an external programmer. The voltage signal to DC 4-20mA signal output circuit includes chip U1B and chip U2B. Chip U1B is connected to resistor R17, which is connected to the gate of MOSFET Q3. The source of MOSFET Q3 is connected to resistor R18, and the drain of MOSFET Q3 is connected to resistor R16. Resistor R16 is connected to the non-inverting input terminal of chip U2B. The inverting input terminal of chip U2B is connected to resistor R14 and parallel resistors R9 and R13. Resistors R9 and R13 are connected in parallel to resistor R8. Resistor R8 is connected to diode D1, which is also connected to the non-inverting input terminal of chip U2B. Resistor R14 is connected to the emitter of transistor Q1, and the base of transistor Q1 is connected to the emitter of transistor Q2. The base of transistor Q2 is connected to the output terminal of chip U2B via resistor R15.
2. A Hall current transmitter with high anti-interference capability according to claim 1, characterized in that: In the voltage signal to DC4-20mA signal output circuit, the collector of transistor Q2 is connected to inductor L4 and capacitor C4 respectively. Inductor L4 and capacitor C4 are connected to the two ends of capacitor C6 respectively. Capacitor C6 is connected in parallel with diode D2 and TVS transistor D3.
3. A Hall current transmitter with high anti-interference capability according to claim 1, characterized in that: The input power step-down circuit includes a power chip IC2. The power chip IC2 is connected in parallel with a varistor RV1, a TVS diode D11, a capacitor C16, and a capacitor C17. An inductor L1 is provided between one end of the varistor RV1 and the TVS diode D11, and an inductor L3 is provided between the other ends. The inductor L1 is also connected in series with a diode D10 and a fuse F1.
4. A Hall current transmitter with high anti-interference capability according to claim 3, characterized in that: A capacitor C15 is connected in series between pin 1 and pin 6 of the power chip IC2. An inductor L2 is also connected to pin 6 of the power chip IC2. The inductor L2 is connected in parallel with a resistor R11, a capacitor C18, and a capacitor C19. The resistor R11 and the resistor R12 are connected in series and then in parallel with the capacitor C18.
5. A Hall current transmitter with high anti-interference capability according to claim 1, characterized in that: The Hall chip signal differential output circuit includes Hall chips H1 and H2 and operational amplifier U1A. Hall chip H1 is connected to resistor R2, and Hall chip H2 is connected to resistor R6. Resistor R2 is connected to resistor R3 and capacitor C1 in parallel. Resistor R2 is also connected to the inverting input of operational amplifier U1A. Resistor R6 is connected to resistor R7 and capacitor C5 in parallel.
6. A Hall current transmitter with high anti-interference capability according to claim 5, characterized in that: Resistor R6 is also connected to the non-inverting input of operational amplifier U1A; resistor R5 is connected to the output of operational amplifier U1A.
7. A Hall current transmitter with high anti-interference capability according to claim 5, characterized in that: The programming interface for the Hall chips H1 and H2 is interface J1.
8. A Hall current transmitter with high anti-interference capability according to claim 1, characterized in that: The second circuit board (7) has a row of pins (11) on its side, and the second circuit board (7) is electrically connected to the first circuit board (6) through the pins (11).