Testing device of data acquisition unit

Abstract

The utility model discloses a testing device of a data acquisition unit, which belongs to the technical field of photovoltaic systems, and comprises an RS485 conversion circuit connected with an RS485 port of the data acquisition unit and used for performing signal conversion on operation data of a target inverter and transmitting target conversion data to the data acquisition unit; the single chip microcomputer is connected with the RS485 conversion circuit and is used for storing the operation data of the target inverter; the power supply module is connected with the single chip microcomputer and the RS485 conversion circuit; and the control module is connected with the RS485 conversion circuit through a data acquisition unit, and is used for comparing the target conversion data with preset data, judging that the data acquisition unit passes the aging test if the comparison results are consistent, and judging that the data acquisition unit does not pass the aging test if the comparison results are inconsistent. The device can reduce the volume occupation when the aging test is carried out on the data acquisition unit, and improves the test efficiency of the data acquisition unit.

Description

TECHNICAL FIELD

[0001] The utility model relates to photovoltaic system technical field, especially a kind of testing device of data collector. BACKGROUND

[0002] Data collector in photovoltaic system all can be shipped after aging test. Please see Figure 1 , Figure 1 Schematic diagram in prior art when aging test is carried out to data collector. When aging test is carried out to data collector, the multiple-way RS485 (Recommended Standard 485, a kind of serial communication standard) port of data collector is connected with inverter respectively. After that, data collector will obtain the operating data of inverter by RS485 port, and compare with preset data. If the operating data of inverter obtained is consistent with preset data, it shows that the operating performance of data collector is good, can pass aging test. If the operating data of inverter is inconsistent with preset data, there is missing or error, it shows that the operating performance of data collector is abnormal, fails to pass aging test.

[0003] Because inverter is provided with heat dissipation system, PID (Potential Induced Degradation, potential induced degradation effect) control system, inverter control system and signal control system etc., it leads to the size of inverter is larger, and it is inconvenient to carry, in turn, leading to aging test of data collector not only needs to occupy larger space volume, and, aging test efficiency is lower. At present, there is no effective solution to this technical problem. CONTENT OF UTILITY MODEL

[0004] Therefore, the purpose of the utility model is to provide a kind of testing device of data collector, to solve the technical problems such as the space volume that needs to be occupied is large and aging test efficiency is low in prior art when aging test is carried out to data collector. Its specific scheme is as follows:

[0005] In order to solve the above technical problems, the utility model provides a kind of testing device of data collector, comprising:

[0006] Connected with the RS485 port of data collector, for signal conversion to the operating data of target inverter, obtains target conversion data, and the target conversion data is transmitted to the RS485 conversion circuit of data collector;

[0007] Connected with the RS485 conversion circuit, for storing the operating data of target inverter single-chip microcomputer;

[0008] A power supply module connected with the single-chip microcomputer and the RS485 conversion circuit and used for supplying power to the single-chip microcomputer and the RS485 conversion circuit;

[0009] A control module connected with the data collector and the RS485 conversion circuit, used for acquiring the target conversion data through the data collector, comparing the target conversion data with preset data, determining that the data collector passes the aging test if the comparison result is consistent, and determining that the data collector fails the aging test if the comparison result is inconsistent.

[0010] Preferably, the single-chip microcomputer comprises:

[0011] A control chip;

[0012] A memory connected with the control chip;

[0013] An oscillator connected between an OSCIN port and an OSCOUT port of the control chip.

[0014] Preferably, the memory is a non-volatile memory.

[0015] Preferably, the single-chip microcomputer further comprises:

[0016] A serial port debugging interface connected with the control chip.

[0017] Preferably, the single-chip microcomputer further comprises:

[0018] A reset module connected with a RESET port of the control chip.

[0019] Preferably, the RS485 conversion circuit comprises:

[0020] An RS485 chip used for signal conversion;

[0021] A first level conversion module connected between a RXD port of the control chip and an R port of the RS485 chip, used for performing level conversion on a level signal input by the RS485 chip and transmitting the converted level signal to the control chip;

[0022] A second level conversion module connected between a TXD port of the control chip and a D port of the RS485 chip, used for performing level conversion on a level signal output by the control chip and transmitting the converted level signal to the RS485 chip;

[0023] A third level conversion module connected between an EN port of the control chip and a DE port of the RS485 chip, used for controlling the RS485 chip to be in a signal sending state or a signal receiving state.

[0024] Preferably, the first level conversion module comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first NPN transistor, a first PNP transistor and a first capacitor;

[0025] Preferably, the first level conversion module comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first NPN transistor, a first PNP transistor and a first capacitor;

[0026] Preferably, the second level conversion module comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a second NPN transistor and a third NPN transistor;

[0027] Preferably, the second level conversion module comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a second NPN transistor and a third NPN transistor;

[0028] Preferably, the third level conversion module comprises a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a fourth NPN transistor and a fifth NPN transistor;

[0029] The first end of the twelfth resistor is connected with the EN port of the control chip, the second end of the twelfth resistor is connected with the base of the fourth NPN triode and the first end of the thirteenth resistor respectively, the emitter of the fourth NPN triode and the second end of the thirteenth resistor are grounded, the collector of the fourth NPN triode is connected with the first end of the fourteenth resistor, the first end of the fifteenth resistor and the base of the fifth NPN triode respectively, the second end of the fourteenth resistor is connected with the first voltage source, the emitter of the fifth NPN triode and the second end of the fifteenth resistor are grounded, the collector of the fifth NPN triode is connected with the first end of the sixteenth resistor, the DE port of the RS485 chip and the RE port of the RS485 chip respectively, and the second end of the sixteenth resistor is connected with the second voltage source.

[0030] Preferably, the power supply module comprises a power conversion chip, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, an eighteenth resistor and a light emitting diode.

[0031] The first end of the second capacitor is connected with the power supply and the first end of the third capacitor respectively, the second end of the second capacitor and the second end of the third capacitor are grounded, the first end of the third capacitor is connected with the input end of the power conversion chip, the output end of the power conversion chip is connected with the first end of the fourth capacitor, the first end of the fifth capacitor and the first end of the eighteenth resistor respectively, the second end of the fourth capacitor and the second end of the fifth capacitor are grounded, the second end of the eighteenth resistor is connected with the anode of the light emitting diode, and the cathode of the light emitting diode is grounded.

[0032] Correspondingly, the first end of the third capacitor is used for providing the second voltage source, and the first end of the fourth capacitor is used for providing the first voltage source.

[0033] Beneficial effects: in the data acquisition device test device provided by the utility model, single-chip microcomputer, RS485 conversion circuit, control module and power supply module for power supply of RS485 conversion circuit and single-chip microcomputer are arranged, wherein, single-chip microcomputer is used for storing the running data of target inverter.RS485 conversion circuit is used for signal conversion of the running data of target inverter, so as to convert the running data of target inverter into target conversion data recognizable by data acquisition device, and target conversion data is transmitted to data acquisition device.And control module is used for obtaining target conversion data through data acquisition device, so as to compare the running data of target inverter with preset data, if the running data of target inverter is consistent with preset data, it shows that the running performance of data acquisition device is good, and can pass aging test, if the running data of target inverter is inconsistent with preset data, it shows that data acquisition device appears aging or abnormality, and fails to pass aging test.

[0034] Compared with the prior art, in the utility model, when the data acquisition device is aging test, it is equivalent to replace the inverter for aging test of data acquisition device in the prior art with the smaller single-chip microcomputer module, because the volume of single-chip microcomputer module is smaller than that of inverter, and it is easy to carry, therefore, when the test device provided by the utility model is used to aging test of data acquisition device, not only the space volume occupation amount when the data acquisition device is aging test can be reduced, but also the efficiency when the data acquisition device is aging test can be further improved. BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced below, obviously, the drawings in the following description are only the embodiments of the utility model, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creating labor.

[0036] Figure 1 It is the schematic diagram for aging test of data acquisition device in the prior art;

[0037] Figure 2 It is the structure diagram of the test device of data acquisition device provided by the utility model embodiment;

[0038] Figure 3 It is the test device shown in the aging test of data acquisition device; Figure 2

[0039] Figure 4 It is the structure diagram of single-chip microcomputer provided by the utility model embodiment; ​

[0040] Figure 5 A structure diagram of an RS485 conversion circuit provided by the embodiment of the utility model;

[0041] Figure 6 A structure diagram of a power supply module provided by the embodiment of the utility model. CONCRETE EMBODIMENT

[0042] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.

[0043] Please refer to Figure 2 , Figure 2 A structure diagram of a test device of a data collector provided by the embodiment of the utility model, the test device comprising:

[0044] Connected with the RS485 port of the data collector, used for signal conversion on the running data of the target inverter, obtaining target conversion data, and transmitting the target conversion data to the RS485 conversion circuit 11 of the data collector;

[0045] Connected with the RS485 conversion circuit 11, used for storing the running data of the target inverter of the single-chip microcomputer 12;

[0046] Connected with the single-chip microcomputer 12 and the RS485 conversion circuit 11, used for the power supply module 13 for supplying power to the single-chip microcomputer 12 and the RS485 conversion circuit 11;

[0047] Connected with the RS485 conversion circuit 11 through the data collector, used for obtaining the target conversion data through the data collector, and comparing the target conversion data with the preset data, if the comparison result is consistent, determining that the data collector passes the aging test, if the comparison result is inconsistent, determining that the data collector does not pass the aging test of the control module 14.

[0048] In the embodiment, a test device of a data collector is provided, which is used for aging test on the data collector, can not only reduce the space volume required when aging test is performed on the data collector, but also can improve the efficiency when aging test is performed on the data collector.

[0049] The testing device includes an RS485 conversion circuit 11, a microcontroller 12, a power supply module 13, and a control module 14. The power supply module 13 supplies power to the RS485 conversion circuit 11 and the microcontroller 12. The microcontroller 12 stores the operating data of the target inverter. The RS485 conversion circuit 11 retrieves the operating data of the target inverter from the microcontroller 12 and converts it into data recognizable by the data acquisition unit. The data acquisition unit then uploads the converted data (i.e., the target inverter's operating data) to the control module 14, allowing the control module 14 to compare the target inverter's operating data with preset data. If the control module 14 determines that the target inverter's operating data matches the preset data, the data acquisition unit is performing well and passes the aging test. If the control module 14 determines that the target inverter's operating data is inconsistent with the preset data, the data acquisition unit's performance is abnormal and fails the aging test. The preset data represents data that characterizes the normal operation of the target inverter.

[0050] It should be noted that the target inverter's operating data includes the inverter's power generation, active power, reactive power, grid-connected power generation data, etc. During the aging test of the data acquisition device, the temperature, humidity, air pressure, and other parameters of its environment are pre-set according to the data acquisition device's usage requirements. The control module 14 can be a remote server located in the cloud.

[0051] In addition, in practical applications, RS485 conversion circuit 11 and microcontroller 12 can communicate via UART (Universal Asynchronous Receiver Transmitter).

[0052] The testing device for the data acquisition device provided in this application essentially integrates all the functional modules for aging tests on the data acquisition unit onto a single microcontroller module. Because the microcontroller module is much smaller than the inverter, it eliminates the need for the bulky heat dissipation system, PID control system, inverter control system, and signal control system found in inverters. This makes the aging test device for the data acquisition unit more compact and easier to transport.

[0053] Please see Figure 3 , Figure 3 To adopt Figure 2 The diagram shows the overall setup of the test apparatus used to perform an aging test on the data acquisition unit. Figure 3It can be seen that when the data collector is subjected to aging test, a plurality of test devices are connected on each RS485 port of the data collector, and the test devices are equivalent to a plurality of independent single-chip microcomputer modules. The operation data of the target inverter stored in the single-chip microcomputer in each single-chip microcomputer module can be distinguished by the serial number of the inverter, and the serial number of the inverter can represent the product model, model, production date and the like of the inverter.

[0054] Since the size of the circuit board of the single-chip microcomputer module can be as large as a playing card, compared with the aging test of the data collector by matching the inverter, the aging test of the data collector by using the single-chip microcomputer module can not only greatly reduce the space volume occupied, but also facilitate the carrying, disassembly and assembly of the aging test device, thereby greatly improving the efficiency of the aging test of the data collector.

[0055] Compared with the prior art, in the embodiment, the inverter for aging test of the data collector in the prior art is replaced by a smaller single-chip microcomputer module when the data collector is subjected to aging test. Since the volume of the single-chip microcomputer module is smaller than that of the inverter, the occupied space is smaller and easy to carry, so when the test device provided by the embodiment is used to test the data collector, not only the space volume occupied when the data collector is subjected to aging test can be reduced, but also the efficiency of the aging test of the data collector can be further improved.

[0056] Based on the above embodiment, the technical solutions are further described and optimized in the embodiment, please refer to Figure 4 , Figure 4 The structure diagram of the single-chip microcomputer provided by the embodiment of the utility model. As a preferred implementation, the single-chip microcomputer 12 comprises:

[0057] The control chip 120;

[0058] The memory 121 connected with the control chip 120;

[0059] The crystal oscillator Y connected between the OSCIN port and the OSCOUT end port of the control chip 120.

[0060] In the embodiment, the structure of the single-chip microcomputer 12 is specifically described. The single-chip microcomputer 12 is provided with a control chip 120, a memory 121 and a crystal oscillator Y. The memory 121 is used to store the running data of the target inverter. The control chip 120 is used to upload the running data of the target inverter stored in the memory 121 to the data collector through the RS485 conversion circuit 11. After the data collector receives the running data of the target inverter sent by the RS485 conversion circuit, the running data of the target inverter is sent to the control module 12. After the control module 12 receives the running data of the target inverter sent by the data collector, the running data of the target inverter is compared with the preset data. If the running data of the target inverter is consistent with the preset data, it means that the data collector can pass the aging test. The crystal oscillator Y is used to provide a stable clock signal to the control chip 120 in the circuit to ensure the normal and stable operation of the control chip 120.

[0061] It should be noted that in actual application, the memory 121 can be set as any type of memory as long as the purpose of storing the running data of the target inverter can be achieved. For example, the memory 121 can be set as a register, a flash memory, an EEPROM (Electrically Erasable Programmable Read Only Memory) and the like.

[0062] Obviously, through the technical scheme provided in the embodiment, it can be ensured that the single-chip microcomputer can accurately judge whether the data collector can pass the aging test.

[0063] As a preferred embodiment, the memory 121 is specifically a non-volatile memory.

[0064] Specifically, the memory 121 can be set as a non-volatile memory, for example, the memory 121 can be set as an SPI flash (Serial Peripheral Interface Flash Memory). Because the non-volatile memory 121 can store the running data of the target inverter even after power failure, by using the attribute characteristics of the non-volatile memory 121, the safety and reliability of storing the running data of the target inverter can be significantly improved.

[0065] When the memory 121 is set as the SPI Flash, the CS port, the DI port, the WP port, the CLK port and the DO port of the SPI Flash can be connected with the CS port, the DO port, the WP port, the CLK port and the DI port of the control chip 120 respectively, and the VCC port of the SPI Flash is connected with the first voltage source 3.3V and the first end of the capacitor C02 respectively, the second end of the capacitor C02 is grounded, and the GND port of the SPI Flash is grounded.

[0066] As a preferred embodiment, the single-chip microcomputer 12 further comprises:

[0067] The serial port debugging interface 122 connected with the control chip 120.

[0068] In the embodiment, the serial port debugging interface 122 (Serial Wire Debug interface, SWD interface) connected with the control chip 120 can also be arranged on the single-chip microcomputer 12. After the serial port debugging interface 122 is arranged in the single-chip microcomputer 12, the control chip 120 can download the running data of the target inverter from the computer through the serial port debugging interface 122, and store the running data of the target inverter in the memory 121.

[0069] Specifically, the serial port debugging interface 122 can be connected with the control chip 120 through the VCC port, the SWDIO port, the SWCLK port and the GND port on the control chip 120. The VCC port of the control chip 120 is also connected with the first voltage source 3.3V and the first end of the capacitor C03, and the second end of the capacitor C03 is grounded.

[0070] As a preferred embodiment, the single-chip microcomputer 12 further comprises:

[0071] The reset module 123 connected with the RESET port of the control chip 120.

[0072] In actual application, the control chip 120 will inevitably encounter some abnormal situations and cannot run normally. In this case, the reset module 123 can be used to reset the control chip 120 to ensure the normal operation of the control chip 120.

[0073] Specifically, the reset module 123 comprises the resistor R01 and the capacitor C01, wherein the RESET port of the control chip 120 is connected with the first end of the resistor R01 and the first end of the capacitor C01 respectively, the second end of the resistor R01 is connected with the first voltage source 3.3V, and the second end of the capacitor C01 is grounded.

[0074] Please refer to Figure 5 , Figure 5The utility model discloses a structure diagram of RS485 conversion circuit provided by an embodiment. As a preferred implementation, the RS485 conversion circuit 11 includes:

[0075] The RS485 chip 110 is used for signal conversion.

[0076] The first level conversion module 111 is connected between the RXD port of the control chip 120 and the R port of the RS485 chip 110, and is used for performing level conversion on the level signal input by the RS485 chip 110 and transmitting the converted level signal to the control chip 120.

[0077] The second level conversion module 112 is connected between the TXD port of the control chip 120 and the D port of the RS485 chip 110, and is used for performing level conversion on the level signal output by the control chip 120 and transmitting the converted level signal to the RS485 chip 110.

[0078] The third level conversion module 113 is connected between the EN port of the control chip 120 and the DE port of the RS485 chip 110, and is used for controlling whether the RS485 chip 110 is in a signal sending state or a signal receiving state.

[0079] In this embodiment, the structure of the RS485 conversion circuit 11 is specifically described. In the RS485 conversion circuit 11, the RS485 chip 110, the first level conversion module 111, the second level conversion module 112, and the third level conversion module 113 are arranged.

[0080] The RS485 chip 110 is the core device of the RS485 conversion circuit 11, and mainly functions to perform signal conversion. The first level conversion module 111 and the second level conversion module 112 are respectively used for converting the level signal input and output by the RS485 chip 110, and performing level conversion on the level signal output by the control chip, so as to ensure that the RS485 chip 110 and the control chip 120 can guarantee normal communication function. The third level conversion module 113 is used for controlling whether the RS485 chip 110 is in a signal sending state or a signal receiving state.

[0081] When the RS485 conversion circuit 11 obtains the running data of the target inverter from the memory 121 of the single-chip microcomputer 12, the running data of the target inverter is converted into target conversion data recognizable by the data collector, the target conversion data is collected by the data collector, and the target conversion data is transmitted to the control module 14. When the control module 14 receives the running data of the target inverter (target conversion data), the running data of the target inverter is compared with the preset data. If the running data of the target inverter is consistent with the preset data, it indicates that the data collector can pass the aging test. If the running data of the target inverter is inconsistent with the preset data, it indicates that the data collector fails to pass the aging test.

[0082] Obviously, through the technical scheme provided by the embodiment, the normal communication function between the control chip and the RS485 conversion circuit can be ensured.

[0083] As a preferred embodiment, the first level conversion module 111 comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first NPN triode Q1, a first PNP triode Q2, and a first capacitor C1.

[0084] The first end of the first resistor R1 is connected with the first end of the first capacitor C1 and the RXD port of the control chip, the second end of the first capacitor C1 is grounded, the second end of the first resistor R1 is connected with the first end of the second resistor R2 and the collector of the first NPN triode Q1, the second end of the second resistor R2 is connected with a first voltage source, the emitter of the first NPN triode Q1 is grounded, the base of the first NPN triode Q1 is connected with the first end of the third resistor R3 and the first end of the fourth resistor R4, the second end of the third resistor R3 is grounded, the second end of the fourth resistor R4 is connected with the collector of the first PNP triode Q2, the emitter of the first PNP triode Q2 is connected with a second voltage source, the emitter of the first PNP triode Q2 is connected with the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected with the base of the first PNP triode Q2 and the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected with the R port of the RS485 chip 110.

[0085] In the embodiment, the structure of the first level conversion module 111 is specifically described. The first level conversion module 111 can convert the level signal input by the RS485 chip 110 and transmit the converted level signal to the control chip 120, so that the one-way transmission of the level signal from the RS485 chip 110 to the control chip is realized.

[0086] As a preferred implementation, the second level conversion module 112 comprises a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a second NPN transistor Q3 and a third NPN transistor Q4;

[0087] The first end of the seventh resistor R7 is connected with the TXD port of the control chip, the second end of the seventh resistor R7 is connected with the base of the second NPN transistor Q3 and the first end of the eighth resistor R8 respectively, the second end of the eighth resistor R8 and the emitter of the second NPN transistor Q3 are grounded, the collector of the second NPN transistor Q3 is connected with the first end of the ninth resistor R9, the first end of the tenth resistor R10 and the base of the third NPN transistor Q4 respectively, the second end of the ninth resistor R9 is connected with the first voltage source, the second end of the tenth resistor R10 and the emitter of the third NPN transistor Q4 are grounded, the collector of the third NPN transistor Q4 is connected with the first end of the eleventh resistor R11 and the D port of the RS485 chip 110 respectively, and the second end of the eleventh resistor R11 is connected with the second voltage source.

[0088] In the embodiment, the structure of the second level conversion module 112 is specifically described. The second level conversion module 112 can convert the level signal output by the control chip 120, and transmit the converted level signal to the RS485 chip 110, so that the unidirectional transmission of the level signal between the control chip 120 and the RS485 chip 110 is realized.

[0089] As a preferred implementation, the third level conversion module 113 comprises a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a fourth NPN transistor Q5 and a fifth NPN transistor Q6;

[0090] The first end of the twelfth resistor R12 is connected with the EN port of the control chip, the second end of the twelfth resistor R12 is connected with the base of the fourth NPN transistor Q5 and the first end of the thirteenth resistor R13 respectively, the emitter of the fourth NPN transistor Q5 and the second end of the thirteenth resistor R13 are grounded, the collector of the fourth NPN transistor Q5 is connected with the first end of the fourteenth resistor R14, the first end of the fifteenth resistor R15 and the base of the fifth NPN transistor Q6 respectively, the second end of the fourteenth resistor R14 is connected with the first voltage source, the emitter of the fifth NPN transistor Q6 and the second end of the fifteenth resistor R15 are grounded, the collector of the fifth NPN transistor Q6 is connected with the first end of the sixteenth resistor R16, the DE port of the RS485 chip 110 and the RE port of the RS485 chip 110 respectively, and the second end of the sixteenth resistor R16 is connected with the second voltage source.

[0091] In the embodiment, the structure of the third level conversion module 113 is specifically described. The third level conversion module 113 provided by the embodiment controls whether the RS485 chip 110 is in a signal sending state or a signal receiving state. That is, the third level conversion module 113 can determine whether the first level conversion module 111 or the second level conversion module 112 in the RS485 conversion circuit 11 works, and determines the transmission direction of the level signal.

[0092] It should be noted that in the embodiment, the first voltage source refers to a voltage of 3.3V, and the second voltage source refers to a voltage of 5V. The output voltages of the first voltage source and the second voltage source are provided by the power supply module 13.

[0093] In actual application, the A port and the B port of the RS485 chip 110 are connected with the first end and the second end of the seventeenth resistor R17 respectively, and the first end and the second end of the seventeenth resistor R17 are connected with the RS485 port of the data collector respectively. The GND port of the RS485 chip 110 is grounded, the VCC port of the RS485 chip 110 is connected with the second voltage source 5V and the first end of the capacitor C03 respectively, and the second end of the capacitor C03 is grounded.

[0094] Based on the above embodiment, the technical scheme is further described and optimized in the embodiment, please refer to Figure 6 , Figure 6 The utility model discloses a structure diagram of a power supply module provided by the embodiment. As a preferred implementation, the power supply module 13 comprises: a power conversion chip 131, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, an eighteenth resistor R18 and a light emitting diode D.

[0095] The first end of the second capacitor C2 is connected with the power supply and the first end of the third capacitor C3 respectively, the second end of the second capacitor C2 and the second end of the third capacitor C3 are grounded, the first end of the third capacitor C3 is connected with the input end of the power conversion chip 131, the output end of the power conversion chip 131 is connected with the first end of the fourth capacitor C4, the first end of the fifth capacitor C5 and the first end of the eighteenth resistor R18 respectively, the second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are grounded, the second end of the eighteenth resistor R18 is connected with the anode of the light emitting diode D, and the cathode of the light emitting diode D is grounded.

[0096] Correspondingly, the first end of the third capacitor C3 is used to provide the second voltage source, and the first end of the fourth capacitor C4 is used to provide the first voltage source.

[0097] In the embodiment, the structure of the power supply module 13 is specifically described. The first voltage source is 3.3V voltage, and the second voltage source is 5V voltage. The power supply module 13 can convert the output voltage of the power supply source VIN into 5V and 3.3V output voltage through the internal power supply conversion chip 131, thereby achieving the purpose of supplying power to the single-chip microcomputer 12 and the RS485 conversion circuit 11.

[0098] When the power supply module 13 works normally, the light-emitting diode D is in the bright state. When the power supply module 13 works abnormally, the light-emitting diode D is in the extinguished state. The working state of the power supply module 13 can be directly observed through the display state of the light-emitting diode D.

[0099] The above description of disclosed embodiments enables those skilled in the art to carry out or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A test apparatus for a data collector, characterized by, The utility model relates to a data acquisition device for inverter, including: RS485 port of data acquisition device is connected with for target inverter's operation data carries out signal conversion, obtains target conversion data, and RS485 conversion circuit is transmitted to the target conversion data of data acquisition device; Single-chip microcomputer is connected with RS485 conversion circuit for storing target inverter's operation data; Power supply module is connected with single-chip microcomputer and RS485 conversion circuit for the power supply of single-chip microcomputer and RS485 conversion circuit; Control module is connected with RS485 conversion circuit through data acquisition device for obtaining target conversion data through data acquisition device, and target conversion data is compared with preset data, if the comparison result is consistent, then judges data acquisition device passes aging test, if the comparison result is not consistent, then judges data acquisition device does not pass aging test.

2. The test apparatus for a data collector of claim 1, wherein The utility model relates to a data acquisition device for inverter, including: Control chip; Memory is connected with control chip; Crystal is connected between the OSCIN port of control chip and the OSCOUT end port.

3. A test apparatus for a data collector according to claim 2, wherein The memory is nonvolatile memory.

4. The data collector testing apparatus of claim 2, wherein, The utility model relates to a data acquisition device for inverter, including: Serial debugging interface is connected with control chip.

5. The data collector testing apparatus of claim 2, wherein, The utility model relates to a data acquisition device for inverter, including: Reset module is connected with the RESET port of control chip.

6. The test apparatus for a data collector of claim 2, wherein, The utility model relates to a data acquisition device for inverter, including: RS485 chip for carrying out signal conversion; First level conversion module is connected between the RXD port of control chip and the R port of RS485 chip for the level conversion of level signal inputted by RS485 chip, and the level signal after conversion is transmitted to control chip; Second level conversion module is connected between the TXD port of control chip and the D port of RS485 chip for the level conversion of level signal outputted by control chip, and the level signal after conversion is transmitted to RS485 chip; Third level conversion module is connected between the EN port of control chip and the DE port of RS485 chip for controlling whether RS485 chip is in signal sending state or signal receiving state.

7. A test apparatus for a data logger according to claim 6, wherein The first level conversion module includes: first resistance, second resistance, third resistance, fourth resistance, fifth resistance, sixth resistance, first NPN triode, first PNP triode and first capacitor. The first end of the first resistor is connected with the first end of the first capacitor and the RXD port of the control chip respectively, the second end of the first capacitor is grounded, the second end of the first resistor is connected with the first end of the second resistor and the collector of the first NPN triode respectively, the second end of the second resistor is connected with the first voltage source, the emitter of the first NPN triode is grounded, the base of the first NPN triode is connected with the first end of the third resistor and the first end of the fourth resistor respectively, the second end of the third resistor is grounded, the second end of the fourth resistor is connected with the collector of the first PNP triode, the emitter of the first PNP triode is connected with the second voltage source, the emitter of the first PNP triode is connected with the first end of the fifth resistor, the second end of the fifth resistor is connected with the base of the first PNP triode and the first end of the sixth resistor respectively, and the second end of the sixth resistor is connected with the R port of the RS485 chip.

8. The test apparatus for a data collector of claim 6, wherein, The second level conversion module comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a second NPN triode and a third NPN triode. The first end of the seventh resistor is connected with the TXD port of the control chip, the second end of the seventh resistor is connected with the base of the second NPN triode and the first end of the eighth resistor respectively, the second end of the eighth resistor and the emitter of the second NPN triode are grounded, the collector of the second NPN triode is connected with the first end of the ninth resistor, the first end of the tenth resistor and the base of the third NPN triode respectively, the second end of the ninth resistor is connected with the first voltage source, the second end of the tenth resistor and the emitter of the third NPN triode are grounded, the collector of the third NPN triode is connected with the first end of the eleventh resistor and the D port of the RS485 chip respectively, and the second end of the eleventh resistor is connected with the second voltage source.

9. The test apparatus for a data collector of claim 6, wherein, The third level conversion module comprises a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a fourth NPN triode and a fifth NPN triode. The first end of the twelfth resistor is connected with the EN port of the control chip, the second end of the twelfth resistor is connected with the base of the fourth NPN triode and the first end of the thirteenth resistor respectively, the emitter of the fourth NPN triode and the second end of the thirteenth resistor are grounded, the collector of the fourth NPN triode is connected with the first end of the fourteenth resistor, the first end of the fifteenth resistor and the base of the fifth NPN triode respectively, the second end of the fourteenth resistor is connected with a first voltage source, the emitter of the fifth NPN triode and the second end of the fifteenth resistor are grounded, the collector of the fifth NPN triode is connected with the first end of the sixteenth resistor, the DE port of the RS485 chip and the RE port of the RS485 chip respectively, and the second end of the sixteenth resistor is connected with a second voltage source.

10. The test apparatus for a data collector of claim 1, wherein, The power supply module comprises a power conversion chip, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, an eighteenth resistor and a light emitting diode. The first end of the second capacitor is connected with a power supply and the first end of the third capacitor respectively, the second end of the second capacitor and the second end of the third capacitor are grounded, the first end of the third capacitor is connected with the input end of the power conversion chip, the output end of the power conversion chip is connected with the first end of the fourth capacitor, the first end of the fifth capacitor and the first end of the eighteenth resistor respectively, the second end of the fourth capacitor and the second end of the fifth capacitor are grounded, the second end of the eighteenth resistor is connected with the anode of the light emitting diode, and the cathode of the light emitting diode is grounded. Correspondingly, the first end of the third capacitor is used for providing a second voltage source, and the first end of the fourth capacitor is used for providing a first voltage source.

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