Vehicle-mounted LCD liquid crystal display screen overspeed broadcast control system

Abstract

The utility model relates to the technical field of overspeed broadcast control, and discloses a vehicle-mounted LCD liquid crystal display screen overspeed broadcast control system. Comprising a logic control circuit, a signal receiving circuit, an LCD display circuit, an alarm circuit and a power supply circuit, the logic control circuit is responsible for receiving a signal from a speed sensor, performing logic processing and judging whether a vehicle is overspeed or not according to a preset speed threshold value, and the logic control circuit is electrically connected with the signal receiving circuit, the LCD display circuit and the alarm circuit. Through the combined action of the logic control circuit and the signal receiving circuit, the system can monitor the running speed of a vehicle in real time, and gives an alarm through the LCD display screen and the alarm circuit when the vehicle is overspeed, so that the running safety is improved; the system adopts a modular design, all circuit modules are easy to integrate and maintain, and the complexity and the maintenance cost of the system are reduced; a driver can set a speed threshold value according to actual conditions so as to adapt to different road conditions and driving requirements.

Description

Technical Field

[0001] This utility model relates to the field of overspeed broadcast control technology, specifically an overspeed broadcast control system for a vehicle-mounted LCD screen. Background Technology

[0002] Speeding warning control typically refers to the setting and management of a vehicle's speeding reminder or alarm function. It can monitor the vehicle's speed in real time through a built-in speed sensor or by connecting to the vehicle's electronic system. When the vehicle speed exceeds a preset threshold, it will promptly inform the driver that they have exceeded the speed limit through sound and light alarms, voice prompts, or vibration alerts, prompting them to take measures to reduce their speed.

[0003] A search revealed that patent application number CN201621238112.1 discloses a vehicle overspeed warning instrument, comprising a warning instrument body and a vehicle speed sensing and measurement module. The surface of the warning instrument body is equipped with an LCD display panel, and the surface of the LCD display panel is provided with a weight display. A speed display is located to the right of the weight display, and an LED light is installed above the speed display. The speed display is installed to the left of an overload warning light, and an overspeed flashing light is installed to the right of the overload warning light. A satellite time synchronization electronic display is installed to the left of the LCD display panel, and a temperature display is installed to the right of the LCD display panel. This utility model, by installing a vehicle speed sensing and measurement module inside the overspeed warning instrument, and the vehicle speed sensing and measurement module containing a display, calculator, speed setter, and signal transmitter, can accurately calculate the vehicle speed and display it on the screen.

[0004] Most current in-vehicle LCD displays only have the function of displaying driving speed. When a vehicle exceeds the speed limit, the speeding information cannot be broadcast to the driver in a timely manner, which reduces driving safety. The voice broadcast function of current in-vehicle displays is mostly an integrated design, which increases the complexity of the system and is not conducive to maintenance. Therefore, we need to propose an in-vehicle LCD display speeding broadcast control system. Utility Model Content

[0005] The purpose of this invention is to provide a vehicle-mounted LCD display screen overspeed warning control system. Through the combined action of logic control circuits and signal receiving circuits, the system can monitor the vehicle's speed in real time and issue warnings through the LCD display screen and alarm circuit when speeding occurs, thereby improving driving safety. The system adopts a modular design, making it easy to integrate and maintain the various circuit modules, reducing the system's complexity and maintenance costs. Drivers can set speed thresholds according to actual conditions to adapt to different road conditions and driving needs, thus solving the problems mentioned in the background art.

[0006] To achieve the above objectives, this utility model provides the following technical solution: a vehicle-mounted LCD screen overspeed warning control system, comprising:

[0007] The logic control circuit is responsible for receiving signals from the speed sensor, performing logic processing, and determining whether the vehicle is speeding based on a preset speed threshold.

[0008] A signal receiving circuit that receives signals from a speed sensor;

[0009] An LCD display circuit that can display the vehicle's speed and overspeed alarm information on an LCD screen;

[0010] An alarm circuit that triggers an alarm signal when the vehicle speed exceeds a preset threshold;

[0011] A power supply circuit that provides stable power to logic control circuits, signal receiving circuits, LCD display circuits, and alarm circuits;

[0012] The logic control circuit is electrically connected to the signal receiving circuit, the LCD display circuit, and the alarm circuit, respectively.

[0013] Preferably, the logic control circuit includes terminal block J1, terminal block J2, voltage regulator chip U1, voltage regulator chip U2, and logic control chip U3. Pin 1 of voltage regulator chip U1 and pin 1 of voltage regulator chip U2 are both connected to pin 5 of terminal block J1. A circuit breaker F1 is connected between pin 3 of voltage regulator chip U1 and pin 1 of terminal block J1.

[0014] Preferably, a capacitor C1 and a diode D1 are connected in parallel between pin 1 and pin 3 of the voltage regulator chip U1; a capacitor C2 and a capacitor C3 are connected in parallel between pin 4 of the voltage regulator chip U1 and pin 3 of the voltage regulator chip U2, and between pin 1 of the voltage regulator chip U1 and pin 1 of the voltage regulator chip U2; and a capacitor C4 and a capacitor C5 are connected in parallel between pin 1 and pin 4 of the voltage regulator chip U2.

[0015] Preferably, the signal receiving circuit includes an analog-to-digital converter chip U6 and a terminal block P3 for a speed sensor. A resistor R20 is connected between pin 11 of the analog-to-digital converter chip U6 and pin 3 of the terminal block P3. A resistor R21 is connected between pin 10 of the analog-to-digital converter chip U6 and pin 4 of the terminal block P3. A capacitor C28, a series-connected ferrite bead FB4, and a capacitor C27 are connected to pin 12 of the analog-to-digital converter chip U6.

[0016] Preferably, the LCD display circuit includes a connected chip U4 and a connector P9. A capacitor C100 is connected to pin 5 of the connector P9, a capacitor C90 is connected between pins 6 and 7 of the connector P9, a capacitor C80 is connected between pins 8 and 9 of the connector P9, pin 12 of the connector P9 is connected to pin 40 of the chip U4, pin 13 of the connector P9 is connected to pin 39 of the chip U4, pin 22 of the connector P9 is connected to pin 28 of the chip U4, pin 23 of the connector P9 is connected to pin 27 of the chip U4, and pin 24 of the connector P9 is connected to pin 26 of the chip U4.

[0017] Preferably, the alarm circuit includes a terminal block JP1, an amplifier IC1A, an amplifier IC1B, and a transistor Q3. Resistors R19 and R29 are connected in parallel to pin 2 of amplifier IC1A and pin 6 of amplifier IC1B. Pin 1 of terminal block JP1 is connected to pin 5 of amplifier IC1A. An adjustable resistor RP1 is connected to pin 4 of amplifier IC1A. Capacitors E1 and C41 are connected in parallel between pins 2 and 3 of terminal block JP1.

[0018] Preferably, a resistor R10 connected to the power supply voltage and a resistor R11 grounded are connected to pin 7 of the amplifier IC1B. A resistor R14 is connected between pin 1 of the amplifier IC1B and the base of the transistor Q3. A resistor R12 connected in parallel, a light-emitting diode LED2 connected in series, and a resistor R49 are also connected to pin 1 of the amplifier IC1B. A resistor R14 is connected between the base and emitter of the transistor Q3. A resistor R15 is connected to the collector of the transistor Q3.

[0019] Compared with the prior art, the beneficial effects of this utility model are:

[0020] 1. Through the combined action of logic control circuit and signal receiving circuit, this utility model enables the system to monitor the vehicle's speed in real time and issue warnings via LCD display and alarm circuit when speeding occurs, thereby improving driving safety.

[0021] 2. The system of this utility model adopts a modular design, which makes it easy to integrate and maintain the various circuit modules, reducing the complexity and maintenance cost of the system; the driver can set the speed threshold according to the actual situation to adapt to different road conditions and driving needs.

[0022] 3. The LCD display screen of this utility model not only provides clear speed information, but can also display other vehicle status information, such as fuel level and mileage, providing drivers with comprehensive vehicle status monitoring and ensuring that drivers can clearly read the information under any lighting conditions. Attached Figure Description

[0023] Figure 1 This is a circuit diagram of the logic control circuit of this utility model;

[0024] Figure 2 This is a circuit diagram of the signal receiving circuit of this utility model;

[0025] Figure 3 This is a circuit diagram of the LCD display circuit of this utility model;

[0026] Figure 4 This is the circuit diagram of the alarm circuit of this utility model;

[0027] Figure 5 This is a system block diagram of the present invention. Detailed Implementation

[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0029] Please see Figure 1-5 This utility model provides a technical solution: a vehicle-mounted LCD screen overspeed warning control system, comprising:

[0030] The logic control circuit is responsible for receiving signals from the speed sensor, performing logic processing, and determining whether the vehicle is speeding based on a preset speed threshold.

[0031] The logic control circuit includes terminal block J1, terminal block J2, voltage regulator chip U1, voltage regulator chip U2, and logic control chip U3. Pin 1 of voltage regulator chip U1 and pin 1 of voltage regulator chip U2 are both connected to pin 5 of terminal block J1. A circuit breaker F1 is connected between pin 3 of voltage regulator chip U1 and pin 1 of terminal block J1.

[0032] A capacitor C1 and a diode D1 are connected in parallel between pins 1 and 3 of the voltage regulator chip U1. A capacitor C2 and a capacitor C3 are connected in parallel between pin 4 of the voltage regulator chip U1 and pin 3 of the voltage regulator chip U2, and between pin 1 of the voltage regulator chip U1 and pin 1 of the voltage regulator chip U2. A capacitor C4 and a capacitor C5 are connected in parallel between pins 1 and 4 of the voltage regulator chip U2.

[0033] The 5V power supply is connected to the input pin (IN) of chip U1 after passing through circuit breaker F1 (rated current 0.5A) and diode D1 (withstand voltage 7.5V). Chip U1 regulates the 5V voltage to 3.3V, and the output pin (OUT) is connected to multiple capacitors for filtering to stabilize the output voltage. The 3.3V power supply network is labeled VDD3.3 and supplies power to multiple parts of the circuit.

[0034] The 5V power supply is also connected to the input pin (IN) of chip U2, which regulates the 5V voltage to 1.2V. The output pin (OUT) is connected to a capacitor filter. The 1.2V power supply network is labeled VDD1.2 and supplies power to a specific part of the circuit.

[0035] It also includes a series resistor R1 and a light-emitting diode V1, used to indicate the circuit's operating status or power supply status. When the circuit is powered on, the light-emitting diode V1 will light up.

[0036] It also includes a series resistor R3 and a button K1 for resetting the circuit or controlling other functions. When button K1 is pressed, the circuit connection state changes.

[0037] The J2 connector is a 2*7-2.0 interface with 14 pins labeled with signals such as TMS, TCK, TDO, and TDI. It is used to connect external debugging or programming devices, such as the JTAG interface, for programming and debugging programmable chips in the circuit.

[0038] The logic control chip U3 is the main programmable logic device in the circuit. It has multiple pins, including power supply pins such as Vcc, GND, HOLDA, and Vs, as well as pins for data input / output and clock control, such as CS, DO, DI, and CLK. The operating clock of the logic control chip U3 is provided by a Y1 crystal oscillator (50MHz). The crystal oscillator is connected between the CLK pin and GND of the logic control chip U3, providing a stable clock signal to ensure that the chip can operate according to the predetermined timing.

[0039] A signal receiving circuit that receives signals from a speed sensor;

[0040] The signal receiving circuit includes an analog-to-digital converter chip U6 and a speed sensor terminal block P3. A resistor R20 is connected between pin 11 of the analog-to-digital converter chip U6 and pin 3 of the terminal block P3. A resistor R21 is connected between pin 10 of the analog-to-digital converter chip U6 and pin 4 of the terminal block P3. A capacitor C28, a series-connected ferrite bead FB4, and a capacitor C27 are connected to pin 12 of the analog-to-digital converter chip U6.

[0041] Resistor R20 (5.1KΩ) and capacitor C24 (10nF) form a filter circuit. Resistor R21 (5.1KΩ) and capacitors C25 (0.1uF) and C26 (10nF) also form a filter circuit. The combination of these capacitors and resistors can filter out high-frequency noise in the power supply and ensure stable circuit operation.

[0042] The analog-to-digital converter chip U6 communicates with the outside world via an SPI interface. The SPI signal is used to control the chip's operating mode and data transmission.

[0043] Pins 1 (AIN2), 6 (AIN3 / REFN1), 11 (AIN0 / REFP1), and 8 (REFN0) of the analog-to-digital converter chip U6 are analog input pins used to receive external analog signals. Pins 9 (REFP0) and 5 (AVSS) of the analog-to-digital converter chip U6 are used for setting and connecting the reference voltage. The reference voltage is very important for the chip's analog signal processing, as it determines the chip's measurement accuracy and range.

[0044] Pin 3 (CLK) of the analog-to-digital converter chip U6 is connected to AGND through resistor R22 (100KΩ), and pin 4 (DGND) is directly grounded, providing the chip with a stable clock signal and a good grounding environment to ensure the chip's normal operation.

[0045] An LCD display circuit that can display the vehicle's speed and overspeed alarm information on an LCD screen;

[0046] The LCD display circuit includes a connected chip U4 and a connector P9. A capacitor C100 is connected to pin 5 of the connector P9. A capacitor C90 is connected between pins 6 and 7 of the connector P9. A capacitor C80 is connected between pins 8 and 9 of the connector P9. Pin 12 of the connector P9 is connected to pin 40 of the chip U4. Pin 13 of the connector P9 is connected to pin 39 of the chip U4. Pin 22 of the connector P9 is connected to pin 28 of the chip U4. Pin 23 of the connector P9 is connected to pin 27 of the chip U4. Pin 24 of the connector P9 is connected to pin 26 of the chip U4.

[0047] Pins 5 (VSS_IO_1) and 31 (VSSIO_2) of chip U4 are connected to ground (GND) to provide ground references for the chip's input / output sections. Pins 14 (VDDA) and 29 (VSSA) of chip U4 are connected to the 3.3V power supply and ground, respectively, to power the analog section of the chip and provide grounding. Pin 1 (NRST) of chip U4 is the reset pin, used for chip reset operations, and the reset function can be implemented through external circuitry. Pins 2 (OSC_IN) and 3 (OSC_OUT) of chip U4 are used to connect to an external crystal oscillator to provide clock signals for the chip and ensure the normal operation timing of the chip. Pins 4 (PD0 / UART3_RX) and 7 (PD2 / UART3_TX) of chip U4 can be configured as input or output modes as needed to connect to external devices or sensors to realize data input and output functions.

[0048] Pins 16 (LCM_SDA), 17 (LCM_SCLK), 18 (LCM_RST), 19 (LCM_CD), and 20 (LCM_CS0) of terminal block P9 are used to connect to the liquid crystal display module (LCM) to realize data communication and control with the liquid crystal display module. SDA and SCLK are used for I2C communication, RST is used to reset the liquid crystal module, CD is used for command data selection, and CS0 is used for chip select.

[0049] An alarm circuit that triggers an alarm signal when the vehicle speed exceeds a preset threshold;

[0050] The alarm circuit includes a terminal block JP1, amplifier IC1A, amplifier IC1B, and transistor Q3. Resistors R19 and R29 are connected in parallel to pin 2 of amplifier IC1A and pin 6 of amplifier IC1B. Pin 1 of terminal block JP1 is connected to pin 5 of amplifier IC1A. An adjustable resistor RP1 is connected to pin 4 of amplifier IC1A. Capacitors E1 and C41 are connected in parallel between pins 2 and 3 of terminal block JP1.

[0051] The amplifier IC1B has a resistor R10 connected to the power supply voltage and a resistor R11 connected to ground at pin 7. A resistor R14 is connected between pin 1 of the amplifier IC1B and the base of transistor Q3. A resistor R12 is connected in parallel, a light-emitting diode LED2 is connected in series, and a resistor R49 is connected to pin 1 of the amplifier IC1B. A resistor R14 is connected between the base and emitter of transistor Q3, and a resistor R15 is connected to the collector of transistor Q3.

[0052] The input signal is initially filtered by a filter circuit consisting of resistor R39 (20KΩ) and capacitor C42 (103, i.e. 0.01uF) to remove some interference signals before being transmitted to subsequent circuits.

[0053] The input signal is connected to the non-inverting input (pin 5) of amplifier IC1A, and the inverting input (pin 4) is connected to ground (GND) via potentiometer RP1 (100KΩ). The reference voltage of the comparator can be set by adjusting the adjustable resistor RP1. When the input signal voltage is higher than the reference voltage, the output of amplifier IC1A (pin 2) outputs a high level; otherwise, it outputs a low level.

[0054] The output signal of amplifier IC1A is divided by resistors R10 (50KΩ) and R11 (50KΩ) and then connected to the non-inverting input (pin 7) of amplifier IC1B. The inverting input (pin 6) of amplifier IC1B is connected to VCC through resistor R12 (20KΩ) and to ground (GND) through resistor R49 (5.1KΩ), forming a fixed reference voltage. Amplifier IC1B also acts as a comparator, comparing the input signal again.

[0055] A red LED (LED2) and resistor R14 (4.7KΩ) are connected to the output (pin 1) of amplifier IC1B. When amplifier IC1B outputs a high level, LED2 lights up. Additionally, the output of amplifier IC1B is connected to the base of transistor Q3 (SS8550), with current limited by resistor R15 (20KΩ). The collector of transistor Q3 is connected to a buzzer (BEEP). When amplifier IC1B outputs a high level, transistor Q3 conducts, and the buzzer sounds, serving as an alarm.

[0056] A power supply circuit that provides stable power to logic control circuits, signal receiving circuits, LCD display circuits, and alarm circuits;

[0057] The logic control circuit is electrically connected to the signal receiving circuit, the LCD display circuit, and the alarm circuit, respectively. The signal receiving circuit is mainly used to receive signals from speed detection devices such as Hall sensors. These signals reflect the real-time driving speed of the vehicle. The signal receiving circuit can accurately capture speed changes and provide reliable data input for the logic control circuit.

[0058] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A kind of vehicle-mounted LCD liquid crystal display screen overspeed broadcast control system, it is characterized in that, The application relates to a speed monitoring system for a vehicle. The speed monitoring system comprises: a logic control circuit for receiving signals from a speed sensor and performing logical processing and judging whether the vehicle is overspeed according to a preset speed threshold value; a signal receiving circuit for receiving signals from the speed sensor; an LCD display circuit for displaying the running speed of the vehicle and overspeed alarm information on an LCD liquid crystal display screen; an alarm circuit for triggering an alarm signal when the running speed of the vehicle exceeds the preset threshold value; a power supply circuit for providing stable power supply for the logic control circuit, the signal receiving circuit, the LCD display circuit and the alarm circuit; 2. The system according to claim 1, wherein the system further comprises a speed sensor for detecting the speed of the vehicle. the logic control circuit is electrically connected with the signal receiving circuit, the LCD display circuit and the alarm circuit.

3. The system according to claim 2, wherein the system further comprises a speed sensor. The logic control circuit comprises a terminal block J1, a terminal block J2, a voltage stabilizing chip U1, a voltage stabilizing chip U2 and a logic control chip U3, the 1-pin of the voltage stabilizing chip U1 and the 1-pin of the voltage stabilizing chip U2 are connected to the 5-pin of the terminal block J1, and a circuit breaker F1 is connected between the 3-pin of the voltage stabilizing chip U1 and the 1-pin of the terminal block J1.

4. The system according to claim 1, characterized in that: Capacitors C1 and diodes D1 are connected in parallel between the 1-pin and the 3-pin of the voltage stabilizing chip U1, capacitors C2 and C3 are connected in parallel between the 4-pin of the voltage stabilizing chip U1 and the 3-pin of the voltage stabilizing chip U2 and between the 1-pin of the voltage stabilizing chip U1 and the 1-pin of the voltage stabilizing chip U2, and capacitors C4 and C5 are connected in parallel between the 1-pin and the 4-pin of the voltage stabilizing chip U2.

5. The system according to claim 1, characterized in that: The signal receiving circuit comprises an analog-digital conversion chip U6 and a terminal block P3 of a speed sensor, a resistor R20 is connected between the 11-pin of the analog-digital conversion chip U6 and the 3-pin of the terminal block P3, a resistor R21 is connected between the 10-pin of the analog-digital conversion chip U6 and the 4-pin of the terminal block P3, and capacitors C28, magnetic beads FB4 and capacitors C27 are connected to the 12-pin of the analog-digital conversion chip U6.

6. The system according to claim 1, characterized in that: The LCD display circuit comprises a connected chip U4 and a terminal block P9, a capacitor C100 is connected to the 5-pin of the terminal block P9, a capacitor C90 is connected between the 6-pin and the 7-pin of the terminal block P9, a capacitor C80 is connected between the 8-pin and the 9-pin of the terminal block P9, the 12-pin of the terminal block P9 is connected to the 40-pin of the chip U4, the 13-pin of the terminal block P9 is connected to the 39-pin of the chip U4, the 22-pin of the terminal block P9 is connected to the 28-pin of the chip U4, the 23-pin of the terminal block P9 is connected to the 27-pin of the chip U4, and the 24-pin of the terminal block P9 is connected to the 26-pin of the chip U4. The alarm circuit comprises a terminal block JP1, amplifiers IC1A and IC1B and a triode Q3, resistors R19 and R29 are connected in parallel to the 2-pin of the amplifier IC1A and the connection end of the 6-pin of the amplifier IC1B, the 1-pin of the terminal block JP1 is connected with the 5-pin of the amplifier IC1A, an adjustable resistor RP1 is connected to the 4-pin of the amplifier IC1A, and capacitors E1 and C41 are connected in parallel between the 2-pin and the 3-pin of the terminal block JP1.

7. The system according to claim 6, characterized in that: The 7-pin of the amplifier IC1B is connected with the resistance R10 for power supply voltage and the resistance R11 for grounding respectively, the 1-pin of the amplifier IC1B is connected with the resistance R14 between the base of the triode Q3, the 1-pin of the amplifier IC1B is also connected with the resistance R12, the serially connected light emitting diode LED2 and the resistance R49 arranged in parallel, the resistance R14 is connected between the base and the emitter of the triode Q3, and the resistance R15 is connected to the collector of the triode Q3.

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