Photoelectric packaging structure

Abstract

A photoelectric packaging structure comprises a substrate, a photoelectric chip, a lead and a packaging piece. The substrate includes a conductive member. The photoelectric chip is arranged on the substrate. The lead comprises a first connection section, an extension section and a second connection section, one end of the first connection section is connected with the photoelectric chip, one end of the second connection section is connected with the conductive member of the substrate, two ends of the extension section are respectively connected with the other end of the first connection section and the other end of the second connection section, and a first bending angle is formed between the extension section and the first connection section; a second bending angle is formed between the extending section and the second connecting section, and the first bending angle and the second bending angle are both larger than or equal to 90 degrees. The packaging piece is arranged on the substrate and wraps the photoelectric chip and the lead. Through the structural design, the stress borne by the lead can be reduced, and the probability of routing failure is reduced.

Description

TECHNICAL FIELD

[0001] The utility model relates to a packaging structure, especially relates to a photoelectric packaging structure. BACKGROUND

[0002] Wire bonding is a common technology in the existing integrated circuit packaging industry, which is a technology of connecting a chip and a lead frame by using a micron wire diameter metal wire.

[0003] Because of the large amount of wire bonding, the wire bonding is very time-consuming. Moreover, the solder pads on the chip and the metal pins of the lead frame can only be made around them. Therefore, when the chip needs to transmit more electrical signals, more leads are needed. In a limited space, wire bonding is prone to failure due to stress concentration, which in turn affects the performance of the packaging structure.

[0004] Therefore, how to reduce the stress borne by the lead through structural design, improve the efficiency of the wire bonding process, increase the yield, save the manufacturing cost, and overcome the above problems has become one of the important topics in this technical field. SUMMARY

[0005] One of the technical problems to be solved by the utility model is that in the existing packaging structure, the number of wire bonding in a limited space is large, and wire bonding failure is prone to occur due to stress concentration. The utility model provides a photoelectric packaging structure to reduce the stress borne by the lead, improve the efficiency of the wire bonding process, increase the yield, and save the manufacturing cost.

[0006] The utility model provides a photoelectric packaging structure, which comprises a substrate, at least one photoelectric chip, a lead, and a packaging member. The substrate has a first surface and a second surface opposite to the first surface, and the substrate comprises a conductive member. The at least one photoelectric chip is arranged on at least one of the first surface and the second surface of the substrate. The lead comprises a first connecting segment, an extension segment, and a second connecting segment. One end of the first connecting segment is connected to the at least one photoelectric chip, one end of the second connecting segment is connected to the conductive member of the substrate, and the two ends of the extension segment are respectively connected to the other end of the first connecting segment and the other end of the second connecting segment. The extension segment and the first connecting segment have a first bending angle, and the extension segment and the second connecting segment have a second bending angle. Both the first bending angle and the second bending angle are greater than or equal to 90 degrees. The packaging member is arranged on the substrate and covers the at least one photoelectric chip and the lead.

[0007] According to a feasible implementation, the second bending angle is also less than or equal to 150 degrees.

[0008] According to a feasible implementation, in the vertical direction, the vertical distance between the highest point of the wire arc of the lead and the top surface of the at least one photoelectric chip is 0.5-1.5 times the thickness of the at least one photoelectric chip.

[0009] According to an embodiment, the vertical distance between the highest point of the wire loop and the top surface of the at least one optoelectronic chip is greater than or equal to 7 mil and less than or equal to 10 mil, and the maximum distance between the highest point of the wire loop and the first surface in the vertical direction is defined as the wire loop height, and the wire loop height is in the range of 1.5 times to 2.5 times of the vertical distance.

[0010] According to an embodiment, the ratio of the distance between the surface of the package and the first surface to the thickness of the at least one optoelectronic chip is 3.5-4.5.

[0011] According to an embodiment, the at least one optoelectronic chip is a light emitting chip, a sensor chip, a driving chip, or a combination thereof.

[0012] According to an embodiment, the distance between the surface of the package and the highest point of the wire loop is in the range of 1-20 mil.

[0013] According to an embodiment, the Shore hardness of the package is less than or equal to 50.

[0014] According to an embodiment, the surface of the package is a smooth surface.

[0015] According to an embodiment, the optoelectronic packaging structure further comprises a protective film covering the surface of the package.

[0016] According to an embodiment, the second connecting segment is connected to the conductive member of the substrate via a solder ball, the second connecting segment is connected to one end of the conductive member to define a connecting end, the solder ball comprises a first soldering portion and a second soldering portion, and the connecting end is located between the first soldering portion and the second soldering portion.

[0017] According to an embodiment, the second connecting segment is connected to the conductive member of the substrate via a solder ball, the second connecting segment is connected to one end of the conductive member to define a connecting end, and the connecting end is covered by the solder ball and is not exposed.

[0018] According to an embodiment, the thickness of the solder ball in the vertical direction is less than or equal to 10 μm.

[0019] According to an embodiment, the optoelectronic packaging structure further comprises a shell, the shell is located on the substrate and surrounds the at least one optoelectronic chip and the package, and the surface of the package is flush with or lower than the top surface of the shell.

[0020] According to an embodiment, the diameter of the wire is less than 1.2 mil.

[0021] One of the beneficial effects of this utility model is that, according to one embodiment, the optoelectronic packaging structure provided by this utility model can reduce the stress on the leads by designing the leads (there is a first bending angle between the extension section and the first connecting section, and a second bending angle between the extension section and the second connecting section, and both the first bending angle and the second bending angle are greater than or equal to 90 degrees).

[0022] Another beneficial effect of this invention is that, according to one embodiment, when the ratio of the distance between the surface of the package and the first surface to the thickness of the optoelectronic chip is 3.5-4.5, the stress on the leads can also be reduced. Furthermore, according to some embodiments, when the leads extend 7-10 mil above the optoelectronic chip, the stress on the leads can be significantly reduced. In addition, since the stress is relieved, the package can be reduced in size, and the diameter (wire diameter) of the leads can be reduced, maintaining the same effect while saving costs.

[0023] Furthermore, according to one embodiment, the optoelectronic packaging structure of this utility model, through lead wire and packaging structure design, can alleviate the stress on the leads and reduce the failure rate of wire bonding. Therefore, in terms of process, it can improve the product yield and reliability, achieve better light emission effect and service life, and reduce process cost.

[0024] To further understand the features and technical content of this utility model, please refer to the following detailed description and drawings of this utility model. However, the drawings provided are for reference and illustration only and are not intended to limit this utility model. Attached Figure Description

[0025] Figure 1 This is a three-dimensional perspective view of an embodiment of the optoelectronic packaging structure of this utility model.

[0026] Figure 2 for Figure 1 A stereoscopic perspective view of another embodiment shown.

[0027] Figure 3 for Figure 1 The illustrated embodiment is a cross-sectional schematic diagram.

[0028] Figure 4 This is a partial cross-sectional schematic diagram of an embodiment of the optoelectronic packaging structure of this utility model, showing only the substrate, optoelectronic chip, leads, and package.

[0029] Figure 5 This is a schematic diagram showing the relationship between the second connecting segment and the solder ball in one embodiment of the present invention. Detailed Implementation

[0030] The following is to illustrate the embodiment of the photoelectric packaging structure disclosed by the present application through specific embodiments. The advantages and effects of the present application can be understood by the person skilled in the art according to the disclosure. The present application can be implemented or applied through other different embodiments, and each detail in the specification can be modified and changed based on different viewpoints and applications without departing from the concept of the present application. In addition, the drawings of the present application are only simple schematic illustrations, and are not the actual size. The following embodiments will further illustrate the related technical content of the present application, but the disclosed content is not used to limit the protection scope of the present application.

[0031] It should be understood that although the terms "first", "second", "third" and the like can be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one signal from another signal. In addition, the term "or" used herein can include any one or more combinations of the associated listed items.

[0032] Please refer to Figures 1 to 4 , Figure 1 is a perspective view of an embodiment of the photoelectric packaging structure of the present application. Figure 2 is Figure 1 a perspective view of another view of the embodiment shown. Figure 3 is Figure 1 a cross-sectional view of the embodiment shown. Figure 4 is a partial cross-sectional view of an embodiment of the photoelectric packaging structure of the present application. It should be particularly noted that, in order to more clearly illustrate the relationship between the first angle, the second angle, and the substrate, the photoelectric chip, the lead wire, and the packaging member, and other components, Figure 4 only the substrate, the photoelectric chip, the lead wire, and the packaging member are shown.

[0033] The photoelectric packaging structure Z comprises a substrate 1, at least one photoelectric chip 2, a lead 3 and a package 4. The substrate 1 has a first surface 11 and a second surface 12 opposite to the first surface 11, and the substrate 1 comprises a conductive member 13. The substrate 1 is, for example, a printed circuit board, a conductive support or a base body with a patterned conductive layer. The conductive member 13 can be, for example, a solder pad or a metal pattern layer. The at least one photoelectric chip 2 is arranged on the first surface 11 of the substrate 1. In the present embodiment, the at least one photoelectric chip 2 is electrically connected to the conductive member 13 of the substrate 1 by the lead 3 in a wire bonding manner. The at least one photoelectric chip 2 can be a light-emitting chip, a sensing chip, a driving chip or a combination thereof, but the present application is not limited thereto. For example, the photoelectric chip 2 can be a light-emitting diode (LED) or a laser diode (LD), such as a visible light-emitting diode, an infrared light-emitting diode (IR LED). Alternatively, the photoelectric chip 2 can be a phototransistor (PTR), a photo diode or a photo IC.

[0034] Figure 1 In the present embodiment, the at least one photoelectric chip 2 is taken as an example of a light-emitting chip, and the number of the light-emitting chips 2 is not limited to one, but can be multiple. The multiple light-emitting chips 2 can have the same or different wavelengths, such as red light-emitting chips, blue light-emitting chips or green light-emitting chips. In the present embodiment, the at least one photoelectric chip 2 is composed of light-emitting diodes emitting different colors, and can emit a light beam with a wavelength ranging from 200 nm to 1100 nm, but the present application is not limited to the above examples.

[0035] In some embodiments, the lead 3 is a metal lead, such as a gold wire or a copper wire. One end of the lead 3 is connected to the light-emitting chip 2, and the other end of the lead 3 is connected to the conductive member 13 of the substrate 1. The lead 3 has at least two bending points. Specifically, the lead 3 comprises a first connecting segment 31, an extension segment 32 and a second connecting segment 33. One end of the first connecting segment 31 is connected to the light-emitting chip 2, one end of the second connecting segment 33 is connected to the conductive member 13 of the substrate 1, and the two ends of the extension segment 32 are respectively connected to the other end of the first connecting segment 31 and the other end of the second connecting segment 33. The extension segment 32 and the first connecting segment 31 have a first bending angle a, and the extension segment 32 and the second connecting segment 33 have a second bending angle β (see Figure 3 and Figure 4 ). The first bending angle a and the second bending angle β are both greater than or equal to 90 degrees.

[0036] According to Figure 3In the illustrated embodiment, the shape of the lead 3 includes two bending points, such as two outward convex bending points. The first bending angle a is greater than or equal to 90 degrees, and the second bending angle β is less than or equal to 150 degrees. The first bending angle a and the second bending angle β can be arranged in combination. It is worth noting that in other embodiments, the shape of the lead 3 can include more than two bending points, such as three (that is, the lead 3 also includes a third bending angle), and the present application is not limited thereto.

[0037] In addition, the maximum distance between the highest point of the wire arc of the lead 3 and the first surface 11 in the vertical direction D1 is defined as the wire arc height H1, and the distance between the highest point of the wire arc of the lead 3 and the top surface of the light emitting chip 2 in the vertical direction D1 is defined as a vertical distance h1. In other words, the wire arc height H1 is the thickness T1 of the light emitting chip 2 plus the aforementioned vertical distance h1. In the illustrated embodiment, the thickness T1 of the light emitting chip 2 is greater than the vertical distance h1. Figure 3 In the illustrated embodiment, the thickness T1 of the light emitting chip 2 can be 0.5-1.5 times the vertical distance h1, that is, the numerical range of the wire arc height H1 is 1.5 times to 2.5 times the vertical distance h1.

[0038] Further, please refer to Figure 3 In the present embodiment, the highest point of the wire arc is located at the connection between the first connection segment 31 and the extension segment 32, and the plane where the extension segment 32 is located is substantially parallel to the first surface 11 of the substrate 1 (see Figure 3 The vertical distance h1 between the extension segment 32 and the top surface of the light emitting chip 2 in the vertical direction D1 can be greater than or equal to 7 mil and less than or equal to 10 mil, but the present application is not limited to the above-mentioned example. In other embodiments, the highest point of the wire arc of the lead 3 can also be located at the extension segment 32 (for example, including another bending point), and the vertical distance h1 between the highest point and the top surface of the light emitting chip 2 in the vertical direction D1 can be greater than or equal to 7 mil and less than or equal to 10 mil. With this structure, the stress of the lead 3 can be buffered to avoid damage to the lead 3. In the simulation of thermal stress, the results measured according to this structure show that the stress of the lead 3 can be reduced by about 25%. In addition, in some embodiments, the diameter (wire diameter) of the lead 3 can also be less than 1.2 mil, for example, the diameter (wire diameter) of the lead 3 can be reduced to 1.0 mil, which not only can maintain the same effect but also can save the cost of metal leads.

[0039] Further Figure 3 In the present embodiment, the package 4 includes a first package layer 4a and a second package layer 4b, but the present application is not limited thereto. In other embodiments, when the light emitting chip 2 and / or the driving chip 6 are located on the same side, the second package layer 4b can be omitted. For example, Figure 3As shown, a first encapsulation layer 4a is disposed on the first surface 11 of the substrate 1, and the encapsulation 4 (first encapsulation layer 4a) covers the light-emitting chip 2 and the lead 3. The distance between the surface 41 of the first encapsulation layer 4a and the first surface 11 along the vertical direction D1 is H2, and its ratio to the thickness T1 of the light-emitting chip 2 is 3.5-4.5 (relationship: H2 / T1=3.5-4.5). Therefore, the stress release process inside the encapsulation 4 (first encapsulation layer 4a) is relatively smooth, which can further reduce the stress on the lead 3 by about 5-6%. According to some embodiments, along the vertical direction D1, the distance H3 between the surface 41 of the encapsulation 4 (first encapsulation layer 4a) and the highest point of the arc of the lead 3 can be greater than or equal to 1, for example, 1-20 mil. Based on this embodiment, not only can the amount of encapsulation 4 (first encapsulation layer 4a) be saved, but the highest point of the lead 3 will not be relatively close to the surface 41 of the encapsulation 4 (first encapsulation layer 4a) and thus will not be subject to stress damage due to thermal shock.

[0040] According to some embodiments, the Shore hardness of the package 4 is less than or equal to 50, such as Shore D25, Shore D35, Shore D50, etc., but is not limited to this example. In some embodiments, the water absorption rate (water permeability) of the package 4 can be further improved by some dehumidification treatment to reduce the impact of thermal shock caused by moisture in the package 4 on the lead 3. According to some other embodiments, the surface 41 of the package 4 (first encapsulation layer 4a) is a smooth surface, for example, formed by surface treatment to form a dense and smooth surface, which can further prevent moisture ingress. In other embodiments, a protective film (not shown) can also be provided on the surface 41 of the package 4 (first encapsulation layer 4a). The protective film covers the surface 41 of the package 4 (first encapsulation layer 4a) to prevent moisture ingress, thereby reducing the impact of thermal shock caused by moisture ingress on the lead 3, and thus improving the product yield and reliability.

[0041] in accordance with Figure 3 In the illustrated embodiment, the optoelectronic packaging structure Z may further include a housing 7. The housing 7 is disposed on the substrate 1, surrounding the light-emitting chip 2, leads 3, and package 4 (first encapsulation layer 4a). Specifically, the housing 7 and the substrate 1 define a first accommodating space C1, in which the light-emitting chip 2 and leads 3 are located, and the first encapsulation layer 4a fills the first accommodating space C1 and covers the light-emitting chip 2 and leads 3. The surface 41 of the first encapsulation layer 4a does not extend beyond the top surface 71 of the housing 7, for example, it may be flush with or lower than the top surface 71 of the housing 7. Figure 3As shown, the surface 41 of the first encapsulation layer 4a is lower than the top surface 71 of the housing 7. This structure, through the design of the lead 3, not only reduces the stress on the lead 3, but also saves on the amount of encapsulation component 4 (first encapsulation layer 4a) and manufacturing costs.

[0042] For example, the encapsulation 4 (first encapsulation layer 4a) is formed by filling the first accommodating space C1 with a light-transmitting adhesive material. The light-transmitting adhesive material includes, but is not limited to, light-transmitting epoxy resins (e.g., transparent or colored epoxy resins) or other light-transmitting resins or polymers. In some embodiments, the light-transmitting molding compound may have pigments or other properties that filter out certain irrelevant wavelengths of light while allowing relevant wavelengths of light to pass through; however, the present invention is not limited to the examples given above.

[0043] Furthermore, the housing 7 is formed of plastic by injection molding. In some embodiments, the housing 7 has high reflectivity, thus concentrating the light beam emitted by the light-emitting chip 2 and directing it to a light-emitting surface (the light-emitting surface defined in this embodiment is, for example, surface 41 of the package 4). For example, the housing 7 can be made of a light-reflective molding compound, such as a light-reflective epoxy resin (which can be white, silver, or other colored epoxy resin) or other light-reflective resins or polymers, thus forming a reflective cup, but is not limited thereto. In other applications, the housing 7 can also be a dark-colored housing, such as a black housing. More precisely, a reflective layer can be formed on the bottom and sides of the first accommodating space C1 (i.e., the first surface 11 of the substrate 1 and the inner wall surface of the housing 7) as required.

[0044] According to some embodiments, at least one optoelectronic chip 2 in the optoelectronic packaging structure Z may include a light-emitting chip or a driver chip. For ease of understanding and explanation, please refer to [reference needed]. Figure 3 The driving chip 6 can be located on the same side or opposite side of the light-emitting chip 2. Figure 3 In the illustrated embodiment, the driving chip 6 is located on the second surface 12 of the substrate 1 on the opposite side of the light-emitting chip 2. In this embodiment, the housing 7 may further include a second accommodating space C2 opposite to the first accommodating space C1, with the driving chip 6 located in the second accommodating space C2 and electrically connected to the conductive member 13 of the substrate 1 via a wire bonding method using leads 3. However, this invention is not limited to the examples described above. It should be noted that in other embodiments, when the light-emitting chip 2 and / or the driving chip 6 are located on the same side, the housing 7 may omit the second accommodating space C2.

[0045] Please refer to the detailed structure. Figure 5The package 4 further includes a second packaging layer 4b. The first packaging layer 4a is located in the first accommodating space C1, and the second packaging layer 4b is located in the second accommodating space C2. The second packaging layer 4b fills the second accommodating space C2 and covers the driver chip 6 and the lead 3. The design of the lead 3 and the second packaging layer 4b can be the same as in the previous embodiment, so the similarities will not be repeated here.

[0046] Please see Figure 5 This is a schematic diagram illustrating the relationship between the second connecting segment and the solder ball according to an embodiment of the present invention. ​ As shown, the second connecting segment 33 is connected to one end of the conductive member 13 of the substrate 1, defined as the connecting end 331. The solder ball 5 includes a first soldering portion 51 and a second soldering portion 52, and the connecting end 331 is located between the first soldering portion 51 and the second soldering portion 52. In other words, the connecting end 331 is clamped and completely covered by the first soldering portion 51 and the second soldering portion 52, thereby preventing the connecting end 331 from being exposed to the solder ball 5. This avoids the known situation where the connecting end is easily subjected to stress and tension due to being exposed to the solder ball, or other reasons that cause the soldered area to peel off, resulting in the overall failure of the optoelectronic packaging structure Z. However, this utility model is not limited to the examples mentioned above. Other methods that can achieve the goal of not exposing the connecting end 331 to the solder ball 5 are also possible, with the aim of making the soldering of the connecting end 331 to the corresponding soldered area (e.g., the electrode) more reliable. Furthermore, the connecting end 331 is completely covered by the solder ball 5, and the thickness T2 of the solder ball 5 in the vertical direction D1 is less than or equal to 10 μm.

[0047] "Beneficial effects of the embodiments"

[0048] According to one embodiment, the optoelectronic packaging structure provided by this utility model significantly reduces the stress on the leads and lowers the probability of wire bonding failure by: "having a first bending angle between the extension section of the lead and the first connecting section, and a second bending angle between the extension section and the second connecting section, both the first bending angle and the second bending angle being greater than or equal to 90 degrees"; "the vertical distance between the highest point of the lead arc and the top surface of the optoelectronic chip along the vertical direction is 0.5-1.5 times the thickness of the optoelectronic chip"; and "the ratio of the distance between the surface of the package and the surface of the substrate to the thickness of the optoelectronic chip is 3.5-4.5". Furthermore, because the stress is relieved, the package size can be reduced, and the diameter (wire diameter) of the leads can be decreased, maintaining the same effect while saving costs.

[0049] In summary, the optoelectronic packaging structure of this utility model, through the design of the lead wire and packaging structure, can alleviate the stress on the lead wire and reduce the failure rate of wire bonding. Therefore, in terms of process, it can improve the product yield and reliability, achieve better light emission effect and service life, and reduce process cost.

[0050] The above disclosed is only the preferred feasible embodiment of the utility model, and does not limit the protection scope of the utility model's claims, so that all equivalent technical changes made by applying the utility model specification and the attached drawings are included in the protection scope of the utility model's claims.

Claims

1. An optoelectronic package structure, comprising: The optoelectronic packaging structure comprises: a substrate having a first surface and a second surface opposite to the first surface, and the substrate comprising a conductive member; at least one optoelectronic chip disposed on at least one of the first surface and the second surface of the substrate; a lead wire comprising a first connecting segment, an extending segment and a second connecting segment, one end of the first connecting segment being connected to the at least one optoelectronic chip, one end of the second connecting segment being connected to the conductive member of the substrate, two ends of the extending segment being connected to the other end of the first connecting segment and the other end of the second connecting segment respectively, the extending segment and the first connecting segment having a first bending angle therebetween, the extending segment and the second connecting segment having a second bending angle therebetween, the first bending angle and the second bending angle both being greater than or equal to 90 degrees; and a packaging member disposed on the substrate and covering the at least one optoelectronic chip and the lead wire.

2. The optoelectronic package structure of claim 1, wherein, The second bending angle is also less than or equal to 150 degrees.

3. The optoelectronic package structure of claim 1, wherein, In a vertical direction, a vertical distance between a line-arc highest point of the lead wire and a top surface of the at least one optoelectronic chip is 0.5-1.5 times of a thickness of the at least one optoelectronic chip.

4. The optoelectronic package structure of claim 1, wherein, In a vertical direction, a vertical distance between a line-arc highest point of the lead wire and a top surface of the at least one optoelectronic chip is greater than or equal to 7 mil and less than or equal to 10 mil, and a maximum distance between the line-arc highest point and the first surface in the vertical direction is defined as a line-arc height, the line-arc height being in a range of 1.5-2.5 times of the vertical distance.

5. The optoelectronic package structure of any one of claims 1 to 4, wherein, A ratio of a distance between a surface of the packaging member and the first surface to a thickness of the at least one optoelectronic chip is 3.5-4.

5.

6. The optoelectronic package structure of claim 5, wherein, The at least one optoelectronic chip is a light-emitting chip, a sensing chip, a driving chip or a combination thereof.

7. The optoelectronic package structure of claim 5, wherein, A distance between the surface of the packaging member and the line-arc highest point of the lead wire is in a range of 1-20 mil.

8. The optoelectronic package structure of claim 5, wherein, A Shore hardness of the packaging member is less than or equal to 50.

9. The optoelectronic package structure of claim 5, wherein, The surface of the packaging member is a smooth surface.

10. The optoelectronic package structure of claim 5, wherein, The optoelectronic packaging structure further comprises a protective film covering the surface of the packaging member.

11. The optoelectronic package structure of claim 1, wherein, The second connecting segment is connected to the conductive member of the substrate via a solder ball, one end of the second connecting segment defining a connecting end, the connecting end being covered by the solder ball without being exposed.

12. The optoelectronic package structure of claim 1, wherein, The second connecting segment is connected to the conductive member of the substrate via a solder ball, one end of the second connecting segment defining a connecting end, the connecting end being covered by the solder ball without being exposed.

13. The optoelectronic package structure of claim 11 or 12, wherein, A thickness of the solder ball in a vertical direction is less than or equal to 10 μm.

14. The optoelectronic package structure of claim 1, wherein, The optoelectronic packaging structure further comprises a shell, the shell being located on the substrate and surrounding the at least one optoelectronic chip and the packaging member, the surface of the packaging member being flush with or lower than a top surface of the shell.

15. The optoelectronic package structure of claim 1, wherein, A diameter of the lead wire is less than 1.2 mil.

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