Power supply circuit and CMOS image sensor data acquisition system
By combining a low-dropout linear regulator and a power gating circuit with a current detection circuit, the problem of limited power chip types in CMOS image sensor data acquisition systems is solved, enabling flexible power management and current detection, and improving design freedom and usage flexibility.
Patent Information
- Application Number
- CN202520024017.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-06
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2035-01-06
AI Technical Summary
In existing CMOS image sensor data acquisition systems, the limited types of power supply chips make it difficult to replace them when the power output is not compatible, resulting in high costs, poor flexibility of use, and a lack of customizable current acquisition algorithms, leading to low design freedom.
By employing a low-dropout linear regulator, a power selection circuit, and a current detection circuit, the power output path is controlled through a power output control signal, enabling flexible adjustment of power supply voltage and current. Combined with a remote feedback circuit, the flexibility and accuracy of power management are improved.
It enables power supply output control based on power consumption requirements, improving the design freedom and usage flexibility of CMOS image sensor data acquisition systems, reducing the cost of replacing power supply chips, and supporting custom adjustment of various power supply voltages and currents.
Smart Images
Figure CN223843849U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power supply technology, and in particular to a power supply circuit and a CMOS image sensor data acquisition system. Background Technology
[0002] With the popularization of semiconductor technology and the improvement of urbanization, the application scope of CMOS image sensors is becoming increasingly wide. Their main application areas include security monitoring, smartphones, computer systems, electric intelligent vehicles, industrial monitoring, medical fields, and defense and aerospace technologies. As the CMOS image sensor market grows, the demand for supporting CMOS image sensor testing systems is also increasing, especially in consumer electronics products such as the widespread use of multiple cameras in mobile phones. ODM manufacturers need to use CMOS image sensor data acquisition systems to debug and assess the performance of CMOS image sensors before products leave the factory.
[0003] In existing technologies, the power supply module in a CMOS image sensor data acquisition system, such as Figure 1 As shown, the commonly used approach is a single power supply chip management scheme, where power output and current acquisition are both handled by a single power supply chip. The CPU controls the power supply chip's functions via instructions. However, if the power output does not meet the requirements of the CMOS image sensor, the limited selection of power supply chips due to the high requirements of CMOS image sensors for analog power supplies makes replacing the incompatible chip difficult, costly, and inflexible. Furthermore, the current acquisition algorithm cannot be customized, further restricting the design freedom of the CMOS image sensor data acquisition system. Therefore, it is necessary to provide an improved power supply scheme to overcome the above-mentioned technical problems in the existing technology. Utility Model Content
[0004] The purpose of this application is to provide a power supply circuit and a CMOS image sensor data acquisition system that can control the power supply output according to power consumption requirements, thereby improving the design freedom of the CMOS image sensor data acquisition system.
[0005] To achieve the above objectives:
[0006] In a first aspect, embodiments of this application provide a power supply circuit, including a low-dropout linear regulator, a power selection circuit, and a current detection circuit;
[0007] The low-dropout linear regulator is used to provide a stable power supply voltage;
[0008] The power selection circuit is connected to the low dropout linear regulator. The power selection circuit is provided with at least one power output path, which is used to conduct the corresponding power output path according to the input power output control signal, and convert the power voltage into an output voltage corresponding to the power output control signal.
[0009] The current detection circuit is connected to the power selection circuit and is used to detect the output current of the conducting power output path.
[0010] Optionally, each of the power output paths includes a first switching module, a second switching module, and a voltage regulation module;
[0011] When the first switching module receives the power output control signal, it generates a control voltage to control the second switching module to turn on.
[0012] When the second switching module is in the conducting state under the control of the control voltage, it is used to provide the power supply voltage to the voltage regulation module;
[0013] The voltage regulation module is used to regulate the power supply voltage to a preset output voltage for output.
[0014] Optionally, the first switching module includes a first switching element, a current-limiting resistor, and a pull-up resistor;
[0015] The control terminal of the first switching element is connected to the power supply output control signal through the current limiting resistor; the first path terminal of the first switching element is connected to the power supply through the pull-up resistor, and the second path terminal of the first switching element is grounded.
[0016] Optionally, the second switching module includes a second switching element; the control terminal of the second switching element is connected to the first path terminal of the first switching element; the first path terminal of the second switching element is connected to the output terminal of the low dropout linear regulator; and the second path terminal of the second switching element is connected to the voltage regulation module.
[0017] Optionally, the voltage regulation module includes at least one voltage divider resistor for dividing the power supply voltage to obtain a preset output voltage.
[0018] Optionally, the first switching element is a transistor, and the second switching element is a metal-oxide-semiconductor field-effect transistor.
[0019] Optionally, the power selection circuit includes three parallel power output paths, namely a first power output path, a second power output path, and a third power output path; the power output control signal includes a first power output control signal, a second power output control signal, and a third power output control signal.
[0020] When the first power output path receives the first power output control signal, it is used to convert the power supply voltage into a first preset output voltage corresponding to the first power output control signal.
[0021] When the second power output path receives the second power output control signal, it is used to convert the power supply voltage into a second preset output voltage corresponding to the second power output control signal;
[0022] When the third power output path receives the third power output control signal, it is used to convert the power supply voltage into a third preset output voltage corresponding to the third power output control signal.
[0023] Optionally, the current detection circuit includes a filter circuit and an analog-to-digital converter; the filter circuit includes a first resistor, a second resistor, and a capacitor;
[0024] The positive input terminal of the analog-to-digital converter is connected to the power supply voltage output by the low dropout linear regulator through the first resistor, and the negative input terminal of the analog-to-digital converter is connected to the output voltage converted by the power output path through the second resistor.
[0025] The capacitor is connected in parallel between the first resistor and the second resistor.
[0026] Optionally, the power supply circuit further includes a remote feedback circuit; the remote feedback circuit includes an operational amplifier, the positive input terminal of which is connected to the load, and the output terminal of which is connected to the feedback terminal of the low dropout linear regulator. The operational amplifier amplifies the voltage signal fed back from the load and feeds it back to the low dropout linear regulator so that the low dropout linear regulator can regulate the output power supply voltage.
[0027] Secondly, embodiments of this application provide a CMOS image sensor data acquisition system, including the power supply circuit described above.
[0028] The power supply circuit and CMOS image sensor data acquisition system provided in this application embodiment offer a stable power supply voltage through a low-dropout linear regulator. A power output control signal controls the conduction of the corresponding power output path in the power selection circuit, converting the power supply voltage into an output voltage corresponding to the power output control signal. A current detection circuit detects the output current of the conducted power output path. This allows for control of the power supply output according to power consumption requirements, improving the design freedom of the CMOS image sensor data acquisition system. Attached Figure Description
[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 This is a schematic diagram of the power supply structure in a CMOS image sensor data acquisition system in the prior art.
[0031] Figure 2 This is a schematic diagram of the power supply circuit provided in one embodiment of this application.
[0032] Figure 3 This is a schematic diagram of the power selection circuit provided in one embodiment of this application.
[0033] Figure 4 This is a schematic diagram of the current detection circuit provided in one embodiment of this application.
[0034] Figure 5 This is a schematic diagram of the structure of a remote feedback circuit provided in an embodiment of this application.
[0035] Figure 6 This is a schematic diagram of the structure of a CMOS image sensor data acquisition system provided in an embodiment of this application. Detailed Implementation
[0036] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0037] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.
[0038] It should be understood that although the terms first, second, third, etc., may be used herein to describe various information, such information should not be limited to these terms. These terms are used only to distinguish information of the same type from one another. For example, without departing from the scope of this document, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if," as used herein, can be interpreted as "when," "when," or "in response to determination." Furthermore, as used herein, the singular forms "a," "an," and "the" are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms "comprising," "including," indicate the presence of the stated feature, step, operation, element, component, item, kind, and / or group, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms "or" and "and / or" as used herein are to be interpreted as inclusive, or mean any one or any combination thereof. Therefore, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A, B, and C". Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.
[0039] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.
[0040] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.
[0041] Figure 2 This is a schematic diagram of the power supply circuit provided in an embodiment of this application. Figure 2As shown, the power supply circuit 100 provided in this embodiment includes a low dropout linear regulator (LDO) 110, a power selection circuit 120, and a current detection circuit 130.
[0042] The low-dropout linear regulator 110 is used to provide a stable power supply voltage. The power selection circuit 120 is connected to the low-dropout linear regulator 110. The power selection circuit 120 is provided with at least one power output path, which is used to conduct the corresponding power output path according to the input power output control signal, and convert the power supply voltage into an output voltage corresponding to the power output control signal. The current detection circuit 130 is connected to the power selection circuit 120 and is used to detect the output current of the conducted power output path.
[0043] In this embodiment, the power output control signal is issued by the central processing unit (CPU) to the corresponding power output path according to the power consumption requirements of the load. For example... Figure 2 As shown, in a CMOS image sensor data acquisition system, during testing of the CMOS image sensor, the CPU sets the output voltage value of the digital-to-analog converter (DAC) connected to the system power supply via the SPI bus, and outputs an enable signal through the GPIO interface to control the LDO to regulate the power supply voltage output by the DAC. Based on the power consumption requirements of the CMOS image sensor in its operating or standby state, the CPU generates a power output control signal corresponding to the power consumption requirement, controlling the corresponding power output path in the power selection circuit to be in the conducting state. This power output path adjusts the power supply voltage output by the LDO to a preset output voltage to meet the operating requirements of the CMOS image sensor. Flexible control of the power supply output through the power selection circuit can meet different power consumption requirements of the load, avoiding the increased cost and poor flexibility caused by replacing the power supply chip.
[0044] Figure 3 This is a schematic diagram of a power selection circuit provided in an embodiment of this application. Figure 3 As shown, the power selection circuit 120 in this embodiment includes three parallel power output paths: a first power output path 121, a second power output path 122, and a third power output path 123. The power output control signals include a first power output control signal, a second power output control signal, and a third power output control signal.
[0045] Specifically, Figure 3Taking the analog power supply voltage required by a CMOS image sensor as an example, the first power output control signal, the second power output control signal, and the third power output control signal are A_Ctrl_mA, A_Ctrl_μA, and A_Ctrl_nA signals, respectively. When the first power output path 121 receives the first power output control signal (A_Ctrl_mA), it converts the power supply voltage input to LDO110 into a first preset output voltage corresponding to the first power output control signal. When the second power output path receives the second power output control signal (A_Ctrl_μA), it converts the power supply voltage input to LDO110 into a second preset output voltage corresponding to the second power output control signal. When the third power output path receives the third power output control signal (A_Ctrl_nA), it converts the power supply voltage input to LDO110 into a third preset output voltage corresponding to the third power output control signal.
[0046] In this embodiment, each power output path includes a first switch module 1211, a second switch module 1212, and a voltage regulation module 1213. When the first switch module 1211 receives a power output control signal, it generates a control voltage to control the second switch module 1212 to conduct. When the second switch module 1212 is in a conducting state under the control of the control voltage, it provides the power voltage to the voltage regulation module 1213. The voltage regulation module 1213 regulates the power voltage to a preset output voltage for output.
[0047] The first switching module includes a first switching element, a current-limiting resistor, and a pull-up resistor. The control terminal of the first switching element is connected to the power supply output control signal through the current-limiting resistor. The first path terminal of the first switching element is connected to the power supply through the pull-up resistor, and the second path terminal of the first switching element is grounded. The second switching module includes a second switching element. The control terminal of the second switching element is connected to the first path terminal of the first switching element. The first path terminal of the second switching element is connected to the output terminal of the low-dropout linear regulator. The second path terminal of the second switching element is connected to the voltage regulation module. The voltage regulation module includes at least one voltage divider resistor for dividing the power supply voltage to obtain a preset output voltage.
[0048] Specifically, Figure 3Taking a transistor as the first switching element and a metal-oxide-semiconductor field-effect transistor (MOSFET) as the second switching element, the first switching element in the first power output path 121 is a first transistor Q26, and the second switching element is a first NMOS transistor Q25. The base of the first transistor Q26 is connected through a first current-limiting resistor R157, the collector of the first transistor Q26 is connected to a 12V power supply through a first pull-up resistor R144, and the emitter of the first transistor Q26 is grounded. The gate of the first NMOS transistor Q25 in the first power output path 121 is connected to the collector of the first transistor Q26, the source of the first NMOS transistor Q25 is connected to the output terminal AAVDD+ of the LDO110, and the drain of the first NMOS transistor Q25 is connected to the first voltage divider resistor R154. The first switching element in the second power output path 122 is a second transistor Q38, and the second switching element is a second NMOS transistor Q37. The base of the second transistor Q38 is connected through the second current-limiting resistor R177, and the collector of the second transistor Q38 is connected to a 12V power supply through the second pull-up resistor R180. The emitter of the second transistor Q38 is grounded. The gate of the second NMOS transistor Q37 in the second power output path 122 is connected to the collector of the second transistor Q38, and the source of the second NMOS transistor Q37 is also connected to the output terminal AAVDD+ of the LDO110. The drain of the second NMOS transistor Q37 is connected to the second voltage divider resistor R171. The first switching element in the third power output path 123 is the third transistor Q42, and the second switching element is the third NMOS transistor Q41. The base of the third transistor Q42 is connected through the third current-limiting resistor R191, and the collector of the third transistor Q42 is connected to a 12V power supply through the third pull-up resistor R180. The emitter of the third transistor Q42 is grounded. The gate of the third NMOS transistor Q41 in the third power output path 123 is connected to the collector of the third transistor Q42, and the source of the third NMOS transistor Q41 is also connected to the output terminal AAVDD+ of the LDO110. The drain of the third NMOS transistor Q41 is connected to the third voltage divider resistor R187.
[0049] It should be noted that the voltage regulation module in this application embodiment may include a single resistor with a preset impedance, or it may include multiple resistors connected in series to achieve a preset impedance. In one embodiment of this application, the first voltage divider resistor R154, the second voltage divider resistor R171, and the third voltage divider resistor R187 are set to 150mΩ, 150Ω, and 150KΩ, respectively. When the CMOS image sensor is working normally, the CPU sends a first power output control signal A_Ctrl_mA to the power selection circuit, controlling the first transistor Q26 to turn on. The gate voltage of the first NMOS transistor Q25 is pulled up by the first pull-up resistor R144, so that when the voltage difference between the gate (G) and source (S) of the first NMOS transistor Q25 exceeds the threshold voltage Vgs of the first NMOS transistor Q25, that is, when |Vgs|>|Vth|, the first NMOS transistor Q25 turns on, thereby turning on the entire first power output path 121. The analog power supply voltage (such as AVDD2.8V) output by LDO110 is divided by the first voltage divider resistor R154 of 150 mΩ and then supplied to the CMOS image sensor. When the CMOS image sensor is in standby mode, the CPU sends a second power output control signal A_Ctrl_μA or a third power output control signal A_Ctrl_nA based on the standby power consumption of the CMOS image sensor. For example, when the standby power consumption of the CMOS image sensor is less than 1mA, the CPU sends the second power output control signal A_Ctrl_μA to the power selection circuit 120, enabling the second power output path 122. This reduces the analog power supply voltage AVDD output by the LDO110 through the 150Ω second voltage divider resistor R171, causing the current input to the CMOS image sensor from the power supply circuit to be less than 1mA. Similarly, when the standby power consumption of the CMOS image sensor is less than 1μA, the CPU sends the third power output control signal A_Ctrl_nA to the power selection circuit 120, enabling the third power output path 123. This reduces the analog power supply voltage AVDD output by the LDO110 through the 150KΩ third voltage divider resistor R187, causing the current input to the CMOS image sensor from the power supply circuit to be less than 1μA. In this embodiment, based on the power consumption requirements of the CMOS image sensor, the corresponding power output path in the power selection circuit is controlled to be turned on, thereby controlling the current value provided by the power supply circuit to the CMOS image sensor. This achieves flexible control of the power supply output, thus replacing the power output management function of the power chip.
[0050] Figure 4 This is a schematic diagram of the current detection circuit provided in one embodiment of this application. Figure 4As shown, in one embodiment of this application, the current detection circuit 130 includes a filter circuit and an analog-to-digital converter (ADC) IC1. The filter circuit includes a first resistor R45, a second resistor R49, and a capacitor C51. The positive input terminal (AIN3+) of the ADC IC1 is connected to the power supply voltage (AAVDD+) output by the LDO110 through the first resistor R45, and the negative input terminal (AIN3-) of the ADC IC1 is connected to the output voltage (AAVDD-) after power output path conversion through the second resistor R49. The capacitor C51 is connected in parallel between the first resistor R45 and the second resistor R49, forming a π-shaped filter circuit to filter the voltage difference across the power selection circuit. The ADC IC1 reports the voltage difference between AIN3+ and AIN3- to the CPU via the SPI bus, and the CPU calculates the corresponding current value according to a preset current conversion algorithm. Since the operating current of a CMOS image sensor is dynamic within a frame period, in practical applications, to acquire a stable current value, the sampling rate of the ADC can be increased. For example, setting the encoding and reading speed of the ADC to 480Hz can reflect the changes in current in real time.
[0051] It should be noted that CMOS image sensors require not only the corresponding analog power supply voltage AVDD, but also corresponding digital voltages, such as DOVDD 1.8V and DVDD 0.9V. Each power supply voltage is connected to a corresponding power selection circuit through an LDO, and is output through the corresponding power selection circuit. The structure of the power selection circuit for digital voltages is similar to that for analog power supply voltages, and will not be elaborated here. Figure 4 As shown in one embodiment of this application, an ADC chip can simultaneously acquire three power supply voltages, thus saving circuit design costs and layout area.
[0052] Figure 5 This is a schematic diagram of a remote feedback circuit provided in one embodiment of this application. Because CMOS image sensors have very high requirements for analog power supplies, in one embodiment of this application, such as... Figure 5As shown, the power supply circuit 100 also includes a remote feedback circuit. The remote feedback circuit includes an operational amplifier U23. The positive input terminal +INA of the operational amplifier U23 is connected to the load (i.e., the analog power supply voltage connection terminal A_AVDD_S of the CMOS image sensor), and the output terminal OUTA of the operational amplifier U23 is connected to the feedback terminal (FB) of the LDO. The operational amplifier U23 amplifies the voltage signal fed back from the load and feeds it back to the low-dropout linear regulator (LDRL) for the LDRL to regulate the output power supply voltage, achieving voltage following. In this embodiment, by connecting the operational amplifier in series on the remote feedback line, not only can the actual input voltage of the remote CMOS image sensor be effectively fed back, but it can also play an isolation role, eliminating high-frequency interference and leakage current problems caused by the LDO direction, thereby achieving low-noise power supply, improving imaging performance, and enabling the image horizontal stripe ratio to reach 20 at single magnification and above 28 at high magnification.
[0053] Based on the same inventive concept as the foregoing embodiments, this application also provides a CMOS image sensor data acquisition system. For example... Figure 6 As shown, the CMOS image sensor data acquisition system includes a power supply, a fan, a network transmission interface, an HDMI display module, a USB communication interface, a central processing unit (CPU), and the power supply circuit 100 provided in the above embodiment. The power supply provides electrical energy to each module in the system; the fan is responsible for cooling the internal circuit modules during system operation; the network transmission interface is responsible for uploading the image data acquired by the CMOS image sensor to a host computer for analysis to obtain image performance indicators such as dark shading, recurrent tomographic network (HRN), vertical fixed-mode noise (VFPN), horizontal fixed-mode noise (HFPN), and black level correction (BLC); the HDMI display module provides a programming visualization system, eliminating the need for a host computer to compile and download code to the system, allowing code modification tasks to be executed locally on the device, thus significantly improving the efficiency of data acquisition tasks. The power supply circuit 100 supplies power to each circuit module in the CMOS image sensor, enabling stepless voltage adjustment and power consumption detection for the CMOS image sensor. In this embodiment, the CPU uses an NVIDIA Orin processor with powerful computing capabilities to achieve data acquisition of up to 4Gsps. It supports four 10 Gigabit Ethernet ports to simultaneously acquire data at 30fps, transmits the image data from the CMOS image sensor to the host computer for analysis, and can monitor key indicators such as the power consumption of the CMOS image sensor in real time.
[0054] In summary, the power supply circuit and CMOS image sensor data acquisition system provided in this application embodiment control the power output path of the corresponding power supply by controlling the power selection circuit, thereby controlling the power supply output according to power consumption requirements. This avoids the problems of increased cost and poor flexibility caused by replacing the power chip. The current detection circuit can detect the current output of the power supply circuit, and the algorithm of the current acquisition part can be customized, which improves the design freedom and usage flexibility of the CMOS image sensor data acquisition system.
[0055] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0056] In this document, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, which includes not only the elements listed but also other elements not expressly listed.
[0057] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A power supply circuit, characterized in that, Includes a low-dropout linear regulator, a power gating circuit, and a current detection circuit; The low-dropout linear regulator is used to provide a stable power supply voltage; The power selection circuit is connected to the low dropout linear regulator. The power selection circuit is provided with at least one power output path, which is used to conduct the corresponding power output path according to the input power output control signal, and convert the power voltage into an output voltage corresponding to the power output control signal. The current detection circuit is connected to the power selection circuit and is used to detect the output current of the conducting power output path.
2. The power supply circuit according to claim 1, characterized in that, Each of the power output paths includes a first switching module, a second switching module, and a voltage regulation module; When the first switching module receives the power output control signal, it generates a control voltage to control the second switching module to turn on. When the second switching module is in the conducting state under the control of the control voltage, it is used to provide the power supply voltage to the voltage regulation module; The voltage regulation module is used to regulate the power supply voltage to a preset output voltage for output.
3. The power supply circuit according to claim 2, characterized in that, The first switching module includes a first switching element, a current-limiting resistor, and a pull-up resistor; The control terminal of the first switching element is connected to the power supply output control signal through the current limiting resistor; the first path terminal of the first switching element is connected to the power supply through the pull-up resistor, and the second path terminal of the first switching element is grounded.
4. The power supply circuit according to claim 3, characterized in that, The second switching module includes a second switching element; the control terminal of the second switching element is connected to the first path terminal of the first switching element; the first path terminal of the second switching element is connected to the output terminal of the low dropout linear regulator; and the second path terminal of the second switching element is connected to the voltage regulation module.
5. The power supply circuit according to claim 2 or 4, characterized in that, The voltage regulation module includes at least one voltage divider resistor for dividing the power supply voltage to obtain a preset output voltage.
6. The power supply circuit according to claim 4, characterized in that, The first switching element is a transistor, and the second switching element is a metal-oxide-semiconductor field-effect transistor.
7. The power supply circuit according to claim 1, characterized in that, The power selection circuit includes three parallel power output paths, namely a first power output path, a second power output path, and a third power output path; the power output control signal includes a first power output control signal, a second power output control signal, and a third power output control signal. When the first power output path receives the first power output control signal, it is used to convert the power supply voltage into a first preset output voltage corresponding to the first power output control signal. When the second power output path receives the second power output control signal, it is used to convert the power supply voltage into a second preset output voltage corresponding to the second power output control signal; When the third power output path receives the third power output control signal, it is used to convert the power supply voltage into a third preset output voltage corresponding to the third power output control signal.
8. The power supply circuit according to claim 1, characterized in that, The current detection circuit includes a filter circuit and an analog-to-digital converter; the filter circuit includes a first resistor, a second resistor, and a capacitor; The positive input terminal of the analog-to-digital converter is connected to the power supply voltage output by the low dropout linear regulator through the first resistor, and the negative input terminal of the analog-to-digital converter is connected to the output voltage converted by the power output path through the second resistor. The capacitor is connected in parallel between the first resistor and the second resistor.
9. The power supply circuit according to any one of claims 1 to 8, characterized in that, It also includes a remote feedback circuit; the remote feedback circuit includes an operational amplifier, the positive input terminal of which is connected to the load, and the output terminal of which is connected to the feedback terminal of the low dropout linear regulator. The operational amplifier is used to amplify the voltage signal fed back from the load and then feed it back to the low dropout linear regulator so that the low dropout linear regulator can regulate the output power supply voltage.
10. A CMOS image sensor data acquisition system, characterized in that, Includes the power supply circuit as described in any one of claims 1-9.