Circuit for suppressing DC input surge current

Abstract

The utility model relates to the technical field of power supply protection, in particular to a circuit for suppressing a DC input surge current, which realizes effective suppression of the surge current at the starting moment of a power supply through the cooperation of a current-limiting resistor, an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and an RC (Resistance-Capacitance) time delay circuit, reduces energy loss after a system is stabilized, improves the reliability of the circuit, and improves the reliability of the circuit. The circuit comprises an input power supply, a current-limiting resistor, a filter capacitor, an MOSFET, a control resistor, a delay capacitor and a related control circuit. When the power supply is powered on, the current-limiting resistor charges the filter capacitor to limit the surge current within a safe range; and then, the RC time delay circuit controls the starting time of the MOSFET, and after the filter capacitor is charged and the system voltage is stable, the MOSFET is switched on and short-circuited with the current-limiting resistor, so that the circuit enters a normal power supply state, and the power consumption is reduced. The surge current suppression circuit is low in cost, fast in response, accurate in control, suitable for various direct current power supply systems needing surge current suppression, and capable of improving power supply stability and system reliability.

Description

Technical Field

[0001] This utility model relates to the field of power supply protection technology, and in particular to a circuit for suppressing DC input surge current. Background Technology

[0002] In modern electronic systems, the stability and safety of DC power supplies are crucial for the normal operation of the entire system. However, during power-on or startup, the charging needs of energy storage components such as filter capacitors often generate large inrush currents. These instantaneous high-amplitude current surges can easily damage circuit components, especially causing unpredictable damage to relays, MOSFETs, and other semiconductor devices. Furthermore, inrush currents can also lead to voltage fluctuations, noise interference, and other problems, affecting the overall stability of the system.

[0003] Currently, technologies for suppressing DC input surge currents commonly employ current-limiting resistors, NTC thermistors, or dedicated surge suppression devices. Each of these solutions has its advantages and disadvantages: while current-limiting resistors are simple in structure, they result in significant power consumption under normal power supply conditions; NTC thermistors have a slow response speed and are highly susceptible to temperature variations, exhibiting some instability; and dedicated surge suppression devices are expensive and struggle to achieve multiple performance targets simultaneously in environments with severe high-frequency interference.

[0004] To address the aforementioned issues, it is essential to design a method that can effectively solve the problems of high energy loss and insufficient system stability that may occur during power-on in traditional current limiting methods, while also considering protection and efficiency, thereby further improving the reliability and lifespan of the entire electronic system. Utility Model Content

[0005] The purpose of this invention is to provide a circuit for suppressing DC input surge current, so as to solve the problems mentioned in the background art.

[0006] To solve the above-mentioned technical problems, this utility model provides the following technical solution: a circuit for suppressing DC input surge current, including an input power supply K1, a power supply VCC, current-limiting resistors R112, R111, and R110, filter capacitors C75, C65, and C70, a MOSFET Q15, control resistors R123, R113, and R157, a delay capacitor C88, and a test point TP103. The current-limiting resistors R112, R111, and R110 are connected in parallel, with one end connected to the input power supply K1 and the other end connected to the drain D of the MOSFET Q15, used to limit the surge current at the moment of power-on. The source S of the MOSFET Q15 is grounded, and the gate G is controlled by an RC delay circuit to ensure that it conducts after a preset time, so as to short-circuit the current-limiting resistor and allow the circuit to enter the normal power supply state.

[0007] According to the above technical solution, one end of the input power supply K1 is connected to the power supply VCC, and the other end is connected to the common terminal of the current limiting resistors R112, R111, and R110, and the filter capacitors C75, C65, and C70 are charged through the current limiting resistor group.

[0008] According to the above technical solution, the positive terminals of the filter capacitors C75, C65, and C70 are connected to VCC, and the negative terminals are connected to GND, in order to reduce power fluctuations and filter out high-frequency noise, thereby improving circuit stability.

[0009] According to the above technical solution, the gate G of the MOSFET Q15 is connected to an RC delay circuit by controlling resistors R123, R113, R157 and delay capacitor C88, so that it turns on after the power supply is turned on for a period of time, thereby shorting the current limiting resistors R112, R111 and R110 and reducing power consumption.

[0010] According to the above technical solution, one end of the control resistor R123 is grounded, and the other end is connected to the delay capacitor C88 and the test point TP103 to control the rise rate of the gate voltage in order to adjust the conduction time of MOSFET Q15.

[0011] According to the above technical solution, the control resistor R113 is connected in series with the control resistor R157. One end of the control resistor R113 is connected to the test point TP103, and the other end is connected to the control resistor R157. The other end of the control resistor R157 is connected to a 15V power supply to provide a stable gate drive current.

[0012] According to the above technical solution, the current-limiting resistors R112, R111, and R110 all have a resistance of 3.3kΩ and a rated power of 1 / 4W.

[0013] According to the above technical solution, the delay capacitor C88 has a capacitance of 10μF and a rated voltage of 25V.

[0014] Compared with existing technologies, this invention, by incorporating multiple components such as a current-limiting resistor, MOSFET, filter capacitor, and RC delay circuit, can effectively suppress surge current at the moment of power-on, preventing damage to circuit components from large currents, thereby improving the reliability and safety of the circuit. Specifically, this invention has the following advantages:

[0015] Effectively limit inrush current: By using the parallel configuration of current-limiting resistors (R112, R111, R110), the inrush current during power-on can be effectively limited, preventing excessive stress on circuit components and extending the service life of the circuit.

[0016] Improving power supply stability: Filter capacitors (C75, C65, C70) can smooth the power supply voltage, filter out high-frequency noise, and improve the stability of the power supply, thereby ensuring the stability and reliability of the circuit during operation.

[0017] Low power consumption and low loss: After the circuit is powered on, the MOSFET (Q15) will be turned on after the voltage stabilizes through the control of the RC delay circuit, shorting the current limiting resistor to reduce power consumption and avoid unnecessary energy loss.

[0018] Improved system reliability: With surge current and high-frequency noise effectively suppressed, the system can operate more stably and reliably, reducing component damage and system failures caused by current surges and improving the overall system stability. Attached Figure Description

[0019] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0020] Figure 1 This invention relates to a circuit for suppressing DC input surge current.

[0021] In the diagram: K1 is the input power supply, VCC is the power supply, R112, R111, and R110 are current-limiting resistors, C75, C65, and C70 are filter capacitors, Q15 is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), R123, R113, and R157 are control resistors, C88 is a delay capacitor, and TP103 is the test point. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0023] Example:

[0024] Reference Figure 1The circuit for suppressing DC input surge current includes input power supply K1, power supply VCC, current limiting resistors R112, R111, R110, filter capacitors C75, C65, C70, MOSFET Q15, control resistors R123, R113, R157, delay capacitor C88, and test point TP103. The power supply VCC is the main power supply. The positive terminals of the filter capacitors C75, C65, and C70 are directly connected to VCC, and their negative terminals are all grounded (GND). This is used to smooth the power supply voltage and filter out high-frequency noise. The input power supply K1 serves as the controller's input power switch. One end is connected to VCC, and the other end is connected to one side of the current-limiting resistor network. This current-limiting resistor network consists of three resistors R112, R111, and R110 connected in parallel. The common node on the other side is connected to the drain (D) of MOSFET Q15, while the source (S) of MOSFET Q15 is directly grounded (GND). This ensures that when K1 is closed, the power supply VCC supplies power to the filter capacitors through the current-limiting resistor network, thereby effectively limiting the surge current at the moment of power-on and preventing excessive current from impacting the circuit components.

[0025] The gate (G) of MOSFET Q15 is controlled by a delay circuit consisting of control resistors R123, R113, R157, and delay capacitor C88. Specifically, one end of control resistor R123 is grounded, and the other end is connected to delay capacitor C88 and test point TP103, forming an RC delay network. The other end of delay capacitor C88 is also grounded, and its charging process determines the rate of voltage rise at test point TP103. Simultaneously, control resistors R113 and R157 are connected in series to form a drive circuit. One end of control resistor R113 is connected to test point TP103, and the other end is connected to control resistor R157. The other end of control resistor R157 is connected to a 15V power supply to provide a stable drive current. As the RC network charges, the voltage at test point TP103 gradually rises. When it reaches the conduction threshold of MOSFET Q15, MOSFET Q15 quickly turns on, shorting the current-limiting resistor network, allowing the filter capacitor to charge directly from VCC, thus smoothly transitioning the circuit from current-limiting state to normal power supply state.

[0026] The circuit's workflow is as follows:

[0027] (1) Power-on phase

[0028] When the input power switch K1 is closed, the power supply VCC is connected to the circuit.

[0029] At this time, VCC is powered through K1, and a portion of the current flows through the parallel current-limiting resistors (R112, R111, R110) into the filtering section, causing the filter capacitors (C75, C65, C70) to begin charging. The filter capacitors are directly connected to the positive terminal of VCC, and their function is to smooth the power supply voltage and filter out high-frequency noise, ensuring the circuit obtains a stable DC voltage.

[0030] Meanwhile, due to the presence of the current-limiting resistor, the surge current at the moment of power-on is strictly limited, thereby preventing damage to the filter capacitor or other sensitive components due to excessive charging current.

[0031] (2) Delay control and MOSFET turn-on stage

[0032] The RC delay network consisting of control resistor R123 and delay capacitor C88 in the circuit starts working. One end of control resistor R123 is grounded, and the other end is connected to delay capacitor C88 and test point TP103; the other end of delay capacitor C88 is also grounded. This part causes the voltage at test point TP103 to rise slowly at a certain slope.

[0033] Meanwhile, the drive circuit formed by the series connection of control resistors R113 and R157 introduces a stable current from the 15V power supply into the test point TP103, causing the voltage at the test point TP103 to eventually rise to the threshold voltage sufficient to trigger MOSFET Q15 to turn on.

[0034] When the voltage at test point TP103 reaches the turn-on threshold of MOSFET Q15, MOSFET Q15 quickly switches from the off state to the on state. At this time, a low-impedance path is formed between the drain (D) and source (S) of MOSFET Q15, thereby bypassing the original current-limiting resistor network.

[0035] (3) Stable power supply status

[0036] With MOSFET Q15 turned on, the charging path of the filter capacitor is no longer limited by the current-limiting resistor, and the current can be directly supplied from VCC through the MOSFET to the entire circuit.

[0037] At this point, the system smoothly transitions from the initial surge current-limited state to the normal power supply state, ensuring circuit protection during power-on while also meeting the requirements of high efficiency and low loss during normal operation.

[0038] Component parameter description:

[0039] The main component parameters used in this circuit are as follows:

[0040] Input power switch K1: SPST single-pole single-throw switch.

[0041] Current-limiting resistors R112, R111, and R110: all have a resistance of 3.3kΩ and a rated power of 1 / 4W.

[0042] Filter capacitors C75, C65, and C70: model number C-104-50V-0603, which means a capacitance of 100nF (0.1μF), a rated voltage of 50V, and a 0603 package.

[0043] MOSFET Q15: Model number IRLR3710ZTRLPBF, is an N-channel enhancement-type MOSFET.

[0044] Control resistor R123: 10kΩ, 1% accuracy, precision resistor.

[0045] Control resistors R113 and R157: each with a resistance of 2kΩ and 1% accuracy, using precision resistors.

[0046] Delay capacitor C88: 10μF capacitance, 25V rated voltage, surface mount electrolytic capacitor.

[0047] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0048] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A circuit for suppressing DC input inrush current, comprising an input power supply K1, a power supply VCC, current-limiting resistors R112, R111, and R110, filter capacitors C75, C65, and C70, a MOSFET Q15, control resistors R123, R113, and R157, a delay capacitor C88, and a test point TP103, characterized in that: The current-limiting resistors R112, R111, and R110 are connected in parallel, with one end connected to the input power supply K1 and the other end connected to the drain D of MOSFET Q15, in order to limit the surge current at the moment the power is turned on. The source S of the MOSFET Q15 is grounded, and the gate G is controlled by an RC delay circuit to ensure that it turns on after a preset time, so as to short-circuit the current-limiting resistor and allow the circuit to enter the normal power supply state.

2. The circuit for suppressing DC input surge current according to claim 1, characterized in that: One end of the input power supply K1 is connected to the power supply VCC, and the other end is connected to the common terminal of the current limiting resistors R112, R111, and R110, and the filter capacitors C75, C65, and C70 are charged through this group of current limiting resistors.

3. The circuit for suppressing inrush current of a DC input according to claim 2, characterized by: The positive terminals of the filter capacitors C75, C65, and C70 are connected to VCC, and the negative terminals are connected to GND to reduce power fluctuations and filter out high-frequency noise, thereby improving circuit stability.

4. The circuit for suppressing inrush current of a DC input according to claim 1, characterized by: The gate G of the MOSFET Q15 is connected to an RC delay circuit consisting of control resistors R123, R113, R157 and delay capacitor C88, so that it turns on after a period of time after the power is on, thereby shorting the current limiting resistors R112, R111 and R110 and reducing power consumption.

5. The circuit for suppressing inrush current of a DC input according to claim 4, characterized by: One end of the control resistor R123 is grounded, and the other end is connected to the delay capacitor C88 and the test point TP103. It is used to control the rise rate of the gate voltage to adjust the conduction time of MOSFET Q15.

6. The circuit for suppressing inrush current of a DC input according to claim 4, characterized by: The control resistor R113 is connected in series with the control resistor R157. One end of the control resistor R113 is connected to the test point TP103, and the other end is connected to the control resistor R157. The other end of the control resistor R157 is connected to a 15V power supply to provide a stable gate drive current.

7. The circuit for suppressing inrush current of a DC input according to claim 1, characterized by: The current-limiting resistors R112, R111, and R110 all have a resistance of 3.3kΩ and a rated power of 1 / 4W.

8. The circuit for suppressing inrush current of a DC input according to claim 7, characterized by: The delay capacitor C88 has a capacitance of 10μF and a rated voltage of 25V.

Images