Semiconductor wafer capable of improving crystal protection effect

Abstract

The utility model discloses a semiconductor wafer capable of improving a crystal protection effect, and relates to the technical field of semiconductor wafers, the semiconductor wafer comprises a wafer main body and a pedestal, the wafer main body abuts against the upper surface of the pedestal, the upper side of the wafer main body is sleeved with an end cover, the lower end of the end cover is sleeved on the outer wall of the pedestal, and the lower end of the end cover is sleeved on the outer wall of the pedestal. A circular groove is formed in the upper surface of the end cover, a connecting mechanism is arranged between the base and the end cover, the base and the end cover are connected in a limiting mode through the connecting mechanism, a plurality of strip-shaped grooves are formed in the upper surface of the base, and a plurality of heat dissipation holes are formed in the positions, corresponding to the strip-shaped grooves, of the side wall of the end cover in an annular array mode. A plurality of mounting holes are formed in the positions, located on the upper sides of the heat dissipation holes, of the side wall of the end cover, and heat conduction strips are fixedly embedded in the mounting holes. According to the utility model, a plurality of heat dissipation structures are arranged, so that the heat dissipation efficiency of the wafer can be improved while the protection performance of the wafer is improved.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor wafer technology, and specifically to a semiconductor wafer that improves the protection of crystals. Background Technology

[0002] Semiconductor chips are made of silicon. Due to their small size and thinness, although they are protected by being packaged in a casing, the fragility of semiconductor chips still makes them prone to cracks and damage. Furthermore, semiconductor chips are difficult to install effectively and quickly, and are prone to damage during the installation process, thus reducing yield and increasing manufacturing costs.

[0003] Among them, announcement number CN221596424U discloses a semiconductor wafer, which includes: a base, with positioning grooves and limiting grooves respectively formed on the inner sidewall of the base, an arc-shaped protrusion on the edge of the wafer body, an end cap that is fitted and sleeved with the base, and the bottom wall of the end cap that is fixedly connected to a pressure pad and a limiting rod respectively. Both the limiting rod and the pressure pad extend into the interior of the base. The limiting rod is correspondingly arranged on both sides of the protrusion, and the pressure pad is fitted and connected to the edge of the wafer body. However, this technical solution still has defects:

[0004] In this technical solution, the end cap and base enclose and protect the wafer body. This makes it difficult for the heat generated by the wafer body to dissipate, which in turn causes the wafer body to be in a high-temperature environment for a long time, which greatly accelerates the aging of the wafer body. Utility Model Content

[0005] In view of the problems existing in the above-mentioned semiconductor wafers, this utility model is proposed.

[0006] Therefore, the purpose of this invention is to provide a semiconductor wafer that improves the protective effect of crystals, thus solving the problems mentioned in the background art.

[0007] To achieve the above objectives, this utility model provides the following technical solution:

[0008] A semiconductor wafer for improving crystal protection includes a wafer body and a base. The wafer body is abutted against the upper surface of the base. An end cap is fitted onto the upper side of the wafer body, and the lower end of the end cap is fitted onto the outer wall of the base. A circular groove is formed on the upper surface of the end cap. A connecting mechanism is provided between the base and the end cap, and the base and the end cap are connected by the connecting mechanism. A plurality of strip-shaped grooves are formed on the upper surface of the base. A plurality of heat dissipation holes are formed in a circular array on the side wall of the end cap at positions corresponding to the strip-shaped grooves. A plurality of mounting holes are formed on the side wall of the end cap above the plurality of heat dissipation holes. A heat-conducting strip is fixedly embedded inside each of the plurality of mounting holes, and one side of each of the plurality of heat-conducting strips abuts against the side wall of the wafer body.

[0009] Preferably, the connecting mechanism includes wedge blocks, and a plurality of wedge blocks are arranged in a circular array on the outer wall of the base. One side of each of the plurality of wedge blocks is fixedly connected to the base. The inner wall of the end cap is provided with wedge grooves at positions corresponding to the plurality of wedge blocks, and the plurality of wedge blocks are engaged with the corresponding wedge grooves.

[0010] Preferably, the plurality of wedge blocks and their corresponding wedge grooves are all fitted with an interference fit.

[0011] Preferably, all of the heat-conducting strips are copper strips.

[0012] Preferably, the surface of the wafer body is coated with a transparent antistatic layer.

[0013] Preferably, the inner wall of the end cap is provided with a sealing gasket.

[0014] The technical effects and advantages provided by this utility model in the above technical solution are as follows:

[0015] This invention features multiple slots on the upper surface of the base, creating a larger gap between the wafer body and the base, thus facilitating heat dissipation. Multiple heat dissipation holes are located on the outer wall of the end cap, corresponding to the slots, to further expel heat from the end cap. Additionally, multiple heat-conducting strips are embedded in a ring array on the upper part of the end cap, with one end of each strip abutting against the wafer body, further improving the efficiency of heat dissipation from the wafer body. This means that while enhancing the protection performance of the crystal, it also improves the heat dissipation efficiency of the wafer. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings.

[0017] Figure 1 This is a schematic diagram of the structure of a semiconductor wafer that improves crystal protection according to the present invention;

[0018] Figure 2 for Figure 1 Another structural diagram from a different perspective;

[0019] Figure 3 for Figure 1 Internal structure diagram;

[0020] Figure 4 for Figure 2 A schematic diagram of the internal structure.

[0021] Explanation of reference numerals in the attached figures:

[0022] 1. End cap; 2. Wafer body; 3. Circular groove; 4. Base; 5. Heat-conducting strip; 6. Heat dissipation hole; 7. Wedge block; 8. Strip groove; 9. Mounting hole; 10. Wedge groove. Detailed Implementation

[0023] To enable those skilled in the art to better understand the technical solution of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings.

[0024] This utility model discloses a semiconductor wafer that enhances the protective effect of crystals.

[0025] Reference Figure 1-4 A semiconductor wafer for improving crystal protection includes a wafer body 2 and a base 4. The wafer body 2 is disposed against the upper surface of the base 4. The surface of the wafer body 2 is coated with a transparent antistatic layer to improve the antistatic performance of the wafer body 2 and minimize damage to the crystal caused by electrostatic discharge. An end cap 1 is sleeved on the upper side of the wafer body 2. The lower end of the end cap 1 is sleeved on the outer wall of the base 4. A sealing gasket is provided on the inner wall of the end cap 1 to improve the sealing between the end cap 1 and the base 4. A circular groove 3 is formed on the upper surface of the end cap 1. A plurality of strip grooves 8 are formed on the upper surface of the base 4. A plurality of heat dissipation holes 6 are formed in a ring array on the side wall of the end cap 1 at positions corresponding to the strip grooves 8. A plurality of mounting holes 9 are formed on the side wall of the end cap 1 above the plurality of heat dissipation holes 6. A heat-conducting strip 5 is fixedly embedded inside the plurality of mounting holes. One side of the plurality of heat-conducting strips 5 abuts against the side wall of the wafer body 2. The plurality of heat-conducting strips 5 are copper strips with good thermal conductivity.

[0026] Reference Figure 1-4 A connecting mechanism is provided between the base 4 and the end cap 1. The base 4 and the end cap 1 are connected by the connecting mechanism. The connecting mechanism includes wedge blocks 7. Multiple wedge blocks 7 are arranged in a ring array on the outer wall of the base 4. One side of each wedge block 7 is fixedly connected to the base 4. The inner wall of the end cap 1 is provided with wedge grooves 10 at positions corresponding to the multiple wedge blocks 7. Each wedge block 7 is engaged with the corresponding wedge groove 10. The engagement between the multiple wedge blocks 7 and the corresponding wedge groove 10 is an interference fit, which enables the end cap 1 and the base 4 to be stably connected.

[0027] In this invention, during use, the wafer body 2 is placed on the base 4, and then the end cap 1 is fitted onto the base 4. Due to the interference fit between the wedge block 7 and the wedge groove 10, the wafer body 2 can be stably protected inside the end cap 1. Since multiple strip grooves 8 are provided on the upper surface of the base 4, there are more gaps between the wafer body 2 and the base 4, which facilitates heat dissipation. Multiple heat dissipation holes 6 are provided on the outer wall of the end cap 1 at positions corresponding to the strip grooves 8, which facilitates the discharge of heat from the end cap 1. At the same time, since multiple heat-conducting strips 5 are embedded in a ring array on the upper part of the end cap 1, and one end of the heat-conducting strip 5 abuts against the wafer body 2, the efficiency of heat dissipation of the wafer body 2 can be further improved. That is, the heat dissipation efficiency of the wafer can be improved while improving the protection performance of the crystal.

[0028] The foregoing description only illustrates certain exemplary embodiments of the present invention. Undoubtedly, those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A semiconductor wafer for improving crystal protection, comprising a wafer body (2) and a substrate (4), characterized in that, The wafer body (2) is abutted against the upper surface of the base (4). An end cap (1) is sleeved on the upper side of the wafer body (2). The lower end of the end cap (1) is sleeved on the outer wall of the base (4). A circular groove (3) is opened on the upper surface of the end cap (1). A connecting mechanism is provided between the base (4) and the end cap (1). The base (4) and the end cap (1) are limited and connected by the connecting mechanism. A plurality of strip grooves (8) are opened on the upper surface of the base (4). A plurality of heat dissipation holes (6) are opened in a ring array on the side wall of the end cap (1) and at the position corresponding to the strip grooves (8). A plurality of mounting holes (9) are opened on the side wall of the end cap (1) and above the plurality of heat dissipation holes (6). A heat conduction strip (5) is fixedly embedded in the interior of the plurality of mounting holes. One side of the plurality of heat conduction strips (5) abuts against the side wall of the wafer body (2).

2. The semiconductor wafer for improving crystal protection according to claim 1, characterized in that, The connecting mechanism includes wedge blocks (7), and multiple wedge blocks (7) are arranged in a ring array on the outer wall of the base (4). One side of each of the multiple wedge blocks (7) is fixedly connected to the base (4). The inner wall of the end cap (1) and the position corresponding to the multiple wedge blocks (7) are provided with wedge grooves (10), and the multiple wedge blocks (7) are engaged with the corresponding wedge grooves (10).

3. The semiconductor wafer for improving crystal protection according to claim 2, characterized in that, The wedge blocks (7) and their corresponding wedge grooves (10) are all fitted with an interference fit.

4. The semiconductor wafer for improving crystal protection according to claim 1, characterized in that, All of the aforementioned heat-conducting strips (5) are copper strips.

5. The semiconductor wafer for improving crystal protection according to claim 1, characterized in that, The surface of the wafer body (2) is coated with a transparent antistatic layer.

6. The semiconductor wafer for improving crystal protection according to claim 1, characterized in that, The inner wall of the end cap (1) is provided with a sealing gasket.

Images