Display panel and display device

By setting grooves around the pixel aperture area of ​​the display panel and filling them with a flat defining layer, the problem of large aperture color separation caused by COE technology is solved, achieving efficient optical performance improvement and process simplification.

CN224192379UActive Publication Date: 2026-05-01BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
BOE TECHNOLOGY GROUP CO LTD
Filing Date
2025-05-28
Publication Date
2026-05-01

AI Technical Summary

Technical Problem

Existing COE technology causes a large aperture problem in point light source color separation in display panels, affecting the user experience.

Method used

A groove is set around the pixel opening area of ​​the display panel, and the first defining part of the pixel defining layer is filled in the groove to make it fit flatly with the anode layer. The cathode layer forms a flat state at the groove to avoid color separation caused by reflection.

Benefits of technology

It effectively improves the problem of large aperture for color separation, without affecting the leveling thickness and gloss effect of the organic encapsulation layer, simplifying the manufacturing process, reducing costs, and improving the optical performance of the display panel.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a display panel and a display device, relates to the technical field of display, and is used for improving a point light source color separation large aperture generated when a display product adopts a COE technology. The display panel comprises a substrate, a flat layer and a plurality of sub-pixels arranged on the flat layer, and further comprises a pixel defining layer, the pixel defining layer defines pixel opening areas corresponding to the sub-pixels, and the flat layer is provided with grooves at the peripheries of the pixel opening areas corresponding to at least part of the sub-pixels; at least part of the sub-pixels comprise anode layers, and the anode layers comprise first anode parts located in the pixel opening areas; the pixel defining layer comprises a first defining part, and at least part of the first defining part is filled in the groove; the display panel further comprises a cathode layer, the cathode layer comprises a first cathode part and a second cathode part, the first cathode part is located on the side, back to the substrate, of the first anode part, and the second cathode part is located on the side, back to the substrate, of the first defining part.
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Description

Display panel and display device Technical Field

[0001] This utility model relates to the field of display technology, and in particular to a display panel and a display device. Background Technology

[0002] Currently, in the display panel industry, the technology of directly forming the color filter on the encapsulation layer (Color Film On Encapsulation, or COE technology) has become an industry trend. However, COE technology has drawbacks such as large color separation and a large aperture when a point light source illuminates the screen in a dark state. This drawback refers to the appearance of a circular colored halo when a point light source illuminates the screen in a screen-off state, affecting the user experience. Therefore, how to improve the large color separation and a large aperture caused by point light source color separation when using COE technology in display products has become an urgent technical problem to be solved. Summary of the Invention

[0003] The purpose of this invention is to provide a display panel and display device for improving the point light source color separation large aperture produced when the display product adopts COE technology.

[0004] To achieve the above objectives, this utility model provides the following technical solution:

[0005] A first aspect of the present invention provides a display panel, comprising: a substrate, a planarization layer, and a plurality of sub-pixels disposed on the planarization layer, and further comprising a pixel defining layer; the pixel defining layer defines a pixel opening region corresponding to the sub-pixel, and the planarization layer provides a trench around the periphery of at least a portion of the pixel opening region corresponding to the sub-pixel; at least a portion of the sub-pixel includes an anode layer, and the anode layer includes a first anode portion located in the pixel opening region.

[0006] The pixel defining layer includes a first defining portion, at least a portion of which fills the trench;

[0007] The display panel further includes a cathode layer, which includes a first cathode portion and a second cathode portion, wherein the first cathode portion is located on the side of the first anode portion facing away from the substrate, and the second cathode portion is located on the side of the first defining portion facing away from the substrate.

[0008] Optionally, the surface of the first defining portion facing away from the substrate is substantially flush with the surface of the first anode portion facing away from the substrate.

[0009] Optionally, the walls of the trench are smooth.

[0010] Optionally, the trench walls have steps.

[0011] Optionally, the step is located on the trench wall away from the first anode portion.

[0012] Optionally, the display panel includes a non-pixel opening area located around the pixel opening area corresponding to each sub-pixel. The non-pixel opening area includes a first area with a spacer and a second area other than the first area, wherein the second area is provided with the groove.

[0013] Optionally, the orthographic projection of the trench on the substrate coincides with the orthographic projection of the second region on the substrate.

[0014] Optionally, the orthographic projection of the trench on the substrate partially overlaps with the orthographic projection of the second region on the substrate.

[0015] Optionally, the pixel defining layer further includes a second defining portion located in the first region, wherein the orthographic projection of the spacer on the substrate is located inside the orthographic projection of the second defining portion on the substrate.

[0016] Optionally, the height of the second defining portion facing away from the substrate is greater than or equal to the height of the first defining portion facing away from the substrate.

[0017] Optionally, the anode layer further includes a second anode portion located within the trench and between the first defining portion and the substrate.

[0018] Optionally, the display panel further includes a first planarization layer and a second planarization layer stacked together, wherein the first planarization layer, the second planarization layer and the anode layer are stacked sequentially in a direction away from the substrate.

[0019] The trench is formed in the second planarization layer, and the depth of the trench is less than or equal to the thickness of the second planarization layer.

[0020] Optionally, the display panel further includes:

[0021] A light-emitting functional layer is located between the anode layer and the cathode layer;

[0022] An encapsulation layer is located on the side of the cathode layer facing away from the substrate.

[0023] A touch function layer is located on the side of the encapsulation layer facing away from the substrate; a color filter layer is located on the side of the touch function layer facing away from the substrate, wherein the orthographic projection of the color filter layer on the substrate overlaps with the orthographic projection of the corresponding pixel opening area on the substrate.

[0024] A black matrix layer, wherein the orthographic projection of the black matrix layer on the substrate does not overlap with the orthographic projection of the pixel opening region on the substrate.

[0025] Based on the above-described display panel technical solution, a second aspect of this utility model provides a display device including the above-described display panel.

[0026] In the technical solution provided by this utility model, a groove is set around the pixel opening area, and at least a portion of the first defining portion in the pixel defining layer is filled in the groove, so that the surface of the first defining portion facing away from the substrate is basically flush with the surface of the first anode portion facing away from the substrate in the pixel opening area. In this way, the cathode layer portion subsequently formed covering the first anode portion and the first defining portion is basically flat, thereby avoiding the color separation large aperture problem caused by the reflection of the cathode layer at the side slope of the pixel defining layer.

[0027] Moreover, in the technical solution provided by this utility model, the surface of the first defining portion facing away from the substrate is flat, which will not affect the leveling thickness of the subsequently formed organic encapsulation layer, and will not affect the bright state L-decay effect of the display panel. Attached Figure Description

[0028] The accompanying drawings, which are included to provide a further understanding of the present invention and constitute a part of this invention, illustrate exemplary embodiments of the present invention and, together with the description thereof, serve to explain the present invention and do not constitute an undue limitation thereof. In the drawings:

[0029] Figure 1 is a first cross-sectional schematic diagram of the display panel provided in an embodiment of the present utility model;

[0030] Figure 2 is a second cross-sectional schematic diagram of the display panel provided in an embodiment of the present invention;

[0031] Figure 3 is a third cross-sectional schematic diagram of the display panel provided in an embodiment of the present invention;

[0032] Figure 4 is a fourth cross-sectional schematic diagram of the display panel provided in an embodiment of the present invention;

[0033] Figure 5 is a fifth cross-sectional schematic diagram of the display panel provided in an embodiment of the present invention;

[0034] Figure 6 is a cross-sectional schematic diagram of the drive backplate provided in an embodiment of this utility model. Detailed Implementation

[0035] To further illustrate the display panel and display device provided in the embodiments of this utility model, a detailed description is provided below with reference to the accompanying drawings.

[0036] Research revealed that, as shown in Figures 1 and 2, the large color separation aperture is caused by reflection from the cathode layer 30 at the side slope of the pixel boundary layer (BPDL). Increasing the side slope angle α of the BPDL can confine the reflected light within the display panel, thus improving the large color separation aperture problem. For example, increasing the slope angle α of the BPDL from 20° to over 35° effectively confines the reflected light from the cathode layer 30 within the display panel, resolving the large color separation aperture issue.

[0037] However, the above method has the following problems: Increasing the slope angle α of the pixel boundary layer (BPDL) will cause the sides of the pixel boundary layer to become steeper, which will affect the leveling thickness of the subsequently formed organic encapsulation layer (IJP). For example, when the slope angle α of the pixel boundary layer (BPDL) is increased from 20° to 35°, the leveling thickness of the organic encapsulation layer (IJP) increases from 8.8μm to 10.3μm. The increase in the thickness of the organic encapsulation layer (IJP) will affect the bright-state L-decay effect of the display product.

[0038] Therefore, how to improve the large aperture of point light source color separation when display products adopt COE technology has become an urgent technical problem to be solved.

[0039] Please refer to Figures 2 to 5. This embodiment of the present invention provides a display panel, including: a substrate 81, a planarization layer, and a plurality of sub-pixels disposed on the planarization layer. The display panel further includes a pixel defining layer BPDL, which defines a pixel opening region K1 corresponding to the sub-pixel. The planarization layer has trenches 20 around the periphery of at least a portion of the pixel opening region K1 corresponding to the sub-pixel. At least a portion of the sub-pixels include an anode layer Ano, which includes a first anode portion Ano1 located in the pixel opening region K1.

[0040] The pixel defining layer BPDL includes a first defining portion BPDL1, at least a portion of the first defining portion BPDL1 filling the trench 20.

[0041] The display panel further includes a cathode layer 30, which includes a first cathode portion 301 and a second cathode portion 302. The first cathode portion 301 is located on the side of the first anode portion Ano1 facing away from the substrate 81, and the second cathode portion 302 is located on the side of the first defining portion BPDL1 facing away from the substrate 81.

[0042] For example, the display panel includes a plurality of sub-pixels, each sub-pixel including a sub-pixel driving circuit and a light-emitting element. The sub-pixel driving circuit is coupled to the anode layer (Ano) of the light-emitting element and is used to provide a driving signal to the light-emitting element, driving the light-emitting element to emit light. The light-emitting element is disposed on the planarization layer.

[0043] For example, the plurality of sub-pixel driving circuits included in the plurality of sub-pixel pixels are arranged in an array. The plurality of sub-pixel driving circuits are divided into multiple rows of sub-pixel driving circuits and multiple columns of sub-pixel driving circuits. The multiple rows of sub-pixel driving circuits are arranged along a second direction, and each row of sub-pixel driving circuits includes a plurality of sub-pixel driving circuits arranged along a first direction. The multiple columns of sub-pixel driving circuits are arranged along the first direction, and each column of sub-pixel driving circuits includes a plurality of sub-pixel driving circuits arranged along a second direction. For example, the first direction intersects with the second direction. For example, the first direction includes a horizontal direction, and the second direction includes a vertical direction.

[0044] For example, the plurality of pixel opening regions K1 corresponding to the plurality of sub-pixels are arranged in an array, and the display panel includes non-pixel opening regions located around the pixel opening region K1 corresponding to each sub-pixel. The pixel opening region K1 is the effective light-emitting area of ​​the sub-pixel.

[0045] For example, at least a portion of the pixel opening area K1 corresponding to the sub-pixel is provided with a groove 20 around it. For example, the groove 20 is provided at least partially around the pixel opening area K1, or the groove 20 can be provided to surround the pixel opening area K1.

[0046] For example, at least a portion of the sub-pixel includes an anode layer Ano, the anode layer Ano including a first anode portion Ano1 located in the pixel opening region K1, that is, the orthographic projection of the first anode portion Ano1 on the substrate 81 overlaps with the orthographic projection of the pixel opening region K1 on the substrate 81.

[0047] For example, the display panel further includes a pixel defining layer (BPDL) made of a black opaque organic material, but is not limited thereto.

[0048] For example, the pixel defining layer BPDL includes a first defining portion BPDL1, a part of the first defining portion BPDL1 is filled in the trench 20, and another part of the first defining portion BPDL1 is located outside the trench 20. The orthographic projection of the first defining portion BPDL1 on the substrate 81 does not overlap with the orthographic projection of the spacer in the display panel on the substrate 81.

[0049] For example, the surface of the first defining portion BPDL1 facing away from the substrate 81 is substantially flush with the surface of the first anode portion Ano1 facing away from the substrate 81, that is, there is almost no step difference between the surface of the first defining portion BPDL1 facing away from the substrate 81 and the surface of the first anode portion Ano1 facing away from the substrate 81.

[0050] For example, the manufacturing process of the display panel includes: after completing the backplane process of the display panel, the trench 20 is fabricated in the non-pixel opening area; then an anode layer Ano is fabricated, wherein a first anode portion Ano1 in the anode layer Ano is located in the pixel opening area K1, and a second anode portion Ano2 in the anode layer Ano is located in the trench 20; then a pixel defining layer BPDL is fabricated, wherein at least a portion of the first defining portion BPDL1 in the pixel defining layer BPDL fills the trench 20, and the second anode portion Ano2 is located between the first defining portion BPDL1 and the substrate 81, wherein the surface of the first defining portion BPDL1 facing away from the substrate 81 is substantially flush with the surface of the first anode portion Ano1 facing away from the substrate 81; then an isolation pillar fabrication process is performed; and then a layer is deposited in the pixel opening area K1. Organic light-emitting materials are used to form an organic light-emitting material layer EL (which may include a red organic light-emitting material layer ELR, a green organic light-emitting material layer ELG, and a blue organic light-emitting material layer ELB). The edge of the organic light-emitting material layer EL can overlap the first defining portion BPDL1. Then, a cathode layer 30 is formed by evaporation. In the cathode layer 30, the first cathode portion 301 is located on the side of the first anode portion Ano1 facing away from the substrate 81, and the second cathode portion 302 is located on the side of the first defining portion BPDL1 facing away from the substrate 81. The surfaces of the first cathode portion 301 and the second cathode portion 302 are substantially flat. Then, the encapsulation process, the touch function layer 40 fabrication process, and the COE process are performed sequentially. The COE process includes the fabrication process of the color filter layer CF and the fabrication process of the black matrix layer BM.

[0051] The encapsulation process is used to form a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2. The touch functional layer 40 fabrication process is used to form a touch buffer layer 401, a first touch layer 402, a touch insulating layer 403, a second touch layer 404, and a touch planarization layer 405. The color filter layer CF fabrication process is used to fabricate a red color filter graphic CFR, a green color filter graphic CFG, and a blue color filter graphic CFB. It should be noted that Figures 1 to 5 also illustrate a planarization layer OC, which can be formed between the touch functional layer 40 fabrication process and the COE process.

[0052] It should be noted that the organic light-emitting material layer EL overlaps the edge of the first defining portion BPDL1, forming a slope. Since the thickness of the organic light-emitting material layer EL is very thin, this slope is almost negligible. Therefore, the first cathode portion 301 and the second cathode portion 302 of the cathode layer 30 are in a flat state.

[0053] As can be seen from the specific structure of the display panel described above, in the display panel provided by this utility model embodiment, a groove 20 is provided around the pixel opening area K1, and at least a portion of the first defining portion BPDL1 in the pixel defining layer BPDL is filled in the groove 20, so that the step difference between the surface of the first defining portion BPDL1 facing away from the substrate 81 and the surface of the first anode portion Ano1 located in the pixel opening area K1 facing away from the substrate 81 is reduced. In this way, the cathode layer 30 subsequently formed covering the first anode portion Ano1 and the first defining portion BPDL1 is basically flat, thereby avoiding the color separation large aperture problem caused by the reflection of the cathode layer 30 at the side ramp of the pixel defining layer.

[0054] In some embodiments, the surface of the first defining portion BPDL1 facing away from the substrate 81 is substantially flush with the surface of the first anode portion Ano1 facing away from the substrate 81.

[0055] In the display panel provided in the above embodiment, a trench 20 is provided around the pixel opening area K1, and at least a portion of the first defining portion BPDL1 of the pixel defining layer BPDL is filled in the trench 20, so that the surface of the first defining portion BPDL1 facing away from the substrate 81 is substantially flush with the surface of the first anode portion Ano1 located in the pixel opening area K1 facing away from the substrate 81. In this way, the cathode layer 30 subsequently formed covering the first anode portion Ano1 and the first defining portion BPDL1 is substantially flat, thereby avoiding the color separation large aperture problem caused by the reflection of the cathode layer 30 at the side ramp of the pixel defining layer.

[0056] Moreover, in the display panel provided in the above embodiments, the surface of the first defining portion BPDL1 facing away from the substrate 81 is flat, which will not affect the leveling thickness of the subsequently formed organic encapsulation layer IJP, and will not affect the bright state L-decay effect of the display panel.

[0057] As shown in Figure 3, in some embodiments, the trench 20 has smooth walls; this arrangement allows the trench 20 to better accommodate the first defining portion BPDL1 and ensures the flatness of the surface of the first defining portion BPDL1 facing away from the substrate 81.

[0058] As shown in Figure 4, in some embodiments, the trench 20 has steps on its walls.

[0059] For example, the step is located on the trench wall of the trench 20 away from the first anode portion Ano1.

[0060] The groove 20 is provided with steps, making the groove 20 have a stepped shape. This arrangement is more conducive to achieving the flatness of the surface of the first defining portion BPDL1 facing away from the substrate 81.

[0061] As shown in Figure 3, in some embodiments, the display panel includes a non-pixel opening area located around the pixel opening area K1 corresponding to each sub-pixel. The non-pixel opening area includes a first area Q1 provided with a spacer PS, and a second area Q2 other than the first area Q1. The second area Q2 is provided with the groove 20.

[0062] For example, the entire non-pixel opening area is a grid-like region, including a first region Q1 and a second region Q2 other than the first region Q1, but not limited to this.

[0063] For example, the pixel defining layer BPDL further includes a second defining portion BPDL2, which is located in the first region Q1, and the orthographic projection of the spacer PS on the substrate 81 is located inside the orthographic projection of the second defining portion BPDL2 on the substrate 81.

[0064] For example, the height of the second defining portion BPDL2 facing away from the surface of the substrate 81 is greater than or equal to the height of the first defining portion BPDL1 facing away from the surface of the substrate 81.

[0065] In the display panel provided in the above embodiment, the second defining portion BPDL2 and the spacer PS are stacked in the first region Q1 to provide support for the entire display panel. It is worth noting that although the cathode layer 30 forms a slope angle in the first region Q1, the cathode layer 30 does not reflect light in this region.

[0066] As shown in Figure 5, in some embodiments, the orthographic projection of the trench 20 on the substrate 81 coincides with the orthographic projection of the second region Q2 on the substrate 81. This arrangement allows the trench 20 to penetrate the entire second region Q2, which helps to better improve the color separation large aperture problem caused by the reflection of the cathode layer 30.

[0067] As shown in Figures 3 and 4, in some embodiments, the orthographic projection of the trench 20 onto the substrate 81 partially overlaps with the orthographic projection of the second region Q2 onto the substrate 81. This arrangement can improve the color separation large aperture problem caused by the reflection of the cathode layer 30 while reducing the layout difficulty of the isolation pillars.

[0068] As shown in Figures 3 to 5, in some embodiments, the anode layer Ano further includes a second anode portion Ano2, which is located within the trench 20 and between the first defining portion BPDL1 and the substrate 81.

[0069] For example, in the same sub-pixel, the first anode portion Ano1 and the second anode portion Ano2 of the anode layer Ano are formed as an integral structure.

[0070] The above configuration ensures that the anode layer Ano completely covers the pixel opening area K1, guaranteeing the normal light-emitting performance of the sub-pixel.

[0071] As shown in Figures 3 to 5, in some embodiments, the display panel further includes a first planarization layer PLN1 and a second planarization layer PLN2 stacked together, wherein the first planarization layer PLN1, the second planarization layer PLN2 and the anode layer Ano are stacked sequentially in a direction away from the substrate 81; the trench 20 is formed in the second planarization layer PLN2, and the depth of the trench 20 is less than or equal to the thickness of the second planarization layer PLN2.

[0072] For example, the display panel further includes a driving backplane on which a plurality of sub-pixel driving circuits are formed in an array.

[0073] As shown in Figure 6, the driving backplane includes, by way of example, a conductive layer BSM, a barrier layer Bar, a buffer layer BUF, an active layer poly, a first gate insulating layer GI1, a first gate metal layer gate1, a second gate insulating layer GI2, a second gate metal layer gate2, an interlayer insulating layer ILD, a first source drain metal layer SD1, a first planarization layer PLN1, a second source drain metal layer SD2, and a second planarization layer PLN2, which are stacked sequentially along a direction away from the substrate 81.

[0074] For example, the trench 20 is formed in the second planarization layer PLN2, and can be formed simultaneously with other vias included in the second planarization layer PLN2 in the same patterning process, and the depth of the trench 20 is less than or equal to the thickness of the second planarization layer PLN2.

[0075] In the display panel provided in the above embodiments, by setting the groove 20 to be formed on the second planarization layer PLN2, no additional mask process is required, which helps to simplify the manufacturing process of the display panel and reduce the manufacturing cost of the display panel.

[0076] As shown in Figures 3 to 5, in some embodiments, the display panel further includes:

[0077] A light-emitting functional layer is located between the anode layer Ano and the cathode layer 30;

[0078] An encapsulation layer is located on the side of the cathode layer 30 facing away from the substrate 81;

[0079] Touch function layer 40, the touch function layer 40 is located on the side of the encapsulation layer that faces away from the substrate 81;

[0080] The color filter layer CF is located on the side of the touch function layer 40 facing away from the substrate 81. The orthographic projection of the color filter layer CF on the substrate 81 overlaps with the orthographic projection of the corresponding pixel opening area K1 on the substrate 81.

[0081] A black matrix layer BM is provided, wherein the orthographic projection of the black matrix layer BM on the substrate 81 does not overlap with the orthographic projection of the pixel aperture region K1 on the substrate 81. For example, the black matrix layer BM is disposed on the same layer as the color filter layer CF.

[0082] For example, the light-emitting functional layer includes the organic light-emitting material layer EL, and may also include a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, wherein the hole injection layer, the hole transport layer, the organic light-emitting material layer EL, the electron transport layer, and the electron injection layer are stacked sequentially.

[0083] For example, the encapsulation layer is located on the side of the cathode layer 30 facing away from the substrate 81, and the encapsulation layer includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2, which are sequentially stacked in a direction away from the substrate 81.

[0084] For example, the touch functional layer 40 is located on the side of the encapsulation layer facing away from the substrate 81. The touch functional layer 40 includes a touch buffer layer 401, a first touch layer 402, a touch insulating layer 403, a second touch layer 404, and a touch planarization layer 405. The encapsulation layer, the touch buffer layer 401, the first touch layer 402, the touch insulating layer 403, the second touch layer 404, and the touch planarization layer 405 are stacked sequentially in a direction away from the substrate 81.

[0085] For example, the color filter layer CF includes multiple color filter patterns, which include color filter patterns of at least two colors, such as: red color filter pattern CFR, green color filter pattern CFG and blue color filter pattern CFB, but are not limited to these.

[0086] The display panel provided in the above embodiments uses COE technology, which is beneficial for the thinning of display products, while also enhancing color performance and improving the optical performance of the display panel.

[0087] This utility model embodiment also provides a display device, including the display panel provided in the above embodiment.

[0088] It should be noted that the display device can be any product or component with display function, such as a television, monitor, digital photo frame, mobile phone, or tablet computer. The display device also includes flexible circuit boards, printed circuit boards, and backplanes.

[0089] In the display panel provided in the above embodiment, a trench 20 is provided around the pixel opening area K1, and at least a portion of the first defining portion BPDL1 of the pixel defining layer BPDL is filled in the trench 20. This reduces the step difference between the surface of the first defining portion BPDL1 facing away from the substrate 81 and the surface of the first anode portion Ano1 facing away from the substrate 81 located in the pixel opening area K1. As a result, the cathode layer 30 subsequently formed covering the first anode portion Ano1 and the first defining portion BPDL1 is substantially flat, thereby avoiding the color separation large aperture problem caused by reflection of the cathode layer 30 at the side ramp of the pixel defining layer. Moreover, in the display panel provided in the above embodiment, the flat surface of the first defining portion BPDL1 facing away from the substrate 81 will not affect the leveling thickness of the subsequently formed organic encapsulation layer IJP, and will not affect the bright state L-decay effect of the display panel.

[0090] In the display panel provided in the above embodiments, by setting the trench 20 to be formed on the second planarization layer PLN2, no additional mask process is required, which helps to simplify the manufacturing process of the display panel and reduce the manufacturing cost. In the display panel provided in the above embodiments, the second defining portion and the spacer are stacked in the first region to provide overall support for the display panel. In the display panel provided in the above embodiments, the anode layer Ano can be guaranteed to completely cover the pixel opening area K1, ensuring the normal light emission performance of the sub-pixels. In the display panel provided in the above embodiments, the use of COE technology is beneficial for the thinning of display products, while also enhancing color performance and improving the optical performance of the display panel.

[0091] The display device provided in this embodiment of the present invention, when including the above-described display panel, also has the above-described beneficial effects, which will not be repeated here.

[0092] It should be noted that in the embodiments of this utility model, "same layer" can refer to film layers on the same structural layer. Alternatively, for example, film layers on the same layer can be layer structures formed by using the same film deposition process to form a specific pattern, and then patterning the film layer using the same photomask through a single patterning process. Depending on the specific pattern, the single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0093] It should be noted that the signal line extending in a certain direction means that the signal line includes a main part and a secondary part connected to the main part. The main part is a line, line segment, or strip-shaped body. The main part extends in a certain direction, and the length of the main part extending in a certain direction is greater than the length of the secondary part extending in other directions.

[0094] In the various method embodiments of this utility model, the sequence number of each step is not used to limit the order of each step. For those skilled in the art, changes in the order of each step are also within the protection scope of this utility model without creative effort.

[0095] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the method embodiments are basically similar to the product embodiments, so the description is relatively simple, and the relevant parts can be referred to the description of the product embodiments.

[0096] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this utility model pertains. The terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected," "coupled," or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0097] It is understandable that when a component such as a layer, film, region, or substrate is referred to as being "above" or "below" another component, the component may be "directly" located "above" or "below" the other component, or there may be intermediate components present.

[0098] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0099] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the protection scope of the claims.

Claims

1. A display panel, characterized in that, include: The substrate, the planarization layer, and a plurality of sub-pixels disposed on the planarization layer further include a pixel defining layer; the pixel defining layer defines a pixel opening region corresponding to the sub-pixel, and the planarization layer has trenches around the pixel opening regions corresponding to at least a portion of the sub-pixels; at least a portion of the sub-pixels include an anode layer, and the anode layer includes a first anode portion located in the pixel opening region. The pixel defining layer includes a first defining portion, at least a portion of which fills the trench; The display panel further includes a cathode layer, which includes a first cathode portion and a second cathode portion, wherein the first cathode portion is located on the side of the first anode portion facing away from the substrate, and the second cathode portion is located on the side of the first defining portion facing away from the substrate.

2. The display panel according to claim 1, characterized in that, The surface of the first defining portion facing away from the substrate is substantially flush with the surface of the first anode portion facing away from the substrate.

3. The display panel according to claim 1, characterized in that, The walls of the trench are smooth.

4. The display panel according to claim 1, characterized in that, The trench walls have steps.

5. The display panel according to claim 4, characterized in that, The step is located on the trench wall away from the first anode portion.

6. The display panel according to claim 1, characterized in that, The display panel includes a non-pixel opening area located around the pixel opening area corresponding to each sub-pixel. The non-pixel opening area includes a first area with a spacer and a second area other than the first area, wherein the second area is provided with the groove.

7. The display panel according to claim 6, characterized in that, The orthographic projection of the trench on the substrate coincides with the orthographic projection of the second region on the substrate; Alternatively, the orthographic projection of the trench on the substrate partially overlaps with the orthographic projection of the second region on the substrate.

8. The display panel according to claim 6, characterized in that, The pixel defining layer further includes a second defining portion located in the first region, and the orthographic projection of the spacer on the substrate is located inside the orthographic projection of the second defining portion on the substrate.

9. The display panel according to claim 8, characterized in that, The height of the second defining portion facing away from the substrate is greater than or equal to the height of the first defining portion facing away from the substrate.

10. The display panel according to any one of claims 1 to 9, characterized in that, The anode layer further includes a second anode portion located within the trench and between the first defining portion and the substrate.

11. The display panel according to any one of claims 1 to 9, characterized in that, The display panel further includes a first planarization layer and a second planarization layer stacked together, the first planarization layer, the second planarization layer and the anode layer being stacked sequentially in a direction away from the substrate; the trench is formed in the second planarization layer, and the depth of the trench is less than or equal to the thickness of the second planarization layer.

12. The display panel according to any one of claims 1 to 9, characterized in that, The display panel further includes: a light-emitting functional layer located between the anode layer and the cathode layer; an encapsulation layer located on the side of the cathode layer facing away from the substrate; a touch functional layer located on the side of the encapsulation layer facing away from the substrate; a color filter layer located on the side of the touch functional layer facing away from the substrate, wherein the orthographic projection of the color filter layer on the substrate overlaps with the orthographic projection of the corresponding pixel opening area on the substrate; and a black matrix layer, wherein the orthographic projection of the black matrix layer on the substrate does not overlap with the orthographic projection of the pixel opening area on the substrate.

13. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 12.