OLED (Organic Light Emitting Diode) working circuit of after-loading instrument

Abstract

The utility model discloses an OLED working circuit of an afterloading instrument, which comprises a processor, a processor display data output end is connected with an OLED screen display data input end, a processor OLED power supply setting output end is connected with an OLED screen power supply setting input end, a processor OLED reset output end is connected with an OLED screen reset input end, and the OLED screen display data input end is connected with the OLED screen display data output end. The synchronous signal output end of the OLED screen is connected with the OLED synchronous signal input end of the processor; the anode output end of the processor display data first channel is connected with the anode input end of the OLED screen display data first channel, the cathode output end of the processor display data first channel is connected with the cathode input end of the OLED screen display data first channel, and the anode output end of the processor display data second channel is connected with the anode input end of the OLED screen display data second channel; the cathode output end of the processor display data second channel is connected with the cathode input end of the OLED screen display data second channel, the anode output end of the processor display data clock channel is connected with the anode input end of the OLED screen display data clock channel, and the cathode output end of the processor display data clock channel is connected with the cathode input end of the OLED screen display data clock channel. Display can be carried out through the OLED screen, and the OLED screen can be stably driven.

Description

Technical Field

[0001] This utility model relates to the field of automotive instrument equipment technology, specifically to a working circuit for an aftermarket instrument OLED. Background Technology

[0002] After a car leaves the factory, many users will add or modify their dashboard systems to enhance the vehicle's functionality, aesthetics, or technological feel. Most common car dashboards use LCD or LED displays, but traditional LCD or LED dashboards have the following drawbacks: 1. Backlight leakage is common, reducing the viewing experience, and the constant backlight consumes significant power; 2. Liquid crystal molecule flipping has a delay, resulting in a slow response time; 3. Poor protocol compatibility, requiring LVDS video input and cannot be directly connected to CAN / LIN buses, necessitating an additional converter box. Utility Model Content

[0003] This utility model aims to solve the technical problems existing in the prior art, and innovatively proposes a working circuit for aftermarket instrument OLED, which can display on the OLED screen and stably drive the OLED screen.

[0004] To achieve the above objectives, this utility model provides a retrofit instrument OLED working circuit, including a processor. The processor's display data output terminal is connected to the OLED screen's display data input terminal. The processor's OLED power setting output terminal is connected to the OLED screen's power setting input terminal. The processor's OLED reset output terminal is connected to the OLED screen's reset input terminal. The OLED screen synchronization signal output terminal is connected to the processor's OLED synchronization signal input terminal. The positive output terminal of the processor's first display data channel is connected to the positive input terminal of the OLED screen's first display data channel. The negative output terminal of the processor's first display data channel is connected to the negative input terminal of the OLED screen's first display data channel. The positive output terminal of the processor's second display data channel is connected to the positive input terminal of the OLED screen's second display data channel. The negative output terminal of the processor's second display data channel is connected to the negative input terminal of the OLED screen's second display data channel. The positive output terminal of the processor's display data clock channel is connected to the positive input terminal of the OLED screen's clock channel. The negative output terminal of the processor's display data clock channel is connected to the negative input terminal of the OLED screen's clock channel.

[0005] In the above scheme: the OLED screen is connected via a terminal block FPC1. The OLED screen also includes an OLED power module. The LX3 terminal of the OLED power module is connected to one end of inductor L5, and the other end of inductor L5 is connected to the other end of inductor L2. The LX1 terminal of the OLED power module is connected to one end of inductor L4, and the other end of inductor L4 is connected to the other end of inductor L2. The LX2 terminal of the OLED power module is connected to one end of inductor L3, and the other end of inductor L3 is connected to ground. The PVIN terminal of the OLED power module is connected to one end of capacitor C58, one end of capacitor C60, and one end of inductor L2. The AVIN terminal of the OLED power module is connected to one end of capacitor C59, one end of capacitor C61, and one end of inductor L2. The ground terminal of the OLED power module, the other end of capacitor C59, the other end of capacitor C61, the other end of capacitor C58, and the other end of capacitor C60 are all connected to ground. The VO3 terminal of the OLED power module is connected to... Connect one end of capacitor C55, one end of capacitor C70, and the terminal block FPC1AVDD. The other ends of capacitor C55, capacitor C70, and OLED power module PGND2 are all connected to power ground. Connect one end of capacitor C56, one end of capacitor C98, one end of capacitor C68, and terminal block FPC1ELVDD. The other ends of capacitor C56, capacitor C98, capacitor C68, and OLED power module PGND1 are all connected to power ground. Connect one end of capacitor C57, one end of capacitor C100, capacitor C69, and terminal block FPC1ELVSS. The other ends of capacitor C57, capacitor C100, and capacitor C69 are all connected to power ground. Connect terminal block FPC1IDVCC to the voltage output terminal of the low dropout linear regulator. Connect terminal block FPC1VCI to the drain of transistor Q4.

[0006] The above solution also includes a power supply module, which comprises a first DC-DC converter voltage input terminal connected to the battery output power supply terminal, one end of capacitor C45, one end of capacitor C46, ​​one end of capacitor C47, and one end of capacitor C48. The other ends of capacitors C45, C46, ​​C47, and C48 are all connected to power ground. The enable terminal of the first DC-DC converter is connected to the first terminal of switching diode D2 and one end of resistor R39. The second terminal of switching diode D2 is connected to the USB power supply. The third terminal of switching diode D2 is connected to the processor's 3.3V enable terminal. The power supply voltage of the first DC-DC converter is connected to one end of capacitor C44, and the other end of capacitor C44 and the other end of resistor R39... The first DC-DC converter's ground terminal is connected to the power supply ground. The first DC-DC converter's BOOT terminal is connected to one end of resistor R34. The other end of resistor R34 is connected to one end of capacitor C38. The other end of capacitor C38 is connected to the first DC-DC converter's SW terminal and one end of inductor L2. The other end of inductor L2 outputs a 3.3V voltage and is connected to one end of resistor R35, one end of capacitor C40, one end of capacitor C41, one end of capacitor C42, and one end of capacitor C43. The first DC-DC converter's feedback terminal is connected to the other end of resistor R35 and one end of resistor R36. The other ends of resistor R36, capacitor C40, capacitor C41, capacitor C42, and capacitor C43 are all connected to the power supply ground.

[0007] In the above scheme: the power supply module further includes a second DC-DC converter voltage input terminal connected to the other end of inductor L2, one end of capacitor C31, one end of capacitor C32, and one end of resistor R28. The other ends of capacitor C31 and C32, the ground terminal of the second DC-DC converter, and the MODE terminal of the second DC-DC converter are all connected to the power supply ground. The other end of resistor R28 is connected to the enable terminal of the second DC-DC converter. The PG terminal of the second DC-DC converter is the SOC power supply enable terminal, connected to resistor R29. The second DC-DC converter's SW terminal is connected to one end of inductor L1. The other end of inductor L1 outputs a 1.3V voltage and is connected to the other end of resistor R29, one end of resistor R31, one end of capacitor C33, one end of capacitor C34, and one end of capacitor C35. The feedback terminal of the second DC-DC converter is connected to the other end of capacitor C33, the other end of resistor R31, and one end of resistor R30. The ground terminal of the second DC-DC converter, the other end of resistor R30, the other end of capacitor C34, and the other end of capacitor C35 are all connected to the power supply ground.

[0008] The PG terminal of the second DC-DC converter is connected to the enable signal input terminal of the SOC power supply enable circuit. The SOC power supply enable circuit includes a resistor R44, one end of which is connected to the PG terminal of the second DC-DC converter. The other end of the resistor R44 is connected to one end of the capacitor C51 and the base of the transistor Q2. The other end of the capacitor C51 and the emitter of the transistor Q2 are both connected to the power supply ground. The collector of the transistor Q2 is connected to one end of the resistor R40. The other end of the resistor R40 is connected to the gate of the field-effect transistor Q1, one end of the resistor R41, and one end of the capacitor C49. The source of the transistor Q1 is connected to the other end of the resistor R41, the other end of the capacitor C49, and the other end of the inductor L2. The drain of the transistor Q1 is the SOC 3.3V power supply terminal, used to power the processor, and is connected to one end of the resistor R42 and one end of the capacitor C50. The other ends of the resistor R42 and the other end of the capacitor C50 are both connected to the power supply ground.

[0009] The above scheme also includes a battery sampling circuit. This circuit includes a resistor R51, one end of which is connected to the enable terminal of the processor's battery sampling signal. The other end of resistor R51 is connected to one end of resistor R53, one end of capacitor C63, and the base of transistor Q5. The other ends of resistor R53, capacitor C63, and the emitter of transistor Q5 are all connected to power ground. The collector of transistor Q5 is connected to one end of resistor R54. The other end of resistor R54 is connected to the base of transistor Q6, one end of resistor R52, and one end of capacitor C62. The emitter of transistor Q6 is connected to the other ends of resistor R52, capacitor C62, and the battery output power supply terminal. The collector of transistor Q6 is connected to one end of resistor R56 and one end of capacitor C67. The other end of resistor R56 is connected to one end of resistor R57, capacitor C91, and the processor's battery sampling signal input terminal. The other ends of capacitor C67, resistor R57, and capacitor C91 are all connected to power ground.

[0010] The above solution also includes an OLED power supply enable circuit. This circuit includes a resistor R45 connected at one end to the processor's OLED 3.3V power supply enable terminal; the other end of resistor R45 connected to one end of resistor R47, one end of capacitor C53, and the base of transistor Q3; the other ends of resistor R47, capacitor C51, and the emitter of transistor Q3 are all connected to power ground; the collector of transistor Q3 is connected to one end of resistor R48; the other end of resistor R48 is connected to the gate of MOSFET Q4, one end of resistor R46, and one end of capacitor C52; the source of transistor Q4 is connected to the other ends of resistor R46, capacitor C52, and inductor L2; and the drain of transistor Q4 is the OLED 3.3V power supply terminal, used to power the OLED screen, and is connected to one end of resistor R49 and one end of capacitor C54. The other ends of resistor R49 and capacitor C54 are both connected to power ground.

[0011] The above solution also includes a low-dropout linear regulator. The voltage input terminal of the low-dropout linear regulator is connected to the other end of inductor L2 and one end of capacitor C36. The enable terminal of the low-dropout linear regulator is connected to the OLED 1.8V power supply enable terminal of the processor and one end of resistor R33. The ground terminal of the low-dropout linear regulator, the other end of resistor R33, and the other end of capacitor C36 are all connected to the power supply ground. The voltage output terminal of the low-dropout linear regulator outputs a 1.8V voltage to power the OLED screen and is connected to one end of capacitor C37. The other end of capacitor C37 is connected to the power supply ground.

[0012] In the above scheme: the 3.3V positive power supply terminal of the processor power unit is connected to the drain of transistor Q1, one end of capacitor C20, one end of capacitor C19, one end of capacitor C18, one end of capacitor C17, and one end of capacitor C16. The other ends of capacitors C20, C19, C18, C17, and C16 are all connected to power ground. The 3.3V analog circuit power supply terminal of the processor power unit is connected to one end of resistor R7, one end of capacitor C14, and one end of capacitor C15. The other end of resistor R7 is connected to the drain of transistor Q1. The 3.3V power supply terminal of the processor power unit... The PLL power supply terminal is connected to one end of resistor R6 and one end of capacitor C13. The other end of resistor R6 is connected to the drain of transistor Q1. The other ends of capacitors C13, C14, and C15 are all connected to power ground. The processor power unit operating voltage terminal is connected to the other end of inductor L1, one end of capacitor C12, one end of capacitor C11, one end of capacitor C10, and one end of capacitor C9. The other ends of capacitors C12, C11, C10, and C9 are all connected to power ground. The processor power unit 1.2V analog power supply terminal is connected to one end of capacitor C8 and one end of capacitor C7. The other ends of capacitors C8 and C7 are both connected to power ground.

[0013] The processor power supply unit's SDVREF terminal is connected to one end of resistor R2, one end of resistor R1, and one end of capacitor C5. The other ends of resistor R1 and capacitor C5 are both connected to power ground. The other end of resistor R2 is connected to one end of resistor R27, and the other end of resistor R27 is connected to the processor power supply unit's 1.8VDDR terminal. The processor power supply unit's AVDD_RTC terminal is connected to one end of resistor R3 and one end of capacitor C6. The other end of resistor R3 is connected to the drain of transistor Q1. The processor power supply unit's AVSS_RTC terminal is connected to one end of resistor R4. The processor power supply unit's pad port, the other end of resistor R4, and the other end of capacitor C6 are all connected to power ground.

[0014] In summary, the beneficial effects of this invention are as follows: compared to traditional LEDs or LCDs, it eliminates the need for a backlight module, resulting in a simpler structure and eliminating light leakage. The designed circuitry can stably drive the OLED screen for display, improving instrument display efficiency. Furthermore, using an OLED screen for the instrument panel consumes no power in black areas, reducing vehicle power consumption and battery load. In addition, it offers greater interface compatibility, supporting LVDS or SPI protocols, thus expanding its applicability for aftermarket or retrofit instrument installations. Attached Figure Description

[0015] Figure 1 This is a system diagram of this utility model.

[0016] Figure 2 This is the circuit diagram of the battery sampling circuit.

[0017] Figure 3 This is the circuit diagram of the first DC-DC converter.

[0018] Figure 4 This is the circuit diagram of the second DC-DC converter.

[0019] Figure 5 This is the circuit diagram of the SOC power supply enable circuit.

[0020] Figure 6 This is the circuit diagram of the OLED power supply enable circuit.

[0021] Figure 7 This is the circuit diagram of a low-dropout linear regulator.

[0022] Figure 8 This is a circuit diagram of the processor power supply unit.

[0023] Figure 9 This is the circuit diagram of the System unit of the processor.

[0024] Figure 10 This is the circuit diagram of the OLED power module.

[0025] Figure 11 This is the circuit diagram for terminal block FPC1.

[0026] Figure 12 This is a circuit diagram of the processor and OLED. Detailed Implementation

[0027] The present invention will be further described below with reference to embodiments and accompanying drawings:

[0028] like Figures 1-12As shown, a retrofit instrument OLED working circuit includes a processor U1. The processor U1 display data output terminal is connected to the OLED screen display data input terminal. The processor U1 OLED power setting output terminal is connected to the OLED screen power setting input terminal. The processor U1 OLED reset output terminal is connected to the OLED screen reset input terminal. The OLED screen synchronization signal output terminal is connected to the processor U1 OLED synchronization signal input terminal. The positive output terminal of the first channel of the processor U1 display data is connected to the positive input terminal of the first channel of the OLED screen display data. The negative output terminal of the first channel of the processor U1 display data is connected to the negative input terminal of the first channel of the OLED screen display data. The positive output terminal of the second channel of the processor U1 display data is connected to the positive input terminal of the second channel of the OLED screen display data. The negative output terminal of the second channel of the processor U1 display data is connected to the negative input terminal of the second channel of the OLED screen display data. The positive output terminal of the clock channel of the processor U1 display data is connected to the positive input terminal of the clock channel of the OLED screen display data. The negative output terminal of the clock channel of the processor U1 display data is connected to the negative input terminal of the clock channel of the OLED screen display data.

[0029] The OLED screen is connected via terminal block FPC1. The OLED screen also includes an OLED power module U6. Terminal 3 of the OLED power module U6 is connected to one end of inductor L5, and the other end of inductor L5 is connected to the other end of inductor L2. Terminal 1 of the OLED power module U6 is connected to one end of inductor L4, and the other end of inductor L4 is connected to the other end of inductor L2. Terminal 2 of the OLED power module U6 is connected to one end of inductor L3, and the other end of inductor L3 is connected to ground. Terminal PVIN of the OLED power module U6 is connected to one end of capacitor C58, one end of capacitor C60, and one end of inductor L2. Terminal AVIN of the OLED power module U6 is connected to one end of capacitor C59, one end of capacitor C61, one end of capacitor C58, and one end of capacitor C60. The ground terminal of the OLED power module U6, the other end of capacitor C59, the other end of capacitor C61, the other end of capacitor C58, and the other end of capacitor C60 are all connected to ground. Terminal VO3 of the OLED power module U6 is connected to capacitor C5... One end of capacitor C55, one end of capacitor C70, and the terminal block FPC1AVDD are connected to the power supply ground. The other ends of capacitor C55, capacitor C70, and OLED power module U6PGND2 are all connected to the power supply ground. The terminal block U6VO1 of OLED power module is connected to one end of capacitor C56, one end of capacitor C98, one end of capacitor C68, and the terminal block FPC1ELVDD. The other ends of capacitor C56, capacitor C98, capacitor C68, and OLED power module U6PGND1 are all connected to the power supply ground. The terminal block U6VO2 of OLED power module is connected to one end of capacitor C57, one end of capacitor C100, one end of capacitor C69, and the terminal block FPC1ELVSS. The other ends of capacitor C57, capacitor C100, and capacitor C69 are all connected to the power supply ground. The terminal block FPC1IDVCC is connected to the voltage output terminal of low dropout linear regulator U5. The terminal block FPC1VCI is connected to the drain of transistor Q4.

[0030] It also includes a power supply module, which includes a first DC-DC converter U3 whose voltage input terminal is connected to the battery output power supply terminal, one end of capacitor C45, one end of capacitor C46, ​​one end of capacitor C47, and one end of capacitor C48. The other ends of capacitors C45, C46, ​​C47, and C48 are all connected to the power ground. The enable terminal of the first DC-DC converter U3 is connected to the first terminal of switching diode D2 and one end of resistor R39. The second terminal of switching diode D2 is connected to the USB power supply. The third terminal of switching diode D2 is connected to the 3.3V enable terminal of processor U1. The power supply voltage of the first DC-DC converter U3 is connected to one end of capacitor C44. The other end of capacitor C44, the other end of resistor R39, and the first... The ground terminal of DC-DC converter U3 is connected to the power supply ground. The BOOT terminal of the first DC-DC converter U3 is connected to one end of resistor R34. The other end of resistor R34 is connected to one end of capacitor C38. The other end of capacitor C38 is connected to the SW terminal of the first DC-DC converter U3 and one end of inductor L2. The other end of inductor L2 outputs a 3.3V voltage and is connected to one end of resistor R35, one end of capacitor C40, one end of capacitor C41, one end of capacitor C42, and one end of capacitor C43. The feedback terminal of the first DC-DC converter U3 is connected to the other end of resistor R35 and one end of resistor R36. The other ends of resistor R36, capacitor C40, capacitor C41, capacitor C42, and capacitor C43 are all connected to the power supply ground.

[0031] The power supply module also includes a second DC-DC converter U4 whose voltage input terminal is connected to the other end of inductor L2, one end of capacitor C31, one end of capacitor C32, and one end of resistor R28. The other ends of capacitor C31 and C32, the ground terminal of the second DC-DC converter U4, and the MODE terminal of the second DC-DC converter U4 are all connected to the power ground. The other end of resistor R28 is connected to the enable terminal of the second DC-DC converter U4. The PG terminal of the second DC-DC converter U4 is the SOC power supply enable terminal and is connected to one end of resistor R29. The second DC-DC converter U4SW terminal is connected to one end of inductor L1. The other end of inductor L1 outputs a 1.3V voltage and is connected to the other end of resistor R29, one end of resistor R31, one end of capacitor C33, one end of capacitor C34, and one end of capacitor C35. The feedback terminal of the second DC-DC converter U4 is connected to the other end of capacitor C33, the other end of resistor R31, and one end of resistor R30. The ground terminal of the second DC-DC converter U4, the other end of resistor R30, the other end of capacitor C34, and the other end of capacitor C35 are all connected to the power supply ground.

[0032] The second DC-DC converter U4PG terminal is connected to the enable signal input terminal of the SOC power supply enable circuit. The SOC power supply enable circuit includes a resistor R44, one end of which is connected to the second DC-DC converter U4PG terminal. The other end of the resistor R44 is connected to one end of the capacitor C51 and the base of the transistor Q2. The other end of the capacitor C51 and the emitter of the transistor Q2 are both connected to the power supply ground. The collector of the transistor Q2 is connected to one end of the resistor R40. The other end of the resistor R40 is connected to the gate of the field-effect transistor Q1, one end of the resistor R41 and one end of the capacitor C49. The source of the transistor Q1 is connected to the other end of the resistor R41, the other end of the capacitor C49 and the other end of the inductor L2. The drain of the transistor Q1 is the SOC 3.3V power supply terminal, used to power the processor U1, and is connected to one end of the resistor R42 and one end of the capacitor C50. The other ends of the resistor R42 and the other end of the capacitor C50 are both connected to the power supply ground.

[0033] It also includes a battery sampling circuit, which includes a resistor R51 connected at one end to the enable terminal of the processor U1 battery sampling signal, the other end of resistor R51 connected to one end of resistor R53, one end of capacitor C63 and the base of transistor Q5, the other end of resistor R53, the other end of capacitor C63 and the emitter of transistor Q5 connected to the power supply ground, the collector of transistor Q5 connected to one end of resistor R54, the other end of resistor R54 connected to the base of transistor Q6, one end of resistor R52 and one end of capacitor C62, the emitter of transistor Q6 connected to the other end of resistor R52, the other end of capacitor C62 and the battery output power supply terminal, the collector of transistor Q6 connected to one end of resistor R56 and one end of capacitor C67, the other end of resistor R56 connected to one end of resistor R57, one end of capacitor C91 and the battery sampling signal input terminal of processor U1, and the other end of capacitor C67, the other end of resistor R57 and the other end of capacitor C91 connected to the power supply ground;

[0034] It also includes an OLED power supply enable circuit. The OLED power supply enable circuit includes a resistor R45 connected to the OLED 3.3V power supply enable terminal of the processor U1 OLED at one end, a resistor R45 connected to a resistor R47, a capacitor C53 and the base of transistor Q3 at the other end, a resistor R47, a capacitor C51 and the emitter of transistor Q3 connected to the power supply ground, a collector of transistor Q3 connected to a resistor R48, a field-effect transistor Q4 connected to a field-effect transistor Q4, a resistor R46 and a capacitor C52 at the other end, a source of transistor Q4 connected to a resistor R46, a capacitor C52 and the inductor L2 at the other end, and a drain of transistor Q4 connected to the OLED 3.3V power supply terminal to power the OLED screen. It is also connected to a resistor R49 and a capacitor C54 at the other end, and the resistor R49 and the capacitor C54 are both connected to the power supply ground.

[0035] It also includes a low-dropout linear regulator U5. The voltage input terminal of the low-dropout linear regulator U5 is connected to the other end of inductor L2 and one end of capacitor C36. The enable terminal of the low-dropout linear regulator U5 is connected to the OLED 1.8V power supply enable terminal of processor U1 and one end of resistor R33. The ground terminal of the low-dropout linear regulator U5, the other end of resistor R33, and the other end of capacitor C36 are all connected to the power supply ground. The voltage output terminal of the low-dropout linear regulator U5 outputs a 1.8V voltage to power the OLED screen and is connected to one end of capacitor C37. The other end of capacitor C37 is connected to the power supply ground.

[0036] The processor power supply unit U1A 3.3V positive power supply terminal (i.e., pins 2, 20, 38, 65, 85) is connected to the drain of transistor Q1, one end of capacitors C20, C19, C18, C17, and C16. The other ends of capacitors C20, C19, C18, C17, and C16 are all connected to ground. The processor power supply unit U1A 3.3V analog circuit power supply terminal (i.e., pin 4) is connected to one end of resistor R7, one end of capacitor C14, and one end of capacitor C15. The other end of resistor R7 is connected to the drain of transistor Q1. The processor power supply unit U1A 3.3V... The PLL power supply terminal is connected to one end of resistor R6 and one end of capacitor C13. The other end of resistor R6 is connected to the drain of transistor Q1. The other ends of capacitors C13, C14, and C15 are all connected to power ground. The processor power unit U1A operating voltage terminal is connected to the other end of inductor L1, one end of capacitor C12, one end of capacitor C11, one end of capacitor C10, and one end of capacitor C9. The other ends of capacitors C12, C11, C10, and C9 are all connected to power ground. The processor power unit U1A 1.2V analog power supply terminal is connected to one end of capacitor C8 and one end of capacitor C7. The other ends of capacitors C8 and C7 are both connected to power ground.

[0037] The processor power unit U1ASDVREF terminal is connected to one end of resistor R2, one end of resistor R1, and one end of capacitor C5. The other ends of resistor R1 and capacitor C5 are both connected to power ground. The other end of resistor R2 is connected to one end of resistor R27, and the other end of resistor R27 is connected to the processor power unit U1A1.8VDDR terminal. The processor power unit U1AAVDD_RTC terminal is connected to one end of resistor R3 and one end of capacitor C6. The other end of resistor R3 is connected to the drain of transistor Q1. The processor power unit U1AAVSS_RTC terminal is connected to one end of resistor R4. The processor power unit U1A pad port, the other end of resistor R4, and the other end of capacitor C6 are all connected to power ground.

[0038] The first BOOT terminal of the processor System unit U1B is connected to one end of resistor R8 and the first end of terminal block P1. The other end of resistor R8 is connected to the drain of transistor Q1. The second end of terminal block P1 is connected to power ground. The second BOOT terminal of the processor System unit U1B is connected to one end of resistor R9 and the first end of terminal block P2. The other end of resistor R9 is connected to the drain of transistor Q1. The second end of terminal block P2 is connected to power ground. The oscillator input terminal of the processor System unit U1B is connected to one end of resistor R12, the first end of crystal Y1, and one end of capacitor C24. The other end of capacitor C24 and the normally open terminal of crystal Y1 are both connected to power ground. The oscillator output terminal of the processor System unit U1B is connected to the other end of resistor R12, the second end of crystal Y1, and one end of capacitor C25. The other end of capacitor C25 and the normally open terminal of crystal Y3 are both connected to power ground.

[0039] The test clock terminal of the System Unit U1B debug port is connected to one end of resistor R95. The other end of resistor R95 is connected to one end of resistor R84 and terminal 6 of terminal block P3, and then connected to an external debugging device via terminal block P3. The other end of resistor R84 is connected to the cathode of diode D4, and the anode of diode D4 is connected to the drain of transistor Q1. The test data output terminal of the System Unit U1B debug port is connected to one end of resistor R94. The other end of resistor R94 is connected to one end of resistor R85 and terminal 5 of terminal block P3, and the other end of resistor R85 is connected to the cathode of diode D4. The test data input terminal of the System Unit U1B debug port is connected to one end of resistor R93. The other end of resistor R93 is connected to one end of resistor R86 and terminal 4 of terminal block P3, and the other end of resistor R86 is connected to... Connect the negative terminal of diode D4; connect the test mode selection terminal of the debug port of the processor System unit U1B to one end of resistor R92, the other end of resistor R92 to one end of resistor R87 and the third terminal of terminal block P3, and the other end of resistor R87 to the negative terminal of diode D4; connect the test reset terminal of the debug port of the processor System unit U1B to one end of resistor R91, the other end of resistor R91 to the second terminal of terminal block P3, one end of resistor R89 ​​and the negative terminal of diode D4, and the other end of resistor R89 ​​to power ground; the seventh terminal of terminal block P3 is the system reset switch terminal, connected to one end of resistor R83, and the other end of resistor R83 to the negative terminal of diode D4; the eighth terminal of terminal block P3 is the clock coordination terminal, connected to one end of resistor R90, and the other end of resistor R90 and the ninth terminal of terminal block P3 are connected to power ground.

Claims

1. A working circuit for an aftermarket instrument OLED, characterized in that: The system includes a processor (U1), whose display data output terminal is connected to the OLED screen display data input terminal, whose OLED power setting output terminal is connected to the OLED screen power setting input terminal, whose OLED reset output terminal is connected to the OLED screen reset input terminal, and whose OLED screen synchronization signal output terminal is connected to the processor (U1) OLED synchronization signal input terminal; the positive output terminal of the processor (U1) display data first channel is connected to the positive input terminal of the OLED screen display data first channel, the negative output terminal of the processor (U1) display data first channel is connected to the negative input terminal of the OLED screen display data first channel, the positive output terminal of the processor (U1) display data second channel is connected to the positive input terminal of the OLED screen display data second channel, the negative output terminal of the processor (U1) display data second channel is connected to the negative input terminal of the OLED screen display data second channel, the positive output terminal of the processor (U1) display data clock channel is connected to the positive input terminal of the OLED screen display data clock channel, and the negative output terminal of the processor (U1) display data clock channel is connected to the negative input terminal of the OLED screen display data clock channel.

2. The retrofit instrument OLED working circuit according to claim 1, characterized in that: The OLED screen is connected via a terminal block FPC1. The OLED screen also includes an OLED power module (U6). The LX3 terminal of the OLED power module (U6) is connected to one end of inductor L5, and the other end of inductor L5 is connected to the other end of inductor L2. The LX1 terminal of the OLED power module (U6) is connected to one end of inductor L4, and the other end of inductor L4 is connected to the other end of inductor L2. The LX2 terminal of the OLED power module (U6) is connected to one end of inductor L3, and the other end of inductor L3 is connected to ground. The PVIN terminal of the OLED power module (U6) is connected to one end of capacitor C58, one end of capacitor C60, and one end of inductor L2. The AVIN terminal of the OLED power module (U6) is connected to one end of capacitor C59, one end of capacitor C61, and one end of inductor L2. The ground terminal of the OLED power module (U6), the other end of capacitor C59, the other end of capacitor C61, the other end of capacitor C58, and the other end of capacitor C60 are all connected to ground. The VO terminal of the OLED power module (U6)... The three terminals are connected to one end of capacitor C55, one end of capacitor C70, and the terminal of terminal block FPC1AVDD. The other ends of capacitors C55 and C70, and the PGND2 terminal of the OLED power module (U6) are all connected to power ground. The VO1 terminal of the OLED power module (U6) is connected to one end of capacitors C56, C98, and C68, and the terminal of terminal block FPC1ELVDD. The other ends of capacitors C56, C98, and C68 are connected to the OLED power... The PGND1 terminal of module (U6) is connected to the power ground. The VO2 terminal of the OLED power module (U6) is connected to one end of capacitor C57, one end of capacitor C100, one end of capacitor C69 and the terminal of terminal block FPC1ELVSS. The other ends of capacitors C57, C100 and C69 are connected to the power ground. The terminal of terminal block FPC1IDVCC is connected to the voltage output terminal of low dropout linear regulator (U5). The terminal of terminal block FPC1VCI is connected to the drain of transistor Q4.

3. The retrofit instrument OLED working circuit according to claim 1, characterized in that: It also includes a power supply module, which includes a first DC-DC converter (U3) whose voltage input terminal is connected to the battery output power supply terminal, one end of capacitor C45, one end of capacitor C46, ​​one end of capacitor C47, and one end of capacitor C48. The other ends of capacitors C45, C46, ​​C47, and C48 are all connected to the power ground. The enable terminal of the first DC-DC converter (U3) is connected to the first terminal of switching diode D2 and one end of resistor R39. The second terminal of switching diode D2 is connected to the USB power supply. The third terminal of switching diode D2 is connected to the 3.3V enable terminal of processor (U1). The power supply voltage of the first DC-DC converter (U3) is connected to one end of capacitor C44. The other end of capacitor C44, the other end of resistor R39, and the first... The ground terminal of the DC-DC converter (U3) is connected to the power supply ground. The BOOT terminal of the first DC-DC converter (U3) is connected to one end of resistor R34. The other end of resistor R34 is connected to one end of capacitor C38. The other end of capacitor C38 is connected to the SW terminal of the first DC-DC converter (U3) and one end of inductor L2. The other end of inductor L2 outputs a 3.3V voltage and is connected to one end of resistor R35, one end of capacitor C40, one end of capacitor C41, one end of capacitor C42, and one end of capacitor C43. The feedback terminal of the first DC-DC converter (U3) is connected to the other end of resistor R35 and one end of resistor R36. The other ends of resistor R36, capacitor C40, capacitor C41, capacitor C42, and capacitor C43 are all connected to the power supply ground.

4. The retrofit instrument OLED working circuit according to claim 3, characterized in that: The power supply module also includes a second DC-DC converter (U4) whose voltage input terminal is connected to the other end of inductor L2, one end of capacitor C31, one end of capacitor C32, and one end of resistor R28. The other ends of capacitor C31 and C32, the ground terminal of the second DC-DC converter (U4), and the MODE terminal of the second DC-DC converter (U4) are all connected to the power ground. The other end of resistor R28 is connected to the enable terminal of the second DC-DC converter (U4). The PG terminal of the second DC-DC converter (U4) is the SOC power supply enable terminal, connected to resistor R29. At one end, the SW terminal of the second DC-DC converter (U4) is connected to one end of the inductor L1. The other end of the inductor L1 outputs a 1.3V voltage and is connected to the other end of resistor R29, one end of resistor R31, one end of capacitor C33, one end of capacitor C34, and one end of capacitor C35. The feedback terminal of the second DC-DC converter (U4) is connected to the other end of capacitor C33, the other end of resistor R31, and one end of resistor R30. The ground terminal of the second DC-DC converter (U4), the other end of resistor R30, the other end of capacitor C34, and the other end of capacitor C35 are all connected to the power supply ground. The PG terminal of the second DC-DC converter (U4) is connected to the enable signal input terminal of the SOC power supply enable circuit. The SOC power supply enable circuit includes a resistor R44, one end of which is connected to the PG terminal of the second DC-DC converter (U4). The other end of the resistor R44 is connected to one end of the capacitor C51 and the base of the transistor Q2. The other end of the capacitor C51 and the emitter of the transistor Q2 are both connected to the power supply ground. The collector of the transistor Q2 is connected to one end of the resistor R40. The other end of the resistor R40 is connected to the gate of the field-effect transistor Q1, one end of the resistor R41, and one end of the capacitor C49. The source of the transistor Q1 is connected to the other end of the resistor R41, the other end of the capacitor C49, and the other end of the inductor L2. The drain of the transistor Q1 is the SOC 3.3V power supply terminal, used to power the processor (U1), and is connected to one end of the resistor R42 and one end of the capacitor C50. The other ends of the resistor R42 and the other end of the capacitor C50 are both connected to the power supply ground.

5. The retrofit instrument OLED working circuit according to claim 1, characterized in that: It also includes a battery sampling circuit, which includes a resistor R51 connected at one end to the enable terminal of the processor (U1) for battery sampling signals; the other end of the resistor R51 connected to one end of the resistor R53, one end of the capacitor C63, and the base of the transistor Q5; the other ends of the resistor R53, the other end of the capacitor C63, and the emitter of the transistor Q5 are all connected to the power supply ground; the collector of the transistor Q5 is connected to one end of the resistor R54; the other end of the resistor R54 is connected to the base of the transistor Q6, one end of the resistor R52, and one end of the capacitor C62; the emitter of the transistor Q6 is connected to the other ends of the resistor R52, the other end of the capacitor C62, and the battery output power supply terminal; the collector of the transistor Q6 is connected to one end of the resistor R56 and one end of the capacitor C67; the other end of the resistor R56 is connected to one end of the resistor R57, one end of the capacitor C91, and the battery sampling signal input terminal of the processor (U1); the other ends of the capacitor C67, the other ends of the resistor R57, and the other ends of the capacitor C91 are all connected to the power supply ground.

6. The retrofit instrument OLED working circuit according to claim 1, characterized in that: It also includes an OLED power supply enable circuit, which includes a resistor R45 connected at one end to the OLED 3.3V power supply enable terminal of the processor (U1), the other end of the resistor R45 connected to one end of the resistor R47, one end of the capacitor C53 and the base of the transistor Q3, the other end of the resistor R47, the other end of the capacitor C51 and the emitter of the transistor Q3 connected to the power supply ground, the collector of the transistor Q3 connected to one end of the resistor R48, the other end of the resistor R48 connected to the gate of the field-effect transistor Q4, one end of the resistor R46 and one end of the capacitor C52, the source of the transistor Q4 connected to the other end of the resistor R46, the other end of the capacitor C52 and the other end of the inductor L2, and the drain of the transistor Q4 being the OLED 3.3V power supply terminal for powering the OLED screen, and connected to one end of the resistor R49 and one end of the capacitor C54, the other end of the resistor R49 and the other end of the capacitor C54 connected to the power supply ground.

7. The retrofit instrument OLED working circuit according to claim 1, characterized in that: It also includes a low-dropout linear regulator (U5). The voltage input terminal of the low-dropout linear regulator (U5) is connected to the other end of inductor L2 and one end of capacitor C36. The enable terminal of the low-dropout linear regulator (U5) is connected to the OLED 1.8V power supply enable terminal of the processor (U1) and one end of resistor R33. The ground terminal of the low-dropout linear regulator (U5), the other end of resistor R33, and the other end of capacitor C36 are all connected to the power supply ground. The voltage output terminal of the low-dropout linear regulator (U5) outputs a 1.8V voltage to power the OLED screen and is connected to one end of capacitor C37. The other end of capacitor C37 is connected to the power supply ground.

8. The retrofit instrument OLED working circuit according to claim 1, characterized in that: The processor power supply unit (U1A) has its 3.3V positive power supply terminal connected to the drain of transistor Q1, one end of capacitors C20, C19, C18, C17, and C16. The other ends of capacitors C20, C19, C18, C17, and C16 are all connected to ground. The processor power supply unit (U1A) has its 3.3V analog circuit power supply terminal connected to one end of resistor R7, one end of capacitor C14, and one end of capacitor C15. The other end of resistor R7 is connected to the drain of transistor Q1. The processor power supply unit (U1A) has a 3.3V... The PLL power supply terminal is connected to one end of resistor R6 and one end of capacitor C13. The other end of resistor R6 is connected to the drain of transistor Q1. The other ends of capacitors C13, C14, and C15 are all connected to power ground. The processor power unit (U1A) operating voltage terminal is connected to the other end of inductor L1, one end of capacitor C12, one end of capacitor C11, one end of capacitor C10, and one end of capacitor C9. The other ends of capacitors C12, C11, C10, and C9 are all connected to power ground. The processor power unit (U1A) 1.2V analog power supply terminal is connected to one end of capacitor C8 and one end of capacitor C7. The other ends of capacitors C8 and C7 are both connected to power ground. The processor power supply unit (U1A) SDVREF terminal is connected to one end of resistor R2, one end of resistor R1, and one end of capacitor C5. The other ends of resistor R1 and capacitor C5 are both connected to power ground. The other end of resistor R2 is connected to one end of resistor R27, and the other end of resistor R27 is connected to the 1.8VDDR terminal of the processor power supply unit (U1A). The processor power supply unit (U1A) AVDD_RTC terminal is connected to one end of resistor R3 and one end of capacitor C6. The other end of resistor R3 is connected to the drain of transistor Q1. The processor power supply unit (U1A) AVSS_RTC terminal is connected to one end of resistor R4. The processor power supply unit (U1A) pad port, the other end of resistor R4, and the other end of capacitor C6 are all connected to power ground.

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