Display panel and display device

By adding a step-down circuit between the half-voltage circuit and the power management integrated circuit, the problem of HAVDD voltage being higher than AVDD voltage when the display panel is turned off is solved, ensuring that HAVDD voltage discharges in time when the display panel is turned off, avoiding chip damage and meeting chip specification requirements.

CN224217224UActive Publication Date: 2026-05-08KUSN INFOVISION OPTOELECTRONICS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
KUSN INFOVISION OPTOELECTRONICS
Filing Date
2025-04-23
Publication Date
2026-05-08

AI Technical Summary

Technical Problem

During the power-off process of the display product, the potential of the HAVDD voltage may be higher than that of the AVDD voltage, violating the chip specification requirements and posing a risk of damage to the source driver chip.

Method used

A step-down circuit is added between the half-voltage circuit and the power management integrated circuit. The step-down circuit outputs the HAVDD voltage when the display panel is powered on, and pulls the HAVDD voltage down to a first voltage lower than the AVDD voltage when the power is off, ensuring that the discharge time of the HAVDD voltage is shorter than the discharge time of the AVDD voltage.

Benefits of technology

This design ensures that the HAVDD voltage is lower than the AVDD voltage when the display panel is powered off, avoiding the risk of damage to the source driver chip, meeting chip specification requirements, and shortening the time for the display panel to quickly power on after power-off.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a display panel and a display device. The display panel provided by the utility model comprises a half-voltage circuit, a step-down circuit and a power management integrated circuit, the output end of the half-voltage circuit is connected with the input end of the step-down circuit, and the output end of the step-down circuit is connected with the input end of an operational amplifier in the power management integrated circuit; the step-down circuit inputs the semi-analog power supply voltage from the half-voltage circuit through an input end, outputs the semi-analog power supply voltage through an output end when the display panel is turned on, and outputs a first voltage through the output end when the display panel is turned off; the first voltage is less than the semi-analog power supply voltage and the discharge time of the first voltage is less than the discharge time of the analog power supply voltage. According to the technical scheme provided by the utility model, the semi-analog power supply voltage can be always smaller than the analog power supply voltage.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and in particular to a display panel and a display device. Background Technology

[0002] To meet the operational requirements of different circuit modules in display products while balancing energy efficiency and circuit performance, a half-voltage design can be used to convert a high power supply voltage to a suitable low power supply voltage, thereby powering different circuit modules. For example, a half-voltage circuit can convert analog power supply (analog VDD, AVDD) voltage to half-analog power supply (half AVDD, HAVDD) voltage, where HAVDD voltage is half the AVDD voltage, for modules requiring lower operating voltages.

[0003] To improve the stability and load-carrying capacity of the HAVDD voltage, the HAVDD voltage can be passed through the operational amplifier (OP) of the power integrated circuit (power IC) before supplying power to the circuit module.

[0004] However, during the power-off process of the display product, there is a situation where the potential of HAVDD is higher than that of AVDD, which does not meet the requirements of the chip specification (IC SPEC). Utility Model Content

[0005] This invention provides a display panel and a display device so that the display product can meet the requirement that the potential of analog power supply (analog VDD, AVDD) is higher than that of semi-analog power supply (half AVDD, HAVDD).

[0006] In a first aspect, this utility model provides a display panel, comprising: a half-voltage circuit, a buck circuit, and a power management integrated circuit; the output terminal of the half-voltage circuit is connected to the input terminal of the buck circuit, and the output terminal of the buck circuit is connected to the input terminal of an operational amplifier in the power management integrated circuit; the half-voltage circuit receives an analog power supply voltage through its input terminal and outputs a half-analog power supply voltage through its output terminal, the half-analog power supply voltage being half of the analog power supply voltage; the buck circuit receives the half-analog power supply voltage through its input terminal and outputs the half-analog power supply voltage through its output terminal when the display panel is powered on, and outputs a first voltage through its output terminal when the display panel is powered off, the first voltage being less than the half-analog power supply voltage and the discharge time of the first voltage being less than the discharge time of the analog power supply voltage.

[0007] In conjunction with the first aspect, in one possible implementation, the potential of the first voltage is 0.

[0008] In conjunction with the first aspect, in one possible implementation, the step-down circuit includes a control module; the control module includes a first terminal, a second terminal, and a third terminal, the first terminal of the control module being connected to the output terminal of the half-voltage circuit, and the third terminal of the control module being connected to the input terminal of the operational amplifier; the control module receives the semi-analog power supply voltage through the first terminal, obtains a reference voltage through the second terminal, and outputs the semi-analog power supply voltage or the first voltage through the third terminal based on a voltage comparison result between the semi-analog power supply voltage and the reference voltage, wherein the reference voltage is related to the power-on / off state of the display panel.

[0009] In conjunction with the first aspect, in one possible implementation, the control module is a voltage comparator; the voltage comparator includes a positive input terminal, an inverting input terminal, and an output terminal; the positive input terminal of the voltage comparator is connected to the output terminal of the half-voltage circuit, and the output terminal of the voltage comparator is connected to the operational amplifier; the voltage comparator receives the half-analog power supply voltage through its positive input terminal, receives the reference voltage through its inverting input terminal, and outputs the half-analog power supply voltage through its output terminal when the half-analog power supply voltage is greater than the reference voltage, and outputs the first voltage through its output terminal when the half-analog power supply voltage is less than the reference voltage.

[0010] In conjunction with the first aspect, in one possible implementation, the reference voltage is a gate low voltage when the display panel is powered on, and a gate high voltage when the display panel is powered off.

[0011] In conjunction with the first aspect, in one possible implementation, the step-down circuit further includes a first switching circuit and a second switching circuit; a first terminal of the first switching circuit and a first terminal of the second switching circuit are connected to a second voltage, a second terminal of the first switching circuit and a second terminal of the second switching circuit are connected to a reference voltage, and a third terminal of the first switching circuit and a third terminal of the second switching circuit are connected to the inverting input terminal of the voltage comparator; the second voltage is greater than the gate low voltage and less than the gate high voltage; the first switching circuit receives an electrical signal through its first and second terminals, and outputs the electrical signal received from the second terminal through its third terminal when the voltage of the electrical signal received from the first terminal is greater than the voltage of the electrical signal received from the second terminal; the second switching circuit receives an electrical signal through its first and second terminals, and outputs the electrical signal received from the second terminal through its third terminal when the voltage of the electrical signal received from the first terminal is less than the voltage of the electrical signal received from the second terminal.

[0012] In conjunction with the first aspect, in one possible implementation, the potential of the second voltage is 0.

[0013] In conjunction with the first aspect, in one possible implementation, the first switching circuit is an NMOS and the second switching circuit is a PMOS.

[0014] In conjunction with the first aspect, in one possible implementation, the display panel further includes a source driver chip; the output of the operational amplifier is connected to the input of the source driver chip.

[0015] Secondly, the present invention provides a display device, which includes a display panel as described in the first aspect or any implementation thereof.

[0016] The beneficial effects of this utility model are as follows: by adding a step-down circuit to the half-voltage circuit and the power management integrated circuit, the step-down circuit can output HAVDD voltage to the operational amplifier in the power management integrated circuit when the display panel is powered on, so that the display panel can work normally; when the display panel is powered off, the HAVDD voltage is pulled down to a first voltage, and the discharge time of the first voltage is less than the discharge time of AVDD, so that the HAVDD voltage is always less than the AVDD voltage, and the display panel meets the chip specification requirements. Attached Figure Description

[0017] Figure 1 This is a waveform diagram of the AVDD and HAVDD voltages when the screen is off;

[0018] Figure 2 A schematic structural diagram of a display panel provided by this utility model;

[0019] Figure 3 A schematic structural diagram of another display panel provided by this utility model;

[0020] Figure 4 A schematic structural diagram of another display panel provided by this utility model;

[0021] Figure 5 A schematic structural diagram of another display panel provided by this utility model;

[0022] Figure 6 A schematic structural diagram of another display panel provided by this utility model;

[0023] Figure 7 The waveform diagrams of AVDD and HAVDD voltages provided by this utility model are shown. Detailed Implementation

[0024] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0025] To facilitate understanding of the technical solution provided by this utility model, the relevant concepts are explained below.

[0026] 1. Semi-pressure design

[0027] To meet the operational requirements of different circuit modules in display products, while also considering energy efficiency and performance, various power supply voltages are used. Half-voltage design involves converting a higher power supply voltage to a suitable lower voltage to power specific circuit modules, thereby satisfying their specific power supply voltage requirements.

[0028] For example, an analog power supply (analog VDD, AVDD) voltage can be converted to a half analog power supply (half AVDD, HAVDD) voltage using a half-voltage circuit, where the HAVDD voltage is half the AVDD voltage.

[0029] 2. Source driver chip

[0030] A source driver chip can drive the source of a thin-film transistor (TFT). For example, a source driver chip can output an analog voltage signal to the source of a TFT to control the brightness and color of pixels on the screen.

[0031] A source driver chip can be understood as a source integrated circuit (sourceIC), or as a timing embedded driver integrated circuit (TCON embedded driverIC, TEDIC) formed by integrating a timing controller (TCON) and a source integrated circuit, or as a touch and display driver integration (TDDI) chip.

[0032] 3. Enable all output (XAO) functions.

[0033] XAO, also known as XON, is a technology used in liquid crystal displays (LCDs) to prevent image retention. When an LCD is powered off, the charge stored in the pixel storage capacitors causes the corresponding pixel units to be in different gray levels, thus leaving some image residue on the screen. To solve this problem, at the moment of power-off, the scan driver IC triggers the XON function, fully opening all output signals to release and neutralize the residual charge in the pixels, thereby preventing image retention. It should be noted that after the XON function is triggered, the gate low voltage (VGL) potential in the display panel is rapidly pulled up to the gate high voltage (VGH).

[0034] The following is combined Figure 1 The technical problem to be solved by this application is explained.

[0035] In notebook computer design, after obtaining the HAVDD voltage through the half-voltage circuit, in order to improve the stability and load capacity of the HAVDD voltage, the HAVDD voltage can be passed through the operational amplifier (OP) in the power management integrated circuit (power IC) before being input to the source driver chip, thereby realizing the driving of the source of the TFT.

[0036] However, during screen shutdown, the AVDD voltage can discharge naturally to ground (GND) relatively quickly, or in other words, it can discharge naturally to 0 potential relatively quickly. But the operating circuitry (OP) in the power IC discharges more slowly, resulting in a slower discharge rate for the HAVDD voltage. This leads to a situation where the HAVDD potential is higher than the AVDD potential during screen shutdown. However, the IC specification (IC SPEC) requires that the AVDD voltage must always be higher than the HAVDD voltage. Therefore, this phenomenon does not meet the IC specification requirements.

[0037] In addition, there is a diode between HAVDD and AVDD inside the source driver chip to prevent electrostatic discharge (ESD). If the HAVDD voltage is greater than the AVDD voltage, the diode may be forward biased, resulting in a large current that could damage the source driver chip.

[0038] Figure 1This is a waveform diagram of the AVDD and HAVDD voltages when the screen is off. Figure 1 As shown, when the screen is normally powered off, the AVDD and HAVDD voltages begin to discharge naturally. The AVDD and HAVDD voltages converge at approximately 400 milliseconds (ms). After 400ms, because the discharge rate of the HAVDD voltage is slower than that of the AVDD voltage, the HAVDD voltage may appear higher than the AVDD voltage. If the screen is quickly turned on at this time, the HAVDD voltage may be higher than the AVDD voltage because neither the AVDD nor HAVDD voltages have fully discharged, potentially damaging the source driver chip.

[0039] In view of this, this application provides a display panel and a display device. The technical solution provided in this application adds a step-down circuit between the half-voltage circuit and the power integrated circuit (power IC). After receiving the HAVDD voltage from the half-voltage circuit, the step-down circuit normally outputs the HAVDD voltage to the operational amplifier in the power management IC when the display panel is powered on, enabling the display panel to operate normally. When the display panel is powered off, it pulls the HAVDD potential down to a certain potential (such as GND) so that the discharge time of the HAVDD voltage is less than the discharge time of the AVDD voltage, thereby ensuring that the display panel meets the chip specification requirements. Powering on the display panel can be understood as turning on the power supply to the display panel, and powering off the display panel can be understood as turning off the power supply to the display panel.

[0040] It should be noted that the technical solutions provided in this application are not limited to the design of notebook computers, but can also be applied to the design of other computer models, and no specific restrictions are imposed here.

[0041] The following is combined Figures 2 to 7 The technical solution provided by this utility model will be described below.

[0042] Figure 2 This is a schematic structural diagram of a display panel provided by this utility model. Figure 2 As shown, the display panel 200 includes a half-voltage circuit 210, a buck circuit 220, and a power management integrated circuit 230, which includes an operational amplifier 231.

[0043] The half-voltage circuit 210 includes an input terminal and an output terminal, the buck circuit 220 includes an input terminal and an output terminal, and the operational amplifier 231 includes an input terminal and an output terminal. The output terminal of the half-voltage circuit 210 is connected to the input terminal of the buck circuit 220, and the output terminal of the buck circuit 220 is connected to the input terminal of the operational amplifier 231.

[0044] The half-voltage circuit 210 receives the AVDD voltage through its input terminal and outputs the HAVDD voltage through its output terminal. The HAVDD voltage is half of the AVDD voltage.

[0045] The step-down circuit 220 receives the HAVDD voltage at its input terminal and outputs the HAVDD voltage at its output terminal when the display panel 200 is powered on. When the display panel 200 is powered off, it outputs a first voltage at its output terminal. The first voltage is less than the HAVDD voltage, and its discharge time is less than the discharge time of the HAVDD voltage. The discharge time of the voltage can be understood as the time required for the voltage to drop to a reference potential (such as GND).

[0046] The operational amplifier 231 in the power management integrated circuit 230 can improve the stability and load-driving capability of the input voltage. The input voltage is either the HAVDD voltage or a first voltage.

[0047] In this application, by adding a step-down circuit to the half-voltage circuit and the power management integrated circuit, the step-down circuit can output HAVDD voltage to the operational amplifier in the power management integrated circuit when the display panel is powered on, so that the display panel can work normally; when the display panel is powered off, it pulls the HAVDD voltage down to a first voltage, the discharge time of the first voltage is less than the discharge time of AVDD, thereby avoiding the problem that the HAVDD voltage is greater than the AVDD voltage when the display panel is powered off, so that the display panel meets the chip specification requirements.

[0048] In one possible implementation, the potential of the first voltage can be 0. That is, when the display panel is turned off, the buck circuit can directly pull the potential of HAVDD down to GND, so that the HAVDD voltage is always less than the AVDD voltage when the display panel is turned off, reducing the risk that the source driver chip may be damaged due to large current.

[0049] Figure 3 A schematic structural diagram of another display panel provided by this utility model. (See diagram for reference.) Figure 3 As shown, the step-down circuit 220 includes a control module 221, which has a first terminal, a second terminal, and a third terminal. The first terminal of the control module 221 is connected to the output terminal of the step-down circuit 210, and the third terminal of the control module 221 is connected to the input terminal of the operational amplifier 231.

[0050] The control module 221 receives the HAVDD voltage through its first terminal, obtains a reference voltage through its second terminal, and outputs either the HAVDD voltage or a first voltage through its third terminal based on a voltage comparison between the HAVDD voltage and the reference voltage. The reference voltage is related to the power-on / off state of the display panel.

[0051] It should be noted that the rule by which the control module 221 outputs the HAVDD voltage or the first voltage through its third terminal based on the voltage comparison result between the HAVDD voltage and the reference voltage can be set according to actual needs, and this application does not impose any restrictions on this. For example, when the display panel 200 is powered on, the reference voltage can be greater than the HAVDD voltage, thereby causing the control module 221 to output the HAVDD voltage through its third terminal; when the display panel 200 is powered off, the reference voltage can be less than the HAVDD voltage, thereby causing the control module 221 to output the first voltage through its third terminal. Similarly, when the display panel 200 is powered on, the reference voltage can be less than the HAVDD voltage, thereby causing the control module 221 to output the HAVDD voltage through its third terminal; when the display panel 200 is powered off, the reference voltage can be greater than the HAVDD voltage, thereby causing the control module 221 to output the first voltage through its third terminal.

[0052] In one possible implementation, the reference voltage can be provided by a voltage source, or by a current source and a resistor; this application does not limit this.

[0053] In one possible implementation, the control module 221 can be a voltage comparator, such as... Figure 4 As shown.

[0054] See Figure 4 The voltage comparator includes a positive input terminal, an inverting input terminal, and an output terminal. The positive input terminal of the voltage comparator is connected to the output terminal of the half-voltage circuit 210, and the output terminal of the voltage comparator is connected to the operational amplifier 231.

[0055] The voltage comparator receives the HAVDD voltage from the half-voltage circuit 210 through its positive input terminal, receives a reference voltage through its inverting input terminal, and outputs the HAVDD voltage through its output terminal when the HAVDD voltage is greater than the reference voltage, and outputs a first voltage through its output terminal when the HAVDD voltage is less than the reference voltage.

[0056] In one possible implementation, the reference voltage when the display panel is powered on can be VGL, and the reference voltage when the display panel is powered off can be VGH. It should be noted that when the display panel is powered off, the XON function will pull the potential of VGL high to VGH, thus achieving the function of two potentials with a single reference voltage source, reducing the number of power supplies required and simplifying the circuit design.

[0057] In one possible implementation, the step-down circuit 220 may further include a first switching circuit 222 and a second switching circuit 223, such as... Figure 5 As shown.

[0058] See Figure 5The first switching circuit 222 includes a first terminal, a second terminal, and a third terminal. The first switching circuit 222 receives electrical signals through the first terminal and the second terminal, and outputs the electrical signal input from the second terminal through the third terminal when the voltage of the electrical signal input at the first terminal is greater than the voltage of the electrical signal input at the second terminal.

[0059] The second switching circuit 223 includes a first terminal, a second terminal, and a third terminal. The second switching circuit 223 receives electrical signals through the first terminal and the second terminal, and outputs the electrical signal input from the second terminal through the third terminal when the voltage of the electrical signal input at the first terminal is less than the voltage of the electrical signal input at the second terminal.

[0060] The first terminal of the first switching circuit 222 and the first terminal of the second switching circuit 223 are connected to the second voltage. The second terminal of the first switching circuit 222 and the second terminal of the second switching circuit 223 are connected to the reference voltage. The third terminal of the first switching circuit 222 and the third terminal of the second switching circuit 223 are connected to the inverting input terminal of the voltage comparator. Wherein, when the reference voltages are VGL and VGH, the second voltage is greater than VGL and less than VGH.

[0061] In one possible implementation, the second voltage can be provided by a voltage source, or it can be provided in the form of a current source and a resistor, without limitation.

[0062] In one possible implementation, the potential of the second voltage can be 0, or the first terminal of the first switching circuit 222 and the first terminal of the second switching circuit 223 can be grounded, thereby reducing the number of power inputs and simplifying the circuit design.

[0063] In one possible implementation, the first switching circuit can be an N-channel metal-oxide-semiconductor field-effect transistor (NMOS), and the second switching circuit can be a P-channel metal-oxide-semiconductor field-effect transistor (PMOS), such as... Figure 6 As shown.

[0064] Understandably, the first terminal of the first switching circuit 222 is the gate of the NMOS, the second terminal of the first switching circuit 222 is the source of the NMOS, and the third terminal of the first switching circuit 222 is the drain of the NMOS. Correspondingly, the first terminal of the second switching circuit 223 is the gate of the PMOS, the second terminal of the second switching circuit 223 is the source of the PMOS, and the third terminal of the second switching circuit 223 is the drain of the PMOS.

[0065] It can be seen that, Figure 6 The potential of the first voltage is 0, and the potential of the second voltage is 0.

[0066] like Figure 6 As shown, when the display panel is powered on, the reference voltage is VGL, so the NMOS is turned on and the PMOS is turned off. The positive input of the voltage comparator receives the HAVDD voltage from the half-voltage circuit 210, and the negative input receives VGL from the NMOS. The voltage comparator outputs the HAVDD voltage through the output terminal, enabling the display panel to work normally. When the display panel is powered off, the XON function is triggered, causing the potential of VGL to be quickly pulled up to VGH. That is, the reference voltage is VGH, so the NMOS is turned off and the PMOS is turned on. At this time, the positive input of the voltage comparator receives the HAVDD voltage from the half-voltage circuit 210, and the negative input receives VGH from the PMOS. The voltage comparator outputs the first voltage through the output terminal, thereby pulling the potential of the HAVDD voltage down to GND when the display panel is powered off, so that the HAVDD voltage is always less than the AVDD voltage.

[0067] See Figure 6 The display panel 200 may also include a source driver chip 240. The input terminal of the source driver chip 240 is connected to the output terminal of the operational amplifier 231.

[0068] The source driver chip 240 receives voltage from the operational amplifier 231 and outputs analog voltage signals to the screen to control the brightness and color of the pixels in the screen.

[0069] Figure 7 The diagram shows the waveforms of the AVDD and HAVDD voltages provided by this invention. Figure 7 As shown, when the display panel is powered off, the HAVDD voltage can be pulled down to GND in approximately 127ms. This means the HAVDD voltage can be pulled down to GND within 400ms, ensuring that the HAVDD voltage remains lower than the AVDD voltage. Furthermore, the technical solution provided by this invention can shorten the interval between powering on and off the display panel.

[0070] The present invention also provides a display device, including a display panel as described in any of the foregoing embodiments.

[0071] In the description of this utility model, it should be noted that the terms "first", "second" and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0072] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the term "connection" should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances. Furthermore, the technical features involved in the different embodiments of this utility model described above can be combined with each other as long as they do not conflict with each other.

[0073] It should be emphasized that the above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model shall still fall within the scope of the technical solution of the present utility model.

Claims

1. A display panel, characterized in that, include: Half-voltage circuits, buck circuits, and power management integrated circuits; The output terminal of the half-voltage circuit is connected to the input terminal of the buck circuit, and the output terminal of the buck circuit is connected to the input terminal of the operational amplifier in the power management integrated circuit. The half-voltage circuit receives an analog power supply voltage at its input terminal and outputs a half-analog power supply voltage at its output terminal, wherein the half-analog power supply voltage is half of the analog power supply voltage. The step-down circuit receives the semi-analog power supply voltage through its input terminal, outputs the semi-analog power supply voltage through its output terminal when the display panel is powered on, and outputs a first voltage through its output terminal when the display panel is powered off. The first voltage is less than the semi-analog power supply voltage and the discharge time of the first voltage is less than the discharge time of the analog power supply voltage.

2. The display panel according to claim 1, characterized in that, The potential of the first voltage is 0.

3. The display panel according to claim 2, characterized in that, The step-down circuit includes a control module; The control module includes a first terminal, a second terminal, and a third terminal. The first terminal of the control module is connected to the output terminal of the half-voltage circuit, and the third terminal of the control module is connected to the input terminal of the operational amplifier. The control module inputs the semi-analog power supply voltage through a first terminal, obtains a reference voltage through a second terminal, and outputs the semi-analog power supply voltage or the first voltage through a third terminal based on the voltage comparison result between the semi-analog power supply voltage and the reference voltage. The reference voltage is related to the power on / off state of the display panel.

4. The display panel according to claim 3, characterized in that, The control module is a voltage comparator; The voltage comparator includes a positive input terminal, an inverting input terminal, and an output terminal. The positive input terminal of the voltage comparator is connected to the output terminal of the half-voltage circuit, and the output terminal of the voltage comparator is connected to the operational amplifier. The voltage comparator receives the semi-analog power supply voltage through its positive input terminal, receives the reference voltage through its inverting input terminal, and outputs the semi-analog power supply voltage through its output terminal when the semi-analog power supply voltage is greater than the reference voltage, and outputs the first voltage through its output terminal when the semi-analog power supply voltage is less than the reference voltage.

5. The display panel according to claim 4, characterized in that, When the display panel is powered on, the reference voltage is a low gate voltage; when the display panel is powered off, the reference voltage is a high gate voltage.

6. The display panel according to claim 5, characterized in that, The step-down circuit also includes a first switching circuit and a second switching circuit. The first terminal of the first switching circuit and the first terminal of the second switching circuit are connected to the second voltage, the second terminal of the first switching circuit and the second terminal of the second switching circuit are connected to the reference voltage, and the third terminal of the first switching circuit and the third terminal of the second switching circuit are connected to the inverting input terminal of the voltage comparator. The second voltage is greater than the gate low voltage and less than the gate high voltage. The first switching circuit receives electrical signals through a first terminal and a second terminal, and outputs the electrical signal input from the second terminal through a third terminal when the voltage of the electrical signal input at the first terminal is greater than the voltage of the electrical signal input at the second terminal. The second switching circuit receives electrical signals through a first terminal and a second terminal, and outputs the electrical signal received from the second terminal through a third terminal when the voltage of the electrical signal received at the first terminal is less than the voltage of the electrical signal received at the second terminal.

7. The display panel according to claim 6, characterized in that, The potential of the second voltage is 0.

8. The display panel according to claim 7, characterized in that, The first switching circuit is an NMOS, and the second switching circuit is a PMOS.

9. The display panel according to any one of claims 1 to 8, characterized in that, The display panel also includes a source driver chip; The output terminal of the operational amplifier is connected to the input terminal of the source driver chip.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 9.