Control circuit for automatic power-on and power-off of hard disk socket

Abstract

The utility model relates to an automatic power-on and power-off control circuit for a hard disk socket, which comprises a hard disk interface SATA1, the hard disk interface SATA1 is connected with a detection control circuit, the detection control circuit comprises a metal oxide semiconductor (MOS) tube Q16, a grid electrode of the MOS tube Q16 is connected to a GND4 pin of the hard disk interface SATA1, the grid electrode of the MOS tube Q16 is further connected with a resistor R72, the resistor R72 is connected with an external mainboard power supply, and the mainboard power supply is connected with a power supply. The drain electrode of the MOS tube Q16 is connected with a resistor R73 and a capacitor C156, the resistor R73 is connected with an external mainboard power supply, the capacitor C156 is grounded, the drain electrode of the MOS tube Q16 is further connected with a power switch circuit, the power switch circuit is connected with the external mainboard power supply, and the power switch circuit is further connected with a hard disk interface SATA1. And the surge phenomenon cannot be caused at the moment of inserting the hard disk.

Description

Technical Field

[0001] This utility model relates to the field of hard disk control circuits, and more specifically, to a control circuit for automatic power-on and power-off of a hard disk socket. Background Technology

[0002] SATA hard drives are among the most common computer peripherals. With technological advancements and increased user demand for convenience, many motherboards now support hot-swapping of SATA hard drives. Hot-swapping refers to inserting or removing a hard drive into or from the system without shutting down the system power, thus improving the convenience and ease of maintenance of computer systems.

[0003] Hot-swapping hard drives involves their power supply. In traditional SATA interface designs, the power socket is already energized before the hard drive is plugged into the motherboard's SATA power connector, ready to supply power to the plugged-in hard drive at any time. The drawback of this is that when the hard drive is plugged in, the power supply is instantly connected to the hard drive, which can momentarily cause surge current or voltage spikes. Such electrical surges can damage not only the hard drive's controller chip but also the motherboard's power management module. Utility Model Content

[0004] To address the aforementioned shortcomings of existing technologies, a control circuit for automatic power-on and power-off of a hard disk socket is provided.

[0005] The technical solution adopted by this utility model to solve its technical problem is: a control circuit for automatic power-on and power-off of a hard drive socket, including a hard drive interface SATA1. The hard drive interface SATA1 is connected to a detection and control circuit for automatically detecting and controlling the hard drive. The detection and control circuit includes a MOSFET Q16. The gate of the MOSFET Q16 is connected to the GND4 pin of the hard drive interface SATA1. The gate of the MOSFET Q16 is also connected to a resistor R72, which is connected to the external motherboard power supply. The drain of the MOSFET Q16 is connected to a resistor R73 and a capacitor C156. The resistor R73 is connected to the external motherboard power supply, and the capacitor C156 is grounded. The drain of the MOSFET Q16 is also connected to a power switch circuit, which is connected to the external motherboard power supply and also connected to the hard drive interface SATA1. The source of the MOSFET Q16 is grounded.

[0006] Preferably, the power switch circuit includes a first switch circuit that provides 12V voltage and a second switch circuit that provides 5V voltage. Both the first switch circuit and the second switch circuit are connected to the drain of the MOSFET Q16. Both the first switch circuit and the second switch circuit are also connected to the hard drive interface SATA1.

[0007] Preferably, the first switching circuit includes a first switching chip U29. The EN pin of the first switching chip U29 is connected to the drain of the MOSFET Q16. The IN pin of the first switching chip U29 is connected to a capacitor C146, which is grounded. The IN pin of the first switching chip U29 is also connected to the motherboard power supply that provides 12V voltage. The CUT pin of the first switching chip U29 is connected to the hard drive interface SATA1. The CUT pin of the first switching chip U29 is also connected to capacitors C150, C153, and C155. The C150 is grounded, and the C153 and C155 are also connected to the C150. The first switching chip U29 is also grounded.

[0008] Preferably, the SST pin of the first switch chip U29 is connected to a capacitor C169, and the capacitor C169 is grounded.

[0009] Preferably, the second switching circuit includes a second switching chip U28. The EN pin of the second switching chip U28 is connected to the drain of the MOSFET Q16. The IN pin of the second switching chip U28 is connected to a capacitor C144, which is grounded. The IN pin of the second switching chip U28 is also connected to a motherboard power supply providing 5V. The CUT pin of the second switching chip U28 is connected to the hard drive interface SATA1. The CUT pin of the second switching chip U28 is also connected to capacitors C147, C148, and C149. Capacitor C147 is grounded. Capacitors C148 and C149 are also connected to capacitor C147. The second switching chip U28 is grounded.

[0010] Preferably, the SST pin of the second switch chip U28 is connected to a capacitor C168, which is grounded.

[0011] The beneficial effects of this invention are as follows: When no hard drive is inserted, the GND4 pin of the SATA1 hard drive interface is in a high-level state due to the influence of resistor R72. Simultaneously, the GND4 pin of the SATA1 hard drive interface is connected to the gate of MOSFET Q16, making MOSFET Q16 conduct. The drain of MOSFET Q16 is at a low level, which controls the power switch circuit to keep the power channel closed. That is, at this time, the external motherboard power supply to the SATA1 hard drive interface is not supplied through the power switch circuit. Therefore, at the moment the hard drive is inserted, the power socket is not energized, and no surge phenomenon will occur.

[0012] When a hard drive is inserted, the GND4 pin of the SATA1 interface is connected to the hard drive's ground network, becoming low. This causes the gate of MOSFET Q16 to go low, turning Q16 off. At this time, the drain of MOSFET Q16 is high due to the influence of resistor R73, thus controlling the power switch circuit to turn on and provide power to the SATA1 interface, i.e., to the hard drive. Attached Figure Description

[0013] Figure 1 This is an overall circuit diagram of an embodiment of this utility model;

[0014] Figure 2 This is a circuit diagram of the detection and control circuit according to an embodiment of the present invention;

[0015] Figure 3 This is a circuit diagram of the power switch circuit of an embodiment of this utility model. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below. Obviously, the described embodiments are some embodiments of this utility model, but not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model. In addition, the directional terms mentioned in this utility model, such as "up," "down," "front," "back," "left," "right," "inner," and "outer," are only for reference to the directions in the accompanying drawings. The directional terms are used to better and more clearly explain and understand this utility model, and are not intended to indicate or imply the necessary orientation of this utility model. Therefore, they should not be construed as limitations on this utility model.

[0017] Examples of embodiments of this utility model Figures 1 to 3 As shown, a control circuit for automatic power-on and power-off of a hard drive socket includes a hard drive interface SATA1. The SATA1 interface is connected to a detection and control circuit for automatically detecting and controlling the hard drive. The detection and control circuit includes a MOSFET Q16. The gate of the MOSFET Q16 is connected to the GND4 pin of the SATA1 interface. A resistor R72 is also connected to the gate of the MOSFET Q16, and R72 is connected to the external motherboard power supply. A resistor R73 and a capacitor C156 are connected to the drain of the MOSFET Q16. R73 is connected to the external motherboard power supply, and C156 is grounded. A power switch circuit is also connected to the drain of the MOSFET Q16, and this power switch circuit is connected to both the external motherboard power supply and the SATA1 interface. The source of the MOSFET Q16 is grounded.

[0018] When no hard drive is inserted, the GND4 pin of the SATA1 hard drive interface is in a high-level state due to the influence of resistor R72. Simultaneously, the GND4 pin of the SATA1 hard drive interface is connected to the gate of MOSFET Q16, making MOSFET Q16 conduct. The drain of MOSFET Q16 is at a low level, which controls the power switch circuit to keep the power channel off. That is, at this time, the external motherboard power supply to the SATA1 hard drive interface is not supplying power through the power switch circuit. Therefore, when a hard drive is inserted, the power socket is not energized, and no surge phenomenon will occur.

[0019] When a hard drive is inserted, the GND4 pin of the SATA1 interface is connected to the hard drive's ground network, becoming low. This causes the gate of MOSFET Q16 to go low, turning Q16 off. At this time, the drain of MOSFET Q16 is high due to the influence of resistor R73, thus controlling the power switch circuit to turn on and provide power to the SATA1 interface, i.e., to the hard drive.

[0020] Further improvements, such as Figure 1 and Figure 3 As shown, the power switch circuit includes a first switch circuit that provides 12V voltage and a second switch circuit that provides 5V voltage. Both the first and second switch circuits are connected to the drain of the MOSFET Q16. Both the first and second switch circuits are also connected to the hard drive interface SATA1.

[0021] Further improvements, such as Figure 1 and Figure 3As shown, the first switching circuit includes a first switching chip U29. The EN pin of the first switching chip U29 is connected to the drain of the MOSFET Q16. A capacitor C146 is connected to the input pin IN of the first switching chip U29, and the capacitor C146 is grounded. The input pin IN of the first switching chip U29 is also connected to a 12V motherboard power supply. Preferably, the input pin IN of the first switching chip U29 includes pins IN1, IN2, and IN3. Pins IN1, IN2, and IN3 of the first switching chip U29 are all connected to the capacitor C146 and the 12V motherboard power supply. The power-off pin CUT of the first switch chip U29 is connected to the hard drive interface SATA1. Preferably, the power-off pin CUT of the first switch chip U29 includes pin CUT1, pin CUT2 and pin CUT3. Pins CUT1, pin CUT2 and pin CUT3 of the first switch chip U29 are all connected to the hard drive interface SATA1. The power-off pin CUT of the first switch chip U29 is also connected to capacitors C150, C153 and C155. Capacitor C150 is grounded. Capacitors C153 and C155 are also connected to capacitor C150. The first switch chip U29 is also grounded. The first switch circuit provides or disconnects 12V power to the hard drive interface SATA1.

[0022] Further improvements, such as Figure 1 and Figure 3 As shown, the SST pin of the first switch chip U29 is connected to a capacitor C169, which is grounded. The capacitor C169, together with the resistor R73, slows down the process of the drain level of the MOS transistor Q16 changing from low to high.

[0023] Further improvements, such as Figure 1 and Figure 3As shown, the second switching circuit includes a second switching chip U28. The EN pin of the second switching chip U28 is connected to the drain of the MOSFET Q16. A capacitor C144 is connected to the input pin IN of the second switching chip U28, and the capacitor C144 is grounded. The input pin IN of the second switching chip U28 is also connected to the motherboard power supply providing 5V. Preferably, the second switching chip U28 and the first switching chip U29 are the same chip. The input pin IN of the second switching chip U28 also includes pins IN1, IN2, and IN3. Pins IN1, IN2, and IN3 of the second switching chip U28 are all connected to the capacitor C144 and the motherboard power supply providing 5V. The second switching chip U28 is connected to the hard drive interface SATA1 via a power-off pin CUT. The power-off pin CUT of the second switching chip U28 also includes pins CUT1, CUT2, and CUT3. Pins CUT1, CUT2, and CUT3 of the second switching chip U28 are also connected to the hard drive interface SATA1. The power-off pin CUT of the second switching chip U28 is also connected to capacitors C147, C148, and C149. Capacitor C147 is grounded, and capacitors C148 and C149 are also connected to capacitor C147. The second switching chip U28 is grounded. The second switching circuit provides or disconnects 5V power to the hard drive interface SATA1.

[0024] Further improvements, such as Figure 1 and Figure 3 Figure 1 Figure 3 As shown, the SST pin of the second switch chip U28 is connected to a capacitor C168, which is grounded. The capacitor C168, together with the resistor R73, also slows down the process of the drain level of the MOS transistor Q16 changing from low to high.

[0025] By using capacitors C169 and C168 in conjunction with resistor R73, the process of the drain voltage of MOSFET Q16 changing from low to high is slow enough to ensure that the power supply of VCC12_SATA1 and VCC5_SATA1 of the hard drive interface SATA1 is turned on smoothly.

[0026] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A control circuit for automatic power-on and power-off of a hard drive socket, comprising a hard drive interface SATA1; characterized in that, The SATA1 hard drive interface is connected to a detection and control circuit for automatically detecting and controlling the hard drive. This detection and control circuit includes a MOSFET Q16. The gate of the MOSFET Q16 is connected to the GND4 pin of the SATA1 hard drive interface. A resistor R72 is also connected to the gate of the MOSFET Q16. The resistor R72 is connected to the external motherboard power supply. A resistor R73 and a capacitor C156 are connected to the drain of the MOSFET Q16. The resistor R73 is connected to the external motherboard power supply. The capacitor C156 is grounded. A power switch circuit is also connected to the drain of the MOSFET Q16. The power switch circuit is connected to the external motherboard power supply and is also connected to the SATA1 hard drive interface. The source of the MOSFET Q16 is grounded.

2. The control circuit for automatic power-on and power-off of a hard disk socket according to claim 1, characterized in that, The power switch circuit includes a first switch circuit that provides 12V voltage and a second switch circuit that provides 5V voltage; both the first and second switch circuits are connected to the drain of the MOSFET Q16; both the first and second switch circuits are also connected to the hard drive interface SATA1.

3. The control circuit for automatic power-on and power-off of a hard disk socket according to claim 2, characterized in that, The first switching circuit includes a first switching chip U29; the EN pin of the first switching chip U29 is connected to the drain of the MOSFET Q16; the IN pin of the first switching chip U29 is connected to a capacitor C146; the capacitor C146 is grounded; the IN pin of the first switching chip U29 is also connected to the motherboard power supply providing 12V voltage; the CUT pin of the first switching chip U29 is connected to the hard drive interface SATA1; the CUT pin of the first switching chip U29 is also connected to capacitors C150, C153, and C155; the capacitor C150 is grounded; the capacitors C153 and C155 are also connected to the capacitor C150; the first switching chip U29 is also grounded.

4. The control circuit for automatic power-on and power-off of a hard disk socket according to claim 3, characterized in that, The SST pin of the first switch chip U29 is connected to a capacitor C169; the capacitor C169 is grounded.

5. The control circuit for automatic power-on and power-off of a hard disk socket according to claim 2, characterized in that, The second switching circuit includes a second switching chip U28; the EN pin of the second switching chip U28 is connected to the drain of the MOSFET Q16; the IN pin of the second switching chip U28 is connected to a capacitor C144; the capacitor C144 is grounded; the IN pin of the second switching chip U28 is also connected to the motherboard power supply providing 5V voltage; the CUT pin of the second switching chip U28 is connected to the hard drive interface SATA1; the CUT pin of the second switching chip U28 is also connected to capacitors C147, C148, and C149; the capacitor C147 is grounded; the capacitors C148 and C149 are also connected to the capacitor C147; the second switching chip U28 is grounded.

6. The control circuit for automatic power-on and power-off of a hard disk socket according to claim 5, characterized in that, The second switch chip U28 has a capacitor C168 connected to its SST pin; the capacitor C168 is grounded.

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