Core board circuit applied to docking station

Abstract

The utility model relates to the technical field of docking stations, in particular to a core board circuit applied to a docking station, which comprises a printed circuit board (PCB), the PCB is provided with a master control circuit, a first sub-control circuit, a second sub-control circuit and a universal serial bus (USB) hub circuit compatible with a universal serial bus (USB) 2.0 standard, and the master control circuit comprises a JHL9480 type control chip supporting a thunder and lightning 5 protocol. The control chip supports the Thunderbolt 5 standard, has the highest data transmission rate of 80Gbps, supports the multi-screen display output capability with higher resolution and a more efficient power management function, and remarkably improves the data transmission speed and the multimedia processing capability. The overall circuit design meets the technical specification of lightning 5, higher-speed data transmission, multi-device expansion and stable compatibility can be achieved, and the urgent requirements of users for high performance and multiple functions and meeting the lightning 5 standard docking station are met.

Description

Technical Field

[0001] This utility model relates to the field of docking station technology, and in particular to a core board circuit for use in docking stations. Background Technology

[0002] With the increasing trend towards thinner and lighter modern electronic devices, especially laptops and tablets, the number and variety of interfaces on these devices have significantly decreased, causing considerable inconvenience for users connecting peripherals. To address this issue, docking stations have emerged. A docking station is an external expansion device that provides a host computer with various peripheral interface expansions, such as USB ports, video output, network ports, and power supplies, greatly improving the connectivity and flexibility of electronic devices.

[0003] In recent years, with the continuous improvement of data transmission speeds and the demand for multi-functional integration, traditional docking stations have become insufficient to meet the needs of high-performance devices. Thunderbolt 5, as the latest generation of high-speed interface standard, integrates faster data transmission, enhanced video output capabilities, and more efficient power supply functions, while also being compatible with the USB4 standard, making it an ideal choice for docking station design. The Thunderbolt 5 standard supports data transmission rates up to 80Gbps, supports higher resolution multi-screen display output, and offers significant improvements in security, compatibility, and scalability, meeting the needs of future high-performance computing and multimedia applications.

[0004] Therefore, designing a Thunderbolt 5 compliant docking station to meet the growing demands for high-speed data transmission, multi-screen display, and efficient power supply has become a pressing technical challenge. Utility Model Content

[0005] In view of this, this utility model proposes a core board circuit that conforms to the Thunderbolt 5 standard and is applied to a docking station.

[0006] This utility model proposes a core board circuit for a docking station, including a PCB circuit board. The PCB circuit board is provided with a main control circuit, a first sub-control circuit, a second sub-control circuit, and a USB hub circuit compatible with the USB 2.0 standard. The main control circuit is electrically connected to the first sub-control circuit, the second sub-control circuit, and the USB hub circuit. The main control circuit includes a JHL9480 control chip that supports the Thunderbolt 5 protocol.

[0007] Furthermore, the AW4, AY4, AY6, AW6, AW10, AY10, AY8, AW8, AW20, AY20, AY22, AW22, AW26, AY26, AY24, AW24, B25, A25, A23, B23, A19, B19, A21, and B21 pins of the control chip are all connected to resistors and capacitors in sequence.

[0008] Capacitors are connected to the M6, N6, L1, L2, K6, L6, A9, B9, A7, B7, A3, B3, A5, B5, R1, T1, V3, U3, C28, C27, G28, G27, L28, L27, R28, and R27 pins of the control chip.

[0009] The K18 and W19 pins of the control chip are both grounded through resistors, and the T8 pin of the control chip is connected to a resistor.

[0010] The control chip has the following pins: AW28, AY28, W26, W27, AH1, AH2, AH3, AJ1, AJ2, AJ3, W1, W2, W3, A1, A2, A4, A6, A8, A10, A11, A12, A13, A14, A15, A16, A17, A18, A20, A22, A24, A26, A27, B1, B2, B4, B6, B8, B10, B11, B12, B13, B14, B... Pins B15, B16, B17, B18, B20, B22, B24, B26, B27, B28, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, D1, D2, D3, D26, D27, D28, E1, E2. Pins E3, E26, F1, F2, F3, F19, F21, F22, F23, F26, F27, F28, G1, G2, G3, G6, G7, G8, G10, G11, G12, G13, G16, G17, G18, G19, G21, G22, G23, G26, H1, H2, H3, H6, H7, H17, H21, H22, H23, H26, H27, H28, J1, J2, J3 Pins: J26, K1, K2, K3, K7, K10, K11, K12, K13, K16, K22, K23, K26, K27, K28, L3, L7, L10, M28, M27, M26, M22, M10, M7, M3, M2, M1, L26, L22, N7, N3, M19, T19, T21, AC7, AC6, AB7, AB6, AA26, AA7, V18, V13, V11.U18 pin, U13 pin, U11 pin, T18 pin, T13 pin, T11 pin, N13 pin, N11 pin, M18 pin, M16 pin, M13 pin, M11 pin, L11 pin, AY3 pin, AY5 pin, AY7 pin, AY9 pin, AY11 pin, AY12 pin, AY13 pin, AY14 pin, AY15 pin, AY16 pin, AY17 pin, AY18 pin, AY19 pin, AY21 pin, AY23 pin, AY25 pin, AY27 pin, AW3 pin, AW5 pin, AW 7-pin, AW9-pin, AW11-pin, AW12-pin, AW13-pin, AW14-pin, AW15-pin, AW16-pin, AW17-pin, AW18-pin, AW19-pin, AW21-pin, AW23-pin, AW25-pin, AW27-pin, AK3-pin, AK4-pin, AK5-pin, AK6-pin, AK7-pin, AK8-pin, AK9-pin, AK10-pin, AK11-pin, AK12-pin, AK13-pin, AK14-pin, AK15-pin, AK16-pin, AK17-pin, AK18-pin, AK... Pin 19, AK20, AK21, AK22, AK23, AK24, AK25, AK26, AK27, AJ26, AJ27, AH27, AH28, AC19, AB8, AB10, AC11, AB12, AB13, AB16, AB17, AB18, AB19, AB21, AB22, AA22, AA23, W7, W8, W10, W11 Pins W12, W13, W22, V7, V8, V10, V22, V26, V27, V28, U7, U10, U22, U23, U26, T2, T3, T7, T10, T22, T23, T26, T27, T28, R2, R3, R26, P1, P2, P3, P26, P27, P28, N10, N22, and N26 are all grounded.

[0011] Furthermore, the first sub-control circuit includes a first MCU chip of type CYPD8225-97BZXIES.

[0012] Furthermore, resistors are connected to pins K4, K12, B3, M10, B7, A5, C1, H1, G1, and A2 of the first MCU chip.

[0013] The F8, F10, F12, H8, H10, K8 and K10 pins of the first MCU chip are all grounded.

[0014] Furthermore, the second sub-control circuit includes a second MCU chip of type CYPM1322-97BZXI.

[0015] Furthermore, the M10, B3, C1, A14, and R1 pins of the second MCU chip are all connected to resistors, and the N1, N2, J1, J2, J14, J15, N14, and N15 pins of the second MCU chip are all grounded through capacitors; the F10, F12, F8, H10, H8, K10, and K8 pins of the second MCU chip are all grounded.

[0016] The H15 pin of the second MCU chip is connected to the R15 pin of the second MCU chip, the source of the SQ4050EY type NMOS transistor QB10, and grounded through a capacitor. The P15 pin of the second MCU chip is connected to the gate of the NMOS transistor QB10. The drain of the NMOS transistor QB10 is connected to the drain of the SQ4050EY type NMOS transistor QB9. The P14 pin of the second MCU chip is connected to the gate of the NMOS transistor QB9. The R14 pin of the second MCU chip is grounded through a resistor and connected to the source of the NMOS transistor QB9 through a resistor. The A15 pin of the second MCU chip is connected to the B15 pin of the second MCU chip through a resistor.

[0017] Furthermore, the USB hub circuit includes a hub chip of type FL5801-2Q2.

[0018] Furthermore, pin 49 of the hub chip is grounded.

[0019] Furthermore, the PCB circuit board is equipped with three USB-C ports that support the Thunderbolt 5 protocol. The USB-C ports are electrically connected to the main control circuit. One USB-C port is used for uplink data transmission, and the other two USB-C ports are used for downlink data transmission.

[0020] Furthermore, the PCB circuit board is provided with at least one gold finger, which is electrically connected to the main control circuit.

[0021] Compared with existing technologies, the beneficial effects of this utility model are as follows: A core board circuit for a docking station includes a PCB circuit board, on which a main control circuit, a first sub-control circuit, a second sub-control circuit, and a USB hub circuit compatible with the USB 2.0 standard are disposed. The main control circuit includes a JHL9480 control chip supporting the Thunderbolt 5 protocol. This control chip supports the Thunderbolt 5 standard, has a maximum data transfer rate of 80Gbps, supports higher resolution multi-screen display output capabilities, and more efficient power management functions, significantly improving data transfer speed and multimedia processing capabilities. The main control circuit is electrically connected to the first sub-control circuit, the second sub-control circuit, and the USB hub circuit. The overall circuit design meets the technical specifications of Thunderbolt 5, enabling higher speed data transfer, multi-device expansion, and stable compatibility, thus solving the user's urgent need for a high-performance, multi-functional, and Thunderbolt 5 compliant docking station. Attached Figure Description

[0022] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0023] Figure 1 A circuit structure schematic diagram of the core board circuit applied to the expansion dock provided in this embodiment of the utility model;

[0024] Figure 2 The circuit structure diagram of the first part of the main control circuit provided in the embodiment of this utility model;

[0025] Figure 3 The second part of the circuit structure diagram of the main control circuit provided in the embodiment of this utility model;

[0026] Figure 4 The circuit structure diagram of the third part of the main control circuit provided in the embodiment of this utility model;

[0027] Figure 5 The fourth part of the circuit structure diagram of the main control circuit provided in the embodiment of this utility model;

[0028] Figure 6 The fifth part of the circuit structure diagram of the main control circuit provided in the embodiment of this utility model;

[0029] Figure 7 A circuit structure diagram of the first sub-control circuit provided in an embodiment of this utility model;

[0030] Figure 8A circuit structure diagram of the first part of the second sub-control circuit provided in an embodiment of this utility model;

[0031] Figure 9 A circuit structure diagram of the second part of the second sub-control circuit provided in an embodiment of this utility model;

[0032] Figure 10 The circuit structure diagram of the USB hub circuit provided in the embodiment of this utility model is shown. Detailed Implementation

[0033] The solutions in the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, and not all of them. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this utility model.

[0034] It should be noted that if the embodiments of this utility model involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0035] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0036] Please refer to Figure 1 As shown, this utility model proposes a core board circuit for a docking station, including a PCB circuit board. The PCB circuit board is provided with a main control circuit, a first sub-control circuit, a second sub-control circuit, and a USB hub circuit compatible with the USB 2.0 standard. The main control circuit is electrically connected to the first sub-control circuit, the second sub-control circuit, and the USB hub circuit. The main control circuit includes a JHL9480 control chip that supports the Thunderbolt 5 protocol.

[0037] Specifically, the core board circuitry used in the docking station features two sub-control circuits, primarily for efficient management and load sharing of different types of peripherals. For example, the first sub-control circuit can focus on processing video signals or high-bandwidth data streams, while the second sub-control circuit can handle the control and management of other peripherals, such as audio, storage devices, or low-speed interfaces. This effectively reduces the load on the main control circuitry, improving the overall system stability and response speed. Furthermore, the dual-control circuitry structure enhances the flexibility and expandability of the core board circuitry used in the docking station, facilitating future functional upgrades and support for diverse interfaces, further meeting users' needs for simultaneous connection of multiple devices and high-performance operation.

[0038] Compared to existing technologies, the core board circuit for the docking station proposed in this embodiment uses a control chip that supports the Thunderbolt 5 standard, boasts a data transmission rate of up to 80Gbps, supports higher-resolution multi-screen display output, and offers more efficient power management, significantly improving data transmission speed and multimedia processing capabilities. The overall circuit design meets Thunderbolt 5 technical specifications, enabling faster data transmission, multi-device expansion, and stable compatibility, thus addressing users' urgent need for a high-performance, multi-functional, Thunderbolt 5 compliant docking station.

[0039] In some embodiments of this application, the AW4, AY4, AY6, AW6, AW10, AY10, AY8, AW8, AW20, AY20, AY22, AW22, AW26, AY26, AY24, AW24, B25, A25, A23, B23, A19, B19, A21, and B21 pins of the control chip are all connected to resistors and capacitors in sequence.

[0040] Capacitors are connected to the M6, N6, L1, L2, K6, L6, A9, B9, A7, B7, A3, B3, A5, B5, R1, T1, V3, U3, C28, C27, G28, G27, L28, L27, R28, and R27 pins of the control chip.

[0041] The K18 and W19 pins of the control chip are both grounded through resistors, and the T8 pin of the control chip is connected to a resistor.

[0042] The control chip has the following pins: AW28, AY28, W26, W27, AH1, AH2, AH3, AJ1, AJ2, AJ3, W1, W2, W3, A1, A2, A4, A6, A8, A10, A11, A12, A13, A14, A15, A16, A17, A18, A20, A22, A24, A26, A27, B1, B2, B4, B6, B8, B10, B11, B12, B13, B14, B... Pins B15, B16, B17, B18, B20, B22, B24, B26, B27, B28, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, D1, D2, D3, D26, D27, D28, E1, E2. Pins E3, E26, F1, F2, F3, F19, F21, F22, F23, F26, F27, F28, G1, G2, G3, G6, G7, G8, G10, G11, G12, G13, G16, G17, G18, G19, G21, G22, G23, G26, H1, H2, H3, H6, H7, H17, H21, H22, H23, H26, H27, H28, J1, J2, J3 Pins: J26, K1, K2, K3, K7, K10, K11, K12, K13, K16, K22, K23, K26, K27, K28, L3, L7, L10, M28, M27, M26, M22, M10, M7, M3, M2, M1, L26, L22, N7, N3, M19, T19, T21, AC7, AC6, AB7, AB6, AA26, AA7, V18, V13, V11.U18 pin, U13 pin, U11 pin, T18 pin, T13 pin, T11 pin, N13 pin, N11 pin, M18 pin, M16 pin, M13 pin, M11 pin, L11 pin, AY3 pin, AY5 pin, AY7 pin, AY9 pin, AY11 pin, AY12 pin, AY13 pin, AY14 pin, AY15 pin, AY16 pin, AY17 pin, AY18 pin, AY19 pin, AY21 pin, AY23 pin, AY25 pin, AY27 pin, AW3 pin, AW5 pin, AW 7-pin, AW9-pin, AW11-pin, AW12-pin, AW13-pin, AW14-pin, AW15-pin, AW16-pin, AW17-pin, AW18-pin, AW19-pin, AW21-pin, AW23-pin, AW25-pin, AW27-pin, AK3-pin, AK4-pin, AK5-pin, AK6-pin, AK7-pin, AK8-pin, AK9-pin, AK10-pin, AK11-pin, AK12-pin, AK13-pin, AK14-pin, AK15-pin, AK16-pin, AK17-pin, AK18-pin, AK... Pin 19, AK20, AK21, AK22, AK23, AK24, AK25, AK26, AK27, AJ26, AJ27, AH27, AH28, AC19, AB8, AB10, AC11, AB12, AB13, AB16, AB17, AB18, AB19, AB21, AB22, AA22, AA23, W7, W8, W10, W11 Pins W12, W13, W22, V7, V8, V10, V22, V26, V27, V28, U7, U10, U22, U23, U26, T2, T3, T7, T10, T22, T23, T26, T27, T28, R2, R3, R26, P1, P2, P3, P26, P27, P28, N10, N22, and N26 are all grounded.

[0043] For details, please refer to Figure 2-6As shown, the JHL9480 control chip, as the core component of the main control circuit, possesses a bidirectional 80Gbps ultra-high-speed transmission capability, supports USB4 v2.0 and Thunderbolt Gen5 protocols, and is compatible with multiple protocols such as PCIe 4.0 and higher, DisplayPort 2.1, USB 3.2 Gen2x2, and USB 2.0. Furthermore, this control chip supports output from up to three 8K displays, supports daisy-chain topology and dynamic bandwidth adjustment, provides a PCIe 4.0x4 lane, and supports advanced functions such as ACS, FBP, PTM, and P2P, optimizing multi-device collaboration and data transmission efficiency. It is also compatible with Windows and macOS systems, meeting high-performance expansion needs. It should be noted that the above description of the control chip's pin connections only covers the connection layout of some pins. For other pin connection structures and related component parameters not mentioned in the text description, please refer to the appendix. Figure 2-6 The details will not be elaborated here. Furthermore, the above connection layout is merely an example; in actual applications, other connection schemes can be adopted according to specific needs, which will not be further illustrated here.

[0044] In some embodiments of this application, the first sub-control circuit includes a first MCU chip of type CYPD8225-97BZXIES.

[0045] For details, please refer to Figure 7 As shown, the CYPD8225-97BZXIES MCU chip, acting as a sub-controller, is a dual-port USB Type-C controller compliant with the latest USB Type-C and Power Delivery specifications. It integrates a 32-bit 48MHz Arm Cortex-M0+ processor and a complete Type-C transceiver, including terminating resistors and dead-battery termination functionality. This MCU chip supports intelligent power distribution and fast charging, provides multiple communication interfaces such as I2C, SPI, and UART, uses a 97-BGA package, and operates over a wide temperature range to meet the demands of complex environments.

[0046] In some embodiments of this application, the K4, K12, B3, M10, B7, A5, C1, H1, G1 and A2 pins of the first MCU chip are all connected to resistors;

[0047] The F8, F10, F12, H8, H10, K8 and K10 pins of the first MCU chip are all grounded.

[0048] Specifically, the above description of the pin connection relationships of the first MCU chip only involves the connection layout of some pins of the first MCU chip. For other pin connection structures and related component parameters not mentioned in the text, please refer to the appendix. Figure 7 The details will not be elaborated here. Furthermore, the above connection layout is merely an example; in actual applications, other connection schemes can be adopted according to specific needs, which will not be further illustrated here.

[0049] In some embodiments of this application, the second sub-control circuit includes a second MCU chip of type CYPM1322-97BZXI.

[0050] For details, please refer to Figure 8-9 As shown, the CYPM1322-97BZXI MCU chip, serving as another sub-controller, features a 32-bit Arm Cortex-M0+ core with a 48MHz clock speed. It is equipped with 256KB of flash memory and 32KB of SRAM, supports low-power design and a hardware encryption engine, and provides security features such as authentication. This MCU chip supports USB-C and USB PD 3.1 protocols, is compatible with 28V / 5A (140W) high-power supply, integrates dual USB Type-C interfaces and power management functions, incorporates a high-voltage regulator and multiple protection circuits (overvoltage, undervoltage, overcurrent, and reverse current protection), supports intelligent power distribution and fast charging, and provides rich communication interfaces such as I2C, SPI, and UART. It uses a 97-BGA package and is suitable for industrial environments.

[0051] In some embodiments of this application, the M10, B3, C1, A14, and R1 pins of the second MCU chip are all connected to resistors; the N1, N2, J1, J2, J14, J15, N14, and N15 pins of the second MCU chip are all grounded through capacitors; and the F10, F12, F8, H10, H8, K10, and K8 pins of the second MCU chip are all grounded.

[0052] The H15 pin of the second MCU chip is connected to the R15 pin of the second MCU chip, the source of the SQ4050EY type NMOS transistor QB10, and grounded through a capacitor. The P15 pin of the second MCU chip is connected to the gate of the NMOS transistor QB10. The drain of the NMOS transistor QB10 is connected to the drain of the SQ4050EY type NMOS transistor QB9. The P14 pin of the second MCU chip is connected to the gate of the NMOS transistor QB9. The R14 pin of the second MCU chip is grounded through a resistor and connected to the source of the NMOS transistor QB9 through a resistor. The A15 pin of the second MCU chip is connected to the B15 pin of the second MCU chip through a resistor.

[0053] Specifically, the above description of the pin connections of the second MCU chip only covers the connection layout of some pins of the second MCU chip. For other pin connection structures and related component parameters not mentioned in the text, please refer to the appendix. Figure 8-9 The details will not be elaborated here. Furthermore, the above connection layout is merely an example; in actual applications, other connection schemes can be adopted according to specific needs, which will not be further illustrated here.

[0054] In some embodiments of this application, the USB hub circuit includes a hub chip of type FL5801-2Q2.

[0055] For details, please refer to Figure 10 As shown, the FL5801-2Q2 hub chip, as the core component of a USB 2.0 hub, supports four downstream ports and is compatible with USB 2.0 high-speed (480Mbps), full-speed (12Mbps), and low-speed (1.5Mbps) transmission protocols. This hub chip integrates overcurrent protection, hot-plug detection, and ESD protection, enhancing system stability and security. It supports independent port power management, allowing flexible configuration of port on / off states, is compatible with multiple operating systems, uses a QFN-32 package, and has a wide operating temperature range to meet the demands of demanding industrial applications.

[0056] In some embodiments of this application, pin 49 of the hub chip is grounded.

[0057] Specifically, the above description of the hub chip pin connections only covers the connection layout of some pins of the hub chip. For other pin connection structures and related component parameters not mentioned in the text, please refer to the appendix. Figure 10 The details will not be elaborated here. Furthermore, the above connection layout is merely an example; in actual applications, other connection schemes can be adopted according to specific needs, which will not be further illustrated here.

[0058] In some embodiments of this application, the PCB circuit board is provided with three USB-C interfaces supporting the Thunderbolt 5 protocol. The USB-C interfaces are electrically connected to the main control circuit. One of the USB-C interfaces is used for uplink data transmission, and the other two USB-C interfaces are used for downlink data transmission.

[0059] Specifically, one USB-C port is an upstream port (also known as Upstream Port A), which connects directly to the PC host and supports up to 140W PD fast charging, meeting the charging needs of high-power devices and ensuring a stable power supply between the host and the docking station. The other two USB-C ports are downstream ports (also known as Downstream Ports Port B and Port D), offering dual-mode expansion capabilities. They can connect to displays supporting Type-C interfaces for high-definition video transmission, and are also compatible with the USB protocol, supporting high-speed data transfer up to 20Gbps to meet the connectivity needs of diverse peripherals. Furthermore, Downstream Port B not only supports high-speed data transfer but also provides up to 20V / 3A auxiliary power, offering additional power support to connected devices and improving the overall system's power supply capacity and stability. Downstream Port D provides 5V / 3A power, suitable for the power needs of low-power devices, ensuring that different types of peripherals receive appropriate power support and enabling efficient collaborative work among multiple devices.

[0060] In some embodiments of this application, the PCB circuit board is provided with at least one gold finger, and the gold finger is electrically connected to the main control circuit.

[0061] Specifically, the gold fingers are electrically connected to the main control circuit, further enriching the interface's expansion capabilities and meeting diverse application needs. Specifically, the Port C interface supports expanding one DP port via DisplayPortAlt Mode technology, supporting up to 7680×4320@60Hz 8K ultra-high-definition output to ensure high-resolution display effects. The Port E interface is equipped with a USB 3.1 Gen2 controller, with a theoretical transmission rate of up to 10Gbps, enabling the expansion of high-speed storage devices or external expansion docks, improving data transmission efficiency and system expansion capabilities. Furthermore, the PCIe port supports PCIe 4.0 x4 channels, with a theoretical bandwidth of up to 64Gbps, meeting high-performance data transmission requirements and further enhancing the overall system performance. This module is backward compatible with Thunderbolt 4, USB4, and USB protocols, supports daisy-chain topology connections, allowing multiple Thunderbolt devices to be used in series, achieving flexible and efficient multi-device expansion.

[0062] The core board circuit for a docking station provided in this embodiment uses an Intel JHL9480 control chip as its core, integrating three Thunderbolt 5 Type-C interfaces and multi-functional gold finger pins, providing complete Thunderbolt 5 protocol support. Based on a PCIe 4.0 x4 channel, the theoretical bandwidth can reach 64Gbps, supporting the Thunderbolt 5 protocol and backward compatible with Thunderbolt 4 and USB4 standards. (The last sentence appears to be incomplete and possibly refers to a different implementation.) 2The Type-C bus protocol collaboratively manages multiple peripheral chips, leveraging the coordination and scheduling capabilities of the JHL9480 control chip to achieve protocol conversion and power management strategy optimization for the Type-C interface. Combined with a security chip, a stable hardware environment is built, effectively enhancing the ability to connect multiple devices.

[0063] Thunderbolt 5 is a new generation of high-speed, multi-functional digital interface launched by Intel, supporting data transfer rates of up to 80Gbps, ultra-high-definition display capabilities of 8K and higher resolutions, and high-power charging up to 140W, meeting the connection needs between higher-performance signal sources and devices. The core board circuit for the docking station provided in this embodiment uses the Intel JHL9480 control chip as the main controller of the Thunderbolt 5 core board circuit. Combined with a corresponding baseboard design, it can form a complete Thunderbolt 5 docking station circuit system.

[0064] It should be noted that the technical solutions of the various embodiments of this utility model can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0065] The above description is only a part or preferred embodiment of this utility model. Neither the text nor the drawings should limit the scope of protection of this utility model. All equivalent structural transformations made using the content of this utility model specification and drawings under the overall concept of this utility model, or direct / indirect applications in other related technical fields, are included within the scope of protection of this utility model.

Claims

1. A core board circuit for use in a docking station, characterized in that, The device includes a PCB circuit board on which a main control circuit, a first sub-control circuit, a second sub-control circuit, and a USB hub circuit compatible with the USB 2.0 standard are disposed; wherein, the main control circuit is electrically connected to the first sub-control circuit, the second sub-control circuit, and the USB hub circuit, and the main control circuit includes a JHL9480 type control chip that supports the Thunderbolt 5 protocol.

2. The core board circuit for a docking station according to claim 1, characterized in that, The control chip's AW4, AY4, AY6, AW6, AW10, AY10, AY8, AW8, AW20, AY20, AY22, AW22, AW26, AY26, AY24, AW24, B25, A25, A23, B23, A19, B19, A21, and B21 pins are all connected to resistors and capacitors in sequence. Capacitors are connected to the M6, N6, L1, L2, K6, L6, A9, B9, A7, B7, A3, B3, A5, B5, R1, T1, V3, U3, C28, C27, G28, G27, L28, L27, R28, and R27 pins of the control chip. The K18 and W19 pins of the control chip are both grounded through resistors, and the T8 pin of the control chip is connected to a resistor. The control chip has the following pins: AW28, AY28, W26, W27, AH1, AH2, AH3, AJ1, AJ2, AJ3, W1, W2, W3, A1, A2, A4, A6, A8, A10, A11, A12, A13, A14, A15, A16, A17, A18, A20, A22, A24, A26, A27, B1, B2, B4, B6, B8, B10, B11, B12, B13, B14, B... Pins B15, B16, B17, B18, B20, B22, B24, B26, B27, B28, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, D1, D2, D3, D26, D27, D28, E1, E2. Pins E3, E26, F1, F2, F3, F19, F21, F22, F23, F26, F27, F28, G1, G2, G3, G6, G7, G8, G10, G11, G12, G13, G16, G17, G18, G19, G21, G22, G23, G26, H1, H2, H3, H6, H7, H17, H21, H22, H23, H26, H27, H28, J1, J2, J3 Pins: J26, K1, K2, K3, K7, K10, K11, K12, K13, K16, K22, K23, K26, K27, K28, L3, L7, L10, M28, M27, M26, M22, M10, M7, M3, M2, M1, L26, L22, N7, N3, M19, T19, T21, AC7, AC6, AB7, AB6, AA26, AA7, V18, V13, V11.U18 pin, U13 pin, U11 pin, T18 pin, T13 pin, T11 pin, N13 pin, N11 pin, M18 pin, M16 pin, M13 pin, M11 pin, L11 pin, AY3 pin, AY5 pin, AY7 pin, AY9 pin, AY11 pin, AY12 pin, AY13 pin, AY14 pin, AY15 pin, AY16 pin, AY17 pin, AY18 pin, AY19 pin, AY21 pin, AY23 pin, AY25 pin, AY27 pin, AW3 pin, AW5 pin, AW 7-pin, AW9-pin, AW11-pin, AW12-pin, AW13-pin, AW14-pin, AW15-pin, AW16-pin, AW17-pin, AW18-pin, AW19-pin, AW21-pin, AW23-pin, AW25-pin, AW27-pin, AK3-pin, AK4-pin, AK5-pin, AK6-pin, AK7-pin, AK8-pin, AK9-pin, AK10-pin, AK11-pin, AK12-pin, AK13-pin, AK14-pin, AK15-pin, AK16-pin, AK17-pin, AK18-pin, AK... Pin 19, AK20, AK21, AK22, AK23, AK24, AK25, AK26, AK27, AJ26, AJ27, AH27, AH28, AC19, AB8, AB10, AC11, AB12, AB13, AB16, AB17, AB18, AB19, AB21, AB22, AA22, AA23, W7, W8, W10, W11 Pins W12, W13, W22, V7, V8, V10, V22, V26, V27, V28, U7, U10, U22, U23, U26, T2, T3, T7, T10, T22, T23, T26, T27, T28, R2, R3, R26, P1, P2, P3, P26, P27, P28, N10, N22, and N26 are all grounded.

3. The core board circuit for a docking station according to claim 1, characterized in that, The first sub-control circuit includes a first MCU chip of type CYPD8225-97BZXIES.

4. The core board circuit for a docking station according to claim 3, characterized in that, Resistors are connected to pins K4, K12, B3, M10, B7, A5, C1, H1, G1, and A2 of the first MCU chip. The F8, F10, F12, H8, H10, K8 and K10 pins of the first MCU chip are all grounded.

5. The core board circuit for a docking station according to claim 1, characterized in that, The second sub-control circuit includes a second MCU chip of type CYPM1322-97BZXI.

6. The core board circuit for a docking station according to claim 5, characterized in that, The M10, B3, C1, A14, and R1 pins of the second MCU chip are all connected to resistors; the N1, N2, J1, J2, J14, J15, N14, and N15 pins of the second MCU chip are all grounded through capacitors; and the F10, F12, F8, H10, H8, K10, and K8 pins of the second MCU chip are all grounded. The H15 pin of the second MCU chip is connected to the R15 pin of the second MCU chip, the source of the SQ4050EY type NMOS transistor QB10, and grounded through a capacitor. The P15 pin of the second MCU chip is connected to the gate of the NMOS transistor QB10. The drain of the NMOS transistor QB10 is connected to the drain of the SQ4050EY type NMOS transistor QB9. The P14 pin of the second MCU chip is connected to the gate of the NMOS transistor QB9. The R14 pin of the second MCU chip is grounded through a resistor and connected to the source of the NMOS transistor QB9 through a resistor. The A15 pin of the second MCU chip is connected to the B15 pin of the second MCU chip through a resistor.

7. The core board circuit for a docking station according to claim 1, characterized in that, The USB hub circuit includes a hub chip of type FL5801-2Q2.

8. The core board circuit for a docking station according to claim 7, characterized in that, Pin 49 of the hub chip is grounded.

9. The core board circuit for a docking station according to claim 1, characterized in that, The PCB circuit board is equipped with three USB-C ports that support the Thunderbolt 5 protocol. The USB-C ports are electrically connected to the main control circuit. One USB-C port is used for uplink data transmission, and the other two USB-C ports are used for downlink data transmission.

10. The core board circuit for a docking station according to claim 1, characterized in that, The PCB circuit board is provided with at least one gold finger, and the gold finger is electrically connected to the main control circuit.

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