Fan control module and server

Abstract

The application relates to the technical field of servers, and discloses a fan control module and a server, the fan control module comprising: a power supply and a signal transmission interface, an MCU and a plurality of fan interfaces; the power supply and the signal transmission interface are used for being connected with a BMC; each fan interface is used for being connected with a fan; the MCU comprises a plurality of groups of GPIO pins, the plurality of groups of GPIO pins are used for being connected with the plurality of fan interfaces, the MCU is connected with the power supply and the signal transmission interface, the MCU is used for reading running information of the fan through each group of GPIO pins, and the running information is sent to the BMC through the power supply and the signal transmission interface; the MCU is also used for receiving a fan control signal sent by the BMC through the power supply and the signal transmission interface, and the fan control signal is sent to the fan through each group of GPIO pins, so that the fan operates according to the fan control signal. In the above manner, the fan control module can be compatible with mainboards of different servers, the compatibility of the fan control module is improved, and the heat dissipation effect of the server is ensured.

Description

Technical Field

[0001] This application relates to the field of server technology, specifically to a fan control module and a server. Background Technology

[0002] Server cooling fans are a crucial component of a server, primarily responsible for dissipating heat generated inside the server to maintain its normal operating temperature. Typically, servers can adjust fan speeds based on CPU (Central Processing Unit) temperature and load conditions to optimize heat dissipation.

[0003] Currently, server fan control solutions are typically integrated into the server motherboard's BMC (Baseboard Management Controller). The BMC connects to multiple fan interfaces via multiple sets of GPIO (General-Purpose Input / Output) pins to directly control the fan speed. However, different server motherboards may have different BMCs, meaning their GPIO pin configurations may vary. This inconsistency between the GPIO pins and the fan interfaces can prevent the BMC from effectively controlling the fan speed, thus impacting the server's heat dissipation performance. Utility Model Content

[0004] In view of the above problems, this application provides a fan control module and a server, which makes the fan control module compatible with different server motherboards and ensures the heat dissipation effect of the server.

[0005] According to one aspect of the embodiments of this application, a fan control module is provided. The fan control module includes a power and signal transmission interface, an MCU, and multiple fan interfaces. The power and signal transmission interface is used to connect to a BMC. Each set of fan interfaces is used to connect to a fan. The MCU includes multiple sets of GPIO pins, which are used to connect to multiple sets of fan interfaces. The MCU is connected to the power and signal transmission interface. The MCU is used to read the fan's operating information through each set of GPIO pins and send the operating information to the BMC through the power and signal transmission interface. The MCU is also used to receive fan control signals sent by the BMC through the power and signal transmission interface and send the fan control signals to the fan through each set of GPIO pins, so that the fan runs according to the fan control signals.

[0006] In one alternative approach, the fan's operating information includes the fan's presence signal and speed; each set of GPIO pins includes a first pin, a second pin, and a third pin, which are respectively connected to the fan interface; the MCU is used to read the fan's presence signal through the first pin, and when it determines that the fan is in place based on the read presence signal, it reads the fan speed through the second pin, and sends the presence signal and speed to the BMC through the power and signal transmission interface; the MCU is also used to send fan control signals to the fan through the third pin.

[0007] In one alternative approach, the presence signal is either a first signal or a second signal; when the presence signal is the first signal, the MCU determines that the fan is in position based on the first signal; when the presence signal is the second signal, the MCU determines that the fan is not in position based on the second signal.

[0008] In one alternative embodiment, the MCU further includes a serializer connected to the power and signal transmission interface. The serializer receives multiple parallel operating information read from multiple sets of GPIO pins, converts the parallel operating information into multiple serial operating information, and sends the serial operating information to the power and signal transmission interface. The serializer also receives multiple serial fan control signals sent by the power and signal transmission interface, converts the serial fan control signals into multiple parallel fan control signals, so that each set of GPIO pins sends each fan control signal to the fan.

[0009] In one alternative approach, each set of GPIO pins is connected to multiple fan interfaces, each of which is used to connect to fans with different technical specifications.

[0010] In one alternative approach, the power and signal transmission interface is a PICPWR interface.

[0011] In the fan control module provided in this application embodiment, multiple sets of GPIO pins of the MCU are connected to multiple fan interfaces, allowing the MCU to read the operating information of the fan connected to each fan interface through each set of GPIO pins. The MCU is also connected to a power and signal transmission interface, and further connected to a BMC through the power and signal transmission interface. This allows the MCU to send operating information to the BMC through the power and signal transmission interface, and receive fan control signals from the BMC through the power and signal transmission interface. The MCU can also send fan control signals to each fan through each set of GPIO pins, thereby enabling the BMC to control the fan speed. The power and signal transmission interface allows the fan control module to connect to different BMCs, making it compatible with different server motherboards and ensuring that different BMCs can control the fan speed through the fan control module, thus guaranteeing the server's heat dissipation effect.

[0012] According to another aspect of the embodiments of this application, a server is provided, including a BMC and a fan control module provided in any of the above embodiments, wherein the BMC is connected to the fan control module.

[0013] In one alternative embodiment, the server further includes a motherboard and a CPLD. The FPGA on the motherboard is connected to the power and signal transmission interface and the CPLD via a first communication bus and a second communication bus, respectively. The CPLD is connected to the BMC via a third communication bus. The FPGA on the motherboard is used to receive operating information sent by the power and signal transmission interface via the first communication bus and to send the operating information to the CPLD via the second communication bus. The CPLD is used to send the operating information to the BMC via the third communication bus. The CPLD is also used to receive fan control signals sent by the BMC via the third communication bus and to send the fan control signals to the FPGA on the motherboard via the second communication bus. The FPGA on the motherboard is also used to send the fan control signals to the power and signal transmission interface via the first communication bus.

[0014] In one alternative approach, the first communication bus is an M-PESTI bus.

[0015] In one alternative configuration, the second communication bus is an LTPI bus and the third communication bus is an I2C bus.

[0016] In the server provided in this application embodiment, multiple sets of GPIO pins of the MCU are connected to multiple fan interfaces, allowing the MCU to read the operating information of each fan connected to each fan interface through each set of GPIO pins. The MCU is also connected to a power and signal transmission interface, and further connected to a BMC through the power and signal transmission interface. This allows the MCU to send operating information to the BMC through the power and signal transmission interface, and receive fan control signals from the BMC through the same interface. Furthermore, the MCU can send fan control signals to each fan through each set of GPIO pins, enabling the BMC to control the fan speed. The power and signal transmission interface allows the fan control module to connect to different BMCs, making it compatible with different server motherboards. This improves the compatibility of the fan control module and ensures that different BMCs can control the fan speed through the fan control module, thus guaranteeing the server's heat dissipation effect.

[0017] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0018] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0019] Figure 1 This is a schematic diagram of the structure of a conventional fan control module provided in an embodiment of this application;

[0020] Figure 2 This is a schematic diagram of the structure of the fan control module provided in an embodiment of this application;

[0021] Figure 3 This is a schematic diagram of the structure of the fan control module provided in an embodiment of this application;

[0022] Figure 4 This is a schematic diagram of the server structure provided in an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of the server structure provided in an embodiment of this application.

[0024] The reference numerals in the detailed embodiments are as follows:

[0025] 1. Existing fan control module; 10, 200, BMC; 11. In-situ pin; 12. Speed ​​detection pin; 13. Speed ​​control pin; 20. Interface; 30. Server;

[0026] 100. Fan control module; 110. Power supply and signal transmission interface; 120. MCU; 121. GPIO pin; 1211. First pin; 1212. Second pin; 1213. Third pin; 122. Serializer; 130. Multiple fan interfaces;

[0027] 300, Mainboard; 310, FPGA; 320, First communication bus; 330, Second communication bus; 400, CPLD; 410, Third communication bus. Detailed Implementation

[0028] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0030] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0031] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0032] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0033] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0034] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0035] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0036] Existing servers can adjust fan speeds based on CPU temperature and load to improve cooling efficiency. Specifically, reducing fan speeds under low load reduces noise and energy consumption, while increasing fan speeds under high load ensures effective cooling. In existing server fan control schemes, the BMC directly adjusts fan speeds according to the control scheme, thus meeting the server's cooling requirements.

[0037] Please see Figure 1 The schematic diagram of the motherboard shown illustrates the existing fan control scheme integrated into the BMC 10 of the motherboard 1. The BMC 10 includes multiple sets of GPIO pins, each set connected to each interface 20 on the motherboard 1, and each interface 20 used to connect to each fan. Each set of GPIO pins includes an on-state pin 11, a speed detection pin 12, and a speed control pin 13. Through the on-state pin 11 of each GPIO pin set, the BMC 10 can determine whether each fan is in position; through the speed detection pin 12 of each GPIO pin set, the BMC 10 can obtain the real-time speed of each fan; through the speed control pin 13 of each GPIO pin set, the BMC 10 can output a PWM duty cycle for each fan to control its speed.

[0038] pass Figure 1 The multiple GPIO pins of the BMC 10 are connected to various interfaces 20 to control the fan speed. However, the BMC 10 may differ in different server motherboards, meaning that each group of GPIO pins on the BMC 10 may be different. For example, the order of the in-situ pin 11, speed detection pin 12, and speed control pin 13 in each group of GPIO pins may be different, making each group of GPIO pins incompatible with the interface 20. This results in the BMC 10 being unable to control the fan speed, affecting the server's heat dissipation performance.

[0039] Based on this, this application provides a fan control module, which includes a power and signal transmission interface, an MCU (Microcontroller Unit), and multiple fan interfaces. Multiple sets of GPIO pins of the MCU are connected to the multiple fan interfaces, and the fan control module is connected to the BMC (Browser Control Center) through the power and signal transmission interface. Through this connection, the BMC can control the fan speed via the fan control module. Furthermore, the fan control module can be connected to the BMC of different server motherboards via the power and signal transmission interface, making the fan control module compatible with different server motherboards. This ensures that different BMCs can control the fan speed through the fan control module, thereby guaranteeing the server's heat dissipation effect.

[0040] Please see Figure 2 , Figure 2 A schematic diagram of the fan control module provided in an embodiment of this application is shown. The fan control module 100 includes a power and signal transmission interface 110, an MCU 120, and multiple fan interfaces 130. The power and signal transmission interface 110 is used to connect to a BMC 200. Each fan interface 130 is used to connect to a fan. The MCU 120 includes multiple sets of GPIO pins 121, which are used to connect to the multiple fan interfaces 130 respectively. The MCU 120 is connected to the power and signal transmission interface 110. The MCU 120 is used to read the fan's operating information through each set of GPIO pins 121 and send the operating information to the BMC 200 through the power and signal transmission interface 110. The MCU 120 is also used to receive fan control signals sent by the BMC 200 through the power and signal transmission interface 110 and send the fan control signals to the fan through each set of GPIO pins 121 so that the fan runs according to the fan control signals.

[0041] The power and signal transmission interface 110 is an interface that integrates power and signal transmission functions into a single physical interface. The power and signal transmission interface 110 can be a PICPWR (Platform Infrastructure Connectivity Power distribution connector), a Molex power connector, a PWR header connector, etc. The PICPWR interface is a standardized power and control interface that follows unified electrical specifications. Regardless of the specific design of the server motherboard or BMC, as long as the BMC 200 supports the PICPWR interface, electrical connection compatibility is guaranteed, meaning the fan control module 100 can be compatible with different BMC 200s.

[0042] The power and signal transmission interface 110 can be connected to the BMC 200 via a communication bus, which can be an M-PESTI (Modular-Peripheral Sideband Tunneling Interface) bus, SMBus, LPC bus, etc. The power and signal transmission interface 110 can also be connected to the MCU 120 via GPIO pins (excluding GPIO pin 121) or via interfaces such as SPI (Serial Peripheral Interface) or I2C.

[0043] The fan's operating information can include the fan's presence signal and speed. The presence signal can include a first signal and a second signal. The first signal can be set to 0, indicating that the fan is in place, i.e., plugged into the fan interface 130; the second signal can be set to 1, indicating that the fan is not in place, i.e., the fan is not plugged into the fan interface 130, the fan is not plugged in properly, or the fan is damaged. The speed is the fan's real-time speed. The MCU 120 can internally have multiple registers to store the fan's presence signal, speed, and control signals (i.e., the fan control signals mentioned above).

[0044] A set of GPIO pins 121 can be connected to one fan interface 130 or two fan interfaces 130, allowing the fan control module 100 to connect to more fans, and the BMC 200 to control the speed of more fans through the fan control module 100. Each set of GPIO pins 121 may include a first pin 1211, a second pin 1212, and a third pin 1213, which are respectively connected to the fan interface 130. The following description uses the example of the first pin 1211 being the presence pin, the speed detection pin, and the speed control pin, respectively, to illustrate the embodiments of this application.

[0045] Specifically, MCU 120 can read the fan's presence signal through the first pin 1211 and store the read presence signal in register A. When the presence signal is the first signal, MCU 120 can determine that the fan is in place; when the presence signal is the second signal, MCU 120 can determine that the fan is not in place. After determining that the fan is in place based on the read presence signal, MCU 120 can read the fan speed through the second pin 1212 and store the speed in register B. Then, MCU 120 encodes the fan's presence signal and speed according to a preset data format and sends the encoded fan presence signal and speed to the power and signal transmission interface 110, which then sends the encoded fan presence signal and speed to BMC 200 via the communication bus.

[0046] The BMC 200 stores the fan control logic. Upon receiving the encoded fan presence signal and speed, the BMC 200 first decodes and converts the data format to obtain the fan presence signal and speed. Then, after confirming the fan's presence based on the presence signal, the BMC 200 determines the fan control signal based on the fan speed and control logic, adjusting the fan speed accordingly. After determining the fan control signal, the BMC 200 sends it to the power and signal transmission interface 110 via the communication bus, which then transmits it to the MCU 120. Upon receiving the fan control signal, the MCU 120 first stores it in register C, and then sends the fan control signal from register C to the fan via pin 3 1213, causing the fan to change its speed according to the fan control signal.

[0047] In the fan control module 100 provided in this embodiment, multiple sets of GPIO pins 121 of the MCU 120 are connected to multiple fan interfaces 130, so that the MCU 120 can read the operating information of the fan connected to each fan interface 130 through each set of GPIO pins 121; the MCU 120 is connected to the power and signal transmission interface 110 and the BMC 200 through the power and signal transmission interface 110, so that the MCU 120 can send the operating information to the BMC 200 through the power and signal transmission interface 110 and receive the fan control signal from the BMC 200 through the power and signal transmission interface 110, and the MCU 120 can send the fan control signal to each fan through each set of GPIO pins 121, so that the BMC 200 can control the speed of the fan. The power and signal transmission interface 110 enables the fan control module 100 to connect to different BMCs 200, making the fan control module 100 compatible with different server motherboards. This improves the compatibility of the fan control module 100 and ensures that different BMCs 200 can control the fan speed through the fan control module 100, thereby guaranteeing the server's heat dissipation effect.

[0048] Servers of different sizes have different heat dissipation requirements and different fan cooling capacity requirements. Therefore, different sized fans may need to be configured to meet the different heat dissipation needs of servers of different sizes. For example, a 1U server can be cooled by a 1U fan, while a 2U server requires a 2U fan. Based on this, to make the fan control module 100 compatible with servers of different sizes, this application further proposes an implementation method, please refer to... Figure 3 , Figure 3 A schematic diagram of the structure of the fan control module provided in the embodiment of this application is shown. As shown in the figure, each group of GPIO pins 121 is connected to multiple fan interfaces 130, and the multiple fan interfaces 130 are used to connect to fans with different technical specifications.

[0049] Technical specifications refer to parameters such as fan size, airflow, and speed. Fans with different technical specifications have different heat dissipation capabilities.

[0050] Each group of GPIO pins 121 can be used as follows: Figure 3 It can be connected to two fan interfaces 130 as shown, or it can be connected to more than two fan interfaces 130.

[0051] by Figure 3For example, two fan interfaces 130 connected to a certain set of GPIO pins 121 can be connected to two fans with different technical specifications, making the set of GPIO pins 121 compatible with two different fans. It should be noted that the two fan interfaces 130 connected to the same set of GPIO pins 121 cannot be connected to two fans with different technical specifications at the same time. When one fan interface 130 is connected to a fan, the other fan interface 130 is left unconnected.

[0052] In this way, the fan control module can be connected to fans with different technical specifications, making it suitable for servers of different sizes and with different heat dissipation requirements.

[0053] To improve data transmission between the fan control module 100 and the BMC 200, this application further proposes an implementation method, please refer to the following: Figure 3 As shown in the figure, the MCU 120 also includes a serializer 122, which is connected to the power and signal transmission interface 110. The serializer 122 receives multiple parallel operating information messages read from multiple sets of GPIO pins 121, converts these parallel messages into multiple serial operating information messages, and sends these serial messages to the power and signal transmission interface 110. The serializer 122 also receives multiple serial fan control signals sent from the power and signal transmission interface 110, converts these serial fan control signals into multiple parallel fan control signals, and sends them to each set of GPIO pins 121, so that each set of GPIO pins 121 sends each fan control signal to the fan.

[0054] Specifically, the serializer 122 can convert multiple operating information into multiple serial operating information according to a preset data format, and convert multiple serial fan control signals into multiple parallel fan control signals according to a preset data format.

[0055] The serializer 122 can be connected to the power and signal transmission interface 110 via a UART (Universal Asynchronous Receiver / Transmitter). For example, the serializer 122 can send multiple serial operating information to the power and signal transmission interface 110 via UART-TX and receive multiple serial fan control signals sent by the power and signal transmission interface 110 via UART-RX.

[0056] The serializer 122 converts multiple operating information into multiple serial operating information and multiple serial fan control signals into multiple parallel fan control signals, enabling the MCU 120 to perform serial data transmission with the BMC200 using fewer pins. This not only saves the pin resources of the MCU 120 but also improves the data transmission speed.

[0057] According to another aspect of the embodiments of this application, a server is proposed; please refer to [link to relevant documentation]. Figure 4 , Figure 4 A schematic diagram of the server structure provided in an embodiment of this application is shown. As shown in the figure, the server 30 includes a BMC 200 and a fan control module 100 provided in any of the above embodiments. The BMC 200 is connected to the fan control module 100.

[0058] In the server 30 provided in this application embodiment, multiple sets of GPIO pins 121 of the MCU 120 are connected to multiple fan interfaces 130, so that the MCU 120 can read the operating information of the fan connected to each fan interface 130 through each set of GPIO pins 121; the MCU 120 is connected to the power and signal transmission interface 110 and the BMC 200 through the power and signal transmission interface 110, so that the MCU 120 can send the operating information to the BMC 200 through the power and signal transmission interface 110 and receive the fan control signal from the BMC 200 through the power and signal transmission interface 110, and the MCU 120 can send the fan control signal to each fan through each set of GPIO pins 121, so that the BMC 200 can control the speed of the fan. The fan control module 100 can be connected to different BMCs 200 through the power and signal transmission interface 110, making the fan control module 100 compatible with different server motherboards. This improves the compatibility of the fan control module 100 and ensures that different BMCs 200 can control the fan speed through the fan control module 100, thus guaranteeing the server's heat dissipation effect.

[0059] To improve the response efficiency of the BMC 200, this application further proposes an implementation method, please refer to [link to implementation details]. Figure 5 , Figure 5A schematic diagram of the server structure provided in this application embodiment is shown. As shown in the figure, the server 30 further includes a motherboard 300 and a CPLD 400. The FPGA 310 of the motherboard 300 is connected to the power and signal transmission interface 110 and the CPLD 400 respectively via a first communication bus 320 and a second communication bus 330. The CPLD 400 is connected to the BMC 200 via a third communication bus 410. The FPGA 310 of the motherboard 300 is used to receive operating information sent by the power and signal transmission interface 110 via the first communication bus 320 and to send the operating information to the CPLD 400 via the second communication bus 330. The CPLD 400 is used to send the operating information to the BMC 200 via the third communication bus 410. The CPLD 400 is also used to receive fan control signals sent by the BMC 400 via the third communication bus 410, and to send the fan control signals to the FPGA 310 of the motherboard 300 via the second communication bus 330. The FPGA 310 of the motherboard 300 is also used to send the fan control signals to the power supply and signal transmission interface 110 via the first communication bus 320.

[0060] Among them, the first communication bus 320 can be an M-PESTI bus, the second communication bus can be an LTPI (Low-Speed ​​Telemetry Peripheral Interface) bus, and the third communication bus 410 can be an I2C bus.

[0061] Assuming the operating information includes a fan speed of 3000 RPM, after the MCU 120 sends the operating information to the power and signal transmission interface 110, the power and signal transmission interface 110 sends the operating information to the FPGA 310 on the motherboard 300, where the FPGA 310 decodes the operating information. Then, the FPGA 310 sends the decoded operating information to the CPLD 400 via the second communication bus 330. The CPLD 400 performs data format conversion on the decoded operating information to a format that the BMC 200 can understand, and parses out key information, such as the fan speed of 3000 RPM. Afterwards, the CPLD 400 sends the parsed data to the BMC 200 via the third communication bus 410. Finally, the BMC 200 generates a fan control signal based on the fan speed and control logic.

[0062] After generating the fan control signal, the BMC 200 sends the fan control signal to the CPLD 400 via the third communication bus 410. The CPLD 400 then sends the fan control signal to the FPGA 310 via the second communication bus 330. The FPGA 310 encodes the fan control signal and sends the encoded fan control signal to the power and signal transmission interface 110 via the first communication bus 320. The power and signal transmission interface 110 then sends the encoded fan control signal to the MCU 120. Upon receiving the encoded fan control signal, the MCU 120 decodes and converts the data format to obtain the final fan control signal.

[0063] By using FPGA 310 to decode the fan's operating information and CPLD 400 to convert the data format and extract key information, BMC 200 can directly use the data processed by FPGA 310 and CPLD 400 without needing to decode and parse the fan's operating information, thus improving the response efficiency of BMC 200.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A fan control module, characterized in that, The fan control module includes: a power and signal transmission interface, an MCU, and multiple fan interfaces; The power and signal transmission interface is used to connect to the BMC; Each set of fan interfaces is used to connect to a fan; The MCU includes multiple sets of GPIO pins, which are used to connect to multiple sets of fan interfaces. The MCU is also connected to the power and signal transmission interface. The MCU is used to read the fan's operating information through each set of GPIO pins and send the operating information to the BMC through the power and signal transmission interface. The MCU is also used to receive fan control signals sent by the BMC through the power and signal transmission interface and send the fan control signals to the fan through each set of GPIO pins, so that the fan operates according to the fan control signals.

2. The fan control module according to claim 1, characterized in that, The fan's operating information includes the fan's presence signal and speed; Each group of GPIO pins includes a first pin, a second pin, and a third pin, and the first pin, the second pin, and the third pin are respectively connected to the fan interface; The MCU is used to read the presence signal of the fan through the first pin, and when it is determined that the fan is in place based on the read presence signal, it reads the speed of the fan through the second pin, and sends the presence signal and the speed to the BMC through the power and signal transmission interface; The MCU is also used to send the fan control signal to the fan via the third pin.

3. The fan control module according to claim 2, characterized in that, The in-situ signal is either a first signal or a second signal; When the presence signal is the first signal, the MCU determines that the fan is in place based on the first signal; When the presence signal is the second signal, the MCU determines that the fan is not in position based on the second signal.

4. The fan control module according to claim 1, characterized in that, The MCU also includes a serializer, which is connected to the power supply and signal transmission interface; The serializer is used to receive multiple parallel running information read from multiple sets of GPIO pins, convert the multiple parallel running information into multiple serial running information, and send the multiple serial running information to the power and signal transmission interface. The serializer is also used to receive multiple serial fan control signals sent by the power supply and signal transmission interface, and then convert the multiple serial fan control signals into multiple parallel fan control signals, so that each group of GPIO pins sends each fan control signal to the fan.

5. The fan control module according to claim 1, characterized in that, Each group of GPIO pins is connected to multiple fan interfaces, which are used to connect to fans with different technical specifications.

6. The fan control module according to any one of claims 1-5, characterized in that, The power and signal transmission interface is a PICPWR interface.

7. A server, characterized in that, The server includes a BMC and a fan control module as described in any one of claims 1-6, wherein the BMC is connected to the fan control module.

8. The server according to claim 7, characterized in that, The server also includes a motherboard and a CPLD. The FPGA of the motherboard is connected to the power and signal transmission interface and the CPLD via a first communication bus and a second communication bus, respectively. The CPLD is connected to the BMC via a third communication bus. The FPGA on the motherboard is used to receive the operating information sent by the power and signal transmission interface through the first communication bus, and send the operating information to the CPLD through the second communication bus. The CPLD is used to send the operating information to the BMC through the third communication bus. The CPLD is also used to receive the fan control signal sent by the BMC through the third communication bus, and to send the fan control signal to the FPGA of the motherboard through the second communication bus. The FPGA of the motherboard is also used to send the fan control signal to the power supply and signal transmission interface through the first communication bus.

9. The server according to claim 8, characterized in that, The first communication bus is an M-PESTI bus.

10. The server according to claim 8, characterized in that, The second communication bus is an LTPI bus, and the third communication bus is an I2C bus.

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