A drone countermeasure system
By adding a pre-set waveform library module and an autonomous decision-making module to the UAV countermeasure system, and combining intelligent decision-making and pre-set strategies, the problem of the lack of local decision-making capability in the existing system is solved, and rapid and effective interference with UAVs is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- YANTAI DONGFANG RUICHUANGDA ELECTRONIC TECH CO LTD
- Filing Date
- 2025-08-15
- Publication Date
- 2026-06-09
AI Technical Summary
Existing drone countermeasure systems lack local decision-making capabilities and require external commands to trigger them, making it difficult to quickly respond to countermeasures against high-speed drones.
A preset waveform library module and an autonomous decision-making module are added. Through the cooperation of the control and coordination module with the radio frequency signal generation module, modulation center module, mixing and filtering module and power amplification module, dual-mode interference of intelligent decision-making and preset strategies is realized. Combined with the signal feature analysis of the autonomous decision-making module and the rapid response of the preset waveform library.
It enables intelligent decision-making and rapid response for drones, improves the success rate of jamming drones of different models and communication protocols, and balances flexibility and efficiency.
Smart Images
Figure CN224343213U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of drone countermeasures technology, and in particular to a drone countermeasures system. Background Technology
[0002] With the rapid development of drone technology, small drones, with their advantages of small size, low cost, and high maneuverability, have been widely used in many fields such as aerial photography, surveillance, remote sensing, exploration, rescue, and logistics. However, the phenomenon of unauthorized drone flights is also increasing. For example, civil aviation radar cannot detect low-altitude drone flights, leading to frequent incidents of drones disrupting civil aircraft. Incidents of criminals using drones to conduct reconnaissance and surveillance of sensitive areas, or carrying dangerous goods and weapons to attack important locations and personnel, also occur from time to time. Therefore, only by adopting strong countermeasures against drones can air safety be guaranteed.
[0003] A search revealed an interference source generating device and interference equipment disclosed in publication number CN221995462U. This application relates to the field of unmanned aerial vehicle (UAV) technology and discloses an interference source generating device and interference equipment. The interference source generating device includes a radio frequency (RF) signal generation module, a control module, a signal modulation module, and a mixing module. The RF signal generation module generates an RF signal; the control module generates a control signal; the signal modulation module receives the RF signal output from the RF signal generation module and the control signal output from the control module, and modulates the RF signal according to the control signal to obtain a modulated signal with a preset waveform; the mixing module generates a carrier signal and receives the modulated signal output from the signal modulation module, and mixes the modulated signal with the carrier signal to obtain a target RF signal as the interference signal. Through the above method, this application improves the interference capability of the interference equipment against UAVs while keeping the power amplifier power of the interference equipment constant.
[0004] In the aforementioned application, both the control signals and preset waveform codes need to be input from external devices through an interface, lacking local decision-making capabilities. The countermeasure system needs to wait for external commands to trigger, making it difficult to cope with the rapid countermeasures against high-speed drones. Utility Model Content
[0005] To overcome the above shortcomings, this utility model provides a drone countermeasure system, which aims to improve the existing countermeasure system where the control signals and preset waveform codes need to be input from external devices through an interface, lacking local decision-making capabilities, and the countermeasure system needs to wait for external commands to trigger, making it difficult to cope with the rapid countermeasure work of high-speed drones.
[0006] To achieve the above objectives, this utility model provides the following technical solution: a UAV countermeasure system, comprising a radio frequency signal generation module and a control coordination module. The output of the control coordination module is communicatively connected to the input of a preset waveform library module and an autonomous decision-making module. The outputs of both the radio frequency signal generation module and the autonomous decision-making module are electrically connected to the input of a modulation center module. The output of the preset waveform library module is communicatively connected to the input of the modulation center module. The output of the modulation center module is electrically connected to the input of a mixing and filtering module. The output of the mixing and filtering module is electrically connected to the input of a power amplifier module.
[0007] The above technical solution, by adding a preset waveform library module and an autonomous decision-making module to the existing countermeasure system, and through the communication connection between the control and coordination module and the preset waveform library module and the autonomous decision-making module, along with the radio frequency signal generation module, modulation center module, mixing and filtering module and power amplification module, achieves a dual-mode interference effect that combines intelligent decision-making and preset strategies for UAV countermeasures. It can automatically generate the optimal interference waveform based on the UAV signal characteristics, and can also call preset waveform templates to quickly respond to known targets, balancing flexibility and efficiency, and significantly improving the success rate of interference against UAVs of different models and communication protocols.
[0008] As a further description of the above technical solution:
[0009] Preferably, the autonomous decision-making module includes an NPU chip, an RF detector, an analog-to-digital converter (ADC), and a temperature sensor. The output of the RF detector is electrically connected to the input of the ADC, the output of the ADC is electrically connected to the input of the NPU chip, the instruction input of the NPU chip is communicatively connected to the output of the control coordination module, the control signal output of the NPU chip is electrically connected to the input of the modulation hub module, and the temperature sensor is communicatively connected to the NPU chip via an I²C bus.
[0010] The above technical solution achieves an environmentally adaptive intelligent decision-making effect through the collaborative working structure of an NPU chip, an RF detector, an analog-to-digital converter (ADC), and a temperature sensor. The RF detector collects environmental signals, which are then digitized with high precision by the ADC. The NPU chip analyzes the signal characteristics based on deep learning algorithms to identify the drone type, and the temperature sensor compensates for the influence of environmental temperature drift in real time, thereby improving the system's identification accuracy.
[0011] As a further description of the above technical solution:
[0012] Preferably, the preset waveform library module includes an SPI Flash memory, an address decoder, and a level converter. The enable terminal of the address decoder is communicatively connected to the output terminal of the control coordination module. The output terminal of the address decoder is electrically connected to the chip select pin of the SPI Flash memory. The output terminal of the SPI Flash memory is communicatively connected to the input terminal of the level converter. The output terminal of the level converter is communicatively connected to the input terminal of the modulation center module.
[0013] The above technical solution, through the cooperation of SPI Flash memory, address decoder and level converter, achieves fast reading and adaptive transmission of various waveform parameters. The address decoder selects the corresponding memory chip according to the control command. The various waveform parameters stored in SPI Flash are transmitted to the modulation center module after level conversion. It supports the fast loading of multi-band and multi-protocol interference waveforms, ensuring that the system can quickly cope with complex environments.
[0014] As a further description of the above technical solution:
[0015] Preferably, the control and coordination module includes a main MCU, a coprocessor, and a real-time clock chip. The output of the real-time clock chip is communicatively connected to the input of the main MCU, the output of the main MCU is communicatively connected to the input of the coprocessor, and the main MCU is communicatively connected to both the preset waveform library module and the autonomous decision-making module.
[0016] The above technical solution achieves efficient management of system resources and task scheduling through the division of labor and cooperation structure of the main MCU, coprocessor and real-time clock chip. The real-time clock chip provides a precise timing reference, the main MCU is responsible for system initialization and module coordination, and the coprocessor is used to share the mathematically intensive calculations, reducing the system's response latency when dealing with multi-target interference. At the same time, the system supports external instruction priority mode and can quickly switch interference strategies through the interface, improving the system's flexibility and scalability.
[0017] As a further description of the above technical solution:
[0018] Preferably, the radio frequency signal generation module includes a temperature-compensated crystal oscillator, a phase-locked loop (PLL) chip, and a low-noise amplifier. The output terminal of the temperature-compensated crystal oscillator is electrically connected to the input terminal of the PLL chip, the output terminal of the PLL chip is electrically connected to the input terminal of the low-noise amplifier, and the output terminal of the low-noise amplifier is electrically connected to the input terminal of the modulation center module.
[0019] The above technical solution achieves stable RF carrier generation through a cascaded structure of a temperature-compensated crystal oscillator, a phase-locked loop (PLL) chip, and a low-noise amplifier. The temperature-compensated crystal oscillator provides a high-precision reference frequency, which is multiplied to the target frequency band by the PLL chip. The low-noise amplifier then suppresses the signal noise figure and reduces output power fluctuations, ensuring that the modulation center module at the back end can obtain a clean and stable carrier signal, thus laying the foundation for subsequent high-precision waveform modulation.
[0020] As a further description of the above technical solution:
[0021] Preferably, the modulation hub module includes a DDS chip, an FPGA chip, and an SRAM buffer. The input terminal of the FPGA chip is communicatively connected to the output terminal of the preset waveform library module, the input terminal of the FPGA chip is electrically connected to the output terminal of the autonomous decision-making module, the output terminal of the SRAM buffer is electrically connected to the input terminal of the FPGA chip, the output terminal of the FPGA chip is electrically connected to the input terminal of the DDS chip, the RF input terminal of the DDS chip is electrically connected to the output terminal of the RF signal generation module, and the RF output terminal of the DDS chip is electrically connected to the input terminal of the mixing and filtering module.
[0022] The above technical solution achieves high-speed waveform generation and dynamic configuration through the collaborative working structure of DDS chip, FPGA chip and SRAM cache. The FPGA chip quickly configures the parameters of DDS chip according to decision instructions, enabling the system to quickly complete waveform switching and meet the interference requirements of different communication protocols.
[0023] As a further description of the above technical solution:
[0024] Preferably, the mixing and filtering module includes a mixer, a programmable filter, and a temperature-controlled crystal oscillator. The output terminal of the temperature-controlled crystal oscillator is electrically connected to the input terminal of the mixer. The radio frequency input terminal of the mixer is electrically connected to the output terminal of the modulation center module. The intermediate frequency output terminal of the mixer is electrically connected to the input terminal of the programmable filter. The output terminal of the programmable filter is electrically connected to the input terminal of the power amplifier module.
[0025] The above technical solution achieves flexible frequency band switching and out-of-band spurious suppression through the synergistic working structure of mixer, programmable filter and temperature-controlled crystal oscillator. The temperature-controlled crystal oscillator provides a stable local oscillator signal, the mixer moves the modulation signal to the target frequency band, and the programmable filter dynamically adjusts the bandwidth, thereby improving the purity and targeting of the interference signal.
[0026] As a further description of the above technical solution:
[0027] Preferably, the power amplification module includes a power amplifier chip, a π-type matching network, and an over-temperature protection circuit. The input terminal of the π-type matching network is electrically connected to the output terminal of the mixer filter module, the output terminal of the π-type matching network is electrically connected to the RF pin of the power amplifier chip, and the output terminal of the over-temperature protection circuit is electrically connected to the enable pin of the power amplifier chip.
[0028] The above technical solution achieves efficient power amplification and thermal management through the collaborative working structure of the power amplifier chip, π-type matching network, and over-temperature protection circuit. The π-type matching network achieves impedance matching, and the power amplifier amplifies the signal. The over-temperature protection circuit automatically reduces power or shuts down when the temperature exceeds the threshold, ensuring the reliability and service life of the system.
[0029] This utility model has the following beneficial effects:
[0030] 1. In this utility model, the autonomous decision-making module identifies the type and communication characteristics of the UAV in real time. Combined with the standard templates stored in the pre-set waveform library module, it realizes dual-mode interference of autonomous decision-making and external pre-set strategies. It can not only deal with unknown UAV targets, but also quickly respond to known models, and adapt to the UAV countermeasure needs in different scenarios.
[0031] 2. In this utility model, the delay from signal acquisition to interference generation is greatly reduced through the digital processing of the autonomous decision-making module and the high-speed logic control of the FPGA chip. Through the rapid calling of the preset waveform library and the instant read and write of the SRAM cache, the system supports rapid response in sudden scenarios and meets the real-time countermeasure requirements. Attached Figure Description
[0032] Figure 1 This is a schematic block diagram of the overall modules of a drone countermeasure system proposed in this utility model;
[0033] Figure 2 This is a schematic block diagram of the autonomous decision-making module of a drone countermeasure system proposed in this utility model;
[0034] Figure 3 This is a schematic block diagram of a pre-set waveform library module for a UAV countermeasure system proposed in this utility model;
[0035] Figure 4 This is a schematic block diagram of the control and coordination module of a UAV countermeasure system proposed in this utility model;
[0036] Figure 5 This is a schematic block diagram of a radio frequency signal generation module for a drone countermeasure system proposed in this utility model;
[0037] Figure 6This is a schematic block diagram of the modulation central module of a UAV countermeasure system proposed in this utility model;
[0038] Figure 7 This is a schematic block diagram of a mixing and filtering module for a UAV countermeasure system proposed in this utility model;
[0039] Figure 8 This is a schematic block diagram of a power amplifier module for a drone countermeasure system proposed in this utility model. Detailed Implementation
[0040] The technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0041] Reference Figure 1 The present invention provides an embodiment of a UAV countermeasure system, comprising a radio frequency signal generation module and a control coordination module. The output of the control coordination module is communicatively connected to the input of a preset waveform library module and an autonomous decision-making module. The outputs of both the radio frequency signal generation module and the autonomous decision-making module are electrically connected to the input of a modulation center module. The output of the preset waveform library module is communicatively connected to the input of the modulation center module. The output of the modulation center module is electrically connected to the input of a mixer filter module. The output of the mixer filter module is electrically connected to the input of a power amplifier module.
[0042] Specifically, in this UAV countermeasure system, the control and coordination module communicates with the preset waveform library module and the autonomous decision-making module through its output terminal. It can receive external commands and generate control signals autonomously, coordinating the working states of the two modules. The radio frequency signal generation module outputs a stable basic radio frequency carrier, which, together with the waveform parameters output by the autonomous decision-making module, is input to the modulation center module. The preset waveform library module provides the modulation center module with preset standard waveform templates. Based on the received parameters and templates, the modulation center module modulates the received radio frequency carrier to generate an interference signal with specific characteristics. This signal is then transmitted to the mixing and filtering module, which mixes the modulated signal with the local oscillator signal to the target frequency band and filters out out-of-band noise to improve signal purity. Finally, the power amplification module amplifies the filtered signal to an effective power level, and the interference field is radiated through the antenna to block the communication link of the target UAV, thus achieving countermeasure. This eliminates the need to constantly receive commands through an interface or wireless module, thereby improving the real-time performance and autonomy of the countermeasure system.
[0043] Reference Figure 2 The autonomous decision-making module includes an NPU chip, an RF detector, an analog-to-digital converter (ADC), and a temperature sensor. The output of the RF detector is electrically connected to the input of the ADC, the output of the ADC is electrically connected to the input of the NPU chip, the instruction input of the NPU chip is communicatively connected to the output of the control coordination module, the control signal output of the NPU chip is electrically connected to the input of the modulation center module, and the temperature sensor is communicatively connected to the NPU chip via an I²C bus.
[0044] Specifically, the autonomous decision-making module collects radio frequency (RF) signals from the environment in real time through an RF detector and transmits the collected RF signals to the back-end analog-to-digital converter (ADC). The ADC converts the analog signals into digital signals before transmitting them to the NPU chip. Meanwhile, the temperature sensor within the autonomous decision-making module monitors the ambient temperature in real time and feeds it back to the NPU chip via the I²C bus. Based on its built-in intelligent algorithm, the NPU chip analyzes the characteristics of the digitized signal and, combined with a temperature compensation mechanism, identifies the type, communication protocol, and operating status of the target UAV. The NPU chip then automatically generates the optimal interference strategy based on the identification results and sends the corresponding waveform control parameters to the subsequent modulation center module, thereby enabling the system to autonomously counter the UAV. This proactive countermeasure work when the UAV is unmanned improves the efficiency of countermeasures.
[0045] Reference Figure 3 The preset waveform library module includes an SPI Flash memory, an address decoder, and a level converter. The enable terminal of the address decoder is communicatively connected to the output terminal of the control coordination module. The output terminal of the address decoder is electrically connected to the chip select pin of the SPI Flash memory. The output terminal of the SPI Flash memory is communicatively connected to the input terminal of the level converter. The output terminal of the level converter is communicatively connected to the input terminal of the modulation center module.
[0046] Specifically, under the addressing instructions of the control and coordination module, the pre-set waveform library module first selects the SPI Flash chip in the corresponding storage area through the address decoder to read various pre-stored standard waveform parameters. After being adapted by a level converter, these parameters are transmitted to the modulation center module to provide a basic template for interference signal generation, so as to quickly adapt to the countermeasures of different types of UAVs. The pre-set waveform library module supports the cascading expansion of multiple SPI Flash chips, so that it can store the typical communication waveform characteristics of various types of UAVs, ensuring that the system can cope with different types of target devices, reducing the technical threshold and hardware requirements.
[0047] Reference Figure 4The control and coordination module includes a main MCU, a coprocessor, and a real-time clock chip. The output of the real-time clock chip is connected to the input of the main MCU, the output of the main MCU is connected to the input of the coprocessor, and the main MCU is connected to the preset waveform library module and the autonomous decision-making module.
[0048] Specifically, the real-time clock chip in the control and coordination module provides a precise time base for the entire system. The main MCU initializes system parameters, manages power status, and coordinates data interaction between modules based on this timing. During this process, the coprocessor in the control and coordination module is responsible for sharing the data processing tasks of the main MCU, thereby improving the overall computing efficiency of the system. The main MCU connects to the preset waveform library module and the autonomous decision-making module through communication interfaces. Based on external control commands or internal preset logic, it schedules the two modules to work together, thereby enabling the system to perform controllable or autonomous UAV countermeasures.
[0049] Reference Figure 5 The radio frequency signal generation module includes a temperature-compensated crystal oscillator, a phase-locked loop (PLL) chip, and a low-noise amplifier. The output terminal of the temperature-compensated crystal oscillator is electrically connected to the input terminal of the PLL chip, the output terminal of the PLL chip is electrically connected to the input terminal of the low-noise amplifier, and the output terminal of the low-noise amplifier is electrically connected to the input terminal of the modulation center module.
[0050] Specifically, the RF signal generation module generates a high-precision reference frequency through a temperature-compensated crystal oscillator. The back-end phase-locked loop chip performs frequency multiplication based on this reference frequency to generate the RF carrier signal required by the system. The carrier signal is then amplified by a low-noise amplifier while suppressing noise interference to ensure that the output signal has a good signal-to-noise ratio. The processed stable RF carrier is used as a basic signal and input to the subsequent modulation center module to provide a carrier for subsequent signal modulation.
[0051] Reference Figure 6 The modulation center module includes a DDS chip, an FPGA chip, and an SRAM buffer. The input terminal of the FPGA chip is communicatively connected to the output terminal of the preset waveform library module. The input terminal of the FPGA chip is electrically connected to the output terminal of the autonomous decision module. The output terminal of the SRAM buffer is electrically connected to the input terminal of the FPGA chip. The output terminal of the FPGA chip is electrically connected to the input terminal of the DDS chip. The RF input terminal of the DDS chip is electrically connected to the output terminal of the RF signal generation module. The RF output terminal of the DDS chip is electrically connected to the input terminal of the mixing and filtering module.
[0052] Specifically, the modulation center module receives real-time waveform parameters from the autonomous decision-making module and standard template data from the preset waveform library module through the FPGA chip, and reads waveform configuration information from the SRAM cache inside the module. Based on these inputs, the FPGA chip configures the operating parameters of the DDS chip and controls it to generate a modulation signal with specific waveform characteristics. The DDS chip then synthesizes the carrier provided by the radio frequency signal generation module with the digital waveform and outputs a modulation signal that meets the requirements of the interference strategy to the subsequent mixing and filtering module, thereby achieving targeted interference with the communication signals of the target UAV.
[0053] Reference Figure 7 The mixing and filtering module includes a mixer, a programmable filter, and a temperature-controlled crystal oscillator. The output of the temperature-controlled crystal oscillator is electrically connected to the input of the mixer. The RF input of the mixer is electrically connected to the output of the modulation center module. The IF output of the mixer is electrically connected to the input of the programmable filter. The output of the programmable filter is electrically connected to the input of the power amplifier module.
[0054] Specifically, the mixing and filtering module generates a stable local oscillator signal through a temperature-controlled crystal oscillator. Then, the mixer mixes the modulation signal output from the modulation center module with the local oscillator signal to shift the signal frequency to the target interference frequency band. The programmable filter dynamically adjusts the filtering bandwidth according to the operating frequency characteristics of the target UAV to filter out out-of-band spurious signals, thereby improving the purity and targeting of the interference signal. Finally, the processed signal is transmitted to the power amplification module to prepare for subsequent power enhancement.
[0055] Reference Figure 8 The power amplifier module includes a power amplifier chip, a π-type matching network, and an over-temperature protection circuit. The input terminal of the π-type matching network is electrically connected to the output terminal of the mixer filter module, the output terminal of the π-type matching network is electrically connected to the RF pin of the power amplifier chip, and the output terminal of the over-temperature protection circuit is electrically connected to the enable pin of the power amplifier chip.
[0056] Specifically, the power amplifier module uses a π-type matching network to perform impedance matching on the signal input to the mixer filter module, ensuring that the signal energy is efficiently transmitted to the power amplifier chip at the back end. The power amplifier chip amplifies the signal to the designed power level to improve the effective interference distance. During this process, the over-temperature protection circuit inside the power amplifier module monitors the operating temperature of the power amplifier in real time. When the temperature exceeds the safety threshold, it will automatically adjust the operating state of the amplifier or directly cut off the power supply to prevent the device from being damaged due to overheating, thereby improving the reliability and stability of the system.
[0057] Working Principle: When using this system for drone countermeasures, the system first acquires radio frequency (RF) signals from the environment in real time via the RF detector within the autonomous decision-making module. Then, the ADC (Analog-to-Digital Converter) within the module converts the acquired RF signals into digital signals, which are then transmitted to the NPU (Neural Processing Unit) chip. The NPU chip analyzes and processes the signals, autonomously identifies the drone type, and generates optimal interference waveform parameters, which are sent to the modulation center module. Simultaneously, the main MCU within the control and coordination module sends an addressing command to the address decoder in the preset waveform library module, enabling it to select the corresponding SPI (Interference Signal Processor). The Flash chip reads the pre-stored waveform parameters. These parameters are converted by a level converter and then transmitted to the modulation center module. The RF signal generation module, after processing by its internal components, outputs a stable RF carrier to the modulation center module. The FPGA chip in the modulation center module then receives the UAV waveform parameters output by the autonomous decision-making module and the waveform template data from the pre-set waveform library module. It reads the waveform data from the SRAM cache and drives the DDS chip to generate a specific waveform. The DDS chip then combines the input RF carrier with the digital waveform and outputs a modulated signal to the mixing and filtering module. After processing by the mixing and filtering module, the filtered signal is transmitted to the power amplifier module, which amplifies the signal. The final amplified targeted interference signal is radiated through the antenna, thereby achieving communication interference and countermeasures against the target UAV.
[0058] Finally, it should be noted that the above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.
Claims
1. A drone countermeasure system, comprising a radio frequency signal generation module and a control and coordination module, characterized in that: The output of the control and coordination module is communicatively connected to the input of the preset waveform library module and the autonomous decision-making module. The outputs of the radio frequency signal generation module and the autonomous decision-making module are both electrically connected to the input of the modulation center module. The output of the preset waveform library module is communicatively connected to the input of the modulation center module. The output of the modulation center module is electrically connected to the input of the mixing and filtering module. The output of the mixing and filtering module is electrically connected to the input of the power amplifier module.
2. The anti-drone system according to claim 1, characterized in that: The autonomous decision-making module includes an NPU chip, an RF detector, an analog-to-digital converter (ADC), and a temperature sensor. The output of the RF detector is electrically connected to the input of the ADC, the output of the ADC is electrically connected to the input of the NPU chip, the instruction input of the NPU chip is communicatively connected to the output of the control coordination module, the control signal output of the NPU chip is electrically connected to the input of the modulation center module, and the temperature sensor is communicatively connected to the NPU chip via an I²C bus.
3. The anti-drone system according to claim 1, characterized in that: The preset waveform library module includes an SPI Flash memory, an address decoder, and a level converter. The enable terminal of the address decoder is communicatively connected to the output terminal of the control coordination module. The output terminal of the address decoder is electrically connected to the chip select pin of the SPI Flash memory. The output terminal of the SPI Flash memory is communicatively connected to the input terminal of the level converter. The output terminal of the level converter is communicatively connected to the input terminal of the modulation center module.
4. The anti-drone system according to claim 1, characterized in that: The control and coordination module includes a main MCU, a coprocessor, and a real-time clock chip. The output of the real-time clock chip is communicatively connected to the input of the main MCU, and the output of the main MCU is communicatively connected to the input of the coprocessor. The main MCU is communicatively connected to a preset waveform library module and an autonomous decision-making module.
5. The anti-drone system according to claim 1, characterized in that: The radio frequency signal generation module includes a temperature-compensated crystal oscillator, a phase-locked loop (PLL) chip, and a low-noise amplifier. The output terminal of the temperature-compensated crystal oscillator is electrically connected to the input terminal of the PLL chip, the output terminal of the PLL chip is electrically connected to the input terminal of the low-noise amplifier, and the output terminal of the low-noise amplifier is electrically connected to the input terminal of the modulation center module.
6. The anti-drone system according to claim 1, characterized in that: The modulation hub module includes a DDS chip, an FPGA chip, and an SRAM buffer. The input terminal of the FPGA chip is communicatively connected to the output terminal of the preset waveform library module. The input terminal of the FPGA chip is electrically connected to the output terminal of the autonomous decision-making module. The output terminal of the SRAM buffer is electrically connected to the input terminal of the FPGA chip. The output terminal of the FPGA chip is electrically connected to the input terminal of the DDS chip. The RF input terminal of the DDS chip is electrically connected to the output terminal of the RF signal generation module. The RF output terminal of the DDS chip is electrically connected to the input terminal of the mixing and filtering module.
7. The anti-drone system according to claim 1, characterized in that: The mixing and filtering module includes a mixer, a programmable filter, and a temperature-controlled crystal oscillator. The output terminal of the temperature-controlled crystal oscillator is electrically connected to the input terminal of the mixer. The radio frequency input terminal of the mixer is electrically connected to the output terminal of the modulation center module. The intermediate frequency output terminal of the mixer is electrically connected to the input terminal of the programmable filter. The output terminal of the programmable filter is electrically connected to the input terminal of the power amplifier module.
8. The anti-drone system according to claim 1, characterized in that: The power amplification module includes a power amplifier chip, a π-type matching network, and an over-temperature protection circuit. The input terminal of the π-type matching network is electrically connected to the output terminal of the mixing and filtering module, the output terminal of the π-type matching network is electrically connected to the RF pin of the power amplifier chip, and the output terminal of the over-temperature protection circuit is electrically connected to the enable pin of the power amplifier chip.