Automated test system

Abstract

The utility model provides a kind of automatic test system, it includes host computer and testing device;The testing device includes control circuit and test module, the control circuit is connected with the host computer and the test module respectively, the test module is connected with the single board to be measured, for testing the single board to be measured.The utility model can carry out automatic test to the single board to be measured, improves test efficiency.

Description

Technical Field

[0001] This utility model relates to the field of automated testing technology, specifically to an automated testing system. Background Technology

[0002] Before a circuit board is put into use, various performance parameters need to be tested to ensure its quality and reliability. Currently, circuit board testing is usually done manually, one by one. That is, after completing the test of one performance parameter, the circuit board is manually switched to the next test circuit for other performance parameters, resulting in low testing efficiency. Utility Model Content

[0003] This invention provides an automated testing system, which aims to solve the technical problem of low testing efficiency of circuit boards.

[0004] This utility model provides an automated testing system, which includes a host computer and a testing device; the testing device includes a control circuit and a testing module, the control circuit is connected to the host computer and the testing module respectively, and the testing module is connected to the board under test for testing the board under test.

[0005] Furthermore, the test module includes an output voltage circuit, a buffer circuit, a temperature monitoring circuit, a fan control circuit, and a drive circuit; the output voltage circuit, the buffer circuit, the temperature monitoring circuit, the fan control circuit, and the drive circuit are all connected to the control circuit and the board under test, respectively.

[0006] Furthermore, the output voltage circuit includes a first operational amplifier, the non-inverting input of the first operational amplifier is connected to the board under test, and the output of the first operational amplifier is connected to its inverting input and the control circuit.

[0007] Furthermore, the buffer circuit includes a second operational amplifier and a third operational amplifier; the non-inverting input and the inverting input of the second operational amplifier are both connected to the board under test, the output of the second operational amplifier is connected to the non-inverting input of the third operational amplifier, and the output of the third operational amplifier is connected to its inverting input and the control circuit respectively.

[0008] Furthermore, the temperature monitoring circuit includes a fourth operational amplifier; the non-inverting input of the fourth operational amplifier is connected to a thermistor, and the output of the fourth operational amplifier is connected to its inverting input and the control circuit respectively.

[0009] Furthermore, the test module also includes a digital input circuit, a digital output circuit, an analog input circuit, an analog output circuit, a position command pulse input circuit, an encoder signal frequency division output circuit, and an absolute encoder signal receiving circuit; the digital input circuit, the digital output circuit, the analog input circuit, the analog output circuit, the position command pulse input circuit, the encoder signal frequency division output circuit, and the absolute encoder signal receiving circuit are all connected to the control circuit and the board under test, respectively.

[0010] Furthermore, the digital input circuit includes a first switch, a second switch, and a first optocoupler; the controlled terminal of the first switch is connected to the control circuit, the first terminal of the first switch is grounded, the second terminal of the first switch is connected to one end of the first optocoupler, the other end of the first optocoupler is connected to the controlled terminal of the second switch, the first terminal of the second switch is grounded, and the second terminal of the second switch is connected to the board under test.

[0011] Furthermore, the digital output circuit includes a second optocoupler; one end of the second optocoupler is connected to the board under test, and the other end of the second optocoupler is connected to the control circuit.

[0012] Furthermore, the position command pulse input circuit includes a driver chip; the driver chip is connected to both the control circuit and the board under test.

[0013] Furthermore, the encoder signal frequency division output circuit includes a differential receiver chip; the differential receiver chip is connected to the control circuit and the board under test respectively.

[0014] The automated testing system disclosed in this utility model includes a host computer and a testing device. The testing module includes a control circuit and a testing module. The control circuit is connected to both the host computer and the testing module and is used to receive test commands from the host computer. The testing module is connected to the board under test and is used to test various performance parameters of the board under test, thereby realizing automated testing of the board under test and improving testing efficiency. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1This is a block diagram of an automated testing system provided in an embodiment of the present invention;

[0017] Figure 2 This is a block diagram of an automated testing system provided in another embodiment of the present invention;

[0018] Figure 3 This is a circuit diagram of the output voltage circuit provided in one embodiment of the present invention;

[0019] Figure 4 This is a circuit diagram of a buffer circuit provided in one embodiment of the present invention;

[0020] Figure 5 This is a circuit diagram of a temperature monitoring circuit provided in one embodiment of the present invention;

[0021] Figure 6 This is a circuit diagram of a fan control circuit provided in one embodiment of the present invention;

[0022] Figure 7 This is a circuit diagram of a driving circuit provided in an embodiment of the present invention;

[0023] Figure 8 This is a circuit diagram of a digital input circuit provided in an embodiment of the present invention;

[0024] Figure 9 This is a circuit diagram of a digital output circuit provided in an embodiment of the present invention;

[0025] Figure 10 This is a circuit diagram of an analog input circuit provided in an embodiment of the present invention;

[0026] Figure 11 This is a circuit diagram of an analog output circuit provided in an embodiment of the present invention;

[0027] Figure 12 This is a circuit diagram of a position command pulse input circuit provided in an embodiment of the present invention;

[0028] Figure 13 This is a circuit diagram of an encoder signal frequency division output circuit provided in an embodiment of the present invention;

[0029] Figure 14 This is a circuit diagram of an absolute encoder signal receiving circuit provided in one embodiment of the present invention. Detailed Implementation

[0030] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0031] It should be understood that, when used in this specification and the appended claims, the terms “comprising” and “including” indicate the presence of the described features, integrals, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, operations, elements, components and / or collections thereof.

[0032] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.

[0033] Furthermore, the directional terms used in this invention, such as "up," "down," "front," "back," "left," "right," "inner," "outer," and "side," are only for reference to the accompanying drawings and the product's usage state. Therefore, the directional terms used are for explaining and understanding this invention, and not for limiting it. Additionally, in the accompanying drawings, structures that are similar or identical are indicated by the same reference numerals.

[0034] See Figures 1 to 14 , Figure 1 This is a block diagram of an automated testing system 100 provided in an embodiment of the present invention; Figure 2 This is a block diagram of an automated testing system 100 provided in another embodiment of the present invention; Figure 3 This is a circuit diagram of the output voltage circuit 221 provided in one embodiment of the present invention; Figure 4 This is a circuit diagram of a buffer circuit 223 provided in one embodiment of the present invention; Figure 5 This is a circuit diagram of a temperature monitoring circuit provided in one embodiment of the present invention; Figure 6 This is a circuit diagram of a fan control circuit 224 provided in one embodiment of the present invention; Figure 7 This is a circuit diagram of the driving circuit 225 provided in one embodiment of the present invention; Figure 8This is a circuit diagram of a digital input circuit 226 provided in one embodiment of the present invention; Figure 9 This is a circuit diagram of a digital output circuit 227 provided in one embodiment of the present invention; Figure 10 This is a circuit diagram of an analog input circuit 228 provided in one embodiment of the present invention; Figure 11 This is a circuit diagram of the analog output circuit 229 provided in one embodiment of the present invention; Figure 12 This is a circuit diagram of a position command pulse input circuit 230 provided in one embodiment of the present invention; Figure 13 This is a circuit diagram of an encoder signal frequency division output circuit 231 provided in an embodiment of the present invention; Figure 14 This is a circuit diagram of an absolute encoder signal receiving circuit 232 provided in one embodiment of the present invention.

[0035] like Figure 1 As shown, the automated testing system 100 includes a host computer 10 and a testing device; the testing device includes a control circuit 21 and a testing module 22. The control circuit 21 is connected to the host computer 10 and the testing module 22 respectively. The testing module 22 is connected to the board under test 200 and is used to test the board under test 200.

[0036] Specifically, the automated testing system 100 may include a host computer 10 and a testing device. The testing device may include a control circuit 21 and a testing module 22. The control circuit 21 is connected to both the host computer 10 and the testing module 22, and the testing module 22 is connected to the board under test 200. Alternatively, the testing device can be integrated into a single testing board. This testing board is connected to the host computer 10 via a first communication protocol, and simultaneously connected to the board under test 200 via a second communication protocol. The first communication protocol may be a USB communication protocol, and the second communication protocol may be a RS-485 communication protocol, enabling communication between the host computer 10 and the testing board, as well as between the testing board and the board under test 200.

[0037] Test module 22 is mainly used to perform various performance tests on the board under test 200, such as switching power supply output voltage detection, buffer detection, fan control detection, temperature monitoring detection, IGBT drive detection, digital input detection, digital output detection, analog input detection, analog output detection, position command pulse input detection, encoder signal frequency division output detection, and absolute encoder signal reception detection. Among them, the switching power supply output voltage detection is mainly achieved by reading the switching power supply output voltage; the buffer detection is mainly achieved by communication to cause the buffer circuit 223 of the board under test 200 to output, and then reading the voltage value detected by the test board through communication; the fan control detection is mainly achieved by the host computer 10 sending a test command to cause the fan control circuit 224 of the board under test 200 to output, and then reading the voltage value detected by the test board through communication; the temperature monitoring detection is mainly achieved by comparing the ambient temperature values ​​collected by the board under test 200 and the test board; the IGBT drive detection is mainly achieved by the host computer 10 sending a test command to cause the IGBT drive circuit 225 of each board under test 200 to output, and then reading the voltage value detected by the test board through communication; the digital input detection is mainly achieved by the test board providing the DI input of each board under test 200, and then reading the value detected by the software of the board under test 200 through communication. Digital output detection is mainly achieved through the DO output of each board under test (Board 200), and then the value detected by the Board 200 is read through communication. Analog input detection is mainly achieved through the AI ​​input given to each board under test (Board 200) by the test board, and then the value detected by the software of the board under test (Board 200) is read through communication. Analog output detection is mainly achieved through the AO output of each board under test (Board 200), and then the voltage value detected by the test board is read through communication. Position command pulse input detection is mainly achieved through the test board outputting a pulse of a specific value, and then the pulse value detected by the board under test (Board 200) is read through communication. Encoder signal frequency division output detection is mainly achieved through the board under test (Board 200) outputting a pulse of a specific value, and then the pulse value detected by the test board is read through communication. Absolute encoder signal reception detection is mainly achieved through the host computer (Board 10) sending a test command to cause the test board to emit a signal, and then the board under test (Board 200) returns specific data.

[0038] The host computer 10 can be any control device, equipped with corresponding operating software. It can send test commands for test items to the test board via USB communication. The functional circuits on the test board directly measure some simple signals transmitted by the test board 200, such as the analog voltage of the switching power supply output circuit on the test board 200. The control circuit 21 processes the measured signals and then transmits the test data to the host computer 10 via USB communication. The data is judged, and then the next test is automatically started.

[0039] Meanwhile, for some complex circuits on the board under test (BUT) 200, communication between the test board and BUT 200 is required to complete the measurement process. When the host computer 10's operating software sends test instructions for the test items to the test board via USB communication, the control circuit 21 of the test board sends a test request command to the BUT 200 via 485 communication. Upon receiving the test request command, the BUT 200 causes the relevant functional circuits to output signals. The functional circuits on the test board measure the signals transmitted by the BUT 200. The control circuit 21 processes the measured signals and then transmits the test data to the host computer 10 via USB communication for data evaluation. The system then automatically proceeds to the next test item. After all test items are completed, the test results are output. If any abnormalities are detected, a fault message is displayed, thus achieving automated testing and improving testing efficiency.

[0040] See Figure 2 As a further embodiment, the test module 22 includes an output voltage circuit 221, a buffer circuit 223, a temperature monitoring circuit 223, a fan control circuit 224, and a drive circuit 225; the output voltage circuit 221, the buffer circuit 223, the temperature monitoring circuit 223, the fan control circuit 224, and the drive circuit 225 are all connected to the control circuit 21 and the board under test 200, respectively.

[0041] The test module 22 may include an output voltage circuit 221, a buffer circuit 223, a temperature monitoring circuit 223, a fan control circuit 224, and a drive circuit 225. The output voltage circuit 221, the buffer circuit 223, the temperature monitoring circuit 223, the fan control circuit 224, and the drive circuit 225 are all connected to the control circuit 21 and the board under test 200, respectively.

[0042] The output voltage circuit 221 is used to detect the output voltage of the switching power supply, the buffer circuit 223 is used to detect the buffer, the fan control circuit 224 is used to detect the fan control, the temperature monitoring circuit 223 is used to detect the temperature monitoring, and the drive circuit 225 is used to detect the IGBT drive.

[0043] See Figure 3 As a further embodiment, the output voltage circuit 221 includes a first operational amplifier U1, the non-inverting input terminal of the first operational amplifier U1 is connected to the board under test 200, and the output terminal of the first operational amplifier U1 is connected to its inverting input terminal and the control circuit 21 respectively.

[0044] The output voltage circuit 221 includes a first operational amplifier U1, a voltage divider circuit composed of resistors R1, R2, and R4, and other components to ensure stable circuit operation, such as filter capacitors and current-limiting resistors. During testing, the EX_+5V signal from the board under test 200 is led to the port of the output voltage circuit 221. The signal is divided by resistors R1, R2, and R4, processed by a voltage follower composed of the first operational amplifier U1, and then transmitted to the MCU of the control circuit 21 for acquisition and analysis. The MCU then transmits the test data to the host computer 10 via USB communication for data evaluation.

[0045] See Figure 4 As a further embodiment, the buffer circuit 223 includes a second operational amplifier U2 and a third operational amplifier U3; the non-inverting input terminal and the inverting input terminal of the second operational amplifier U2 are both connected to the board under test 200, the output terminal of the second operational amplifier U2 is connected to the non-inverting input terminal of the third operational amplifier U3, and the output terminal of the third operational amplifier U3 is connected to its inverting input terminal and the control circuit 21 respectively.

[0046] The buffer circuit 223 includes an analog voltage acquisition circuit composed of resistors, capacitors, operational amplifiers, etc., which leads the relay coil signal on the board under test 200 to the port of the buffer circuit 223, such as... Figure 4 The intermediate signals (EX_short_PIN3 and EX_short_PIN4) are processed by a differential amplifier composed of resistors R7, R8, R9, and R10, as well as second operational amplifier U2 and third operational amplifier U3, and then transmitted to the MCU port for acquisition. The parameters of the detection circuit are configured so that when the buffer circuit 223 is functioning normally, the corresponding MCU port will detect an analog voltage of a specific amplitude; when the buffer circuit 223 malfunctions, the analog voltage detected by the corresponding MCU port will be 0V or other special values. The buffer circuit 223 of the board under test 200 is tested by measuring the analog voltage of the DC relay coil.

[0047] See Figure 5 As a further embodiment, the temperature monitoring circuit 223 includes a fourth operational amplifier U4; the non-inverting input terminal of the fourth operational amplifier U4 is connected to a thermistor, and the output terminal of the fourth operational amplifier U4 is connected to its inverting input terminal and the control circuit 21 respectively.

[0048] Among them, such as Figure 5As shown, J1 is the connection port, which connects to an external NTC thermistor with a negative temperature coefficient. Resistors R12 and R13, along with the +3.3V power supply, convert the ambient temperature into a specific analog voltage value. This signal is then processed by a voltage follower consisting of the fourth operational amplifier U4 and transmitted to the MCU port for acquisition. Simultaneously, the board under test (TBD) 200 also has the same circuitry to acquire the ambient temperature. Under normal circumstances, the ambient temperature value acquired by the temperature monitoring circuit 223 and the TBD 200 should be consistent; otherwise, the TBD 200 circuitry is malfunctioning. The temperature monitoring circuit 223 of the TBD 200 is tested by comparing the ambient temperature value acquired by the MCU of the TBD 200 with the ambient temperature value acquired by the temperature monitoring circuit 223 at the same time.

[0049] like Figure 6 As shown, Figure 6 The fan control circuit 224 includes an analog voltage acquisition circuit composed of resistors, capacitors, and operational amplifiers. The fan port signal from the board under test 200 is connected to the port of the fan control circuit 224, such as... Figure 6 The signals EX1_fan_PIN1 and EX_fan_PIN2 are processed by a differential amplifier composed of resistors R17, R18, R19, and R20, as well as operational amplifiers U5 and U6, before being transmitted to the MCU port for acquisition. The parameters of the detection circuit are configured so that when the fan control circuit 224 is functioning normally, the corresponding MCU port will detect an analog voltage of a specific amplitude. When the fan control circuit 224 malfunctions, the analog voltage detected by the corresponding MCU port will be 0V or another special value. The fan control circuit 224 of the board under test 200 is tested by measuring the analog voltage at the fan port.

[0050] like Figure 7 As shown, Figure 7 This is a circuit diagram of the driver circuit 225, which includes an analog voltage acquisition circuit composed of resistors, capacitors, operational amplifiers, etc. The gate G and emitter E of the IGBT of the board under test 200 are connected to the ports of the driver circuit 225, as shown below. Figure 7 When the servo MCU enables the IGBT drive circuit 225 output, the signals EX_PUH and EX_PUH_N will generate a pulse between the IGBT gate G and emitter E. Figure 7The port of the drive circuit 225 receives a pulse signal with a fixed amplitude of U and a duty cycle of 50%. After filtering by the large capacitor C15, it becomes a DC voltage signal with an amplitude of 0.5U. Then, the signal is processed by a voltage follower consisting of a differential amplifier (composed of resistors R22, R23, R24, and R25) and an operational amplifier (U7) and an operational amplifier (U8), and transmitted to the MCU port for acquisition. The parameters of the detection circuit are configured so that when the IGBT drive circuit 225 is functioning normally, the corresponding MCU port will detect an analog voltage signal of a specific amplitude. The IGBT drive circuit 225 of the board under test (Board 200) is tested by measuring the analog voltage between the gate G and emitter E of the IGBT.

[0051] See Figure 2 As a further embodiment, the test module 22 also includes a digital input circuit 226, a digital output circuit 227, an analog input circuit 228, an analog output circuit 229, a position command pulse input circuit 230, an encoder signal frequency division output circuit 231, and an absolute encoder signal receiving circuit 232; the digital input circuit 226, the digital output circuit 227, the analog input circuit 228, the analog output circuit 229, the position command pulse input circuit 230, the encoder signal frequency division output circuit 231, and the absolute encoder signal receiving circuit 232 are all connected to the control circuit 21 and the board under test 200, respectively.

[0052] The test module 22 also includes a digital input circuit 226, a digital output circuit 227, an analog input circuit 228, an analog output circuit 229, a position command pulse input circuit 230, an encoder signal frequency division output circuit 231, and an absolute encoder signal receiving circuit 232. The digital input circuit 226, digital output circuit 227, analog input circuit 228, analog output circuit 229, position command pulse input circuit 230, encoder signal frequency division output circuit 231, and absolute encoder signal receiving circuit 232 are all connected to the control circuit 21 and the board under test 200, respectively.

[0053] Digital input circuit 226 is used to detect digital input; digital output circuit 227 is used to detect digital output; analog input circuit 228 is used to detect analog input; analog output circuit 229 is used to detect analog output; position command pulse input circuit 230 is used to detect position command pulse input; encoder signal frequency division output circuit 231 is used to detect encoder signal frequency division output; and absolute encoder signal receiving circuit 232 is used to detect absolute encoder signal reception.

[0054] See Figure 8 As a further embodiment, the digital input circuit 226 includes a first switch Q1, a second switch Q2, and a first optocoupler P1; the controlled terminal of the first switch Q1 is connected to the control circuit 21, the first terminal of the first switch Q1 is grounded, the second terminal of the first switch Q1 is connected to one end of the first optocoupler P1, the other end of the first optocoupler P1 is connected to the controlled terminal of the second switch Q2, the first terminal of the second switch Q2 is grounded, and the second terminal of the second switch Q2 is connected to the board under test 200.

[0055] The digital input circuit 226 includes resistors, capacitors, optocouplers, switching transistors, and Zener diodes. The switching transistors include a first switching transistor Q1 and a second switching transistor Q2, both of which can be transistors. The output signal of the corresponding test circuit on the test board, such as... Figure 8 EX_DB44_DI1 is connected to the digital input circuit 226 port of the digital input circuit 226. When a test command is received, the digital input circuit 226 emits a pulse with a frequency of 1kHz, which is transmitted to the digital input circuit 226 port of the board under test 200. After circuit processing, if the circuit is normal, the MCU of the board under test 200 receives the pulse signal with a frequency of 1kHz.

[0056] See Figure 9 As a further embodiment, the digital output circuit 227 includes a second optocoupler P2; one end of the second optocoupler P2 is connected to the board under test 200, and the other end of the second optocoupler P2 is connected to the control circuit 21.

[0057] The digital output circuit 227 includes resistors, capacitors, optocouplers, etc., which leads the digital output signal from the board under test 200 to the port of the digital output circuit 227 on the test board, such as... Figure 9 EX_DB44_DO1+. When a test command is received, the output circuit on the board under test 200 emits a pulse with a frequency of 1kHz, which is transmitted to the input port of the digital output circuit 227. After processing by the circuit, if the circuit is normal, the MCU of the test board receives a pulse signal with a frequency of 1kHz.

[0058] like Figure 10As shown, the analog input circuit 228 includes resistors, capacitors, operational amplifiers, etc., and leads the analog output signal (EX_DB44_AI1) on the analog input circuit 228 to the port of the corresponding circuit on the board under test 200. When the control circuit 21 receives a test command, the MCU port sends a pulse with an amplitude of +3.3V and a duty cycle of 50%. This pulse is converted into a DC voltage signal with an amplitude of 1.65V through resistor R38 and capacitor C21. This signal is then converted into a DC voltage signal with an amplitude of 5V by a non-inverting amplifier composed of the ninth operational amplifier U9 and resistors R39, R340, and R41. This voltage signal is led to the port on the board under test 200. After circuit processing, if the circuit is normal, the MCU port of the board under test 200 will receive a voltage signal of a specific amplitude.

[0059] like Figure 11 As shown, the analog output circuit 229 includes resistors, capacitors, operational amplifiers, etc., which lead the analog output signal from the board under test 200 to the port of the analog output circuit 229, such as... Figure 11 EX_DB44_AO1. When a test command is received, the board under test 200 outputs an analog voltage of a specific amplitude, which is transmitted to the port of the analog output circuit 229. The voltage is divided by resistors R53, R44, and R45, filtered by resistor R47 and capacitor C22, and then processed by a voltage follower composed of the tenth operational amplifier U10 before being transmitted to the MCU port. If the circuit is normal, the MCU port receives a voltage signal of the specific amplitude.

[0060] See Figure 12 As a further embodiment, the position command pulse input circuit 230 includes a driver chip U11; the driver chip U11 is connected to the control circuit 21 and the board under test 200 respectively.

[0061] The position command pulse input circuit 230 includes resistors, capacitors, and a driver chip U11. When a test command is received, the position command pulse input circuit 230 outputs a differential signal with a specific pulse value. The board under test (DUT) 200 acts as the signal receiver. After circuit processing, the MCU port of the DUT 200 receives the signal with the specific pulse value. If the number of pulses received by the DUT 200 matches the number of pulses emitted by the test board, the circuit is considered to be functioning normally.

[0062] See Figure 13 As a further embodiment, the encoder signal frequency division output circuit 231 includes a differential receiver chip U12; the differential receiver chip U12 is connected to the control circuit 21 and the board under test 200 respectively.

[0063] The encoder signal frequency divider output circuit 231 includes resistors, capacitors, and a differential receiver chip U12. When a test command is received, the frequency divider output circuit of the board under test 200 generates a differential signal with a specific pulse value. The encoder signal frequency divider output circuit 231 acts as the signal receiving end. After circuit processing, the control circuit 21's MCU port receives the signal with the specific pulse value. If the number of pulses received by the control circuit 21 matches the number of pulses emitted by the board under test 200, it indicates that the circuit is normal.

[0064] like Figure 14 As shown, the absolute encoder signal receiving circuit 232 includes resistors, capacitors, a communication chip U13, a common-mode inductor, etc. The board under test 200 is connected to the absolute encoder signal receiving circuit 232, as follows: Figure 14 The test board, acting as the master, sends instructions to the board under test (BUT) 200 via the encoder circuit when a test command is received. The BUT 200, acting as the slave, receives the instructions and returns specific data.

[0065] In addition, the communication circuit can be tested by checking whether the communication with the board under test is normal. If communication is not possible, it indicates that there is an abnormality in the communication circuit.

[0066] The automated testing system disclosed in this utility model includes a control circuit and a testing module. The control circuit is connected to both the host computer and the testing module to receive test commands from the host computer. The testing module is connected to the board under test (BUT) to test various performance parameters of the BUT. The BUT can be tested one by one using test commands from the host computer to achieve automated testing and improve testing efficiency.

[0067] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this utility model, and these modifications or substitutions should all be covered within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. An automated testing system, characterized in that, include: Host computer; The testing device includes a control circuit and a testing module. The control circuit is connected to the host computer and the testing module, respectively. The testing module is connected to the board under test and is used to test the board under test.

2. The automated testing system as described in claim 1, characterized in that, The test module includes an output voltage circuit, a buffer circuit, a temperature monitoring circuit, a fan control circuit, and a drive circuit. The output voltage circuit, the buffer circuit, the temperature monitoring circuit, the fan control circuit, and the drive circuit are all connected to the control circuit and the board under test, respectively.

3. The automated testing system as described in claim 2, characterized in that, The output voltage circuit includes a first operational amplifier, the non-inverting input of which is connected to the board under test, and the output of which is connected to its inverting input and the control circuit.

4. The automated testing system as described in claim 2, characterized in that, The buffer circuit includes a second operational amplifier and a third operational amplifier; The non-inverting and inverting inputs of the second operational amplifier are both connected to the board under test. The output of the second operational amplifier is connected to the non-inverting input of the third operational amplifier. The output of the third operational amplifier is connected to its inverting input and the control circuit, respectively.

5. The automated testing system as described in claim 2, characterized in that, The temperature monitoring circuit includes a fourth operational amplifier; The non-inverting input of the fourth operational amplifier is connected to a thermistor, and the output of the fourth operational amplifier is connected to its inverting input and the control circuit.

6. The automated testing system as described in claim 1, characterized in that, The test module also includes a digital input circuit, a digital output circuit, an analog input circuit, an analog output circuit, a position command pulse input circuit, an encoder signal frequency division output circuit, and an absolute encoder signal receiving circuit. The digital input circuit, the digital output circuit, the analog input circuit, the analog output circuit, the position command pulse input circuit, the encoder signal frequency division output circuit, and the absolute encoder signal receiving circuit are all connected to the control circuit and the board under test, respectively.

7. The automated testing system as described in claim 6, characterized in that, The digital input circuit includes a first switching transistor, a second switching transistor, and a first optocoupler; The controlled electrode of the first switching transistor is connected to the control circuit, the first electrode of the first switching transistor is grounded, the second electrode of the first switching transistor is connected to one end of the first optocoupler, the other end of the first optocoupler is connected to the controlled electrode of the second switching transistor, the first electrode of the second switching transistor is grounded, and the second electrode of the second switching transistor is connected to the board under test.

8. The automated testing system as described in claim 6, characterized in that, The digital output circuit includes a second optocoupler; One end of the second optocoupler is connected to the board under test, and the other end of the second optocoupler is connected to the control circuit.

9. The automated testing system as described in claim 6, characterized in that, The position command pulse input circuit includes a driver chip; The driver chip is connected to both the control circuit and the board under test.

10. The automated testing system as described in claim 6, characterized in that, The encoder signal frequency division output circuit includes a differential receiver chip; The differential receiver chip is connected to both the control circuit and the board under test.

Images