Level conversion circuit

By designing a level conversion circuit and using a comparator circuit to select an appropriate transmission path, the problem of limited speed increase of SD memory cards during power supply voltage switching was solved. This enabled signal rate expansion from 208MHz to 300MHz and fast read/write, ensuring reliable operation of the device under different power supply voltages.

CN224459775UActive Publication Date: 2026-07-033PEAK INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
3PEAK INC
Filing Date
2025-08-07
Publication Date
2026-07-03

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Abstract

This invention discloses a level conversion circuit, comprising: a first level converter, a communication transmission circuit, and a comparison circuit. The first level converter is connected to a first power supply voltage and a second power supply voltage to perform level conversion of the first power supply voltage or the second power supply voltage based on an input signal. The comparison circuit is used to compare the first power supply voltage and the second power supply voltage to generate a control signal, and to control the first level converter or the communication transmission circuit to output a signal based on the control signal. According to this invention's level conversion circuit, by comparing the first power supply voltage and the second power supply voltage through the comparison circuit to select a suitable transmission path (first level converter or communication transmission circuit), high-speed level conversion is achieved without the risk of overvoltage. This supports the high-speed level conversion requirements when the maximum signal rate of SD3.0 is extended from 208MHz to 300MHz, enabling fast read and write operations on the memory card.
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Description

Technical Field

[0001] This utility model belongs to the field of integrated circuit technology, and specifically relates to a level conversion circuit. Background Technology

[0002] The SD 3.0 protocol supports multiple speed modes. In 3.3V signal mode, the maximum signal rate is 50MHz; in 1.8V signal mode, the maximum signal rate is 208MHz. In applications, the host chip's operating voltage is relatively lower, such as 1.8V, while the SD memory card operates at 3.3V. A level converter is needed as an interface between the host chip and the SD memory card. When the SD memory card is working, it first establishes a connection in 3.3V signal mode, and then switches to the high-speed 1.8V signal mode. This power switching requires a switching signal. With technological advancements, higher demands are placed on the operating speed of SD memory cards, with a maximum signal rate of 300MHz. Figure 1 As shown, VCCA is 1.8V, and VCCB is 3.3V / 1.8V. When the SD memory card is initially working, VCCB is 3.3V, and after the connection is established, VCCB switches to 1.8V. The devices on the B-end need to work reliably under both 3.3V and 1.8V power supplies, which limits the speed improvement.

[0003] The information disclosed in this background section is intended only to enhance the understanding of the overall background of this utility model and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content

[0004] The purpose of this invention is to provide a level conversion circuit that can switch between low-speed and high-speed communication while meeting the requirements for increased speed.

[0005] To achieve the above objectives, a specific embodiment of this utility model provides the following technical solution: a level conversion circuit, comprising: a first level converter, a communication transmission circuit, and a comparison circuit; the first level converter is connected to a first power supply voltage and a second power supply voltage to perform level conversion of the first power supply voltage or the second power supply voltage based on an input signal; the comparison circuit is used to compare the first power supply voltage and the second power supply voltage to generate a control signal, and to control the first level converter or the communication transmission circuit to output a signal based on the control signal.

[0006] In one or more embodiments of this utility model, the level conversion circuit includes a selection circuit, the first input terminal of the selection circuit is connected to the output terminal of the first level converter, the second input terminal of the selection circuit is connected to the output terminal of the communication transmission circuit, and the control terminal of the selection circuit is used to receive a control signal to control the output terminal of the selection circuit to connect with the first input terminal of the selection circuit, or to control the output terminal of the selection circuit to connect with the second input terminal of the selection circuit.

[0007] In one or more embodiments of the present invention, the communication transmission circuit includes a second level converter, which is connected to a first power supply voltage and a third power supply voltage to perform level conversion of the first power supply voltage or the third power supply voltage based on an input signal.

[0008] In one or more embodiments of the present invention, the first level converter has a first enable terminal for receiving a control signal to control the first level converter to turn on or off based on the control signal, and the second level converter has a second enable terminal for receiving a control signal to control the second level converter to turn on or off based on the control signal.

[0009] In one or more embodiments of this utility model, the communication transmission circuit includes a switch control circuit, which is used to control the transmission of input signals based on its own on / off control.

[0010] In one or more embodiments of this utility model, the switch control circuit includes a transistor, a first terminal of the transistor for receiving an input signal, a second terminal of the transistor as the output terminal of the switch control circuit, and a control terminal of the transistor for receiving a control voltage; or

[0011] The switch control circuit includes a transistor and a charge pump. A first terminal of the transistor receives an input signal, and a second terminal of the transistor is the output terminal of the switch control circuit. The charge pump generates a control voltage based on a first power supply voltage, and the control terminal of the transistor receives the control voltage. Alternatively...

[0012] The switch control circuit includes a selector and a transistor. The first input terminal of the selector is used to receive a control voltage, and the second input terminal of the selector is used to receive a reference voltage. The output terminal of the selector is connected to the control terminal of the transistor. The first terminal of the transistor is used to receive an input signal, and the second terminal of the transistor is the output terminal of the switch control circuit; or

[0013] The switch control circuit includes a charge pump, a selector, and a transistor. The charge pump generates a control voltage based on a first power supply voltage. The first input terminal of the selector is used to receive the control voltage, and the second input terminal of the selector is used to receive a reference voltage. The output terminal of the selector is connected to the control terminal of the transistor. The first terminal of the transistor is used to receive an input signal, and the second terminal of the transistor is the output terminal of the switch control circuit.

[0014] This utility model also discloses a level conversion circuit, including: a voltage generation circuit, a comparison control circuit, a selection circuit, a switching circuit, and a control circuit;

[0015] The voltage generation circuit generates a second control signal based on a first power supply voltage and a second power supply voltage. The comparison control circuit generates a comparison signal and a third control signal based on the first power supply voltage and the second power supply voltage. The first input terminal of the selection circuit receives the first control signal, the second input terminal of the selection circuit receives the second control signal, and the control terminal of the selection circuit receives the comparison signal. The output terminal of the selection circuit is connected to the control terminal of the switching circuit. The selection circuit controls the transmission of either the first or second control signal to the control terminal of the switching circuit based on the comparison signal. The first terminal of the switching circuit receives the input signal, and the second terminal of the switching circuit outputs the signal. The control circuit is connected to the first terminal of the switching circuit, the second terminal of the switching circuit, the first power supply voltage, and the second power supply voltage. The control circuit controls the connection and disconnection between the first terminal of the switching circuit and the first power supply voltage, and between the second terminal of the switching circuit and the second power supply voltage, based on the third control signal.

[0016] In one or more embodiments of this utility model, the voltage generating circuit includes a first resistor and a first transistor. A first terminal of the first resistor is used to receive a second power supply voltage. A second terminal of the first resistor is connected to a control terminal of the first transistor and a second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor is used to receive a first power supply voltage; or

[0017] The voltage generating circuit includes a charge pump, a first resistor, and a first transistor. The input terminal of the charge pump is used to receive a first power supply voltage, and the output terminal of the charge pump is used to output a first control signal. The first terminal of the first resistor is used to receive a second power supply voltage, and the second terminal of the first resistor is connected to the control terminal and the second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor is used to receive the first power supply voltage; or...

[0018] The voltage generating circuit includes a first resistor, a first transistor, and a capacitor. A first terminal of the first resistor receives a second power supply voltage. A second terminal of the first resistor is connected to a control terminal of the first transistor and a second terminal of the first transistor to generate a second control signal. A first terminal of the first transistor receives the first power supply voltage. A first terminal of the capacitor is connected to a second terminal of the first resistor, and a second terminal of the capacitor is connected to a reference voltage. Alternatively...

[0019] The voltage generating circuit includes a charge pump, a first resistor, a first transistor, and a capacitor. The input terminal of the charge pump is used to receive a first power supply voltage, and the output terminal of the charge pump is used to output a first control signal. The first terminal of the first resistor is used to receive a second power supply voltage, and the second terminal of the first resistor is connected to the control terminal and the second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor is used to receive the first power supply voltage, and the first terminal of the capacitor is connected to the second terminal of the first resistor. The second terminal of the capacitor is connected to a reference voltage.

[0020] In one or more embodiments of the present invention, the comparison control circuit includes a comparison circuit and a NOT gate. The first input terminal of the comparison circuit is used to receive a first power supply voltage, the second input terminal of the comparison circuit is used to receive a second power supply voltage, the output terminal of the comparison circuit is connected to the control terminal of the selection circuit and the input terminal of the NOT gate to output a comparison signal, and the output terminal of the NOT gate is used to output a third control signal.

[0021] In one or more embodiments of this utility model, the control circuit includes a first switch and a second switch. A first terminal of the first switch is connected to a first terminal of a switching circuit, and a second terminal of the first switch is connected to a first power supply voltage. A first terminal of the second switch is connected to a second terminal of the switching circuit, and a second terminal of the second switch is connected to a second power supply voltage. The control terminals of the first and second switches are used to receive a third control signal; or

[0022] The control circuit includes a first switch, a second switch, a second resistor, and a third resistor. The first switch and the second resistor are connected in series between the first terminal of the switch circuit and the first power supply voltage. The second switch and the third resistor are connected in series between the second terminal of the switch circuit and the second power supply voltage. The control terminals of the first switch and the second switch are used to receive a third control signal.

[0023] Compared with the prior art, the level conversion circuit of this utility model compares the first power supply voltage and the second power supply voltage through a comparison circuit to select a suitable transmission path (first level converter or communication transmission circuit). Under the premise of no overvoltage risk, it achieves high-speed level conversion and can support the high-speed level conversion requirements when the maximum signal rate of SD3.0 is extended from 208MHz to 300MHz, realizing fast read and write of memory cards. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a circuit diagram of a level conversion circuit in the prior art that can automatically identify the direction.

[0026] Figure 2 This is a circuit diagram of the level conversion circuit in Embodiment 1 of this utility model.

[0027] Figure 3 This is a circuit diagram of the level conversion circuit in Embodiment 2 of this utility model.

[0028] Figure 4 This is a circuit diagram of the level conversion circuit in Embodiment 3 of this utility model.

[0029] Figure 5 This is a partial circuit diagram of the level conversion circuit in Embodiment 4 of this utility model.

[0030] Figure 6 This is a circuit diagram of the level conversion circuit in Embodiment 5 of this utility model. Detailed Implementation

[0031] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0032] The terms "coupled," "connected," or "linked" in this specification include both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as an electrical conduction medium, which may have parasitic inductance or capacitance. Indirect connections may also include connections made through other active or passive devices to achieve the same or similar functional purpose, such as connections through switches, follower circuits, or other circuits or components. Furthermore, in utility models, terms such as "first" and "second" are primarily used to distinguish one technical feature from another, and do not necessarily require or imply any actual relationship, quantity, or order between these technical features.

[0033] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this disclosure. Therefore, the following detailed description should not be considered limiting.

[0034] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.

[0035] For the purposes of this disclosure, the phrase “A and / or B” means (A), (B), or (A and B). For the purposes of this disclosure, the phrase “A, B and / or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0036] Various components and devices may be referred to or shown in the singular (e.g., “transistor”, “transistor”, “switch”, etc.) in this document, but only for the convenience of discussion, and any element referred to in the singular may include multiple such elements as taught herein.

[0037] The description uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," etc., used with respect to embodiments of this disclosure are synonymous.

[0038] Example 1

[0039] like Figure 2As shown, a level conversion circuit in one embodiment of the present invention includes: a first level converter LS1, a communication transmission circuit, a comparator circuit, and a selection circuit MUX. In one embodiment, the communication transmission circuit includes a second level converter LS2.

[0040] The first level converter LS1 is connected to the first power supply voltage VCCA and the second power supply voltage VCCB to perform level conversion of the first power supply voltage VCCA or the second power supply voltage VCCB based on the input signal. The second level converter LS2 is connected to the first power supply voltage VCCA and the third power supply voltage VCCC to perform level conversion of the first power supply voltage VCCA or the third power supply voltage VCCC based on the input signal. The input terminals of the first level converter LS1 and the second level converter LS2 are connected to form a node A for receiving the input signal.

[0041] The comparator circuit is used to compare the first power supply voltage VCCA and the second power supply voltage VCCB to generate a control signal SEL, and based on the control signal SEL, controls the first level converter LS1 or the communication transmission circuit (i.e., the second level converter LS2) to output a signal.

[0042] In one embodiment, the first input terminal of the selection circuit MUX is connected to the output terminal of the first level converter LS1, and the second input terminal of the selection circuit MUX is connected to the output terminal of the communication transmission circuit (i.e., the second level converter LS2). The control terminal of the selection circuit MUX is used to receive the control signal SEL to control the output terminal of the selection circuit MUX to be connected to the first input terminal of the selection circuit MUX, or to control the output terminal of the selection circuit MUX to be connected to the second input terminal of the selection circuit MUX based on the control signal SEL. The output terminal of the selection circuit MUX forms node B.

[0043] In one embodiment, the first level converter LS1 is a low-speed converter circuit with a maximum transmission rate of 50MHz, and the second level converter LS2 is a high-speed converter circuit with a maximum transmission rate of 300MHz.

[0044] When the first power supply voltage VCCA = 1.8V and the second power supply voltage VCCB = 3.3V, the first level converter LS1 operates to achieve low-speed level conversion. At this time, the comparator circuit generates a corresponding control signal SEL = 0 based on the magnitude of the first power supply voltage VCCA and the second power supply voltage VCCB, connecting the output terminal of the first level converter LS1 to node B.

[0045] When the second power supply voltage VCCB changes from 3.3V to 1.8V, the comparator circuit outputs a high-level control signal SEL, connecting the output of the second level converter LS2 to node B, thus achieving high-speed level conversion. The third power supply voltage VCCC of the second level converter LS2 can be directly selected from the first power supply voltage VCCA, or it can be selected between the first power supply voltage VCCA and the second power supply voltage VCCB. When the second power supply voltage VCCB = 3.3V, VCCC = VCCA; when the second power supply voltage VCCB = 1.8V, VCCC = VCCB. That is, the third power supply voltage VCCC can be selected by a selector or circuit module using the power supply voltage with the smallest value between the second power supply voltage VCCB and the first power supply voltage VCCA.

[0046] As shown above, the maximum supply voltage of the first level converter LS1 is 3.3V, which can be implemented using a 3.3V MOS device. The maximum supply voltage of the second level converter LS2 is 1.8V, which can be implemented using a 1.8V MOS device. In this way, a higher data rate can be achieved without the risk of device overvoltage.

[0047] In one embodiment, the first level converter LS1 and the second level converter LS2 can adopt a circuit structure such as that described in patent application publication number CN117674819A, entitled "Level Conversion Circuit," which is a bidirectional transmission level conversion circuit. In other embodiments, the first level converter LS1 and the second level converter LS2 can adopt other level conversion circuits.

[0048] Example 2

[0049] like Figure 3 As shown, this embodiment is another implementation of Embodiment 1, a level conversion circuit including: a first level converter LS1, a communication transmission circuit, and a comparison circuit. In one embodiment, the communication transmission circuit includes a second level converter LS2.

[0050] The first level converter LS1 is connected to the first power supply voltage VCCA and the second power supply voltage VCCB to perform level conversion of the first power supply voltage VCCA or the second power supply voltage VCCB based on the input signal. The second level converter LS2 is connected to the first power supply voltage VCCA and the third power supply voltage VCCC to perform level conversion of the first power supply voltage VCCA or the third power supply voltage VCCC based on the input signal. The input terminal of the first level converter LS1 and the input terminal of the second level converter LS2 are connected to form node A for receiving the input signal. The output terminal of the first level converter LS1 and the output terminal of the second level converter LS2 are connected to form node B.

[0051] The comparator circuit is used to compare the first power supply voltage VCCA and the second power supply voltage VCCB to generate a control signal SEL, and based on the control signal SEL, controls the first level converter LS1 or the communication transmission circuit (i.e., the second level converter LS2) to output a signal.

[0052] In one embodiment, a first level converter LS1 has a first enable terminal for receiving a control signal SEL to control the first level converter LS1 to turn on or off based on the control signal SEL, and a second level converter LS2 has a second enable terminal for receiving a control signal SEL to control the second level converter LS2 to turn on or off based on the control signal SEL.

[0053] The first enable pin can be set internally by a corresponding circuit within the first level converter LS1, and the second enable pin can be set internally by a corresponding circuit within the second level converter LS2. This ensures that when the control signal SEL is low, the first level converter LS1 is enabled, the second level converter LS2 is disabled, and signal transmission between nodes A and B is slow. When the control signal SEL is high, the first level converter LS1 is disabled, the second level converter LS2 is enabled, and signal transmission between nodes A and B is high.

[0054] Example 3

[0055] like Figure 4 As shown, a level conversion circuit in one embodiment of the present invention includes: a first level converter LS1, a communication transmission circuit, a selection circuit MUX, and a comparator circuit. In one embodiment, the communication transmission circuit includes a switch control circuit.

[0056] The first level converter LS1 is connected to the first power supply voltage VCCA and the second power supply voltage VCCB to perform level conversion between the first power supply voltage VCCA and the second power supply voltage VCCB based on the input signal. The input terminal of the first level converter LS1 is connected to the input terminal of the switch control circuit to form node A for receiving the input signal. The switch control circuit is used to control the transmission of the input signal based on its own on / off control. The comparator circuit is used to compare the first power supply voltage VCCA and the second power supply voltage VCCB to generate a control signal SEL, and controls the first level converter LS1 or the communication transmission circuit to output a signal based on the control signal SEL.

[0057] In one embodiment, the first input terminal of the selection circuit MUX is connected to the output terminal of the first level converter LS1, the second input terminal of the selection circuit MUX is connected to the output terminal of the communication transmission circuit (i.e., the switch control circuit), and the control terminal of the selection circuit MUX is used to receive the control signal SEL to control the output terminal of the selection circuit MUX to be connected to the first input terminal of the selection circuit MUX, or to control the output terminal of the selection circuit MUX to be connected to the second input terminal of the selection circuit MUX based on the control signal SEL. The output terminal of the selection circuit MUX forms node B.

[0058] like Figure 4 As shown, the switching control circuit includes a transistor MT and a charge pump. The first terminal of the transistor MT receives the input signal, and the second terminal of the transistor MT is the output terminal of the switching control circuit. The charge pump generates a control voltage VCCC based on a first power supply voltage VCCA, and the control terminal of the transistor MT receives the control voltage VCCC. In other embodiments, the charge pump may be omitted. The transistor MT is an N-channel MOSFET, with its first terminal being the source, its second terminal being the drain, and its control terminal being the gate. In other embodiments, the transistor MT may be a P-channel MOSFET.

[0059] When the first power supply voltage VCCA is 1.8V and the second power supply voltage VCCB is 3.3V, the first level converter LS1 is working, and the control signal SEL output by the comparator circuit is low. At this time, the output terminal of the first level converter LS1 is connected to node B. When the second power supply voltage VCCB changes from 3.3V to 1.8V, the control signal SEL becomes high. At this time, the output terminal of the switch control circuit is connected to node B.

[0060] The gate control voltage VCCC of the transistor MT can be obtained based on a charge pump, which can multiply the first supply voltage VCCA, allowing the control voltage VCCC to exceed 3.3V. The transistor MT can achieve low on-resistance with a smaller size, enabling high-speed signal transmission. The entire circuit can be implemented using conventional 3.3V or 5V devices, saving costs.

[0061] Example 4

[0062] like Figure 5 As shown, a level conversion circuit according to one embodiment of the present invention includes: a first level converter LS1, a communication transmission circuit, and a comparison circuit. In one embodiment, the communication transmission circuit includes a switch control circuit.

[0063] The first level converter LS1 is connected to the first power supply voltage VCCA and the second power supply voltage VCCB to perform level conversion between the first power supply voltage VCCA and the second power supply voltage VCCB based on the input signal. The input terminal of the first level converter LS1 is connected to the input terminal of the switch control circuit to form node A. The switch control circuit is used to control the transmission of the input signal based on its own on / off control. The comparator circuit is used to compare the first power supply voltage VCCA and the second power supply voltage VCCB to generate a control signal SEL, and controls the first level converter LS1 or the communication transmission circuit to output a signal based on the control signal SEL.

[0064] In one embodiment, the first level converter LS1 has a first enable terminal for receiving a control signal SEL to control the first level converter LS1 to turn on or off based on the control signal SEL, and the communication transmission circuit has a second enable terminal for receiving the control signal SEL to control the communication transmission circuit to turn on or off based on the control signal SEL.

[0065] like Figure 5 As shown, the switch control circuit includes a charge pump, a selector MX, and a transistor MT. The charge pump generates a control voltage VCCC based on a first power supply voltage VCCA. The first input terminal of the selector MX receives the control voltage VCCC, and the second input terminal of the selector MX receives a reference voltage. The output terminal of the selector MX is connected to the control terminal of the transistor MT to form node C. The first terminal of the transistor MT receives the input signal, and the second terminal of the transistor MT is the output terminal of the switch control circuit. The first terminal of the transistor MT is connected to the input terminal of a first level converter LS1 to form node A, which receives the input signal, and the second terminal of the transistor MT is connected to the output terminal of the first level converter LS1 to form node B. In one embodiment, the reference voltage is ground. In other embodiments, a charge pump may not be included.

[0066] The first enable terminal can be set internally by a corresponding circuit within the first level converter LS1. The control terminal of the selector MX constitutes the second enable terminal of the control signal SEL. This ensures that when the control signal SEL is low, the first level converter LS1 is enabled, the switch control circuit is inactive (transistor MT is off), and signal transmission between nodes A and B is slow. When the control signal SEL is high, the first level converter LS1 is inactive, the switch control circuit is enabled (transistor MT is on), and signal transmission between nodes A and B is high.

[0067] Example 5

[0068] like Figure 6 As shown, a level conversion circuit includes: a voltage generation circuit 10, a comparison control circuit 20, a selection circuit MUX, a switching circuit 30, and a control circuit 40.

[0069] The voltage generation circuit 10 generates a first control signal BVIas1 and a second control signal BVIas2 based on the first power supply voltage VCCA and the second power supply voltage VCCB. The comparison control circuit 4020 generates a comparison signal SEL and a third control signal SELB based on the first power supply voltage VCCA and the second power supply voltage VCCB. The first input terminal of the selection circuit MUX receives the first control signal BVIas1, the second input terminal of the selection circuit MUX receives the second control signal BVIas2, the control terminal of the selection circuit MUX receives the comparison signal SEL, and the output terminal of the selection circuit MUX is connected to the control terminal of the switching circuit 30. The selection circuit MUX controls the transmission of either the first control signal BVIas1 or the second control signal BVIas2 to the control terminal of the switching circuit 30 based on the comparison signal SEL.

[0070] The first terminal of the switching circuit 30 is used to receive an input signal, and the second terminal of the switching circuit 30 is used to output a signal. The control circuit 40 is connected to the first terminal of the switching circuit 30, the second terminal of the switching circuit 30, the first power supply voltage VCCA, and the second power supply voltage VCCB. The control circuit 40 is used to control the on / off state between the first terminal of the switching circuit 30 and the first power supply voltage VCCA, and to control the on / off state between the second terminal of the switching circuit 30 and the second power supply voltage VCCB, based on the third control signal SELB.

[0071] like Figure 6 As shown, the voltage generation circuit 10 includes a charge pump, a first resistor R1, a first transistor MT, and a capacitor C. The input terminal of the charge pump receives a first power supply voltage VCCA, and the output terminal of the charge pump outputs a first control signal VBIas1. The first terminal of the first resistor R1 receives a second power supply voltage VCCB, and the second terminal of the first resistor R1 is connected to the control terminal and the second terminal of the first transistor MT to generate a second control signal VBIas2. The first terminal of the first transistor MT receives the first power supply voltage VCCA. The first terminal of the capacitor C is connected to the second terminal of the first resistor R1, and the second terminal of the capacitor C is connected to a reference voltage. In one embodiment, the reference voltage is ground. In other embodiments, the charge pump may be omitted, or the capacitor C may be omitted. When the charge pump is omitted, the first control signal VBIas1 may be generated by other circuits, or the first control signal VBIas1 may be the first power supply voltage VCCA.

[0072] like Figure 6As shown, the comparison control circuit 20 includes a comparison circuit and a NOT gate. The first input terminal of the comparison circuit is used to receive the first power supply voltage VCCA, the second input terminal of the comparison circuit is used to receive the second power supply voltage VCCB, the output terminal of the comparison circuit is connected to the control terminal of the selection circuit MUX and the input terminal of the NOT gate to output the comparison signal SEL, and the output terminal of the NOT gate is used to output the third control signal SELB.

[0073] like Figure 6 As shown, the switching circuit 30 includes a switching transistor MK, and the control terminal of the switching transistor MK is connected to the output terminal of the selection circuit MUX.

[0074] like Figure 6 As shown, the control circuit 40 includes a first switch K1, a second switch K2, a second resistor R2, and a third resistor R3. The first switch K1 and the second resistor R2 are connected in series between the first terminal of the switching circuit 30 and the first power supply voltage VCCA. The second switch K2 and the third resistor R3 are connected in series between the second terminal of the switching circuit 30 and the second power supply voltage VCCB. The control terminals of the first switch K1 and the second switch K2 are used to receive a third control signal SELB. In one embodiment, the first terminal of the second resistor R2 is connected to the first power supply voltage VCCA, the second terminal of the second resistor R2 is connected to the first terminal of the first switch K1, and the second terminal of the first switch K1 is connected to the first terminal of the switching transistor MK to form node A. The first terminal of the third resistor R3 is connected to the second power supply voltage VCCB, the second terminal of the third resistor R3 is connected to the first terminal of the second switch K2, and the second terminal of the second switch K2 is connected to the second terminal of the switching transistor MK to form node B.

[0075] When the first power supply voltage VCCA is 1.8V and the second power supply voltage VCCB is 3.3V, the comparison signal SEL is low and the third control signal SELB is high. At this time, the selection circuit MUX will select the second control signal BVIas2 for output, and both the first switch K1 and the second switch K2 are closed. When the input signal is low, the switch MK is turned on (the second control signal BVIas2 is greater than the input signal), and the signal at node B is also low. When the signal at node A changes from low to the first power supply voltage VCCA, the signal at node B also rises. When the voltage at node B reaches the first power supply voltage VCCA, the switch MK is turned off. At this time, the second power supply voltage VCCB pulls the voltage at node B up to VCCB through the third resistor R3.

[0076] When the second power supply voltage VCCB switches from 3.3V to 1.8V, high-speed signal transmission is required. At this time, the comparison signal SEL is high and the third control signal SELB is low. The selection circuit MUX will then select the first control signal VBias1 as the output. The first control signal VBias1 can be higher than the first power supply voltage VCCA, for example, VBias1 = 3 * VCCA. In this case, the switching transistor MK is always on, and the on-resistance is small, enabling high-speed signal transmission. This implementation scheme can be achieved using only 3.3V or 5V MOS devices, achieving high-speed signal conversion at a low cost.

[0077] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0078] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A level conversion circuit, characterized in that, include: First level converter, communication transmission circuit and comparator circuit; The first level converter is connected to a first power supply voltage and a second power supply voltage to perform level conversion of the first power supply voltage or the second power supply voltage based on the input signal. The comparison circuit is used to compare the first power supply voltage and the second power supply voltage to generate a control signal, and control the first level converter or the communication transmission circuit to output a signal based on the control signal.

2. The level shifting circuit of claim 1, wherein, The level conversion circuit includes a selection circuit. The first input terminal of the selection circuit is connected to the output terminal of the first level converter. The second input terminal of the selection circuit is connected to the output terminal of the communication transmission circuit. The control terminal of the selection circuit is used to receive a control signal to control the output terminal of the selection circuit to connect with the first input terminal of the selection circuit, or to control the output terminal of the selection circuit to connect with the second input terminal of the selection circuit.

3. The level shifting circuit of claim 1, wherein, The communication transmission circuit includes a second level converter, which is connected to a first power supply voltage and a third power supply voltage to perform level conversion of the first power supply voltage or the third power supply voltage based on the input signal.

4. The level shifting circuit of claim 3, wherein, The first level converter has a first enable terminal for receiving a control signal to control the first level converter to turn on or off based on the control signal, and the second level converter has a second enable terminal for receiving a control signal to control the second level converter to turn on or off based on the control signal.

5. The level shifting circuit of claim 1, wherein, The communication transmission circuit includes a switch control circuit, which is used to control the transmission of input signals based on its own on / off control.

6. The level shifting circuit of claim 5, wherein, The switch control circuit includes a transistor, the first terminal of which is used to receive an input signal, the second terminal of which is the output terminal of the switch control circuit, and the control terminal of which is used to receive a control voltage; or The switch control circuit includes a transistor and a charge pump. The first terminal of the transistor is used to receive an input signal, and the second terminal of the transistor is the output terminal of the switch control circuit. The charge pump generates a control voltage based on a first power supply voltage, and the control terminal of the transistor is used to receive the control voltage. or The switch control circuit includes a selector and a transistor. The first input terminal of the selector is used to receive a control voltage, and the second input terminal of the selector is used to receive a reference voltage. The output terminal of the selector is connected to the control terminal of the transistor. The first terminal of the transistor is used to receive an input signal, and the second terminal of the transistor is the output terminal of the switch control circuit; or The switch control circuit includes a charge pump, a selector, and a transistor. The charge pump generates a control voltage based on a first power supply voltage. The first input terminal of the selector is used to receive the control voltage, and the second input terminal of the selector is used to receive a reference voltage. The output terminal of the selector is connected to the control terminal of the transistor. The first terminal of the transistor is used to receive an input signal, and the second terminal of the transistor is the output terminal of the switch control circuit.

7. A level shifting circuit, characterized by, include: Voltage generation circuit, comparison control circuit, selection circuit, switching circuit and control circuit; The voltage generation circuit generates a second control signal based on a first power supply voltage and a second power supply voltage. The comparison control circuit generates a comparison signal and a third control signal based on the first power supply voltage and the second power supply voltage. The first input terminal of the selection circuit receives the first control signal, the second input terminal of the selection circuit receives the second control signal, and the control terminal of the selection circuit receives the comparison signal. The output terminal of the selection circuit is connected to the control terminal of the switching circuit. The selection circuit controls the transmission of either the first or second control signal to the control terminal of the switching circuit based on the comparison signal. The first terminal of the switching circuit receives the input signal, and the second terminal of the switching circuit outputs the signal. The control circuit is connected to the first terminal of the switching circuit, the second terminal of the switching circuit, the first power supply voltage, and the second power supply voltage. The control circuit controls the connection and disconnection between the first terminal of the switching circuit and the first power supply voltage, and between the second terminal of the switching circuit and the second power supply voltage, based on the third control signal.

8. The level shifting circuit of claim 7, wherein, The voltage generating circuit includes a first resistor and a first transistor. A first terminal of the first resistor receives a second power supply voltage. A second terminal of the first resistor is connected to a control terminal of the first transistor and a second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor receives the first power supply voltage. Alternatively... The voltage generating circuit includes a charge pump, a first resistor, and a first transistor. The input terminal of the charge pump is used to receive a first power supply voltage, and the output terminal of the charge pump is used to output a first control signal. The first terminal of the first resistor is used to receive a second power supply voltage, and the second terminal of the first resistor is connected to the control terminal and the second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor is used to receive the first power supply voltage; or... The voltage generating circuit includes a first resistor, a first transistor, and a capacitor. A first terminal of the first resistor receives a second power supply voltage. A second terminal of the first resistor is connected to a control terminal of the first transistor and a second terminal of the first transistor to generate a second control signal. A first terminal of the first transistor receives the first power supply voltage. A first terminal of the capacitor is connected to a second terminal of the first resistor, and a second terminal of the capacitor is connected to a reference voltage. Alternatively... The voltage generating circuit includes a charge pump, a first resistor, a first transistor, and a capacitor. The input terminal of the charge pump is used to receive a first power supply voltage, and the output terminal of the charge pump is used to output a first control signal. The first terminal of the first resistor is used to receive a second power supply voltage, and the second terminal of the first resistor is connected to the control terminal and the second terminal of the first transistor to generate a second control signal. The first terminal of the first transistor is used to receive the first power supply voltage, and the first terminal of the capacitor is connected to the second terminal of the first resistor. The second terminal of the capacitor is connected to a reference voltage.

9. The level shifting circuit of claim 7, wherein, The comparison control circuit includes a comparison circuit and a NOT gate. The first input terminal of the comparison circuit is used to receive a first power supply voltage, the second input terminal of the comparison circuit is used to receive a second power supply voltage, the output terminal of the comparison circuit is connected to the control terminal of the selection circuit and the input terminal of the NOT gate to output a comparison signal, and the output terminal of the NOT gate is used to output a third control signal.

10. The level shifting circuit of claim 7, wherein, The control circuit includes a first switch and a second switch. A first terminal of the first switch is connected to a first terminal of the switching circuit, and a second terminal of the first switch is connected to a first power supply voltage. A first terminal of the second switch is connected to a second terminal of the switching circuit, and a second terminal of the second switch is connected to a second power supply voltage. The control terminals of the first and second switches are used to receive a third control signal; or The control circuit includes a first switch, a second switch, a second resistor, and a third resistor. The first switch and the second resistor are connected in series between the first terminal of the switch circuit and the first power supply voltage. The second switch and the third resistor are connected in series between the second terminal of the switch circuit and the second power supply voltage. The control terminals of the first switch and the second switch are used to receive a third control signal.