Solar cells and photovoltaic modules

Abstract

This invention discloses a solar cell and a photovoltaic module. The solar cell includes a silicon substrate, which includes a first surface and a second surface disposed opposite to each other. The first surface includes a first region and a second region distributed adjacent to each other. The second region is recessed relative to the first region. The solar cell has a cut surface on at least one side along a first direction. The second region is distributed along a second direction and adjacent to the cut surface. A protective layer is stacked on at least a portion of the cut surface. The first direction is perpendicular to the second direction. This invention improves the passivation performance of the cut surface by providing a protective layer, thereby improving the cell efficiency.

Description

Technical Field

[0001] This utility model belongs to the field of photovoltaic cell technology, specifically relating to a solar cell and a photovoltaic module. Background Technology

[0002] With the rapid development of the photovoltaic industry, the performance and efficiency requirements of solar cells in the domestic and international photovoltaic markets are constantly increasing, and industry manufacturers are focusing on the research and development of high-efficiency cells.

[0003] Segmentation technology refers to dividing standard-sized solar cells into multiple smaller pieces along a specific direction, such as two-piece, three-piece, or four-piece segments. Segmentation technology offers several advantages: it allows the reuse of the usable areas of defective cells, improving cell utilization; it reduces internal cell resistance, effectively increasing power generation efficiency; it enhances thermal stability and resistance to PID (Potential Instability-Reducing) performance; it adapts to space constraints; it reduces system costs; it improves module reliability and reduces hot spot risk; and it promotes technological innovation, industrial upgrading, and environmental friendliness. These advantages make segmentation technology one of the important development directions in the photovoltaic industry.

[0004] A common method of cell slicing in existing technologies is to use laser scribing after the cells are completed. This method can cause damage to the junction region by the laser and leave the edges exposed without passivation. This results in a significant reduction in open-circuit voltage (Voc) and fill factor (FF), and the total loss in cell efficiency can reach 0.3%.

[0005] Therefore, in order to address the aforementioned technical problems, it is necessary to provide a solar cell and a photovoltaic module. Utility Model Content

[0006] The purpose of this invention is to provide a solar cell and a photovoltaic module to improve the efficiency of the battery.

[0007] To achieve the above objectives, the technical solution provided by an embodiment of this utility model is as follows:

[0008] A solar cell includes a silicon substrate, the silicon substrate including a first surface and a second surface disposed opposite to each other, the first surface including a first region and a second region distributed adjacent to each other, the second region being recessed relative to the first region, the solar cell having a cut surface on at least one side along a first direction, the second region being distributed along a second direction and adjacent to the cut surface, at least a portion of the cut surface having a protective layer stacked thereon, the first direction being perpendicular to the second direction.

[0009] In one or more embodiments of the present invention, the protective layer is a silicon oxide layer with a thickness of 0.5 nm to 5 nm, and the protective layer is stacked on the side of the silicon substrate.

[0010] In one or more embodiments of the present invention, the protective layer comprises a laminated film formed by one or more of the following: an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, with a thickness of 62 nm to 137 nm.

[0011] In one or more embodiments of this utility model, the width of the second region is 0.02mm to 1mm; and / or,

[0012] The second region has a depression depth of 1 μm to 20 μm relative to the first region.

[0013] In one or more embodiments of the present invention, the first surface further includes a third region distributed outside the first region, the third region being recessed relative to the first region.

[0014] In one or more embodiments of this utility model, the width of the third region is 0.02mm to 1mm; and / or,

[0015] The third region has a depression depth of 1 μm to 20 μm relative to the first region.

[0016] In one or more embodiments of the present invention, a first doped layer is formed on the surface of the silicon substrate in the first region, and no first doped layer is formed on the surface of the silicon substrate outside the first region. The doping type of the first doped layer is opposite to the doping type of the silicon substrate.

[0017] In one or more embodiments of this invention, the thickness of the first doped layer is less than the recess depth of the second region relative to the first region; and / or,

[0018] The thickness of the first doped layer is 0.1 μm to 5 μm.

[0019] In one or more embodiments of this utility model, along the second direction, the width of the two sides of the second region is greater than the width of the middle region; and / or,

[0020] Along the second direction, the depth of the depression on both sides of the second region is greater than the depth of the depression in the middle.

[0021] In one or more embodiments of this utility model, a first textured structure is formed on the surface of the silicon substrate in the first region. The first textured structure is a pyramid textured structure, with a pyramid width of 0.1 μm to 5 μm, a height of 0.1 μm to 5 μm, and a density of 5E4 mm. -2 ~2E5mm -2 ; and / or,

[0022] The second region has a second textured structure formed on the surface of the silicon substrate. This second textured structure is a pyramid textured structure, with a pyramid width of 0.1 μm to 5 μm, a height of 0.1 μm to 5 μm, and a density of 5E4 mm². -2 ~2E5mm -2 .

[0023] In one or more embodiments of this invention, a third textured structure is formed on the surface of the silicon substrate in the third region. This third textured structure is a pyramidal textured structure, with a pyramid width of 0.1 μm to 5 μm, a height of 0.1 μm to 5 μm, and a density of 5E4 mm². -2 ~2E5mm -2 .

[0024] In one or more embodiments of the present invention, a tunneling layer and a second doped layer are sequentially stacked on the second surface of the silicon substrate in a direction away from the silicon substrate, wherein the doping type of the second doped layer is the same as the doping type of the silicon substrate.

[0025] In one or more embodiments of this utility model, the solar cell has a passivation layer and / or an anti-reflection layer stacked on all or part of its sides other than the first surface, the second surface, and the cut surface; wherein,

[0026] The passivation layer is an aluminum oxide passivation layer with a thickness of 2nm to 7nm or 3nm to 6nm; the antireflection layer is a stacked film formed by any one or more of silicon nitride, silicon oxynitride, and silicon oxide layers with a thickness of 60nm to 130nm.

[0027] In one or more embodiments of this utility model, the solar cell is bi-sliced, the silicon substrate has a cut surface on one side along a first direction, and the second region is distributed on one side of the solar cell; or,

[0028] The solar cell is divided into N segments, where N is greater than or equal to 3. The silicon substrate has a cut surface on one side or opposite sides along a first direction, and the second region is distributed on one side or opposite sides of the solar cell.

[0029] Another embodiment of this utility model provides the following technical solution:

[0030] A photovoltaic module comprising at least one of the aforementioned solar cells.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] This invention improves the passivation performance of the cut surface by setting a protective layer on the cut surface, thereby improving battery efficiency. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a planar schematic diagram of the first surface of the silicon substrate in the solar cell of Embodiment 1 of this utility model;

[0035] Figure 2 This is a schematic diagram of the structure of the solar cell in Embodiment 1 of this utility model;

[0036] Figure 3 This is a plan view of the entire solar cell in Embodiment 1 of this utility model;

[0037] Figure 4 This is a schematic diagram of the structure of the solar cell in Embodiment 2 of this utility model;

[0038] Figure 5 This is a planar schematic diagram of the first surface of the silicon substrate in the solar cell of Embodiment 3 of this utility model;

[0039] Figure 6 This is a schematic diagram of the structure of the solar cell in Embodiment 3 of this utility model;

[0040] Figure 7 This is a plan view of the entire solar cell in Embodiment 3 of this utility model;

[0041] Figure 8 This is a planar schematic diagram of the first surface of the silicon substrate in the solar cell of Embodiment 4 of this utility model;

[0042] Figure 9 This is a schematic diagram of the structure of the solar cell in Embodiment 4 of this utility model.

[0043] Explanation of key figure labels:

[0044] 100 - Solar cell, 10 - Substrate, 11 - First doped layer, 12 - Tunneling layer, 13 - Second doped layer, 14 - Protective layer, 21 - First passivation layer, 22 - Second passivation layer, 23 - Third passivation layer, 31 - First antireflection layer, 32 - Second antireflection layer, 33 - Third antireflection layer, 41 - First electrode, 42 - Second electrode, S1 - First surface, S2 - Second surface, Sa - Functional region, Sb - Divided region, Sc - Isolation region, S11 - First region, S12 - Second region, S13 - Third region. Detailed implementation mode

[0045] In order to enable those skilled in the art to better understand the technical solutions in the present utility model, the technical solutions in the embodiments of the present utility model will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present utility model.

[0046] In the present utility model, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "under" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.

[0047] The present utility model discloses a solar cell, which includes a silicon substrate. The silicon substrate includes a first surface and a second surface arranged opposite to each other. The first surface includes a first region and a second region distributed adjacent to each other. The second region is recessed relative to the first region. At least one side of the solar cell in the first direction has a cutting surface. The second region is distributed in the second direction and is adjacent to the cutting surface. At least a part of the cutting surface is laminated with a protective layer. The first direction is perpendicular to the second direction.

[0048] By arranging a protective layer on the cutting surface in the present utility model, the passivation performance of the cutting surface can be improved, thereby improving the battery efficiency.

[0049] The following further illustrates the present utility model with specific examples.

[0050] Example 1:

[0051] Refer Figure 1 And in combination with Figure 2 As shown, the solar cell 100 in this embodiment is described by taking a TOPCon solar cell as an example. It includes a silicon substrate 10. The silicon substrate 10 includes a first surface S1 and a second surface S2 arranged opposite to each other. The first surface S1 is the front surface (i.e., the light-receiving surface) of the silicon substrate 10, and the second surface S2 is the back surface (i.e., the light-blocking surface) of the silicon substrate 10. The first surface S1 includes a first region S11 and a second region S12 distributed adjacent to each other. The second region S12 is recessed relative to the first region S11.

[0052] Specifically, at least one side of the solar cell 100 in this embodiment has a cutting surface S3 along the first direction, and the first direction is the width direction of the solar cell, that is, Figure 2 the X direction in Figure 2 . The second region S12 is distributed along the second direction, and the second direction is the length direction of the solar cell, that is,

[0053] the Y direction in

[0054] Figure 1 Figure 1 As shown, at the first surface of the silicon substrate 10 in the first region S11 of this embodiment, a first doped layer 11 (i.e., emitter) is formed by a diffusion process or a PECVD process, and then a PN junction is formed to generate minority carriers - hole pairs after illumination. Exemplarily, the first doped layer 11 is a P-type doped layer (i.e., P+ emitter), which is formed below the first surface S1 of the silicon substrate (i.e., inside the silicon substrate) by a boron diffusion process, with a diffusion depth of 0.1 μm to 5 μm and a surface doping concentration of 3E18 cm -3 ~3E19 cm -3 , and the sheet resistance is 40 Ω / sq to 300 Ω / sq, preferably 150 Ω / sq to 250 Ω / sq.

[0055] Figure 3 Figure 3 As shown, the upper surface of the whole solar cell includes a functional area Sa and a scribing area Sb. After the first doped layer 11 is formed, the scribing area Sb of the whole solar cell is grooved, and all of the first doped layer 11 and part of the silicon substrate 10 in the scribing area Sb are removed by laser. Therefore, the depression depth H1 of the scribing area Sb needs to be greater than the thickness of the first doped layer 11 (i.e., the diffusion depth).

[0056] Figure 1 Figure 1As shown, in the solar cell obtained after grooving and dicing, the recess depth H1 of the second region S12 relative to the first region S11 is greater than the thickness of the first doped layer 11. That is, the first doped layer 11 is retained only in the first region S11, while the first doped layer in the second region S12 is completely removed. Preferably, the recess depth H1 of the second region S12 relative to the first region S11 is 1 μm to 20 μm, such as the 10 μm recess depth H1 in this embodiment. It is worth noting that the recess depth H1 in this embodiment is the height difference between the surface of the silicon substrate 10 in the second region S12 and the surface of the first doped layer 11 in the first region S11.

[0057] For example, the laser used in the laser process is a green laser with a laser power of 5W to 120W, preferably 10W to 50W, a laser frequency of 100kHz to 3000kHz, preferably 300kHz to 600kHz, a scanning rate of 10000mm / s to 100000mm / s, preferably 10000mm / s to 60000mm / s, a laser overlap rate of 0% to 80%, preferably 30% to 60%, and a single spot size of 20μm to 200μm.

[0058] In this embodiment, the second region S12 is described using the example of equal width and equal depth. In other embodiments, since the second region S12 is a strip-shaped region extending along the second direction, the second region S12 can have different widths and / or different depths at different locations. For example, the width on both sides of the second region S12 along the second direction can be greater than the width in the middle. That is to say, the width of the second region S12 along the second direction changes from narrow to wide and then from wide to narrow. Correspondingly, the depth of the depression on both sides of the second region S12 can also be greater than the depth of the depression in the middle. That is, the depth of the depression in the second region S12 along the second direction changes from deep to shallow and then from shallow to deep.

[0059] In some preferred embodiments, a first textured structure is formed on the surface of the silicon substrate 10 in the first region S11. For example, a pyramid textured structure can be formed on the first surface S1 of the silicon substrate 10 in the first region S11 by alkaline texturing. The width of the pyramid in the first textured structure is 0.1 μm to 5 μm, the height is 0.1 μm to 5 μm, and the density is 5E4 mm. -2 ~2E5mm -2 .

[0060] In some preferred embodiments, the second surface S2 of the silicon substrate 10 is a polished surface. This polished surface can be the surface of the light-trapping structure after chemical polishing, or it can be the surface of the original back side of the silicon substrate after direct chemical polishing. For example, in this embodiment, a pyramid textured structure can be formed on the second surface S2 of the silicon substrate 10 by alkaline texturing, and then the back side is alkaline polished to obtain the polished surface. Compared with the conventional back side of the silicon substrate, multiple pyramid bases (the pyramid bases are the bases left after the pyramid textured structure is polished) will be formed on the polished surface.

[0061] In addition, after laser grooving of the dicing region Sb, damage will occur on the surface of the silicon substrate 14 in the dicing region Sb. In this invention, a second textured structure is formed on the surface of the silicon substrate 10 in the dicing region Sb by a texturing process, which can etch and modify the damaged area, reduce surface recombination, reduce optical loss in the dicing region, avoid loss of open circuit voltage Voc and fill factor FF in the dicing region, and thus improve battery efficiency.

[0062] Preferably, in this embodiment, a pyramidal textured structure is formed on the surface of the silicon substrate 10 in the diced region Sb using an alkaline texturing process. In the second textured structure, the width of the pyramids is 0.1 μm to 5 μm, the height is 0.1 μm to 5 μm, and the density is 5E4mm². -2 ~2E5mm -2 .

[0063] Continue to participate Figure 1 As shown, in this embodiment, a tunneling passivation contact structure is formed on the second surface S2 of the silicon substrate 10. Specifically, a tunneling layer 12 and a second doped layer 13 are sequentially stacked on the second surface S2 of the silicon substrate 10 in a direction away from the silicon substrate 10. The tunneling layer 12 can provide a good interface passivation effect, and the second doped layer 13 can provide a field passivation effect, while improving the contact and reducing the resistance.

[0064] The tunneling layer 12 is one or a combination of silicon oxide and silicon oxynitride layers, preferably silicon oxide, with a thickness of 0.5 nm to 3 nm, more preferably 1.5 nm to 2.5 nm; the second doped layer 13 is a phosphorus-doped polycrystalline silicon layer with a surface doping concentration of 2E20cm⁻¹. -3 ~3E21cm -3 The preferred size is 5E20cm. -3 ~2E21cm -3 The thickness is 1nm to 150nm, preferably 50nm to 100nm.

[0065] In this embodiment, the solar cell has a passivation layer and an anti-reflection layer stacked on all or part of the sides other than the first surface S1, the second surface S2, and the cut surface.

[0066] Specific reference Figure 1As shown, a first passivation layer 21 and a first antireflection layer 31 are sequentially stacked on the first surface S1 of the silicon substrate 10, and a second passivation layer 22 and a second antireflection layer 32 are sequentially stacked on the second surface S2 of the silicon substrate 10. The first passivation layer 21 and the second passivation layer 22 provide excellent passivation effects, while the first antireflection layer 31 and the second antireflection layer 32 reduce reflectivity and increase light utilization. On the first surface S1 of the silicon substrate 10, the first passivation layer 21 and the first antireflection layer 31 are sequentially stacked on the first doped layer 11 of the first region S11, on the surface of the silicon substrate 10 in the second region S12, and on the side portion at the junction of the first region S11 and the second region S12. On the side of the solar cell 100 other than the cut surface, a third passivation layer 23 and a third antireflection layer 33 are sequentially stacked.

[0067] For example, the first passivation layer 21, the second passivation layer 22, and the third passivation layer 23 are all aluminum oxide passivation layers with a thickness of 2nm to 7nm, preferably 3nm to 6nm; the first antireflection layer 31, the second antireflection layer 32, and the third antireflection layer 33 can be a stacked film formed by any one or more of silicon nitride, silicon oxynitride, and silicon oxide layers, with a thickness of 60nm to 130nm, preferably silicon nitride. Silicon nitride is chemically inactive and has strong resistance to acid and alkali corrosion, which can reduce the battery's sensitivity to the environment.

[0068] In this embodiment, the first passivation layer 21, the second passivation layer 22, and the third passivation layer 23 are prepared using a single ALD deposition process, and the first antireflection layer 31, the second antireflection layer 32, and the third antireflection layer 33 are deposited using a single PECVD process. The film materials and thicknesses deposited in the same deposition process are identical. In other embodiments, only passivation layers or only antireflection layers may be deposited, or only passivation layers or antireflection layers may be deposited in certain areas. The materials and thicknesses of different passivation layers or different antireflection layers may also be unequal, which will not be elaborated further here.

[0069] Continue to participate Figure 1 As shown, in this embodiment, a protective layer 14 is stacked on the cutting surface S3. The protective layer is a silicon oxide layer with a thickness of 0.5nm to 5nm, and the protective layer 14 is only stacked on the side of the silicon substrate 10.

[0070] Since there is no passivation layer on the cut surface after the entire solar cell is diced, in this embodiment, a silicon oxide layer is formed on the cut surface S3. The silicon oxide layer can improve the passivation performance of the cut surface, thereby improving the cell efficiency.

[0071] In addition, in this embodiment, the first electrode 41 is located on the first surface S1 of the silicon substrate 10 and is located in the first region S11 and in contact with the first doped layer 11, and the second electrode 42 is located on the second surface S2 of the silicon substrate 10 and is in contact with the second doped layer 13.

[0072] Example 2:

[0073] Refer to Figure 4 As shown, the solar cell 100 in this embodiment is substantially the same as that in Embodiment 1. The difference is that the protective layer on the cutting surface S3 in this embodiment is the same as the passivation layer and antireflection layer on other surfaces.

[0074] Specifically, the protective layer 14 is laminated on the cutting surface S3 of the entire solar cell 100. The protective layer 14 includes a stacked film formed by one or more of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, and has a thickness of 62 nm to 137 nm.

[0075] Exemplarily, the protective layer 14 includes an aluminum oxide passivation layer with a thickness of 2 nm to 7 nm, preferably 3 nm to 6 nm, and also includes a stacked film formed by any one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, and has a thickness of 60 nm to 130 nm.

[0076] This protective layer is separately deposited after scribing the entire solar cell wafer, which can improve the passivation performance of the cutting surface, thereby improving the cell efficiency.

[0077] Example 3:

[0078] Refer to Figure 5 , Figure 6 As shown, the solar cell 100 in this embodiment is substantially the same as that in Embodiment 1. The difference is that the first surface S1 in this embodiment further includes a third region S13 distributed outside the first region S11, and the third region S13 is recessed relative to the first region S11.

[0079] Combined with Figure 7 As shown, the upper surface of the entire solar cell wafer includes a functional area Sa, a scribing area Sb, and an isolation area Sc. The isolation area Sc is distributed outside the entire solar cell wafer. The width of the third region S13 can be any value within the range of 0.02 mm to 1 mm. After forming the first doping layer 11, the scribing area Sb and the isolation area Sc of the entire solar cell wafer are grooved, and all of the first doping layer 11 and part of the silicon substrate 10 in the scribing area Sb and the isolation area Sc are removed by laser. Therefore, the depression depth H2 of the isolation area Sc needs to be greater than the thickness (i.e., the diffusion depth) of the first doping layer 11.

[0080] Combined with Figure 5As shown, in the solar cell obtained after grooving and scribing, the depression depth H1 of the second region S12 relative to the first region S11 and the depression depth H2 of the third region S13 relative to the first region S11 are both greater than the thickness of the first doping layer 11. That is, only the first doping layer 11 is retained in the first region S11, and the first doping layers in the second region S12 and the third region S13 are completely removed. Preferably, the depression depth H2 of the third region S13 relative to the first region S11 is equal to the depression depth H1 of the second region S12 relative to the first region S11, both being 1 μm to 20 μm. For example, the depression depths H1 and H2 in this embodiment are both 10 μm. It should be noted that the depression depth H1 in this embodiment is the height difference between the surface of the silicon substrate 10 in the second region S12 and the surface of the first doping layer 11 in the first region S11, and the depression depth H2 is the height difference between the surface of the silicon substrate 10 in the third region S13 and the surface of the first doping layer 11 in the first region S11.

[0081] Exemplarily, the laser used in the laser process is a green laser, the laser power is 5 W to 120 W, preferably 10 W to 50 W, the laser frequency is 100 kHz to 3000 kHz, preferably 300 kHz to 600 kHz, the scanning rate is 10000 mm / s to 100000 mm / s, preferably 10000 mm / s to 60000 mm / s, the laser overlap rate is 0% to 80%, preferably 30% to 60%, and the single spot size is 20 μm to 200 μm.

[0082] It should be understood that in this embodiment, a single laser process is used to groove the second region S12 and the third region S13, so their depression depths H1 and H2 are equal. In other embodiments, laser processes or the like can also be used separately for grooving, and the depression depths H1 and H2 can also be unequal.

[0083] In the preparation process of the whole cell, incomplete side etching will cause leakage. By using the laser process to completely isolate the first doping layer on the front side and the second doping layer on the back side, the leakage is significantly improved; even if the side etching is incomplete, the dark current will be very low.

[0084] In addition, grooving the isolation region can completely remove the edge first doping layer (i.e., the emitter), cut off the carrier transmission channel to the side, and reduce the carrier recombination on the side of the battery.

[0085] Example 4:

[0086] Refer Figure 8 、 Figure 9As shown, the solar cell 100 in this embodiment is largely the same as that in embodiment 3. The difference is that embodiment 3 is for two-section solar cells, so the solar cell 100 has a cutting surface S3 on only one side along the first direction. In this embodiment, however, it is for three-section or four-section solar cells, etc. After dicing, the battery slabs in the middle area have cutting surfaces S3 on both sides along the first direction. Therefore, the second region S12 is distributed on both sides of the first direction, and the third region S13 is distributed on both sides of the second direction.

[0087] Accordingly, in this embodiment, both sides along the first direction are cutting surfaces S3, and each cutting surface is passivated by a protective layer 14. The protective layer 14 is exactly the same as in embodiment 3, and will not be described again here.

[0088] It should be understood that the above embodiments use TOPCon batteries as an example for illustration. This utility model is also applicable to other types of solar cells, such as PERC batteries and HJT batteries. Any technical solution that uses a protective layer to passivate and protect the cut surface is within the scope of protection of this utility model.

[0089] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0090] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A solar cell, characterized by, The solar cell includes a silicon substrate, the silicon substrate includes a first surface and a second surface disposed opposite to each other, the first surface includes a first region and a second region distributed adjacent to each other, the second region is recessed relative to the first region, the solar cell has a cut surface on at least one side along a first direction, the second region is distributed along a second direction and adjacent to the cut surface, at least a portion of the cut surface is covered with a protective layer, and the first direction is perpendicular to the second direction.

2. The solar cell according to claim 1, characterized in that, The protective layer is a silicon oxide layer with a thickness of 0.5 nm to 5 nm, and the protective layer is stacked on the side of the silicon substrate.

3. The solar cell according to claim 1, characterized in that, The protective layer comprises a laminated film formed by one or more of the following: an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, with a thickness of 62 nm to 137 nm.

4. The solar cell of claim 1, wherein The width of the second region is 0.02 mm to 1 mm; and / or, The second region has a depression depth of 1 μm to 20 μm relative to the first region.

5. The solar cell of claim 1, wherein The first surface also includes a third region distributed outside the first region, the third region being recessed relative to the first region.

6. The solar cell according to claim 5, characterized in that, The width of the third region is 0.02mm to 1mm; and / or, The third region has a depression depth of 1 μm to 20 μm relative to the first region.

7. The solar cell according to claim 4 or 5, characterized in that, A first doped layer is formed on the surface of the silicon substrate in the first region, and no first doped layer is formed on the surface of the silicon substrate outside the first region. The doping type of the first doped layer is opposite to the doping type of the silicon substrate.

8. The solar cell of claim 7, wherein, The thickness of the first doped layer is less than the recess depth of the second region relative to the first region; and / or, The thickness of the first doped layer is 0.1 μm to 5 μm.

9. The solar cell of claim 1, wherein, Along the second direction, the width of the second region on both sides is greater than the width in the middle; and / or, Along the second direction, the depth of the depression on both sides of the second region is greater than the depth of the depression in the middle.

10. The solar cell according to claim 1 or 4, characterized in that, A first textured structure is formed on the surface of the silicon substrate in the first region. The first textured structure is a pyramid textured structure, with a pyramid width of 0.1 μm to 5 μm, a height of 0.1 μm to 5 μm, and a density of 5E4 mm². -2 ~2E5mm -2 ; and / or, The surface of the silicon substrate of the second region is formed with a second texture structure, the second texture structure is a pyramid texture structure, the width of the pyramid is 0.1-5 μm, the height is 0.1-5 μm, and the density is 5E4-2E5 mm -2 . -2 .

11. The solar cell of claim 5, wherein, The silicon substrate surface in the third region has a third textured structure, which is a pyramid textured structure. The width of the pyramid is 0.1 μm to 5 μm, the height is 0.1 μm to 5 μm, and the density is 5E4 mm. -2 ~2E5mm -2 .

12. The solar cell of claim 1, wherein, A tunneling layer and a second doped layer are sequentially stacked on the second surface of the silicon substrate in a direction away from the silicon substrate, and the doping type of the second doped layer is the same as that of the silicon substrate.

13. The solar cell of claim 1, wherein, The solar cell has a passivation layer and / or antireflection layer stacked on all or part of its sides other than the first surface, the second surface, and the cut surface; wherein... The passivation layer is an aluminum oxide passivation layer with a thickness of 2nm to 7nm or 3nm to 6nm; the antireflection layer is a stacked film formed by any one or more of silicon nitride, silicon oxynitride, and silicon oxide layers with a thickness of 60nm to 130nm.

14. The solar cell of claim 1, wherein, The solar cell is bi-sliced, with the silicon substrate having a cut surface on one side along a first direction, and the second region distributed on one side of the solar cell; or, The solar cell is divided into N segments, where N is greater than or equal to 3. The silicon substrate has a cut surface on one side or opposite sides along a first direction, and the second region is distributed on one side or opposite sides of the solar cell.

15. A photovoltaic module, characterized by, The photovoltaic module includes at least one solar cell as described in any one of claims 1 to 14.

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