Chip package structure

Abstract

The embodiment of the application provides a chip packaging structure, comprising: a device frame; an inner pin is arranged on the inner side of the device frame, and an outer pin is arranged on the outer side of the device frame; the inner pin is electrically connected with the outer pin in correspondence; a heat sink, the edge of the upper surface of the heat sink is concave downward to form a sink table, the bottom of the device frame is embedded into the sink table and is adhesively fixed with the sink table; the middle part of the upper surface of the heat sink is used for fixing a chip, and the chip is electrically connected with the inner pin; a cover is fixed to the top end of the device frame. The chip packaging structure provided by the embodiment of the application can embed the device frame into the sink table at the edge of the heat sink, increase the distance between the device frame and the inner pin, meet the electrical safety regulations, and will not prolong the length of the connection line between the chip and the inner pin, thereby reducing the parasitic resistance and parasitic inductance, and being beneficial to improving the performance of the chip, especially for the radio frequency chip.

Description

Technical Field

[0001] This application relates to chip packaging technology, and more particularly to a chip packaging structure. Background Technology

[0002] ACS / ACC packaging is a packaging technology that uses a substrate and an outer frame cavity to form a cavity, fixes components such as chips by soldering or adhesive, connects the chip to the pins on the outer frame by wire bonding, and finally seals the cavity with high-performance sealing materials to ensure the cavity is airtight and prevent air and moisture from entering.

[0003] On the one hand, current ACS packaging requires sufficient safety clearance between the bottom of the lead frame and the pins to meet electrical safety regulations. However, under the current structure, the necessary safety clearance inevitably makes it difficult to reduce the wire length from the chip to the pins, which in turn makes it difficult to reduce parasitic resistance and inductance, thus limiting the improvement of device RF performance.

[0004] On the other hand, as the power of radio frequency devices increases year by year, end-users are placing new demands on the hermeticity of products. However, the sealing performance of adhesives has now reached a bottleneck and is difficult to improve further. Summary of the Invention

[0005] To address one of the aforementioned technical deficiencies, this application provides a chip packaging structure.

[0006] According to a first aspect of the embodiments of this application, a chip packaging structure is provided, comprising:

[0007] Device frame; the device frame has inner pins on the inside and outer pins on the outside; the inner pins and outer pins are electrically connected accordingly;

[0008] The heat sink has a recessed edge on its upper surface to form a recessed platform. The bottom of the device frame is embedded in the recessed platform and bonded to it for fixation. The middle part of the upper surface of the heat sink is used to fix the chip, and the chip is electrically connected to the internal pins.

[0009] The cap is fixed to the top of the device frame.

[0010] As described above, in the chip packaging structure, the device frame includes a main body and a support; the support is located on the upper surface of the main body, and the cross-sectional area of ​​the support is smaller than that of the main body, so that internal pins are provided on the surface of the main body next to the support.

[0011] In the chip packaging structure described above, the outer side of the support portion is flush with the outer side of the main body portion.

[0012] As described above, in the chip packaging structure, the width of the recess is greater than the width of the main body, and the outer side of the main body is flush with the outer side of the heat sink; adhesive is applied between the inner side of the main body and the recess, and adhesive is applied between the bottom surface of the main body and the recess.

[0013] In the chip packaging structure described above, the inner pins are plated with a first conductive metal, which is one or more of silver, titanium, nickel, palladium, and gold in a stack.

[0014] As described above, in the chip packaging structure, the chip and its internal pins are connected by wire bonding.

[0015] In the chip packaging structure described above, the edge of the lower surface of the cover is recessed to form a mounting groove, and the top of the support part of the device frame is embedded in the mounting groove and fixedly connected to the mounting groove.

[0016] In the chip packaging structure described above, the width of the mounting groove is greater than the width of the top of the support portion; the outer side of the support portion is flush with the outer side of the cover; adhesive is applied between the top surface of the support portion and the mounting groove, and adhesive is applied between the inner side of the support portion and the mounting groove.

[0017] As described above, in the chip packaging structure, solder is applied to the heat sink surface to fix the chip; the solder is one or more of the following: nano silver paste, nano copper paste, gold-tin solder, solder paste, conductive adhesive, epoxy resin, and silicone resin.

[0018] In the chip packaging structure described above, a second conductive metal is disposed on the outer surface of the device frame, heat sink, and external pins. The second conductive metal is one or more of the following materials stacked together: silver, gold, nickel, titanium, palladium, and tin.

[0019] The technical solution provided in this application embodiment has an inner pin on the inner side of the device frame and an outer pin on the outer side; the inner pin and the outer pin are electrically connected; the edge of the upper surface of the heat sink is recessed downward to form a recessed platform, and the bottom of the device frame is embedded in the recessed platform and bonded and fixed to the platform; the middle of the upper surface of the heat sink is used to fix the chip, and the chip is electrically connected to the inner pin; a cover is fixed to the top of the device frame. On the one hand, the device frame is embedded downward into the recessed platform at the edge of the heat sink, which increases the distance between the device frame and the inner pin to meet electrical safety regulations; on the other hand, it does not extend the connection length between the chip and the inner pin, thereby reducing parasitic resistance and parasitic inductance, which is beneficial to improving the performance of the chip, especially for radio frequency chips, which can significantly improve their performance. Attached Figure Description

[0020] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0021] Figure 1 This is a schematic diagram of the chip packaging structure provided in an embodiment of this application.

[0022] Figure label:

[0023] 1-Device frame; 101-Main body; 102-Support; 2-Inner pin; 3-Outer pin; 4-Heat sink; 5-Chip; 6-Cap; 10-First adhesive; 11-Second adhesive; 7-Wire bonding; 8-Solder. Detailed Implementation

[0024] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0025] This embodiment provides a chip packaging structure suitable for chip packaging, which has good sealing performance and excellent heat dissipation. The chip can be a substrate chip such as LDMOS, GaN, Si, or SiC, and can be a radio frequency chip, computing chip, etc.

[0026] like Figure 1 As shown, the chip packaging structure provided in this embodiment includes: a device frame 1, a heat sink 4, and a cover 6.

[0027] The function of the device frame 1 is to connect to the pins of the chip 5 and bring out its electrical signals. Specifically, the inner side of the device frame 1 has an inner pin 2, which is used to connect to the pins of the chip 5. The pins of the chip 5 can be connected to the inner pin 2 by bonding wire, with one end of the bonding wire 7 connected to the pin of the chip and the other end connected to the inner pin 2 of the device frame 1. The bonding wire 7 can be gold wire, silver wire, aluminum wire, copper wire, aluminum-clad copper wire, palladium copper wire, aluminum-magnesium wire, etc.

[0028] The outer side of the device frame 1 is provided with an outer pin 3, and the inner pin 2 is electrically connected to the outer pin 3 to bring out the corresponding electrical signal of the chip 5. The outer pin 3 can be soldered to the corresponding pad on the printed circuit board.

[0029] The device frame 1 can be made of epoxy resin, PPS, LCP, or alumina or aluminum nitride ceramic. The inner lead 2 and the outer lead 3 can be made of materials with good conductivity and certain strength, such as oxygen-free copper such as C10100, C1011, and TU0, or copper alloys such as C19210, C19400, and C18400.

[0030] The upper surface of the heat sink 4 has a recessed edge forming a platform. The bottom of the device frame 1 is embedded in the platform and bonded to it. Essentially, the center of the platform 4 bulges upwards, while the edge is recessed downwards. The chip 5 is fixed to the center of the upper surface of the heat sink 4. The heat sink 4 can be made of a metal with sufficient strength and good thermal conductivity, such as one or more interlocking metal materials selected from copper with different oxygen contents, copper-molybdenum-copper alloys with different proportions, diamond copper, diamond aluminum, and copper-based carbon composite materials.

[0031] The cover 6 is fixed to the top of the device frame 1, specifically by adhesive. The cover 6 can be made of materials such as metal, plastic, or ceramic.

[0032] In the above scheme, placing chip 5 in the middle of the upper surface of heat sink 4 will not extend the connection length between chip 5 and inner pin 2, thereby reducing parasitic resistance and parasitic inductance, which is beneficial to improving the performance of the chip, especially for radio frequency chips, it can significantly improve their performance.

[0033] Furthermore, the device frame 1 is embedded downward into the recessed platform at the edge of the heat sink 4, increasing the distance between the device frame 1 and the inner pins to meet electrical safety regulations.

[0034] The technical solution provided in this embodiment has an inner pin on the inner side of the device frame and an outer pin on the outer side; the inner pin and the outer pin are electrically connected; the edge of the upper surface of the heat sink is recessed downward to form a recessed platform, and the bottom of the device frame is embedded in the recessed platform and bonded to it; the middle of the upper surface of the heat sink is used to fix the chip, and the chip is electrically connected to the inner pin; a cover is fixed to the top of the device frame. On the one hand, the device frame is embedded downward into the recessed platform at the edge of the heat sink, which increases the distance between the device frame and the inner pin to meet electrical safety regulations; on the other hand, it does not extend the connection length between the chip and the inner pin, thereby reducing parasitic resistance and parasitic inductance, which is beneficial to improving the performance of the chip, especially for radio frequency chips, which can significantly improve their performance.

[0035] Based on the above technical solution, this embodiment provides an implementation of a device frame 1: the device frame 1 includes a main body 101 and a support 102. The support 102 is located on the upper surface of the main body 101, and the cross-sectional area of ​​the support 102 is smaller than the cross-sectional area of ​​the main body 101, so that an inner pin 2 is provided on the upper surface of the main body 101 next to the support 102.

[0036] One embodiment is that the outer side of the support portion 102 is flush with the outer side of the main body portion 101, and the inner pin 2 is located on the upper surface of the main body portion 101 inside the support portion 102.

[0037] For heat sink 4, the width of its recess is greater than the width of the main body 101, and the outer surface of the main body 101 is flush with the outer surface of heat sink 4, making the outer surface of the device flush and improving overall integrity. Adhesive is applied between the inner surface of the main body 101 and the recess, and adhesive is also applied between the bottom surface of the main body 101 and the recess, increasing the bonding area. This improves the bonding quality between the device frame 1 and the heat sink 4, enhancing reliability, and also improves sealing, preventing external moisture and impurities from entering the device frame 1 and affecting chip performance.

[0038] Solder 8 is applied to the upper surface of the heat sink 4 to fix the chip 5.

[0039] For the cover 6, a mounting groove can also be formed by recessing the edge of the lower surface of the cover 6, and the top of the support part 102 of the device frame 1 is embedded in the mounting groove and fixedly connected to the mounting groove.

[0040] Specifically, the width of the mounting groove is greater than the width of the top of the support 102, and the outer side of the support 102 is flush with the outer side of the cover 6, so that the outer sides of the cover 6, the intermediate frame 1 and the heat sink 4 are flush, resulting in a better appearance.

[0041] Adhesive is applied between the top surface of the support portion 102 and the mounting groove, and adhesive is also applied between the inner surface of the support portion 102 and the mounting groove to increase the bonding area. On the one hand, this can improve the bonding quality between the device frame 1 and the cover 6 and improve reliability; on the other hand, it can improve the sealing performance and prevent external moisture, impurities, etc. from entering the device frame 1 and affecting the chip performance.

[0042] In addition, by connecting the edge of the cover 6 to the device frame 1 with the mounting groove, the overall height of the device can be further reduced, thereby reducing the volume and promoting miniaturization and integration.

[0043] Based on the above technical solution, a first conductive metal is plated on the inner lead 2. The first conductive metal is one or more layers of silver, titanium, nickel, palladium, and gold, which can improve the conductivity. Furthermore, after wire bonding is completed, adhesive can be applied to the surface of the inner lead 2 to improve its firmness and insulation level. The thickness of the first conductive metal is 0.01μm-20μm.

[0044] Furthermore, solder 8 is applied to the surface of the heat sink 4 to fix the chip 5. The solder 8 should be a material with good thermal conductivity, such as one or more of nano-silver paste, nano-copper paste, gold-tin solder, solder paste, conductive adhesive, epoxy resin, and silicone resin, so that the heat generated by the chip 5 during operation can be quickly conducted to the heat sink 4 through the solder 8 and then rapidly dissipated through the heat sink 4.

[0045] Furthermore, a second conductive metal is disposed on the outer surface of the device frame 1, heat sink 4, and external leads 3. The second conductive metal is one or more layers of silver, gold, nickel, titanium, palladium, and tin, which can mask the undesirable appearance of the device, thereby eliminating the need for polishing processes on the frame and heat sink and enabling roll processing. The thickness of the second conductive metal is 0.1μm-50μm.

[0046] The device frame 1 and the heat sink 4 are connected by a first adhesive 10, which can be one or more of epoxy adhesive, acrylic adhesive, polyurethane adhesive, silver-based solder, and copper-based solder.

[0047] The heat sink 4 has a central protrusion forming a boss, and the recessed portion at the edge of the boss is called a recess. The height of the protrusion of the heat sink 4 is greater than the thickness of the first adhesive 10, but less than the height of the device cavity. Preferably, the top of the chip 5 is flush with the solder wire height of the device frame 1. The calculation method is: inner pin height + thickness of the first adhesive - chip thickness - chip solder thickness.

[0048] The device frame 1 and the cover 6 are connected by a second adhesive 11, which can be one or more of epoxy adhesive, acrylic adhesive, polyurethane adhesive, silver-based solder, and copper-based solder.

[0049] The above technical solution, by setting an upwardly protruding boss in the middle of the heat sink 4 and a downwardly recessed platform around the boss, can reduce the distance of the bonding wire 7 between the chip 5 and the inner pin 2 without changing the distance between the inner pin 2 and the bottom of the device frame 1, thereby reducing parasitic inductance and improving electrical performance. On the other hand, it can also increase the contact area of ​​the sealant between the device frame 1 and the heat sink 4, thereby improving the sealing effect.

[0050] In addition, the center of the cover 6 is also set as a boss structure, and the periphery of the boss is a recessed mounting groove. The top of the device frame 1 is embedded in the mounting groove and sealed with adhesive, which can further improve the airtightness of the product.

[0051] In the above solution, silver or other first conductive metals are plated only at the connection between the inner pin 2 and the chip, which can significantly reduce material costs. Plating tin or other second conductive metals on the outer surfaces of the device frame 1, heat sink 4, and outer pin 3 can mask undesirable appearances of the device, thereby eliminating the need for polishing processes on the frame and heat sink and enabling roll-to-roll processing.

[0052] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0053] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0054] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0055] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0056] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A chip packaging structure, characterized in that, include: Device frame; the device frame has inner pins on the inside and outer pins on the outside; the inner pins and outer pins are electrically connected accordingly; The heat sink has a recessed edge on its upper surface to form a recessed platform. The bottom of the device frame is embedded in the recessed platform and bonded to it for fixation. The middle part of the upper surface of the heat sink is used to fix the chip, and the chip is electrically connected to the internal pins. The cap is fixed to the top of the device frame.

2. The chip packaging structure according to claim 1, characterized in that, The device frame includes a main body and a support; the support is located on the upper surface of the main body and the cross-sectional area of ​​the support is smaller than that of the main body, so that internal pins are provided on the surface of the main body next to the support.

3. The chip packaging structure according to claim 2, characterized in that, The outer surface of the support part is flush with the outer surface of the main body part.

4. The chip packaging structure according to claim 2, characterized in that, The width of the sinking platform is greater than the width of the main body, and the outer side of the main body is flush with the outer side of the sinking platform; adhesive is applied between the inner side of the main body and the sinking platform, and adhesive is applied between the bottom surface of the main body and the sinking platform.

5. The chip packaging structure according to claim 1, characterized in that, The inner pins are plated with a first conductive metal, which is one or more of silver, titanium, nickel, palladium, and gold in a stack.

6. The chip packaging structure according to claim 1, characterized in that, The chip is connected to its internal pins via wire bonding.

7. The chip packaging structure according to claim 2, characterized in that, The edge of the lower surface of the cover is recessed to form a mounting groove, and the top of the support part of the device frame is embedded in the mounting groove and fixedly connected to the mounting groove.

8. The chip packaging structure according to claim 7, characterized in that, The width of the mounting groove is greater than the width of the top of the support; the outer side of the support is flush with the outer side of the cover; adhesive is applied between the top surface of the support and the mounting groove, and adhesive is applied between the inner side of the support and the mounting groove.

9. The chip packaging structure according to claim 1, characterized in that, Solder is applied to the surface of the heat sink to secure the chip.

10. The chip packaging structure according to claim 1, characterized in that, The outer surfaces of the device frame, heat sink, and external leads are provided with a second conductive metal, which is one or more of silver, gold, nickel, titanium, palladium, and tin in a stack.

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