LED chip

Abstract

light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), and - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - the reflective layer (6) around the current expansion layer (3), viewed from above, forms a circumferential border (36) and in this border the reflective layer (6) directly borders the semiconductor layer sequence (2), and - the edge (36) has a width of at least 3 µm and at most 15 µm.

Description

[0001] Light-emitting diode chips are specified.

[0002] Documents US 2009 / 0 072 257 A1 and US 2012 / 0 098 016 A1 as well as DE 11 2012 006 689 T5 and US 2012 / 0 086 026 A1 concern light-emitting diodes with electrical insulating structures on the flanks of a semiconductor layer sequence.

[0003] One challenge to be solved is to specify light-emitting diode chips with high efficiency and a long lifespan.

[0004] This problem is solved by a light-emitting diode chip having the features of claim 1 and the dependent claims. Preferred embodiments are the subject of the dependent claims.

[0005] For example, green, yellow, or red light is generated during the operation of the semiconductor layer sequence. Green light refers specifically to a dominant wavelength of the emitted light between 500 nm and 540 nm, yellow light to a wavelength range between 560 nm and 580 nm, and red light, for example, to a dominant wavelength range of 600 nm to 700 nm.

[0006] The semiconductor layer sequence is based on the InGaAlP or InGaAlAsP material system. In this case, the semiconductor layer sequence is specifically designed for the generation of red light or near-infrared radiation. Near-infrared radiation refers, for example, to radiation with a wavelength of maximum intensity between 800 nm and 1500 nm inclusive.

[0007] The LED chip includes a current spread layer. This layer serves to spread the current laterally, perpendicular to the growth direction of the semiconductor layer sequence. Specifically, starting from point-like electrical contact surfaces, the current spread layer causes a lateral current spread.

[0008] The current expansion layer is located directly adjacent to the semiconductor layer sequence. For example, the current expansion layer is grown directly onto the semiconductor layer sequence, particularly epitaxially. The semiconductor layer sequence and the current expansion layer can be produced sequentially in the same growth reactor without intermediate steps, using the same method.

[0009] The current-spreading layer is also made of a semiconductor material. However, in this context, the current-spreading layer is conceptually separated from the semiconductor layer sequence. The term "semiconductor layer sequence" refers to the layers designed for light generation, whereas the term "current-spreading layer" refers to the lateral current spreading as the primary function of this layer.

[0010] The current-expansion layer is based on a different material system than the semiconductor layer sequence. In particular, phosphorus is a major component of the crystal lattice in the semiconductor layer sequence. In other words, the semiconductor layer sequence is then based on a phosphide. In this case, the current-expansion layer is preferably an arsenide. Specifically, the current-expansion layer is based on the AlGaAs material system.

[0011] The LED chip contains at least one encapsulation layer. This encapsulation layer is designed to protect components such as the current expansion layer from damage, for example, caused by moisture. AlGaAs, in particular, tends to degrade when exposed to moisture, thereby impairing the functionality of the LED chip. The encapsulation layer helps to reduce such damage to the current expansion layer.

[0012] The encapsulation layer is located directly on the current-expansion layer and / or on the semiconductor layer sequence in some areas. It is possible that the encapsulation layer covers all exposed surfaces of the semiconductor layer sequence and / or the current-expansion layer. "Exposed" in this context means, in particular, that the corresponding surfaces are not covered by semiconductor materials or current-carrying materials.

[0013] The encapsulation layer has an average thickness of at least 10 nm, 20 nm, or 30 nm. Additionally, the average thickness of the encapsulation layer is at most 300 nm, 150 nm, or 90 nm. In particular, the average thickness is approximately 40 nm or 70 nm.

[0014] According to at least one embodiment, the encapsulation layer has a mean defect density of at most 10 / mm². 2 or 1 / mm 2 or 0.1 / mm 2 Such very low defect densities result in a high density of the encapsulation layer. This is achieved by producing the encapsulation layer via atomic layer deposition.

[0015] Atomic layer deposition, or ALD for short, is described, for example, in US document 4 058 430 A.

[0016] According to at least one embodiment, the encapsulation layer has a specific diffusion constant for water and / or oxygen of at most 10. -5 g / (m 2 d) The specific diffusion coefficient is calculated specifically for a material thickness of 100 nm. Preferably, the diffusion coefficient is at most 5 × 10 -6 g / (m 2 d), in particular at most 10 -6 g / (m 2 d).

[0017] The LED chip comprises one or more coating layers. The at least one coating layer is applied directly to the encapsulation layer, either over the entire surface or in specific areas. The coating layer is preferably impermeable to liquids. In particular, the coating layer is impermeable to water in liquid form. The coating layer is preferably produced by chemical or physical vapor deposition, also known as CVD or PVD.

[0018] The LED chip comprises one or more reflective layers. The at least one reflective layer is a non-metallic layer, for example, made of an electrically insulating material. In particular, the reflective layer is configured to provide total internal reflection of radiation generated in the semiconductor layer sequence. The material from which the reflective layer is made is preferably transparent to the radiation generated in the semiconductor layer sequence. The reflective layer is preferably formed from an oxide or nitride.

[0019] The reflective layer is located on the side of the current-expansion layer facing away from the semiconductor layer sequence. The reflective layer can be directly adjacent to the current-expansion layer. It is also possible for the reflective layer to be applied at a distance from the current-expansion layer.

[0020] The reflective layer is located directly adjacent to the encapsulation layer in some places. In particular, the encapsulation layer covers side surfaces of the reflective layer.

[0021] According to at least one embodiment, at least one conductive layer is located on the side of the reflective layer facing away from the current expansion layer. The conductive layer is preferably configured to conduct ohmic current in a direction perpendicular to the active zone. In particular, the at least one conductive layer is made of a metal or an electrically conductive oxide, also known as TCO.

[0022] According to at least one embodiment, the conductive layer is configured to conduct current to at least one electrical contact surface. For example, all contact surfaces for a specific terminal type, such as a p-contact or an n-contact, are energized by the conductive layer. Preferably, the at least one conductive layer, or at least one of the conductive layers, is formed from a material that is opaque and reflective to the radiation generated in the semiconductor layer sequence. In other words, at least one of the conductive layers can act as a mirror for the generated radiation. Furthermore, another conductive layer can form an adhesion-promoting layer.

[0023] The LED chip thus comprises a semiconductor layer sequence based on InGaAlAsP, preferably InGaAlP, configured to generate visible light or near-infrared radiation. A current expander layer, based on AlGaAs, is located directly adjacent to the semiconductor layer sequence. An encapsulation layer is deposited locally directly onto the current expander layer and / or onto the semiconductor layer sequence. The average thickness of the encapsulation layer is between 10 nm and 200 nm inclusive, and the defect density of the encapsulation layer is at most 10 / mm². 2 .

[0024] At least one cover layer is applied directly to the encapsulation layer, at least in some areas. On one side of the current-expansion layer facing away from the semiconductor layer sequence, at least one non-metallic reflective layer, designed for total internal reflection of radiation, is located in direct or indirect contact. This reflective layer is partially covered directly or indirectly by the encapsulation layer, for example, on a main or side surface. On one side of the reflective layer facing away from the current-expansion layer, at least one conductive layer is located in direct or indirect contact, which may be configured as a mirror layer and / or an adhesion-promoting layer, or may consist of such layers. This conductive layer may directly adjoin electrical contact surfaces for inducing current into the semiconductor layer sequence.

[0025] If InGaAlP-based LED chips are stored or operated in a humid environment, corrosion of the AlGaAs layers with a high aluminum content regularly occurs. This can lead to inhomogeneous light patterns and, in severe cases, to a voltage increase and even total failure of the LED chips. To counteract this, one option is to keep the AlGaAs layer thickness as low as possible and to select the lowest possible aluminum content.

[0026] Similarly, AlGaAs layers are protected as effectively as possible against moisture ingress by dielectric layers such as silicon nitride or silicon dioxide. However, such dielectric layers offer only limited moisture resistance, meaning that the aging of the LED chip is merely delayed. Furthermore, the adhesion of such dielectric layers to the semiconductor material is comparatively poor. Therefore, these dielectric layers cannot provide sufficient age stabilization. Another possibility is to replace the AlGaAs layer with GaP as the contact material to eliminate this aging-prone component in such LED chips.

[0027] The LED chips described here can utilize a sufficiently thick AlGaAs layer. This is achieved by using a high-density encapsulation layer produced by atomic layer deposition to protect the AlGaAs current-expansion layer. The increased lifetime of the LED chips justifies the comparatively high production costs for the encapsulation layer through atomic layer deposition.

[0028] According to at least one embodiment, the aluminum content in the AlGaAs of the current-expansion layer is at least 20%, 40%, or 60%. Alternatively or additionally, the aluminum content is at most 80%, 70%, or 60%. For example, an aluminum content of 50% means that 50% of the gallium lattice sites in the GaAs crystal lattice are replaced by aluminum atoms. Preferably, the current-expansion layer has several sublayers with different Al contents. For example, there is a thin sublayer of GaAs, followed by a thicker sublayer of AlGaAs, and in turn, a thicker AlGaAs sublayer with a higher Al content.In a visible light-emitting diode (LED) chip, a 5 nm thick GaAs layer is present, followed by a 50 nm AlGaAs layer with an Al content of 60%, followed by a 200 nm AlGaAs layer with an Al content of 70%; the stated values ​​for thickness and Al content preferably apply with a tolerance of at most 25% or 10%. If the LED chip is configured to generate infrared radiation, the current-expansion layer may consist of a single layer, for example, AlGaAs with 24% Al. The GaAs sublayer may face the semiconductor layer sequence or face away from it.

[0029] According to at least one embodiment, the encapsulation layer is an Al₂O₃ layer. In other words, the encapsulation layer is then a homogeneous layer of aluminum oxide. The thickness of the encapsulation layer is preferably constant throughout the entire encapsulation layer.

[0030] According to at least one embodiment, the cover layer has a greater average thickness than the encapsulation layer. For example, the average thickness of the cover layer is at least 80 nm, 150 nm, or 200 nm. Alternatively or additionally, the average thickness of the cover layer is at most 1 µm, 600 nm, or 400 nm.

[0031] According to at least one embodiment, the encapsulation layer completely and directly covers the outer facets of the current expansion layer. The outer facets of the current expansion layer are those facets located furthest out on the LED chip.

[0032] According to at least one embodiment, the reflective layer and / or the at least one current-conducting layer each project laterally beyond the current-expansion layer and / or the semiconductor layer sequence when viewed from above. In other words, a base area of ​​the reflective layer and / or a base area of ​​the current-conducting layer can be larger than a base area of ​​the current-expansion layer and / or the semiconductor layer sequence.

[0033] According to at least one embodiment, the encapsulation layer is applied directly to those sub-regions of the reflective layer that laterally extend beyond the current-expansion layer. In particular, the reflective layer is then completely covered by the encapsulation layer on the side facing the semiconductor layer sequence in the sub-region located next to the semiconductor layer sequence. Side faces of the reflective layer that are oriented approximately parallel to the growth direction of the semiconductor layer sequence can be free of the encapsulation layer.

[0034] According to at least one embodiment, the reflective layer is flush with the current-expansion layer when viewed from above. This can mean that, viewed from above, the edges of the reflective layer and the current-expansion layer lie exactly on top of each other with a tolerance of at most 1 µm, 0.5 µm, or 0.1 µm.

[0035] According to at least one embodiment, the encapsulation layer directly and completely covers the outer facets of the current-expansion layer and / or the reflection layer. In other words, the outer boundary surfaces of the reflection layer and / or the current-expansion layer are protected by the encapsulation layer.

[0036] According to at least one embodiment, the encapsulation layer, viewed from above, is applied directly to one of the current-conducting layers or to the current-conducting layer itself, next to the current-expansion layer. This allows for complete encapsulation of the reflective layer. In particular, it is possible for the reflective layer to be completely enclosed on all sides by the current-expansion layer together with the encapsulation layer and the current-conducting layer.

[0037] According to at least one embodiment, the LED chip also includes an additional encapsulation layer. Like the encapsulation layer, the additional encapsulation layer is produced by atomic layer deposition and therefore, like the encapsulation layer, exhibits high resistance to diffusion and a low defect density.

[0038] According to at least one embodiment, the additional encapsulation layer and the encapsulation layer are made of the same material. In particular, both layers consist of Al₂O₃. The additional encapsulation layer and the encapsulation layer are preferably produced in different process steps. In particular, further process steps take place between the production of the additional encapsulation layer and the encapsulation layer.

[0039] According to at least one embodiment, the additional encapsulation layer is applied directly to the side of the current expansion layer facing away from the semiconductor layer sequence. This side of the current expansion layer can be completely covered by the additional encapsulation layer, together with the electrical contact area.

[0040] According to at least one embodiment, the additional encapsulation layer and the encapsulation layer are in contact at certain points. Preferably, a tight encapsulation is present in the contact area where the additional encapsulation layer and the encapsulation layer touch. In other words, the contact area then exhibits no increased permeability, for example to moisture or oxygen, compared to the encapsulation layer.

[0041] According to at least one embodiment, the reflective layer is not in direct contact with the semiconductor layer sequence and / or the current expansion layer at any point. In particular, the additional encapsulation layer is located exclusively between the current expansion layer and the reflective layer, at least in certain areas.

[0042] According to at least one embodiment, the semiconductor layer sequence and the current-expansion layer are completely enclosed on all sides by the encapsulation layer, together with the optionally present additional encapsulation layer and the electrical contact surfaces. In particular, a radiation-facing main side of the semiconductor layer sequence, which faces away from the current-expansion layer, is also completely covered by an electrical contact surface and the encapsulation layer. The cover layer can also be applied to the radiation-facing main side.

[0043] According to at least one embodiment, the electrical contact surface is a contact metallization. In other words, the electrical contact surface is formed from a metal or a metal alloy. Preferably, several contact surfaces made of the same material are located on the current-expansion layer. A further electrical contact surface is preferably provided on the radiation-exit side of the semiconductor layer sequence. This contact surface on the radiation-exit side can be formed from a different, preferably metallic, material.

[0044] According to at least one embodiment, the reflective layer is divided, at least locally, into two or more than two sublayers. The sublayers of the reflective layer follow one another along the growth direction of the semiconductor layer sequence.

[0045] According to at least one embodiment, the encapsulation layer and / or the additional encapsulation layer are located at least partially between the two sublayers of the reflective layer. This enables efficient processing while simultaneously providing a high level of protection for the current expansion layer against moisture through the encapsulation layer and / or the additional encapsulation layer. The encapsulation layer and / or the additional encapsulation layer can thus serve as an etch stop layer.

[0046] According to at least one embodiment, the encapsulation layer and / or the additional encapsulation layer constitutes an etch-stop layer for the current-expansion layer, the semiconductor layer sequence, and / or the reflection layer. In other words, in this case, the current-expansion layer is selectively etchable relative to the encapsulation layer and / or the additional encapsulation layer. An etch selectivity of, for example, at least 500:1 or 10,000:1 is observed.

[0047] According to at least one embodiment, the reflective layer partially penetrates the current-expansion layer completely. In other words, the current-expansion layer is partially removed from one underside of the semiconductor layer sequence. In at least one sub-region of the area from which the current-expansion layer is completely removed, the reflective layer is in direct contact with the semiconductor layer sequence. The reflective layer can also partially penetrate the semiconductor layer sequence, so that the semiconductor layer sequence is partially removed and exhibits recesses and / or grooves.

[0048] According to at least one embodiment, the current expansion layer has an outer, circumferential edge. This circumferential edge is electrically insulated from the center of the current expansion layer by a material of the reflective layer. The electrical contact areas for the current expansion layer are located in this center. This arrangement prevents the active zone from being directly energized at facets of the semiconductor layer sequence. This increases the efficiency of the LED chip.

[0049] According to at least one embodiment, the reflective layer forms a circumferential border around the current-expansion layer when viewed from above. Within this circumferential border, the reflective layer preferably abuts directly the semiconductor layer sequence and preferably completely covers the outer boundary surfaces of the current-expansion layer.

[0050] According to at least one embodiment, the edge has a width of at least 1 µm, 3 µm, or 5 µm. Alternatively or additionally, this width is at most 20 µm, 15 µm, or 10 µm. The width of the edge, for example, constitutes at least 0.1% or 0.3% of the mean edge length of the semiconductor layer sequence, as viewed from above. Likewise, the edge can constitute at most 3%, 1%, or 0.5% of the mean edge length.

[0051] According to at least one embodiment, a support is located on the side of the current-conducting layer facing away from the semiconductor layer sequence. The support is designed to mechanically stabilize and support the LED chip. In other words, the support can be the component of the LED chip that provides mechanical support. For example, the support is directly connected to the current-conducting layer mechanically, electrically, and / or thermally via at least one solder.

[0052] According to at least one embodiment, the electrical contact area has a central region and a peripheral region. In the central region, current from the electrical contact area is impressed into the current expansion layer. Thus, in the central region, the following layers preferably follow one another in the specified order: the current expansion layer, a metallic contact layer, a metallic adhesion layer, and a first current-conducting layer, wherein the first current-conducting layer is simultaneously a mirror layer.

[0053] According to at least one embodiment, the following layers preferably follow one another directly in the specified order in the edge region: the current-expansion layer, the contact layer, the adhesion layer, the additional encapsulation layer, a second conductive layer, and the first conductive layer. The second conductive layer is preferably a transparent layer, for example, made of a transparent conductive oxide such as ITO. The second conductive layer preferably serves as an adhesion-promoting layer. The first conductive layer is preferably an opaque metallic layer, for example, made of gold, which serves as a mirror layer.

[0054] Furthermore, a method is disclosed for manufacturing a light-emitting diode chip according to one or more of the embodiments mentioned above. Features of the light-emitting diode chip are therefore also disclosed for the method, and vice versa.

[0055] According to this process, the encapsulation layer is produced by atomic layer deposition. In contrast, the cover layer is produced by chemical or physical vapor deposition and, unlike the encapsulation layer, not by atomic layer deposition.

[0056] Physical vapor deposition, also known as PVD, includes processes such as evaporation, sputtering, ion implantation, and ionized cluster beam deposition (ICB). Chemical vapor deposition (CVD) encompasses plasma-assisted, inductively or capacitively coupled, hot-wire activated, and catalytic vapor deposition. CVD can be performed at low pressure or atmospheric pressure. Metal-organic and organometallic chemical vapor deposition are also possible.

[0057] The encapsulation layer created by ALD and the cover layer produced by CVD or PVD differ in that the defect density of the ALD encapsulation layer is typically less than 0.1 defects per square millimeter, whereas the CVD or PVD cover layer exhibits a defect density of several hundred defects per square millimeter. This can be demonstrated, for example, using transmission electron microscopy (TEM). Due to the comparatively lower defect density of the ALD encapsulation layer, the etch rate is also reduced compared to the CVD or PVD cover layer. The defect density and / or etch rate, for example, clearly indicate which method was used to create a layer.

[0058] The following section provides a more detailed explanation of a light-emitting diode chip and a method described herein, with reference to the drawing and illustrated examples. Identical reference symbols indicate identical elements in the individual figures. However, the figures are not to scale; rather, individual elements may be exaggerated for clarity.

[0059] They show: Fig. Figures 1, 3 to 8 and 10 to 16 are schematic sectional views of exemplary embodiments of the light-emitting diode chips described herein. Fig. 2 a schematic sectional view of a modified light-emitting diode chip, and Fig. 9 A schematic top view of a current expansion layer for embodiments of the light-emitting diode chips described herein.

[0060] In Fig. Figure 1 shows an embodiment of a light-emitting diode (LED) chip 1. The LED chip 1 comprises a semiconductor layer sequence 2 with an active zone 22. The semiconductor layer sequence 2 is based on the InGaAlP material system. Radiation, preferably red light, generated in the semiconductor layer sequence 2 during operation of the LED chip 1, emerges predominantly from the semiconductor layer sequence 2 at a radiation main side 20.

[0061] On one side opposite the main radiation face 20, a current expansion layer 3 is located directly adjacent to the semiconductor layer sequence 2. The current expansion layer 3 is an AlGaAs layer. The thickness of the current expansion layer 3 is, for example, at least 120 nm and / or at most 500 nm, preferably approximately 200 nm. The thickness of the semiconductor layer sequence 2 is, for example, approximately 5 µm, with a region between the active zone 22 and the main radiation face 20 comprising approximately 80% of the thickness.

[0062] Contrary to the illustration, the current expansion layer 3 can also be composed of several sublayers, for example, a thick AlGaAs layer and a thin GaAs layer with a thickness of at least 2 nm and / or 10 nm, wherein the GaAs layer is preferably located on the side of the thicker AlGaAs layer facing away from the semiconductor layer sequence 2. Such a GaAs layer is preferably also present in all other embodiments.

[0063] For electrical contacting of the current expansion layer 3, an electrical contact surface 8 is located on one side facing away from the semiconductor layer sequence 2. Fig. Figure 1 shows only one contact surface 8, but preferably several contact surfaces 8 are present, as in all other embodiments. The contact surface 8 is preferably a p-contact.

[0064] The electrical contact surface 8 is formed by a metallic contact layer 73. The metallic contact layer 73 is preferably made of gold. Furthermore, an adhesion layer 72 and a metallic mirror layer 71 are present, preferably a gold layer or, alternatively, a silver layer. Hereinafter, the mirror layer 71 is also referred to as the first conductive layer and the adhesion layer as the second conductive layer. The electrical contact surface 8 is electrically contacted via the conductive layers 71 and 72. The conductive layers 71 and 72 preferably extend laterally over the entire LED chip 1. The mirror layer 71, for example, has a thickness of approximately 150 nm. The adhesion layer 72 is located between the semiconductor layer sequence 2 and the mirror layer 71. The adhesion layer 72 is preferably an ITO layer, with a thickness of approximately 100 nm.The adhesion-promoting layer 72 improves adhesion between the mirror layer 71 and the current-expansion layer 3.

[0065] In the direction away from the semiconductor layer sequence 2, layers 71 and 72 are followed by a solder layer 91, for example an AuSn solder, by means of which the semiconductor layer sequence 2 is attached to a carrier 9. Lateral current expansion occurs across the LED chip 1 via the preferably electrically conductive carrier 9; layers 71 and 72 primarily serve only to conduct current in a direction perpendicular to the active zone 22.

[0066] A reflective layer 6 is located at least partially between the current-conducting layers 71, 72 and the current-expansion layer 3. The reflective layer 6 is made of silicon dioxide or silicon nitride, or a layer sequence of these materials. The thickness of the reflective layer 6 is preferably at least 150 nm, 200 nm, or 300 nm and / or at most 1 µm, 700 nm, or 600 nm. The reflective layer 6 has a uniform thickness throughout the entire semiconductor layer sequence 2. Adjacent to the semiconductor layer sequence 2, the reflective layer 6 has a reduced, uniform thickness, such that the encapsulation layer 4 is located at least partially laterally adjacent to the reflective layer 6 located beneath the semiconductor layer sequence 2.

[0067] Total internal reflection of radiation generated in the active zone 22 is achieved via the reflective layer 6, which has a comparatively low optical refractive index. Furthermore, the first current-conducting layer 71 acts as a metallic mirror layer. The reflective layer 6, as well as the two current-conducting layers 71 and 72 (i.e., the mirror layer 71 and the adhesion-promoting layer 72), are also present in areas laterally adjacent to the semiconductor layer sequence 2, as seen from the top view. Optionally, the second current-conducting layer 72 also extends between the first current-conducting layer 71 and the metallic contact layer 73, as shown in Fig. 1 shown.

[0068] In a rim prism 95, the reflective layer 6, together with the current-conducting layers 71, 72, completely penetrates the current-expansion layer 3 and can also extend into the semiconductor layer sequence 2. This forms a center 33 and a circumferential rim 36 of the current-expansion layer 3 when viewed from above. The one or, preferably, the several contact surfaces 8 are located in the center 33. The rim 36 is electrically isolated from the center 33 by the reflective layer 6, since the semiconductor layer sequence 2 exhibits only low lateral electrical conductivity in the region between the active zone 22 and the current-expansion layer 3. Thus, current injection into the active zone 22 directly at a facet 25 of the semiconductor layer sequence 2 is suppressed.

[0069] To protect the semiconductor layer sequence 2 from external influences, a cover layer 5 is applied to all exposed surfaces as well as to the reflective layer 6. The cover layer 5 is preferably a silicon nitride layer applied by CVD or PVD.

[0070] However, the cover layer 5 is insufficient for the long-term, efficient protection of the relatively moisture-sensitive current-expansion layer 3 made of AlGaAs. Therefore, an encapsulation layer 4 is produced beneath the cover layer 5. The encapsulation layer 4 is a low-defect, high-quality layer produced by atomic layer deposition. Preferably, the encapsulation layer 4 is made of aluminum oxide, but alternatively, it can also be made of tantalum oxide or silicon dioxide. In contrast to the cover layer 5, the encapsulation layer 4 ensures sufficient protection of the current-expansion layer 3.

[0071] The light-emitting diode chip 1 is manufactured in particular as follows: The semiconductor layer sequence 2 is grown epitaxially on a growth substrate (not shown). One growth direction G points away from the main radiation face 20. The current expansion layer 3 is then grown onto the semiconductor layer sequence 2, after which the current expansion layer 3 is structured, for example by etching, to create the edge prism 95. Contrary to what is shown, material can also be removed from the semiconductor layer sequence 2, so that the edge prism 95 can then extend not only to, but also into, the semiconductor layer sequence 2, but preferably not to the active zone 22. Subsequently, the reflection layer 6, the current-conducting layers 71 and 72, the solder 91, and the support 9 are applied sequentially.

[0072] The growth substrate (not shown) is then removed. Optionally, a [missing information] is added. Fig. One roughening (not shown) is created on the main radiation face 20, and optionally, a protective layer (also not shown), for example made of SiO2 or silicon nitride, is applied to the main radiation face 20. The semiconductor layer sequence 2 is then structured by etching, forming the facets 25 and reducing the thickness of the reflective layer 6 in the area adjacent to the semiconductor layer sequence 2. Finally, the encapsulation layer 4 and the cover layer 5 are applied.

[0073] In Fig. Figure 2 illustrates a modified LED chip. This LED chip does not have an encapsulation layer 4, as shown in conjunction with Fig. Figure 1 shows that the current expansion layer 3 is not sufficiently protected from the effects of moisture, thus reducing the lifespan of the LED chip.

[0074] In Fig. Figure 3 shows another embodiment. Unlike according to Fig. 1. The reflective layer 6 does not extend beyond the current-expansion layer 3 in a lateral direction, or does not extend significantly beyond it. In the region adjacent to the current-expansion layer 3, viewed from above, the reflective layer 6 is therefore completely removed or, less preferably, still present in a reduced thickness. This means that when the facets 25 are generated and the semiconductor layer sequence 2 is structured, the reflective layer 6 is also partially or completely removed by etching in the region adjacent to the semiconductor layer sequence 2.

[0075] When manufacturing the light-emitting diode chip 1 according to Fig. 3. After structuring the semiconductor layer sequence 2, the current-expansion layer 3, and the reflection layer 6, the encapsulation layer 4 and the cover layer 5 are preferably applied directly one after the other. Thus, in the region adjacent to the semiconductor layer sequence 2, the encapsulation layer 4 can be applied directly to the second current-conducting layer 72. The encapsulation layer 4, particularly one made of aluminum oxide, exhibits good adhesion to ITO, platinum, chromium, silicon dioxide, or silicon nitride. Since the encapsulation layer 4 adheres relatively poorly to gold or silver, the second current-conducting layer 72, also made of ITO, is preferably still present in the region adjacent to the semiconductor layer sequence 2.

[0076] The silicon dioxide reflective layer 6 is relatively permeable to moisture. Therefore, in the exemplary embodiment as shown in Fig. As shown in Figure 3, improved protection of the current expansion layer 3 can be achieved because the reflection layer 6 is also covered on one side surface by the encapsulation layer 4. This prevents or at least significantly reduces the transport of H2O through the reflection layer 6 to the current expansion layer 3.

[0077] In the embodiment of the light-emitting diode chip 1, as shown in Fig. As shown in Figure 4, there is no edge prism 95. The reflective layer 6 thus extends with constant thickness and in a plane from the electrical contact surface 8 to an edge of the LED chip 1.

[0078] In contrast to Fig. In 1, an additional encapsulation layer 42 is present, which is also a layer produced by atomic layer deposition. Like the encapsulation layer 4, the additional encapsulation layer 42 is an aluminum oxide layer. The additional encapsulation layer 42 is applied to the current-expansion layer 3 upstream of the reflective layer 6. Thus, the current-expansion layer 3 is not in direct contact with the reflective layer 6 at any point and is protected from moisture diffusion through the reflective layer 6. The additional encapsulation layer 42 is preferably applied over the entire surface of the still unstructured semiconductor layer sequence 2 immediately after the formation of the current-expansion layer 3.

[0079] In the area laterally adjacent to the semiconductor layer sequence 2, the encapsulation layer 4 is thus applied directly to the additional encapsulation layer 42. In contrast to the additional encapsulation layer 42, the encapsulation layer 4 is only created after the semiconductor layer sequence 2 has been structured.

[0080] In the exemplary embodiment of the Fig. In section 5, the reflective layer is divided into two sublayers 6a and 6b. Sublayer 6b is located directly adjacent to the current expansion layer 3. In the region next to the current expansion layer 3, this sublayer 6b is removed during the structuring of the semiconductor layer sequence 2. The additional encapsulation layer 42, which is preferably an ALD layer made of Al₂O₃, acts as an etch stop layer, since the additional encapsulation layer 42 is then selectively etchable with respect to both the semiconductor material and the SiO₂ of the reflective layer 6b. The two sublayers 6a and 6b are separated from each other by the additional encapsulation layer 42. In the region next to the semiconductor layer sequence 2, as well as in Fig. 4, the encapsulation layer 4 is applied directly onto the additional encapsulation layer 42, so that the sublayer 6b is completely removed in this area.

[0081] Sublayer 6b is thus completely covered laterally by the encapsulation layer 4 and on one side facing away from the current-expansion layer 3 by the additional encapsulation layer 42. Sublayer 6b is therefore completely encapsulated, and the current-expansion layer 3 is protected from diffusion. The two sublayers 6a and 6b can have the same or different thicknesses. For example, each sublayer 6a and 6b can be between 150 nm and 300 nm thick, particularly approximately 200 nm. Sublayer 6b can be thinner than sublayer 6a, with a thickness of at least 25 nm or 50 nm and / or at most 80 nm or 150 nm.

[0082] Unlike in Fig. As shown in Figure 5, a rim prism 95 can also be present in this embodiment, analogous to, for example, Fig. 1.

[0083] The exemplary embodiment of the Fig. 6 corresponds to the embodiment of the Fig. 3, but without the rim prism 95.

[0084] The embodiment of the light-emitting diode chip 1, as shown in Fig. The embodiment shown in 7 corresponds to the exemplary embodiment of the Fig. 4. However, in Fig. 7. Additionally, the rim prism 95 is present.

[0085] In Fig. Figure 8 shows a detailed view of the electrical contact surface 8. A metallic adhesion layer 74, preferably made of platinum, chromium, titanium, nickel, or titanium tungsten nitride, is applied directly to the metallic contact layer 73, which is preferably made of gold. The thickness of the adhesion layer 74 is, for example, at most 15 nm or 5 nm. In a peripheral region of the contact surface 8, the additional encapsulation layer 42 follows the adhesion layer 74, followed by the second conductive layer 72, for example made of ITO, and the first conductive layer 71, for example made of gold. The additional encapsulation layer 42 is not present in a central region of the contact surface 8. If the second conductive layer 72, which serves as an adhesion-promoting layer, is made of an electrically insulating material such as silicon dioxide, then the adhesion-promoting layer 72 is not present in the central region.The edge area, for example, has a width of at most 10% of the total width of the contact surface 8. A correspondingly designed contact surface 8 can also be present in all other embodiments.

[0086] In Fig. Figure 9 shows a schematic top view of the current expansion layer 3 of several LED chips 1; layers 4, 5, 6, 71, 72, 73, and 74 are omitted for simplification of the representation. Fig. 9 not shown. Adjacent LED chips 1 are separated from each other by an unstructured strip. It can be seen that the edge prism 95 extends in a frame-like manner around the entire center 33 with the contact surfaces 8 in a closed path. Likewise, the edge 36 completely encloses the edge prism 95. The contact surfaces 8 are, for example, in a rectangular or, as in Fig. 9 are shown, arranged in hexagonal patterns.

[0087] Optionally, light-scattering structures 66 are provided, which surround the contact surfaces 8 in a quadrilateral pattern, wherein the light-scattering structures 66 can be shaped like an irregular pentagon when viewed from above. Additionally, striped ridges 86 are provided, which preferably coincide with current-expansion ridges attached to the main radiation face, in Fig. 9 not shown, run. The light scattering structures 66 and the fringe walls 86 are preferably constructed analogously to the edge prism 95, so that in the light scattering structures 66 and / or in the fringe walls 86 the reflection layer 6 can be extended to or into the semiconductor layer sequence 2.

[0088] Such a structure with edge prism 95 and / or light scattering structure 66 and / or striped ridges 86 is preferably also present in all other embodiments.

[0089] The exemplary embodiment of the Fig. 10 corresponds to the embodiment of the Fig. 6, with the addition of the rim prism 95. Also according to Fig. 10 is a side surface 25 of the reflection layer 6 covered by the encapsulation layer 4 and laterally next to the semiconductor layer sequence 2 the encapsulation layer 4 and the additional encapsulation layer 42 are directly on top of each other and again directly on the second current-conducting layer 72.

[0090] In the exemplary embodiment of the Fig. 11 The reflection layer 6 extends from the edge prism 95 to the encapsulation layer 4, in line with the facet 25. In other words, the current expansion layer 3 is completely removed from the edge region 36 and replaced by the reflection layer 6.

[0091] Even in the exemplary embodiment of the Fig. In 12, the current widening layer 3 is no longer present in the edge 36. Unlike in Fig. 11 the reflection layer 6 extends in a constant thickness to the encapsulation layer 4.

[0092] In the exemplary embodiment of the Fig. In the 13 embodiment, a light-transmitting protective layer 55 is located directly on the main radiation face 20. This layer may be made of an electrically insulating material such as SiO2 or silicon nitride, or of an electrically conductive material such as a thin metal or a TCO. The main radiation face 20 is completely covered by the protective layer 55. The encapsulation layer 4 is applied directly to the protective layer 55. Such a protective layer 55 can also be present in all other embodiments.

[0093] The protective layer 55 is located, in particular, on and / or within a roughening of the main radiation face 20. In the case of a TCO or an electrically insulating material, the thickness of the protective layer 55 is, for example, at least 40 nm or 70 nm and / or at most 500 nm or 300 nm. It is possible that the protective layer 55 partially or completely flattens an unshown roughening, as can be the case for the encapsulation layer 4 and the cover layer 5. Optionally, the current expansion layer 3, as is possible in all other embodiments, is composed of several sublayers, which are arranged in Fig. 13 are symbolically separated from each other by a dotted line.

[0094] In the exemplary embodiment of the Fig. An electrical contact 85, preferably an n-contact, is located directly on the main radiation face 20. The contact 85 can be formed from one or more metals, particularly in several sub-layers, and can optionally include a TCO. In the area of ​​the contact 85, the encapsulation layer 4, the cover layer 5, and the optional protective layer 55 are open. Furthermore, the contact 85 lies flush with the main radiation face 20, so that the main radiation face 20 has no depression at the contact 85. The contact 85 projects beyond the cover layer 5 and is preferably designed to be electrically contacted by a bonding wire.

[0095] In contact processing and manufacturing of the contact 85, the protective layer 85, which serves as a passivation layer, can be advantageous because when the encapsulation layer 4 is opened, the semiconductor layer sequence 2 is protected by the protective layer 4.

[0096] Starting from contact 4, current expansion ridges (not shown) can be present on the main radiation side 20 to achieve a more uniform current distribution across the LED chip 1. Such current expansion ridges preferably run concurrently with the striped ridges 86. Fig. 9.

[0097] In the exemplary embodiment of the Fig. In case 15, the protective layer 55 is not present. Therefore, it is possible that, due to the manufacturing process, the contact 85 extends into the semiconductor layer sequence 2.

[0098] In Fig. Figure 16 shows a light-emitting diode chip 1 in which contact 85 is applied to the n-side of the semiconductor layer sequence before the encapsulation layer 4 and the cover layer 5 are applied. This closes any potential gaps between the protection layer 55 and contact 85. Analogous to contact area 8 on the current-expansion layer 3, see Figure 16. Fig. 8, preferably, for example in the case of Au contacts 85, a Pt adhesion layer (not shown) is present to ensure the adhesion of the encapsulation layer 4 to the contact 85.

[0099] An opening in the encapsulation layer 4 and the cover layer 5 preferably occurs only at the contact 85, which is also used for external electrical contacting, for example with a bonding wire. If necessary for external electrical contacting, the Pt adhesive layer in a bonding area can be removed, for example by back-sputtering. If current-expansion ridges are present on the main radiation side, preferably neither the encapsulation layer 4 nor the cover layer 5 is opened in the area of ​​the current-expansion ridges.

[0100] The versions with the protective layer 55 and the contact 85 of the Fig. 13, Fig. 14, Fig. 15 to Fig. 16 are examples only for the LED chip 1 of the Fig. Figure 1 illustrates, but the examples of implementation can also be found in the following. Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10 to Fig. 11 will be transferred. Reference symbol list 1 LED chip 2 Semiconductor layer sequence 20 Main radiation page 22 active zones 25 facets 3 Current expansion layer 33 Center of the current widening layer 36 Edge of the flow widening layer 4 Encapsulation layer 42 Additional encapsulation layer 5 Cover layer 55 Protective layer 6 Reflective layer 66 Light scattering structure 71 Mirror layer 72 Detention placement shift 73 metallic contact layer 74 metallic adhesion layer 8 electrical contact surfaces 85 electrical contact 86 strip wall 9 carriers 91 Lot 95 Edge prism G Growth direction

Claims

[1] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), and - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - the reflective layer (6) around the current expansion layer (3), viewed from above, forms a circumferential border (36) and in this border the reflective layer (6) directly borders the semiconductor layer sequence (2), and - the edge (36) has a width of at least 3 µm and at most 15 µm. [2] Light-emitting diode chip (1) according to the preceding claim, wherein the encapsulation layer (4) is produced by atomic layer deposition and has a specific diffusion constant for water and / or oxygen of at most 10 -5 g / (m 2 d) has, calculated to a material thickness of 100 nm, wherein the encapsulation layer (4) is an Al2O3 layer. [3] Light-emitting diode chip (1) according to one of the preceding claims, in which an additional encapsulation layer (42) is applied directly to one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2), the additional encapsulation layer being produced by atomic layer deposition and being made of the same material as the encapsulation layer (4). [4] Light-emitting diode chip (1) according to the preceding claim, wherein the additional encapsulation layer (42) partially contacts the encapsulation layer (4), wherein a contact area of ​​the additional encapsulation layer (42) with the encapsulation layer (4) is tightly sealed. [5] Light-emitting diode chip (1) according to one of the preceding claims, wherein the reflective layer (6) is at least partially divided into two sublayers which follow one another along a growth direction (G) of the semiconductor layer sequence (2), wherein the encapsulation layer (4) is located between the two sublayers. [6] Light-emitting diode chip (1) according to one of the preceding claims, wherein the encapsulation layer (4) forms an etch stop layer for the current expansion layer (3) and / or the reflection layer (6), such that the current expansion layer (3) is selectively etchable relative to the encapsulation layer (4). [7] Light-emitting diode chip (1) according to any one of the preceding claims, wherein - the current expansion layer (3) is composed of a GaAs sublayer and at least one AlGaAs sublayer, - the reflective layer (6) is made of SiO2, - a first conductive layer as a mirror layer (71) made of gold and a second conductive layer as an adhesion-promoting layer (72) made of indium tin oxide are present, which are applied directly to each other, wherein the second conductive layer (72) is on average closer to the current expansion layer (3) and the two conductive layers (71, 72) project laterally beyond the current expansion layer (3), - the cover layer (5) is made of silicon nitride, and - a carrier (9) of the light-emitting diode chip (1) is located on one side of the first current-conducting layer (71) facing away from the semiconductor layer sequence (2), which is attached to the current-conducting layers (71, 72) via at least one solder (91). [8] Light-emitting diode chip (1) according to at least claim 3, in which at least one electrical contact area with a central area and a boundary area is located directly on one of the semiconductor layer sequences (2) facing away from the current expansion layer (3) and the electrical contact area comprises the electrical contact surface (8), in the central area the following layers follow each other directly in the specified order: the current expansion layer (3), a metallic contact layer (73), a metallic adhesion layer (74), the mirror layer (71), and in the edge region the following layers follow each other directly in the specified order: the current expansion layer (3), the contact layer (73), the adhesion layer (74), the additional encapsulation layer (42), the adhesion mediation layer (72), the mirror layer (71). [9] Method by which a light-emitting diode chip (1) is manufactured according to any one of the preceding claims, wherein the encapsulation layer (4) is produced by atomic layer deposition, wherein the cover layer (5) is produced by chemical or physical vapor deposition and not by atomic layer deposition. [10] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), and - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), and - the reflective layer (6) partially penetrates the current expansion layer (3) completely, so that, viewed from above, the current expansion layer (3) has an outer circumferential edge (36) which is electrically insulated by the reflective layer (6) from a center (33) of the current expansion layer (3) in which the at least one electrical contact area (8) is located. [11] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - an additional encapsulation layer (42) is applied directly to one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) by means of atomic layer deposition, which is made of the same material as the encapsulation layer (4), - the reflective layer (6) is not in direct contact with the semiconductor layer sequence (2) or the current expansion layer (3) at any point, and - the semiconductor layer sequence (2) and the current expansion layer (3) are completely enclosed all around by the encapsulation layer (4) together with the additional encapsulation layer (42) and the at least one metallic electrical contact surface (8). [12] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - the reflective layer (6) is at least partially divided into two sublayers which follow one another along a growth direction (G) of the semiconductor layer sequence (2), and - the encapsulation layer (4) is located between the two sublayers. [13] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - an additional encapsulation layer (42) is applied directly to one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) by means of atomic layer deposition, which is made of the same material as the encapsulation layer (4), - at least one electrical contact area with a central area and a boundary area is located directly on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2), and the electrical contact area comprises the electrical contact surface (8), - in the central area, the following layers follow each other directly in the specified order: the current expansion layer (3), a metallic contact layer (73), a metallic adhesion layer (74), the mirror layer (71), and - in the border area, the following layers follow each other directly in the specified order: the current expansion layer (3), the contact layer (73), the adhesion layer (74), the Additional encapsulation layer (42), the adhesion mediator layer (72), the mirror layer (71). [14] Light-emitting diode chip (1) with - a semiconductor layer sequence (2) based on InGaAlAsP and configured to generate visible light or near-infrared radiation, - a current expansion layer (3) located directly adjacent to the semiconductor layer sequence (2) and based on AlGaAs, - an encapsulation layer (4) which is applied directly to the current expansion layer (3) and / or to the semiconductor layer sequence (2) in certain locations and which has an average thickness between 10 nm and 200 nm inclusive and a defect density of at most 10 / mm 2 exhibits - at least a cover layer (5) which is applied directly to the encapsulation layer (4) at least in some places, - at least a non-metallic reflective layer (6) which is located in places on one side of the current expansion layer (3) facing away from the semiconductor layer sequence (2) and which is covered in places by the encapsulation layer (4), and - at least one mirror layer (71) and / or adhesion-promoting layer (72) which is located locally on one side of the reflection layer (6) facing away from the current expansion layer (3) and is designed to supply current to an electrical contact surface (8), wherein - the encapsulation layer (4) completely and directly covers the outer facets (25) of the current expansion layer (3), - the current expansion layer (3) is composed of a GaAs sublayer and at least one AlGaAs sublayer, - the reflective layer (6) is made of SiO2, - a first conductive layer as a mirror layer (71) made of gold and a second conductive layer as an adhesion-promoting layer (72) made of indium tin oxide are present, which are applied directly to each other, wherein the second conductive layer (72) is on average closer to the current expansion layer (3) and the two conductive layers (71, 72) project laterally beyond the current expansion layer (3), - the cover layer (5) is made of silicon nitride, and - a carrier (9) of the light-emitting diode chip (1) is located on one side of the first current-conducting layer (71) facing away from the semiconductor layer sequence (2), which is attached to the current-conducting layers (71, 72) via at least one solder (91).

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