Power diode, method for processing a power diode

The power diode's anode region is engineered with a shallow anode damage zone and controlled dopant distribution to mitigate high charge carrier concentrations, improving reverse recovery and current handling capabilities.

DE102017118864B4Active Publication Date: 2026-06-03INFINEON TECH AUSTRIA AG

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
INFINEON TECH AUSTRIA AG
Filing Date
2017-08-18
Publication Date
2026-06-03

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Abstract

Method for processing a power diode (1) comprising the following: - Providing a semiconductor body (10); - Generating an anode region (102) and a drift region (100) in the semiconductor body (10), wherein the anode region (102) comprises an anode body zone (1023) adjacent to the drift region (100); - Forming both an anode contact zone (1021) and an anode damage zone (1022) in the anode region (102) by a single ion implantation process step, which is followed by a temperature healing process step, wherein: (i) defects caused by the implanted ions can only be partially healed, (ii) the anode damage zone (1022) is formed between the anode contact zone (1021) and the anode body zone (1023); and (iii) the only ion implantation process step is performed with an implantation energy of less than 20 keV.
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Description

TECHNICAL AREA

[0001] This description relates to embodiments of a power diode and to embodiments of a method for processing a power diode. In particular, this description focuses on embodiments of a power diode with a special semiconductor anode structure and corresponding processing methods. BACKGROUND

[0002] Many functions of modern devices in automotive, consumer, and industrial applications, such as converting electrical energy and driving an electric motor or machine, depend on power semiconductor devices. Insulated-gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), and power diodes, to name just a few, are used in a wide variety of applications, including, among others, switches in power supplies and power converters.

[0003] A power diode typically comprises a semiconductor body configured to conduct a load current along a load current path between two terminals of the diode when a forward voltage is applied between the terminals. When a reverse voltage is applied, the power diode typically enters a blocking state, and the flow of a load current is inhibited.

[0004] The load terminals of a power diode are usually referred to as the anode terminal and cathode terminal, and a transition from a conducting state to a blocking state of the power anode can follow a reverse recovery behavior of the power diode.

[0005] When used in certain applications, it may be desirable to avoid excessively high charge carrier concentrations near the anode terminal, thus preventing high peak currents during reverse recovery.

[0006] US Patent 6,096,627 A describes a method for doping a silicon carbide semiconductor layer. In this process, ions are implanted into the semiconductor layer in such a way that a doped and amorphous near-surface region is formed. The semiconductor layer is then cured at a suitable temperature, allowing the dopant to diffuse into an unimplanted sublayer below the near-surface region. The layer formed in this way, i.e., by diffusion, is intended to have a very low defect density and to form a pn junction with an underlying, lightly doped second layer.

[0007] US Patent 5,286,660 A relates to a process for doping a semiconductor wafer. First, a defect layer is created by implantation. After the defect layer has formed, a pre-deposition layer of dopant is deposited onto it. Then, in a furnace step, the deposited dopant diffuses through the defect layer into the semiconductor wafer to form a deep pn junction.

[0008] US 5 759 904 A describes a specific implantation procedure to avoid unwanted diffusion processes.

[0009] EP 3 196 943 A1 describes a method for manufacturing a diode which has an anode buffer layer and an anode protective layer.

[0010] JP 2003-224 281 A also describes a method for manufacturing a diode. The method is designed such that the diode produced using this method exhibits improved properties with regard to its reverse recovery behavior.

[0011] US 2015 / 0303268A1 also relates to a method for manufacturing a diode, which is designed such that the diode produced thereby has improved properties with regard to its reverse recovery behavior.

[0012] The article “Boron, fluorine, and carrier profiles for B and BF2 implants into crystalline and amorphous Si” by RG Wilson, Journal of Applied Physics 54, 1983, 6789-6889, deals generally with the implantation of boron and other dopants. SUMMARY

[0013] The invention is defined by the independent claims. Features of exemplary embodiments are specified in the dependent claims.

[0014] In an illustrative example, a power diode comprises the following: a semiconductor body with an anode region and a drift region, wherein the semiconductor body is coupled to an anode metallization of the power diode and to a cathode metallization of the power diode; an anode contact region and an anode damage region, both implemented in the anode region, wherein the anode contact region is in contact with the anode metallization and the anode damage region is in contact with and below the anode contact region; wherein the anode damage region extends into the anode region along a vertical direction not further down than to an extent level of 75 nm, measured from a transition between the anode metallization and the anode contact region.

[0015] In a further illustrative example, a power diode comprises the following: a semiconductor body with an anode region and a drift region, wherein the semiconductor body is coupled to an anode metallization of the power diode and to a cathode metallization of the power diode; an anode contact region and an anode damage region, both implemented in the anode region, wherein the anode contact region is arranged in contact with the anode metallization and the anode damage region is arranged in contact with and below the anode contact region; wherein fluorine is present within both the anode contact region and the anode damage region with a fluorine concentration of at least 10 16 atoms*cm -3 is included.

[0016] Additional features and advantages will become apparent to a specialist upon reading the following detailed description and examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The parts in the figures are not necessarily to scale; instead, the emphasis is on illustrating the principles of the invention. Furthermore, identical reference numerals in the figures denote corresponding parts. The drawings illustrate: Fig. 1. A schematic and exemplary aspect of a method for processing a power diode according to one or more embodiments; Fig. 2. A schematic and exemplary representation of a section of a vertical cross-section of a power diode according to one or more embodiments; and Fig. 3 schematically and by way of example a course of an electric field and courses of charge carrier concentrations that are present in a semiconductor body according to one or more embodiments. DETAILED DESCRIPTION

[0018] The following detailed description refers to the accompanying drawings.

[0019] In this respect, directional terminology such as "above," "below," "in front of," "behind," "back," "leading," "attached," "over," etc., is used with reference to the orientation of the described figures. Because parts of embodiments can be positioned in a number of different orientations, the directional terminology is used for illustrative purposes. It is understood that other embodiments may be used and structural or logical modifications may be made.

[0020] The following sections refer in detail to different embodiments, one or more examples of which are illustrated in the figures. Each example is provided with an explanation. Features illustrated or described as part of an embodiment can, for example, be applied to or combined with other embodiments to obtain a further embodiment. The drawings are not to scale and are for illustrative purposes only. For clarity, the same elements or manufacturing steps have been designated with the same reference numerals in the various drawings, unless otherwise indicated.

[0021] The term "horizontal," as used in this description, refers to an orientation essentially parallel to a horizontal surface of a semiconductor substrate or structure. This could be, for example, the surface of a semiconductor wafer, die, or chip. Both the first lateral direction X and the second lateral direction Y mentioned below can be horizontal directions, with the first lateral direction X and the second lateral direction Y potentially being perpendicular to each other.

[0022] The term "vertical," as used in this description, refers to an orientation that is essentially perpendicular to the horizontal surface, i.e., parallel to the surface normal of the semiconductor wafer / chip / die. The extension direction Z mentioned below, for example, can be an extension direction perpendicular to both the first lateral direction X and the second lateral direction Y. The extension direction Z is also referred to here as the "vertical direction Z."

[0023] In this specification, n-doped is referred to as a "first conductivity type," whereas p-doped is referred to as a "second conductivity type." Alternatively, reverse doping relationships can be used, so that the first conductivity type can be p-doped and the second conductivity type n-doped.

[0024] In the context of this description, the terms "in ohmic contact," "in electrical contact," "in ohmic connection," and "electrically connected" are intended to describe the existence of a low-resistance electrical connection or current path between two regions, sections, zones, portions, or parts of a semiconductor device, or between different terminals of one or more devices, or between a terminal, metallization, or electrode and a portion or part of a semiconductor device. Furthermore, the term "in contact" in the context of this description is intended to describe the existence of a direct physical connection between two elements of the semiconductor device in question; for example, a junction between two elements in contact may not include any further intermediate element or the like.

[0025] Additionally, in the context of this description, the term "electrical isolation" is used in its generally accepted sense, unless otherwise specified, and thus describes a situation where two or more components are positioned separately from one another and there is no ohmic connection connecting these components. However, components that are electrically isolated from one another may nevertheless be coupled, for example, mechanically coupled and / or capacitively coupled and / or inductively coupled. To give an example, two electrodes of a capacitor may be electrically isolated from one another and may simultaneously be mechanically and capacitively coupled to one another, e.g., by means of insulation, such as a dielectric.

[0026] Specific embodiments described in this description relate, but are not limited to, a power semiconductor device that can be used within a power converter or power supply. Accordingly, in one embodiment, such a device may be configured to carry a load current that is to be supplied to a load and / or that is provided accordingly by a power supply. For example, the power semiconductor device may comprise one or more active power semiconductor cells, such as a monolithically integrated diode cell and / or a monolithically integrated transistor cell and / or a monolithically integrated IGBT cell and / or a monolithically integrated RC-IGBT cell and / or a monolithically integrated MOS-gated diode (MGD) cell and / or a monolithically integrated MOSFET cell and / or derivatives thereof.Such diode cells and / or transistor cells can be integrated into a power semiconductor module. Several such cells can form a cell array arranged with an active region of the power semiconductor device.

[0027] The present description also relates to a power semiconductor device in the form of a power diode.

[0028] The term "power diode," as used in this description, is intended to describe a semiconductor device on a single chip with high voltage blocking and / or high current carrying capabilities. In other words, such a power diode is designed to handle high currents, typically in the ampere range, e.g., up to several tens or hundreds of amperes, and / or high voltages, typically above 15 V, typically 100 V and above, e.g., at least 400 V.

[0029] For example, the power diode described below can be a semiconductor device configured to be used as a power component in a low-, medium-, and / or high-voltage application. For example, the term "power diode," as used in this description, does not refer to logic semiconductor devices used, for example, for storing data, computation, and / or other types of semiconductor-based data processing.

[0030] Fig. Figure 1 schematically and exemplarily illustrates one aspect of a method for processing a power diode 1. The method comprises providing a semiconductor body 10 and generating both an anode region 102 and a drift region 100 in the semiconductor body 10. The generation of the drift region 100 can take place separately from the generation of the anode region 102.

[0031] Drift region 100 can include dopants of the first conductivity type. For example, drift region 100 is n-doped. Drift region 100 can have a dopant concentration of first conductivity type dopants within the range of 10 12 cm -3 up to 5*10 14 cm -3 exhibit. For example, the doping concentration of the drift region 100 and its total extent along the vertical direction Z are selected depending on the nominal voltage for which the power diode is to be designed.

[0032] The anode region 102 can contain dopants of the second conductivity type. For example, the drift region 102 is p-doped. The creation of the anode region 102 can include an implantation process step and / or a diffusion process step. For example, by creating the anode region 102, a base dopant concentration can be achieved in the anode region 102, where the base dopant concentration can have a profile with a dopant concentration that decreases in the vertical direction Z, e.g., a diffusion profile. Alternatively, the anode region 102 can have a base dopant concentration that is substantially homogeneously distributed within the anode region 102.

[0033] The embodiments described here relate to modifying the anode region 102 with regard to locally adjusting the dopant concentration and / or a defect concentration within the anode region 102, which may initially have the basic dopant concentration.

[0034] The process for processing the power diode 1 includes the formation of both an anode contact zone 1021 and an anode damage zone 1022 in the anode region 102 by a single ion implantation process step.

[0035] In the context of this description, the term "single ion implantation process step" refers to an uninterrupted implantation process step that is performed without variation of the implantation energy, without variation of the implantation dose, and without variation of the implantation ions. For example, to perform the single ion implantation process step, an ion implantation device is controlled by setting control parameters, such as a fixed implantation energy range, a fixed implantation dose range, a fixed implantation duration, and a fixed ambient temperature range. The single ion implantation process step in this context can also be understood as the sequence of two or more uninterrupted implantation bombardments, each performed without variation of the implantation energy, without variation of the implantation dose, and without variation of the implantation ions.

[0036] For example, the ion implantation device used to perform the single ion implantation process step is a beamline implantation device. A beamline implantation device is provided that separates the isotopes or species (e.g., ionized atoms or molecules) to be implanted. The isotopes or species are focused in a beam and post-accelerated to the desired energy before impacting the semiconductor wafer. The beamline implantation device can implant monoenergetic species with the same mass-to-charge ratio by either scanning the semiconductor wafer by deflecting the beam or by moving the semiconductor wafer beneath the fixed beam.

[0037] For example, the single ion implantation process step involves the implantation of heavy ions. The heavy ions comprise ions with a mass that is greater than that of the 612 Carbon nucleus or the 1428 Silicon− atomic nucleus exceeds.

[0038] In one embodiment, the single ion implantation process step comprises the implantation of ionized boron difluoride (BF2) molecules. This single ion implantation process step can be achieved through pure BF2 ion implantation.

[0039] The single ion implantation process step is performed with an implantation energy of less than 20 keV. For example, the single ion implantation process step is performed such that the mean distance of the implanted ions, measured from a surface area of ​​10⁻¹ of the provided semiconductor body 10, which has been penetrated by the implanted ions, is less than 100 nm. This mean distance can even be shorter, e.g., less than 80 nm, less than 70 nm, or even less than 50 nm. One possible measure for adjusting the mean distance is not only the implantation energy applied during the single ion implantation process step, but also the thickness of a (not illustrated) thin oxide layer at the surface area 10⁻¹, which can form during preparation for the single ion implantation process step.

[0040] Furthermore, the single ion implantation process step can be performed with an implantation dose of at least 2*10 13 cm -2 The procedure can be performed. The implantation dose can be greater than 2 x 10 13 cm -2 e.g. larger than 3*10 13 cm -2 or even larger than 6*10 13 cm -2 be.

[0041] The single ion implantation process step is followed by a temperature healing process step, which is performed, for example, at a temperature below 450 °C, during which defects caused by the implanted ions are only partially healed. The temperature can be kept below 450 °C, e.g., below 420 °C or below 400 °C. The duration of the temperature healing process step can depend on several factors and can range from a few minutes to several hours.

[0042] For example, such a low-temperature annealing process step can ensure that defects near surface 10-1 are only partially annealed, resulting in an anode contact zone 1021 with a comparatively lower defect concentration and a comparatively higher dopant concentration. For example, the anode contact zone 1021 can have a higher dopant concentration of the second conductivity type and / or, alternatively, a higher interstitial atom density, e.g., within the range of 10 18 cm -3 up to 10 20 cm -3 , point out.

[0043] Furthermore, such a low-temperature healing process step ensures that defects located spatially 10⁻¹ away from the surface are not healed, thus forming the anode damage zone 10²² with a comparatively higher defect concentration and a comparatively lower dopant concentration. For example, the anode damage zone 10²² can have a higher defect concentration, e.g., within the range of 10 18 cm -3 up to 10 20 cm -3 , point out.

[0044] In one embodiment, the generated anode damage zone 1022 can be configured to reduce the lifetime and / or mobility of charge carriers located within the anode damage zone 1022. For example, the damage zone 1022 can be configured to reduce the emitter efficiency of the anode region 102.

[0045] Now, additional reference is made to Fig. Figure 2, which schematically and exemplarily illustrates a section of a vertical cross-section of a power diode according to one or more embodiments. The power diode 1 may have been produced according to the method described above. Accordingly, what is shown with reference to Fig. 1 was specified, equally for the embodiment from Fig. 2 apply. Similarly, what now refers to Fig. 2 is specified, equally for the embodiment from Fig. 1 applies.

[0046] In one embodiment of the method, before the single ion implantation process step is performed, a first implantation process step is carried out to form an anode field stop zone 1024 within the anode region 102, wherein the anode field stop zone 1024 is located deeper within the anode region 102 than both the contact zone 1021 and the anode damage zone 1022. The anode field stop zone 1024 can be spatially separated from the anode damage zone 1022, e.g., by means of an anode body zone 1023, as described in more detail below.

[0047] For example, the anode region 102 is first generated by providing the base dopant concentration, e.g., by an implantation process step and / or a diffusion process step. For example, the base dopant concentration of the anode region 102 can be achieved using boron as the dopant material. In the illustrated embodiments, the region designated by reference numeral 1023 can denote an anode body zone that essentially exhibits the base dopant concentration.

[0048] The anode field stop zone 1024 can then be formed by performing the first implantation process step, which differs from the single ion implantation process step. The anode field stop zone 1024 can be located in a lower part of the anode region 102 or can even enclose the anode region 1024. Furthermore, the implantation particles introduced into the anode region 102 by means of the first implantation process step can be subjected to a temperature-curing process step, so that defects caused by the implantation particles are healed, for example, completely healed. This can result in a comparatively high dopant concentration within the anode field stop zone 1024, e.g., a dopant concentration greater than the dopant concentration of the anode body zone(s) 1023.

[0049] The anode field stop zone 1024 can accommodate a dopant concentration of dopants of the second conductivity type within the range of 5 × 16 cm⁻¹. -3 up to 7e17 cm -3 exhibit. For example, this doping concentration is achieved by means of implanted boron ions, which are subsequently subjected to the temperature curing process step.

[0050] Then, i.e., after generating the anode field stop zone 1024, e.g., following the first implantation process step and the subsequent temperature healing process step, the single ion implantation process step can be carried out to form the anode contact zone 1021 and the anode damage zone 1022.

[0051] Accordingly, it is understood that, according to one embodiment, the dopant concentration of the anode region 102 can be adjusted before the single ion implantation process step, e.g., by implanting boron. The anode body zone(s) 1023 of the anode region 102, which does not form part of the anode contact zone 1021, the anode damage zone 1022, and the anode field stop zone 1024, can have a dopant concentration of dopants of the second conductivity type within the range of 1*10 16 cm -3 up to 2*10 17 cm -3 demonstrate.

[0052] In this embodiment, the anode field stop zone 1024 is spatially offset from the anode damage zone 1022 by at least 250 nm along the vertical direction Z. This distance can even be greater than 250 nm, e.g., greater than 400 nm or greater than 600 nm. It is understood that this distance between the anode field stop zone 1024 and the anode damage zone 1022 can refer to the distance between a peak in the defect concentration of the anode damage zone 1022 and a peak in the doping concentration of the anode field stop zone 1024. The anode field stop zone 1024 and the anode damage zone 1022 can be separated from each other by means of the anode body zone 1023.

[0053] Finally, after the single ion implantation process step, an anode metallization 11 can be provided on the anode region 102. For example, the anode contact zone 1021 of the anode region 102 can be arranged in contact with the anode metallization 11.

[0054] Now, more specifically with reference to Fig. 2. The power diode 1 comprises a semiconductor body 10 with an anode region 102 and a drift region 100, wherein the semiconductor body 10 is coupled to an anode metallization 11 and a cathode metallization 12 of the power diode 1. The anode metallization 11 can form part of an anode load terminal of the power diode 1, and the cathode metallization 12 can form part of a cathode load terminal of the power diode 1. The previously given explanations apply to the anode region 102 and the drift region 100 of the semiconductor body 10.

[0055] Accordingly, an anode contact zone 1021 and an anode damage zone 1022 can both be implemented in the anode region 102. The anode contact zone 1021 can be arranged in contact with the anode metallization 11, and the anode damage zone 1022 can be arranged in contact with and below the anode contact zone 1021. The anode contact zone 1021 and the anode damage zone 1022 can have been formed according to the method described above, e.g., by means of the single ion implantation process step.

[0056] For example, the semiconductor body 10 further comprises a cathode contact region 108, wherein the drift region 100 can be coupled to the cathode metallization 12 via the cathode contact region 108. For example, the cathode contact region 108 is arranged in contact with the cathode metallization 12 and can have a dopant concentration of dopants of the first conductivity type within the range of 5 × 10 19 cm-3 up to 5*10 20 cm -3 demonstrate.

[0057] The power diode 1-1 can, for example, be a pin or a pn diode. - n-structure comprising the anode region 102 (p), the drift region 100 (i or n) - ) and the cathode contact area 108 (n) is formed.

[0058] In one embodiment, the anode damage zone 1022 extends into the anode region 102 along the vertical direction Z no further down than a level of 75 nm, measured from the surface 10-1 of the semiconductor body 10-1, which may be located at the same level as a transition between the anode metallization 11 and the anode contact zone 1021. Additionally or alternatively, fluorine may be present within both the anode contact zone 1021 and the anode damage zone 1022 with a fluorine concentration of at least 10 16 atoms*cm -3 It should be included.

[0059] The extent level can be less than 75 nm, e.g., less than 50 nm or even less than 20 nm. In other words, in one embodiment, the lower termination 10221 of the anode damage zone 1022 is spaced from the surface 10-1 of the semiconductor body 10, e.g., from the transition between the anode metallization 11 and the anode region 102, by no more than 75 nm, no more than 50 nm, or no more than 20 nm. In other words, the anode damage zone 1022 can be located below the anode contact zone 1021, yet still very close to the anode metallization 11 and sufficiently far from the pn junction formed between the anode region 102 and the drift region 100.

[0060] The fluorine concentration can also be greater than 10 16 atoms*cm -3 e.g. larger than 5*10 17 atoms*cm -3 or even larger than 10 19 atoms*cm -3 , be.

[0061] For example, the anode region 102 extends into the semiconductor body 10 along the vertical direction Z for at least 2 µm, for at least 4 µm or for at least 6 µm.

[0062] Furthermore, in one embodiment, the distance between a peak of the electric field during a blocking state of the power diode 1 and the lower termination 10221 of the anode damage zone 1022 can be at least 250 nm, at least 400 nm, or at least 600 nm. Such a distance between the peak E MAX of the electric field E during a blocking state of the power diode 1 and the lower termination 10221 is exemplified in Fig. Figure 3 illustrates this and is denoted as ΔZ. For example, the power diode 1 can be configured, e.g., by means of the distance ΔZ, such that a space charge region, e.g., during a blocking state of the power diode 1, does not extend into the damage zone 1022.

[0063] Now with more detailed reference to Fig. 3. Exemplary dimensions and doping concentrations N A (p-type dopants), N D (n-type dopants) and defect(D) concentrations are explained. It is understood that these exemplary values ​​can apply to all embodiments described above with respect to both the method and the power diode 1.

[0064] The anode contact zone 1021, which can be in contact with the anode metallization 11 and which can have an upper termination that can be part of the surface 10-1, can be treated with a high concentration of approximately 10 19 cm -3 It may be p-doped. Furthermore, it may have a fluorine concentration of at least 10. 16 atoms*cm -3in the anode contact zone 1021. The anode contact zone 1021 can have a total extent in the vertical direction Z of approximately 50 nm to 200 nm.

[0065] The anode damage zone 1022, which may be located below and in contact with the anode contact zone 1021, can have a high defect concentration of approximately 10 19 cm -3 Furthermore, a fluorine concentration of at least 10 16 atoms*cm -3 in the anode damage zone 1022. The anode damage zone 1022 can have a total extent in the vertical direction Z of approximately 100 nm to 400 nm.

[0066] As explained above, the anode contact zone 1021 and the anode damage zone 1022 can be formed by a single ion implantation process step and a subsequent temperature healing process step, during which the defects caused by the ion implantation are only partially healed.

[0067] The anode body zone(s) 1023, which is / are located below the anode damage zone 1022, can / can have a base concentration of approximately 10 17 cm -3 be p-doped. The anode body zone(s) 1023 can have a total extent in the vertical direction Z of approximately 200 nm to 700 nm. As explained above, the anode region 102 can form the anode field stop zone 1024, either as a zone that closes off the anode region 102 in the vertical direction Z, or as a zone arranged between two anode body zones 1023, as shown in Fig.Figure 3 illustrates the following. The anode field stop zone 1024 can contain a higher concentration than the anode body zone(s) 1023, e.g., a concentration of approximately 10 18 cm -3 , be p-doped. The anode field stop zone 1024 can have a total extent in the vertical direction Z of approximately 200 nm to 600 nm.

[0068] The drift region 100 can be equipped with a low doping concentration or an intrinsic concentration, e.g. with a concentration of up to 5*10 14 cm -3 , be n-doped. For example, the dopant concentration of the drift region 100 and its total extent along the vertical direction Z are chosen depending on the nominal voltage for which the power diode 1 is to be designed.

[0069] The drift region 100 can be coupled to the cathode metallization 12 via the cathode contact region 108. For example, the cathode contact region 108 is arranged in contact with the cathode metallization 12 and can be doped with a concentration of approximately 1 × 10 20 cm -3 be n-doped. For example, the cathode contact region 108 has a total extent along the vertical direction Z of up to 0.3 µm.

[0070] The embodiments described above incorporate the understanding that a power diode with a weakly hole-emitting anode can be achieved with an anode that has a heavily doped contact zone and a damage zone. However, under certain circumstances, e.g., at high operating temperatures, such a damage zone can also act as a charge carrier generation zone. To avoid such effects, it can be ensured that the space charge region does not extend into the damage zone. According to one or more of the embodiments described above, it is proposed to provide a very narrow anode damage zone that is sufficiently spatially offset from the space charge region, without the need for a deep anode region.For example, such a damage zone can be formed by means of a single BF2 implantation, followed by a temperature-curing process step during which the BF2 defects are only partially healed, so that the anode damage zone and the anode contact zone are simultaneously produced on this, i.e., adjacent to the anode metallization. According to one embodiment, PF2, rather than boron, is implanted to form the anode damage zone and the contact zone.

[0071] The above described embodiments relating to power diodes and corresponding processing methods. These power diodes are based, for example, on silicon (Si). Accordingly, a monocrystalline semiconductor region or layer, e.g., the semiconductor body 10 and its regions / zones, e.g., regions 100, 102, 108, etc., can be a monocrystalline Si region or Si layer. In other embodiments, polycrystalline or amorphous silicon can be used.

[0072] However, it is understood that the semiconductor body 10 and its regions / zones can be made of any semiconductor material suitable for manufacturing a power diode. Examples of such materials include elemental semiconductor materials, such as silicon (Si) or germanium (Ge); group IV compound semiconductor materials, such as silicon carbide (SiC) or silicon germanium (SiGe); binary, ternary, or quaternary III-V semiconductor materials, such as gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide (InGaP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AlGaInN), or indium gallium arsenide phosphide (InGaAsP); and binary or ternary II-VI semiconductor materials, such as cadmium telluride (CdTe) and mercury cadmium telluride. (HgCdTe), to name just a few.The semiconductor materials mentioned above are also referred to as "homo-junction semiconductor materials." When two different semiconductor materials are combined, a hetero-junction semiconductor material is formed. Examples of hetero-junction semiconductor materials include aluminum gallium nitride (AlGaN)-aluminium gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-aluminium gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-gallium nitride (GaN), aluminum gallium nitride (AlGaN)-gallium nitride (GaN), indium gallium nitride (InGaN)-aluminium gallium nitride (AlGaN), silicon-silicon carbide (Si. x C 1-x ) and silicon-SiGe heterojunction semiconductor materials. For power semiconductor device applications, Si, SiC, GaAs, and GaN materials are currently the most commonly used.

[0073] Spatially relative terms, such as "under," "below," "lower," "above," "upper," and the like, are used for the sake of simplicity to describe the positioning of one element relative to another. These terms are intended to encompass various orientations of the corresponding device, in addition to those shown in the figures. Furthermore, terms such as "first," "second," and the like are also used to describe different elements, areas, sections, etc., and these are likewise not intended to be limiting. Throughout the description, identical terms refer to identical elements.

[0074] The terms “indicating”, “containing”, “comprising”, “showing”, and the like are open terms and indicate the presence of the specified elements or features, but do not exclude any additional elements or features.

Claims

[1] Method for processing a power diode (1) comprising: - Providing a semiconductor body (10); - Generating an anode region (102) and a drift region (100) in the semiconductor body (10), wherein the anode region (102) comprises an anode body zone (1023) adjacent to the drift region (100); - Forming both an anode contact zone (1021) and an anode damage zone (1022) in the anode region (102) by a single ion implantation process step, which is followed by a temperature healing process step, wherein: (i) defects caused by the implanted ions can only be partially healed, (ii) the anode damage zone (1022) is formed between the anode contact zone (1021) and the anode body zone (1023); and (iii) the only ion implantation process step is performed with an implantation energy of less than 20 keV. [2] Method according to claim 1, wherein the only ion implantation process step comprises the implantation of heavy ions. [3] Method according to claim 1 or 2, wherein the only ion implantation process step comprises the implantation of boron difluoride ions. [4] Method according to any of the preceding claims, wherein the single ion implantation process step is performed using a beamline implantation device. [5] Method according to any of the preceding claims, wherein the single ion implantation process step with an implantation dose of at least 2*10 13 cm -2 is executed. [6] Method according to any of the preceding claims, wherein the single ion implantation process step is carried out such that the mean distance of the implanted ions, measured from a surface (10-1) of the semiconductor body (10) penetrated by the implanted ions, is less than 100 nm. [7] Method according to any of the preceding claims, wherein the temperature curing process step is carried out at a temperature below 450 °C. [8] Method according to any of the preceding claims, wherein the generation of the anode region (102) comprises an implantation process step and / or a diffusion process step. [9] Method according to any of the preceding claims, further comprising, before the single ion implantation process step is carried out, carrying out a first implantation process step to form an anode field stop zone (1024) within the anode region (102), wherein the anode field stop zone (1024) is located deeper within the anode region (102) than both the contact zone (1021) and the anode damage zone (1022). [10] Method according to claim 10, wherein the anode field stop zone (1024) is spatially offset from the anode damage zone (1022) by at least 250 nm along a vertical direction (Z). [11] Method according to claim 9 or 10, wherein the implantation particles introduced into the anode region (102) by means of the first implantation process step are subjected to a temperature curing process step, so that defects caused by the implantation particles are cured. [12] Method according to any of the preceding claims, wherein the anode damage zone (1022) is configured to reduce the lifetime and / or mobility of charge carriers located within the anode damage zone (1022). [13] Method according to one of the preceding claims, further comprising, after the single ion implantation process step, the provision of an anode metallization (11) on the anode area (102). [14] Power diode (1) comprising: - a semiconductor body (10) with an anode region (102) and a drift region (100), wherein the semiconductor body (10) is coupled to an anode metallization (11) of the power diode (1) and to a cathode metallization (12) of the power diode (1); - an anode contact zone (1021) and an anode damage zone (1022), both implemented in the anode region (102), wherein the anode contact zone (1021) is arranged in contact with the anode metallization (11) and the anode damage zone (1022) is arranged in contact with and below the anode contact zone (1021), wherein the anode region (102) further comprises an anode body zone (1023) adjacent to the drift region (100) and the anode damage zone (1022) is formed between the anode contact zone (1021) and the anode body zone (1023); wherein fluorine is present within both the anode contact zone (1021) and the anode damage zone (1022) with a fluorine concentration of at least 10 16 atoms*cm -3 is included. [15] Power diode (1) according to claim 14, wherein the anode region (102) extends into the semiconductor body (10) along the vertical direction (Z) for at least 2 µm. [16] Power diode (1) according to any one of the preceding claims 14 to 15, wherein the distance between a peak of the electric field during a blocking state of the power diode (1) and the lower termination (10221) of the anode damage zone (1022) is at least 250 nm. [17] Power diode (1) according to any one of the preceding claims 14 to 16, wherein the semiconductor body (10) further comprises a cathode contact area (108), wherein the drift area (100) is coupled to the cathode metallization (12) through the cathode contact area (108). [18] Power diode (1) according to any one of the preceding claims 14 to 17, wherein the anode region (102) comprises an anode field stop zone (1024) which is located deeper within the anode region (102) than both the contact zone (1021) and the anode damage zone (1022).