Device and method for detecting a fault on a data line
The described device and procedure address the complexity and cost issues of existing error detection methods by using DC separation and a simplified circuit to evaluate mid-voltage dynamics, enabling reliable error detection across all voltage areas at reduced costs.
Patent Information
- Application Number
- DE102017214183
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2017-08-15
- Publication Date
- 2025-03-13
- Estimated Expiration
- 2037-08-15
AI Technical Summary
Existing methods for detecting errors on differential bus systems are complex and costly, and they struggle to accurately identify errors in the border voltage areas, such as smaller 0 V and larger 5 V.
A device and procedure that utilize a dynamic proportion of the mid-voltage to detect errors, employing DC separation and a circuit with a high pass filter, a peak value rectifier, and a microcontroller for error evaluation, which reduces the need for separate monitoring of data lines and minimizes capacitive and ohmic loads.
This approach allows for reliable error detection across all permissible voltage areas at significantly lower costs and with reduced space requirements, compared to traditional methods, while also simplifying the evaluation process.
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Abstract
Description
State of the art
[0001] The present invention relates to a device and method for detecting a fault on a data line according to the preamble of the independent claims.
[0002] A device of this type is known, for example, from DE 10 2008 002 946 B4. In this device, the center voltage is fed to a low-pass filter, the output voltage of which is applied directly or after analog-to-digital conversion as a digital value to the measuring input of a microcontroller.
[0003] From DE 10 2015 221 675 A1, a bus system is known, comprising at least two control units, wherein the control units each have at least one bus driver and one microprocessor, wherein the bus drivers are connected to each other via at least two bus lines, wherein the control units each have a termination network comprising at least two resistors and at least one capacitor, wherein one resistor is connected to a bus line and the two resistors are connected to each other at a center tap of the termination network, wherein the capacitor is arranged between the center tap and ground, wherein an evaluation unit for detecting a common-mode disturbance is arranged at the center tap, which is connected to a microprocessor of at least one control unit, and a method for detecting an impending failure of a bus system.
[0004] Furthermore, a bus system is known from DE 10 2015 221 848 A1, comprising at least two control units, each having a bus driver, wherein the bus drivers are connected to each other via at least two bus lines, each with at least one coupling capacitor, wherein a termination network is connected to the bus lines, consisting of at least two resistors and a capacitor, wherein the two resistors are each connected to one of the bus lines and are connected to each other at a center tap, wherein the capacitor of the termination network is located between the center tap and a ground connection, wherein the bus system has a reference voltage source, wherein the reference voltage source is connected to the center tap via an element, and wherein the voltage of the reference voltage source has a value between an operating voltage (UBAT) of the bus system and ground.wherein at least one control unit is designed such that the voltage level at the center tap is detected and, depending on the detected voltage level, the control unit detects whether a short circuit of a bus line to operating voltage (UBAT) or ground is present, as well as a method for diagnosing a short circuit for such a bus system.
[0005] From DE 10 2008 052 781 A1, a bus system for transmitting digital data messages with at least two parallel bus lines is disclosed, on which the data messages are transmitted with mutually inverse signal levels, or a method for transmitting digital data messages through such a bus system is disclosed. The bus system has several bus nodes for data transmission, wherein only a portion of the bus nodes, in particular fewer than five bus nodes, each have a signal control unit and a fault detection device for monitoring the bus lines.
[0006] Furthermore, DE 102 37 696 B3 discloses a method and an arrangement for generating an error signal suitable for detecting transmission errors in differential signal technology. According to the invention, a potential-wise intermediate level M[1], located midway between the signal level of one signal line and the signal level of the other signal line, is compared with the corresponding intermediate level M[O] in the case of a transmitted logical "1" in the case of a transmitted logical "O". The error signal is generated if the deviation between the two intermediate levels M[1] and M[O] exceeds a predetermined threshold Q.
[0007] The object of the present invention is to provide an alternative method for detecting single-wire faults in differential bus systems. This object is achieved by the features of the independent claims. Advantages of the invention
[0008] In contrast, the device and method according to the features of the independent claims have the advantage that, by evaluating a dynamic component of the center voltage to detect a fault, even borderline ranges (e.g., less than 0 V and greater than 5 V) can now be reliably detected. Due to the proposed DC voltage isolation, all permissible voltage ranges can be covered. With the proposed circuit, single-wire faults in particular can be detected at significantly lower costs and with less space requirements (due to a reduced number of outputs) compared to relatively complex CAN transceivers with integrated fault detection. Furthermore, separate monitoring of the voltages in the two data lines is unnecessary, thus avoiding capacitive and / or resistive loads on the lines. Finally, only a single measurement channel is required.
[0009] In a suitable advanced design, at least one peak rectifier is provided, to which the output signal of the high-pass filter is fed. This allows for a particularly simple evaluation of the dynamic component, especially with subsequent comparison against a corresponding threshold for error detection. An error is detected when a corresponding change in the signal occurs.
[0010] In a suitable further development, at least one filter is provided to which the output signal of the peak-value rectifier is fed. This allows, in particular, the rectified signals to be further stabilized and made easier to process.
[0011] In a suitable advanced training system, at least one microcontroller is provided to which the output signal of the filter and / or the peak rectifier and / or the high-pass filter is fed for fault detection. The microcontroller is usually already included and can handle fault evaluation, activate a display if necessary, store fault detection data, and / or initiate any necessary countermeasures.
[0012] In a suitable further development, the high-pass filter includes at least one capacitor and / or the peak-value rectifier includes at least one diode, preferably a Schottky diode. Especially when using a Schottky diode, AC voltages with amplitudes in the range of, for example, 300 mV can be detected, which further increases the reliability of the evaluation with a simple circuit design.
[0013] Further appropriate training courses result from other dependent requirements and from the description. Brief description of the drawing
[0014] An embodiment of the invention is described in detail below with reference to the accompanying drawing. The drawing shows the Fig. 1 a device for detecting a fault on a data line as well as Fig. 2 the time-dependent voltage profile of an undisturbed communication with the bus signals and the associated center voltage at the center tap as well as Fig. 3 the time-dependent voltage profile of a short circuit of a data line to ground and the corresponding effect of this short circuit on the average voltage.
[0015] The exemplary embodiment according to Fig. Figure 1 shows a device for detecting a fault on a data line 8, 9. Two data lines 8, 9 are provided as part of a differential bus system. Possible differential bus systems include CAN or FlexRay. For example, the CAN_H (CAN_High) signal could be carried on one data line 8 and the CAN_L (CAN_Low) signal on the other data line 9. The data lines 8, 9 connect to a transceiver 22, which in turn is coupled to a microcontroller 24 for data exchange.
[0016] To easily detect a single-wire fault, a mid-voltage Um is tapped via a resistor bridge consisting of a first resistor 11 and a second resistor 12. The first resistor 11 is connected to the data line 8 and the potential of the mid-voltage Um, and the second resistor 12 is connected to the other data line 9 and also to the potential of the mid-voltage Um. Optionally, a capacitor 15 is connected to the potential of the mid-voltage Um and to ground to stabilize the total voltage or the mid-voltage Um. The selected termination resistors 11 and 12 of the resistor bridge can, for example, be 60 ohms.
[0017] The mid-voltage Um is first fed to a high-pass filter 17, which includes a capacitor 16 and a resistor 13 connected to ground. This is followed by a peak rectifier 19 to detect the signal change. In the exemplary embodiment, the peak rectifier 19 includes at least one diode 18. Optionally, a filter 21 is added, in the exemplary embodiment consisting of a resistor 14 and a capacitor 20, both connected to ground. The resulting output signal is then passed via an analog-to-digital converter 26 to a microcontroller 24.
[0018] When using the center tap or the center voltage Um of the resistor network for fault detection, only one measurement channel is necessary. Since this involves differential data transmission, a voltage difference arises at the center tap during normal communication, as exemplified in... Fig. Figure 2 shows a constant DC voltage level of the center voltage Um, i.e., the capacitive load from the measuring device is negligible.
[0019] The occurrence of a single-wire fault has the following effects on the tap. The average DC voltage deviates from the nominal value (e.g., 2.5 V) because one of the two data lines 8 and 9 is fixed at 0 V or the battery voltage.
[0020] During normal communication, the signal edges of data lines 8 and 9 (CAN_H, CAN_L) cancel each other out at the center tap (compare Fig. 2) In the event of a short circuit, a strong alternating voltage component suddenly arises with each communication (compare the course of the average voltage). To Fig. 3) Due to the short circuit, one of the data lines 8,9 is at a constant potential, while the other data line 8,9 alternates between two levels for data transmission. This alternating component can be used to detect the short circuit.
[0021] This shows, for example, Fig. 2. Uninterrupted communication with the bus signals CAN_H, CAN_L and the voltage Um at the center tap of resistors 11, 12.
[0022] For example, if a short circuit from CAN_L to ground occurs as in Fig. As shown in section 3, the center voltage also undergoes a change as shown. This fault condition can be addressed via the circuit according to... Fig. 1. particularly easy and reliable evaluation. For example, with a minimum differential voltage of 1.2 V on the bus system (compare, for example, common CAN specifications), a voltage change of 0.6 V occurs at the midpoint voltage during communication in the event of a fault. If a Schottky diode with, for example, a voltage drop of 300 mV is preferably chosen as the peak rectifier 19, then a voltage of at least approximately 300 mV will be present at the measuring tap (or output) of the peak rectifier 19 and thus also at the input of the microcontroller 24. By using a slightly lower evaluation threshold (for example, 250 mV), the fault condition can be reliably detected. This evaluation can be carried out as in the exemplary embodiment according to Fig. This is indicated in microcontroller 24. Alternatively, an analog evaluation circuit could also be provided.
[0023] The extensive DC decoupling via capacitor 16 is particularly advantageous. For example, common-mode voltages from -2.0 V to 7.0 V are permissible on the CAN bus signals (see relevant CAN specifications). The limiting ranges below 0 V and above 5 V cannot typically be covered by a state-of-the-art design. In the circuit arrangement according to... Fig. However, all permissible voltage ranges are covered due to the DC voltage isolation.
[0024] When diode 18 is implemented as a Schottky diode, alternating voltages with amplitudes in the range of 300 mV can be detected. Capacitor 20 serves to appropriately dimension the filter for the output signals of the peak-value rectifier 19. Capacitors 16 and 20 can be selectively discharged via appropriately dimensioned resistors 13 and 14.
[0025] Resistors 11 and 12 do not necessarily have to represent a standard 2 x 60-ohm master bus termination. The detection method can also be used with terminations featuring higher resistances 11 and 12, or even without capacitor 15. In particular, a higher-impedance additional network consisting of resistors 11 and 12 could be connected to the two data lines 8 and 9, regardless of any existing termination resistors.
[0026] The described device and method can be used in particular in control units that act as the bus master. This could be the case, for example, in gateways or domain controllers. Its use in vehicle data systems for networking different control units is especially preferred.
Claims
[1] Device for detecting a fault on a data line (8,9) in a bus system which transmits data as a differential voltage signal via at least two data lines (8,9), comprising at least one resistance bridge (11,12) which is connected to the two data lines (8,9) for tapping a center voltage (Um), characterized by that at least one high-pass filter (17) is provided, to which the center voltage (Um) is supplied for further evaluation of a dynamic component of the center voltage (Um) for detecting an error, and that a diode (18) is arranged at the output of the high-pass filter (17), wherein a capacitor (20) and a resistor (14) arranged in parallel with the capacitor (20) are connected to ground at the output of the diode (18). [2] Device according to one of the preceding claims, characterized by that at least one peak value rectifier (19) is provided, to which the output signal of the high pass filter (17) is fed. [3] Device according to one of the preceding claims, characterized by that at least one filter (21) is provided to which the output signal of the peak value rectifier (19) is fed. [4] Device according to one of the preceding claims, characterized by that at least one microcontroller (24) is provided, which is supplied with the output signal of the filter (21) and / or the peak value rectifier (19) and / or the high-pass filter (17) for detecting an error. [5] Device according to one of the preceding claims, characterized by that the high-pass filter (17) comprises at least one capacitor (16) and / or the peak value rectifier (19) comprises at least one diode (18), preferably a Schottky diode. [6] Method for detecting a fault on a data line (8, 9) in a bus system which transmits data as a differential voltage signal via at least two data lines (8, 9), comprising at least one resistance bridge (11, 12) which is connected to the two data lines (8, 9) for tapping a center voltage (Um), characterized by that a dynamic component of the mean voltage (Um) of a diode (18) obtained via a high-pass filter (17), wherein a capacitor (20) and a resistor (14) arranged in parallel with the capacitor (20) are connected to ground at the output of the diode (18), is supplied and is used for further evaluation to detect an error. [7] Method according to claim 6, characterized by that the dynamic component of the center voltage (Um) is rectified by a peak value rectifier (19) for further evaluation. [8] Method according to claim 7, characterized bythat the rectified signal of the dynamic component of the center voltage (Um) is fed to a filter (21) for detecting an error and is compared with a limit value. [9] Method according to one of the preceding claims 6 to 8, characterized by that at least one microcontroller (24) is provided, to which the output signal of the filter (21) and / or the peak value rectifier (19) and / or the high-pass filter (17) is supplied for the detection of an error. [10] Method according to one of the preceding claims 6 to 9, characterized by that when an error is detected, a display is activated and / or an error signal is stored and / or countermeasures are initiated, particularly in a motor vehicle, such as activating an emergency mode.
Citation Information
Patent Citations
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