COEXISTENCE OF FULL-FRAME AND PARTIAL-FRAME INACTIVITY IMAGE UPDATES

Abstract

Disclosed herein are techniques for coordinating power management between a platform and a panel. Devices, techniques, and circuits are provided for determining whether to initiate power management functions at a panel and for sending a signal from a platform to the panel containing an indication that no frame updates are expected and power management functions may be initiated.

Description

TECHNICAL FIELD

[0001] Embodiments described herein relate generally to refreshing display panels, and more particularly to refreshing images displayed on panels with partial and full frame updates. BACKGROUND

[0002] Display panels contain a memory that stores the color to be displayed for each pixel. Pixel memory retention times are on the order of tenths to hundredths of a millisecond. However, an image can remain on the screen for viewing for an extended viewing period on the order of tens or hundreds of seconds, if not minutes. Accordingly, the pixel memory is periodically refreshed at a so-called refresh rate.

[0003] Modern display panels typically include frame buffers integrated into the display panel, providing memory retention to allow the panel to "self-refresh." Self-refresh techniques provide a significant improvement in the energy efficiency of display devices.

[0004] US 2015 / 0 279 334 A1 describes a device comprising a connection component and a display component. The connection component is operable to receive media content via data frames over a display connection, wherein the data frames are received periodically in sequence at a first rate corresponding to a native frame rate of the media content. The display component is operable to display the data frames sequentially at a second rate corresponding to a native refresh rate of the display component, wherein the display component is operable to redisplay previously displayed data frames to maintain the second rate when no new data frames have been received over the display connection.

[0005] US 2007 / 0 109 292 A1 describes an apparatus and method for power management of a display system. A display controller is connected to a memory device. A frame buffer in the memory device is filled with frames of information for display on a display device. The frames of information are transferred to a display buffer in the display controller. The display controller transfers the frames of information from the display buffer to the display device. When no frame information is being transferred to the display controller, the display controller and the memory device can separately enter a power-saving state. In the power-saving state, the display controller can continue to transfer frame information to the display device; however, the power supply and clock signal for the display controller components may be restricted.When the display buffer is almost empty, the display controller exits the power saving state to fill the display buffer.

[0006] US 2011 / 0 063 333 A1 describes an energy-saving method for a sequential color image display, in which, to further reduce the power consumption of the sequential color image display, a frame rate or a field rate is reduced according to conditions, including whether a received image is dynamic or static and whether a backlight mode is activated, to reduce power consumption. Furthermore, images can be selectively output as color images or grayscale images to reduce the amount of processed data and the associated data transfer.

[0007] DE 10 2014 117 564 A1 describes methods and devices associated with adaptive partial screen refresh with dynamic backlight control capability. In one embodiment, logic causes the retrieval of a full frame of content displayed on a display device based at least in part on the extent of the partial screen change to be performed.

[0008] DE 10 2009 058 274 A1 describes techniques related to hybrid graphics display power management. In one embodiment, data corresponding to one or more image frames of a video stream is stored in a local framebuffer. A display device (e.g., an LCD) can then be controlled based on the data stored in the local framebuffer or a video stream of a graphics controller. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows an embodiment of a display system. Fig. Figure 2 shows a first framework update plan. Fig. Figure 3 shows a second framework update plan. Fig. 4 shows a technique. Fig. 5 shows a logic flow. Fig. 6 shows an embodiment of a storage medium. Fig. 7 shows an embodiment of a device. SUMMARY OF THE INVENTION

[0009] The object underlying the invention is to improve energy efficiency when refreshing display panel contents without relying on the control of image source circuits. This object is achieved by the subject matter of the independent claims. Further advantageous embodiments are specified in the subclaims. DETAILED DESCRIPTION

[0010] The present disclosure generally relates to the optimization of display device self-refresh modes based on full-frame inactivity images, new full-frame updates, and partial frame updates. Self-refresh techniques can provide power savings, particularly when dealing with full-frame inactivity images. However, display image updates are not always full images, and often the image update intervals are not synchronized with frame update intervals. For example, a user's interaction with a display system is random and not frequently synchronized with frame update intervals. Accordingly, display panels are required to continuously monitor for image updates (both full and partial), which can erode the power reduction benefits of these self-refresh techniques.

[0011] Systems, display panels, and source circuits, and techniques are provided herein for providing notification to display modules of transitions between full-frame inactivity images, new full-frame updates, and partial frame updates. This disclosure offers advantages over prior techniques in that performance optimizations (e.g., power management of unused display electronics and / or circuitry, reducing the refresh rate in the display module, etc.) can be implemented without relying on control of image source circuits. This provides a latent advantage in that suppliers can independently test features (e.g., changes in refresh rate, etc.) and therefore make product line decisions without being tightly coupled to the image source circuit suppliers.

[0012] Various embodiments may include one or more elements. An element may include any structure arranged to perform particular operations. Each element may be implemented in hardware, software, or any combination thereof, as desired for a given set of design parameters or performance constraints. Although an embodiment may be described with a limited number of elements in a particular topology by way of example, the embodiment may include more or fewer elements in alternative topologies, as desired for a given implementation. It should be understood that reference to "an embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment.The occurrences of the phrases "in one embodiment," "in some embodiments," or "in various embodiments" in various places in the specification do not necessarily all refer to the same embodiment.

[0013] Fig. 1 shows a display system 100 arranged according to at least one embodiment of the disclosure. As illustrated, the display system 100 includes a platform 10 and a panel 18 coupled by a display interface 16. In general, the platform 10 may comprise any platform arranged to generate images to be displayed by the panel 18. For example, the platform 10 could be integrated with, be a part of, or include a laptop computer, a desktop computer, an ultrabook, a cellular phone, or any processor-based device. In general, the panel 18 may be integrated with, be a part of, or include any of a variety of displays, such as light-emitting diode (LED) displays, organic LED (OLED) displays, liquid crystal (LCD) displays, or the like.The display interface 16 may be any of a variety of display interfaces such as a display port interface, an embedded display port interface, a high definition multimedia interface (HDMI), or the like.

[0014] The platform 10 may include a processing unit 12, which may be a conventional processor, a graphics processing unit (GPU), or a combination of a conventional processor and a GPU. The platform 10 further includes a transmitter 14. The processor 12 and the transmitter 14 may form a display engine. The platform 10 may be provided as a system-on-chip (SoC), such as may be integrated into a display system device (e.g., mobile phone, laptop, portable media device, etc.). Generally, the platform 10 sends images for display by the panel 10 via the display interface 16. For example, the platform 10 may send information items including indications of pixel data (e.g., color, locations, etc.) generated by the GPU 12 to the panel 18 via the transmitter 14 and the display interface 16.Such information elements (or "frames") are often sent at intervals corresponding to a frame rate of Table 18. This is described in more detail below.

[0015] The panel 18 may include a receiver 20, panel registers 22, panel buffer 24, a timer 26, a display controller 28, and display electronics 30. Generally, the panel 18 may receive frames (e.g., from the platform) at the receiver 20 via the display interface 16. The receiver 20 may provide the frames to the display controller 28, which in turn provides the frames for display to the display electronics 28. The receiver 20 and / or the display electronics may have access to the panel registers 22, which may store information about settings for the panel 18 (e.g., refresh rate, etc.).The timer 24 may be coupled to the receiver 20 and / or the display controller 28 and may operate to provide an expiration of a frame refresh interval or an expiration of a period of time at which the link of the display interface 16 is turned off to conserve power, for example, when the panel 18 is operating in a self-refresh mode, sometimes referred to as panel self-refresh (PSR).

[0016] The panel buffer 24 provides storage for frames received via the display interface 16. The display controller 28 may operate to disable portions of the panel (e.g., the receiver or the like) during PSR periods and may refresh the display electronics from information from the frame stored in the panel buffers 24.

[0017] During operation, the transmitter 14 and the receiver 20 may be arranged to coordinate the PSR and / or the shutdown of the display interface 16. As contemplated herein, such coordination may include coordinating frame updates between the source (e.g., platform 10) and the receiver (e.g., panel 18).

[0018] Fig. 2 shows an exemplary frame update schedule 200. As shown, the frame update schedule 200 illustrates continuous updates between the platform 10 and the panel 18. It can be seen that vertical blanking (VB) gaps 210 are disposed between each frame. VB gaps 210 indicate an end of the last line of one frame and the beginning of the first line of the next frame. The frame update schedule 200 also includes frames 220. Note that eight (8) frames are shown in this figure for clarity, namely frames 220-1, 220-2, 220-3, 220-4, 220-5, 220-6, 220-7, and 220-8. However, the schedule 200 could include any number of frames 220. It should also be noted that frames 220-2 and 220-6 are identical. In particular, this indicates that a frame with the same marking (e.g."Frame N+1") indicates that the frames are identical in terms of pixel content, even though the timestamps may be different. Furthermore, if a frame is marked with an apostrophe at the end (e.g., "Subframe N"), only a portion of the frame content has changed, and it is appropriate to use a partial update mechanism to update the frame.

[0019] The frame update plan 200 shows typical streaming of frames from a source (e.g., platform 10) to a consumer (e.g., panel 18) without panel self-refresh. Fig. 3 shows an example of the frame update schedule 300 arranged according to some examples of the present disclosure. The schedule 300 shows an example in which the source (e.g., platform 10) and the consumer (e.g., panel 18) coordinate the handling of full-frame updates, partial-frame updates, and no-frame updates to provide optimizations for PSR, as set forth herein. Such optimizations may facilitate the panel entering a deeper sleep or low-power state than conventional systems, and the update schedule is coordinated between the source (e.g., platform 10) and the consumer (e.g., panel 18).

[0020] The schedule 300, like the schedule 200, includes VB gaps 210 arranged between the frames 220. However, as shown, the schedule 300 includes a PSR interval 330 and a retraining interval 340. In general, the schedule 300 may provide a full frame update for the frame 220-2. The slate 18 may store frame N+1 for the PSR interval. For example, the slate buffers 24 may store frame N+1, which the display controller 28 may use to refresh the display electronics 30 during the PSR interval 330. The schedule 300 also includes a partial PSR interval PSR 330'. PSR 330' could correspond to a selective update process, for example, to update the partial frame N'.

[0021] The board 18 may be arranged to resynchronize with the platform 10 during retraining intervals 340. In other words, the receiver 20 and / or the display controller 28 may be turned on and remain in full-frame update mode for a selected number of frames (e.g., as specified in the board registers 22 or the like) before resuming power management functions such as PSR 330 or PSR_2330'. Furthermore, the receiver and / or the display controller 28 may be arranged to turn off for a selected number of frames (e.g., as specified in the board registers 22 or the like) during PSR 300 or PSR_2330'.

[0022] Fig. 4 shows an exemplary technique 400 for coordinating updates between source and receiver devices in display systems, such as platform 10 and panel 18. Technique 400 is shown in conjunction with diagrams 200 and 300 to illustrate update coordination for full-frame and sub-frame updates, as well as to coordinate link shutdown. As shown in this figure, technique 400 may include platform 10 initiating a selective update protocol with panel 18 to cause panel 18 to partially refresh a displayed image using sub-frame N'. For example, platform 10 could implement a selective update in block 410 in accordance with the Embedded Display Port (eDP) v. 1.4 standard, published in February 2015 and promulgated by the Video Electronics Standards Association (VESA).

[0023] Platform 10 may provide a regular or single frame update at block 420. Platform 10 may then request or initiate a PSR at block 430. Specifically, at block 430, the platform may indicate to the panel that stable frame data is expected. In response, panel 18 may enter PSR at block 440. For example, panel 18 may disable link 16 and / or other electronics in the panel, such as receiver 20. It is important to note that PSR is enabled in response to the platform indicating that stable frame data is expected. This differs from conventional systems in which the panel determines that stable frames have been received and enters PSR.

[0024] In block 450, the page 18 may exit the PSR and retrain the link 16. In some examples, the page 18 may remain in the PSR for a selected number of frames (e.g., 2 frames in this example). After exiting the PSR, the page 18 may be required to remain in full-frame or regular update mode for a selected number of frames. This number of frames may be specified, for example, in page registers or the like.

[0025] In general, platform 10 may indicate to panel 18 that no frame updates (full, partial, etc.) are expected using any of a variety of techniques. In response, panel 18 may enter PSR and apply power management functions (e.g., clock gating components within panel 18, applying selective frame rate reduction, etc.).

[0026] In some examples, platform 10 may indicate to panel 18 via a sideband interconnect or sideband interface that no frame updates are expected. For example, in many applications, link 16 may include sideband techniques that couple platform 10 and panel 18. Platform 10 could send an indication (e.g., a control signal, an information element, or the like) over this sideband channel. As a specific example, platform 10 may indicate to the panel via a level-sensitive or edge-sensitive sideband channel in link 16 that no frame updates are expected.

[0027] In some examples, platform 10 may indicate to panel 18 that no frame updates are expected via an existing configuration channel in link 16. For example, display port links include an AUX channel that platform 10 could use to indicate to panel 18 (e.g., via a control signal, via an information element, or the like) that no frame updates are expected.

[0028] In some examples, platform 10 may indicate to panel 18 that no frame updates are expected by marking a packet sent between platform 10 and panel 18 over link 16. For example, platform 10 may append a selected character or symbol to a packet at each frame boundary to indicate to panel 18 whether future frame updates are expected. In response, panel 18 may determine whether to enter the PSR, as discussed herein. As a specific example, platform 10 may employ the secondary data packet mechanism provided by the Embedded Display Port (eDP) v. 1.4 standard, published in February 2015 and promulgated by the Video Electronics Standards Association (VESA), to indicate to the panel that no frame updates are expected.

[0029] Fig. 5 shows a logic flow 500 for classifying a frame and indicating to a panel that no frame updates are expected. The logic flow 500 may be implemented by a platform coupled to a panel, such as platform 10 coupled to panel 18. The logic flow 500 may begin at block 510. At block 510, "Indicate a Full Frame Update," a full frame update may be indicated. For example, platform 10 may send a full frame update to panel 18. Continuing with decision block 515, "New Content," the platform may determine whether the following frame(s) contain new content. For example, platform 10 may determine whether the next frame is a partial frame update, a full frame update, or not a frame update. From decision block 515, the logic flow 500 may proceed to either block 520 or decision block 525.For example, logic flow 500 may proceed from decision block 515 to block 520 based on a determination that the next frame contains new content. Conversely, logic flow 500 may proceed from decision block 515 to decision block 525 based on a determination that the next frame does not contain new content.

[0030] In block 520, "Display a full or partial frame update," a full or partial frame update may be displayed. For example, platform 10 may display a full frame update to panel 18 if the new content includes a completely new frame. Similarly, platform 10 may display a partial frame update to panel 18 if the new content includes partial frame updates. In decision block 525, "Idle duration threshold reached?", platform 10 may determine whether an inactivity duration threshold has been reached. In other words, platform 10 may determine whether no new content has been received (e.g., based on decision block 515) in a selected time period (e.g., 1 frame, 2 frames, 3 frames, 4 frames, etc.).

[0031] From block 520, logic flow 500 may proceed to decision block 535. In decision block 535, "Sync Maintenance Threshold Satisfied?", platform 10 may determine whether a sync maintenance threshold has been met. For example, in some implementations (such as in the Fig. 3-4), it may be necessary for the platform 10 to update the panel 18 with a selected number of frames (e.g., 2 frames, 3 frames, 4 frames, or the like) to establish and / or maintain synchronization between the platform 10 and the panel 18.

[0032] From decision block 535, logic flow 500 may return to either block 510 or decision block 515. For example, logic flow 500 may continue from decision block 535 to block 510 based on a determination that the sync maintenance threshold has not been met. Conversely, logic flow 500 may continue from decision block 535 to decision block 515 based on a determination that the sync maintenance threshold has been met.

[0033] From decision block 525, logic flow 500 may either return to decision block 515 or continue to block 530. For example, logic flow 500 may continue from decision block 525 to block 530 based on a determination that the inactivity duration threshold has been met. Conversely, logic flow 500 may continue from decision block 525 to decision block 515 based on a determination that the inactivity duration threshold has not been met.

[0034] In block 530, "Indicate no new or subframe updates," platform 10 may indicate that no new or subframe updates are expected. For example, platform 10 may send an indication to panel 18 (e.g., via a sideband channel, via an out-of-band channel, via an in-band channel, via appending a character to a frame, or the like) that no new frame updates are expected.

[0035] Continuing with block 540, "Wait for new content or inactive link threshold expiration," platform 10 may wait for new content or the expiration of an inactive link threshold. For example, in block 540, platform 10 may determine that new content (e.g., full-frame or partial-frame update) has been received. Additionally, in block 540, platform 10 may determine that an inactive link threshold duration has expired. For example, in some embodiments, platform 10 and panel 18 may be arranged to coordinate an inactive link duration (e.g., 2 frames, 3 frames, 4 frames, or the like) in which platform 10, after sending an indication that no frame updates are expected, sends a new update upon expiration of this known inactive link threshold.In this case, coordination can be achieved between the platform 10 and the board 18 regarding when updates are sent after PSR has been initiated. This inactive link threshold can be programmed during initialization, for example, in the board registers 22 or the like.

[0036] Continuing from block 540 to block 550, "Send a full frame to the panel," platform 10 may send a full frame update to panel 18. Continuing to decision block 555, "Resync timing duration reached?", platform 10 may determine whether a timing resynchronization duration has been reached. For example, in some implementations, platform 10 and panel 18 may exchange a set number of full frames to resynchronize the timing between controllers. In decision block 555, platform 10 may determine whether this duration has been reached. From decision block 555, logic flow 500 may return to either block 550 or block 510. For example, logic flow 500 may continue from decision block 555 to block 510 based on a determination that the timing resynchronization duration has been reached.Conversely, logic flow 500 may proceed from decision block 555 to block 550 based on a determination that the clock resync duration has not been reached.

[0037] Fig. 6 shows one embodiment of a storage medium 2000. The storage medium 2000 may comprise an article of manufacture. In some embodiments, the storage medium 2000 may include any tangible computer-readable medium or machine-readable medium, such as optical, magnetic, or semiconductor storage. The storage medium 2000 may store various types of computer-executable instructions, e.g., 2002. For example, the storage medium 2000 may store various types of computer-executable instructions for implementing the technique 400. In some examples, the storage medium 2000 may store various types of computer-executable instructions for implementing the logic flow 500.

[0038] Examples of a computer-readable or machine-readable storage medium may include any tangible media capable of storing electronic data, including volatile memory or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writable or rewritable memory, and so on. Examples of computer-executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and the like. The examples are not limited in this context.

[0039] Fig.12 shows a diagram of an exemplary system embodiment, and in particular shows a platform 3000 that may include various elements. For example, this figure shows that the platform (system) 3000 may include a processor / graphics core 3002, a chipset 3004, an input / output (I / O) device 3006, random access memory (RAM) (such as dynamic random access memory (DRAM)) 3008 and read-only memory (ROM) 3010, a board 3020 (e.g., board 18 or the like), and various other platform components 3014 (e.g., a fan, a cross-flow fan, a heat sink, a DTM system, a cooling system, a chassis, vents, and so on). The system 3000 may also include a wireless communication chip 3016 and a graphics device 3018. However, the embodiments are not limited to these elements.

[0040] As shown, I / O device 3006, RAM 3008, and ROM 3010 are coupled to processor 3002 via chipset 3004. Chipset 3004 may be coupled to processor 3002 by a bus 3012. Accordingly, bus 3012 may include multiple lines.

[0041] Processor 3002 may be a central processing unit including one or more processor cores, and may include any number of processors with any number of processor cores. Processor 3002 may include any type of processing unit, such as a CPU, a multiprocessing unit, a reduced instruction set computer (RISC), a pipelined processor, a complex instruction set computer (CISC), a digital signal processor (DSP), and so on. In some embodiments, processor 3002 may consist of multiple separate processors arranged on separate integrated circuit chips. In some embodiments, processor 3002 may be a processor with integrated graphics, while in other embodiments, processor 3002 may be a graphics core or cores.

[0042] Some embodiments may be described using the phrase "an embodiment," along with its derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The occurrences of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment. Further, some embodiments may be described using the phrase "coupled" or "connected," along with their derivatives. These terms are not necessarily intended to be synonymous with one another.For example, some embodiments may be described using the terms "connected" and / or "coupled" to indicate that two or more elements are in direct physical or electrical contact with each other. However, the term "coupled" may also mean that two or more elements are not in direct contact with each other, but still cooperate or interact with each other. Furthermore, aspects or elements from different embodiments may be combined.

[0043] It is emphasized that the "Summary of the Disclosure" is provided to allow a reader to quickly determine the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Furthermore, it will be apparent from the foregoing "Detailed Description" that various features are grouped into a single embodiment for the purpose of streamlining the disclosure. This method of disclosure should not be interpreted to reflect an intent that the claimed embodiments require more features than are expressly recited in the individual claims. Rather, inventive subject matter lies in fewer than all of the features of a single disclosed embodiment, as reflected in the following claims.Accordingly, the following claims are hereby incorporated into the "Detailed Description," with each claim standing on its own as a separate embodiment. In the appended claims, the terms "including" and "in which" are used as the plain English equivalents of the respective terms "comprising" and "wherein," respectively. Furthermore, the terms "first," "second," "third," and so forth are used merely as labels and are not intended to impose numerical requirements on their objects.

Claims

[1] Display panel (18) comprising: a receiver (20) for: Receiving, from a transmitter (14) and after a first frame boundary, a first packet comprising a symbol indicating that no frame update is expected; and Receiving, from the transmitter (14) and after a second frame boundary, a second packet comprising a symbol indicating that no frame update is expected, where the second frame boundary is the next frame boundary after the first frame boundary; and a display controller (28) for initiating one or more power management functions based on a value of the symbol in the first packet. [2] The display panel (18) of claim 1, wherein initiating the one or more power management functions comprises gating a clock signal for one or more components of the display panel (18). [3] The display panel (18) of claim 1 or 2, wherein the receiver (20) is configured to receive the first packet and the second packet via a link with the transmitter (14), wherein the link with the transmitter is shut down based on the value of the symbol in the first packet. [4] The display panel (18) of any one of claims 1 to 3, further comprising a timer (26), the timer (26) being configured to use a timing of the second packet to synchronize with the transmitter (14). [5] The display panel (18) of any one of claims 1 to 4, wherein the receiver (20) is configured to receive the first packet and the second packet in an in-band channel. [6] System (100) comprising: the display panel (18) according to one of claims 1 to 5; and the transmitter (14), wherein the transmitter (14) is designed to: Transmitting the first packet to the display panel (18); and Transmit the second packet to the display panel (18). [7] The system (100) of claim 6, wherein the transmitter is configured to transmit the first packet and the second packet in an in-band channel. [8] The system (100) of claim 6 or 7, wherein the transmitter is configured to transmit the first packet over a link to the display panel (18), the link being shut down after the transmitter (14) transmits the first packet over the link. [9] System (100) according to one of claims 6 to 8, wherein the system (100) is a mobile phone. [10] Procedure comprising: transmitting, after a first frame boundary, a first packet to a display field (18), the first packet comprising a symbol indicating that no frame update is expected; Transmitting, after a second frame boundary, a second packet to the display panel (18), the second packet comprising a symbol indicating that no frame update is expected, the second frame boundary being the next frame boundary after the first frame boundary; and Initiating, by the display panel (18), one or more power management functions based on a value of the symbol in the first packet. [11] The method of claim 10, wherein initiating the one or more power management functions comprises gating a clock signal for one or more components of the display panel (18). [12] The method of claim 10 or 11, wherein transmitting the first packet comprises transmitting the first packet over a link, further comprising shutting down the link after transmitting the first packet over the link. [13] The method of any one of claims 10 to 12, wherein transmitting the first packet comprises transmitting the first packet in an in-band channel. [14] The method of any one of claims 10 to 13, further comprising using a timing of the second packet to synchronize a timer (26) of the display panel (18) with a transmitter (14) that transmitted the first packet.

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