ORGANIC LED INDICATOR

Abstract

Organic light-emitting diode display, comprising: a first substrate (SUB1) on which a plurality of pixels are arranged, each of which has an organic light-emitting diode (OLE); a second substrate (SUB2) with a supply line (EVL) configured to be supplied with a supply voltage and facing the first substrate (SUB1); and a conductive filler layer (CFL) that is arranged between the first substrate (SUB1) and the second substrate (SUB2) and contains a conductive medium, where the first substrate (SUB1) has: an auxiliary electrode (AE); a first barrier (BR1) located on the auxiliary electrode (AE); a cathode (CAT) contained within the organic light-emitting diode (OLE) and divided by the first barrier (BR1), wherein the cathode (CAT) exposes part of the auxiliary electrode (AE) and one end of the cathode (CAT) directly contacts the auxiliary electrode (AE); and a protective layer (PAS2) arranged on the cathode (CAT) and divided by the first barrier (BR1), wherein the protective layer (PAS2) exposes part of the auxiliary electrode (AE), wherein the conductive filler layer (CFL) fills an area between the first barrier (BR1) and the protective layer (PAS2), wherein the cathode (CAT) is electrically connected to the supply line (EVL) through the conductive filler layer (CFL) and the exposed part of the auxiliary electrode (AE).

Description

BACKGROUND OF THE INVENTION Area of ​​the invention

[0001] The present disclosure relates to an organic light-emitting diode display. Discussion of the related technology

[0002] Various display devices have replaced heavier and larger cathode ray tubes (CRTs). Examples of display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), and organic light-emitting diode (OLED) displays.

[0003] More precisely, an OLED display is a self-emissive display designed to emit light by exciting an organic compound. Unlike liquid crystal displays, OLED displays do not require a backlight unit, thus offering advantages such as a thin profile, light weight, and a simpler manufacturing process. OLED displays can also be manufactured at low temperatures and feature a fast response time of 1 ms or less, low power consumption, a wide viewing angle, and high contrast. Therefore, OLED displays have become widely used.

[0004] The OLED display uses organic light-emitting diodes (OLEDs) that convert electrical energy into light energy. The OLED has an anode, a cathode, and an organic emission layer between the anode and the cathode. The OLED display is designed so that the OLED emits light, while excitons, formed by the combination of holes from the anode and electrons from the cathode within the emission layer, fall from an excited state to a ground state, thus displaying an image.

[0005] A large-area OLED display cannot maintain a uniform luminance across the entire surface of an active area displaying an input image, and will therefore exhibit luminance variation (or deviation) depending on position. Specifically, the cathode forming the organic light-emitting diode is designed to cover most of the active area, and a problem arises because a supply voltage applied to the cathode does not have a constant voltage value across the entire active area. For example, if the difference between a voltage value at an input of the cathode supplied with the input and a voltage value at a position far from the input increases due to cathode resistance, the luminance variation will increase with position.

[0006] The problem is more pronounced in a top-emitter type display device. Because the top-emitter type requires a cathode located on the top layer of an organic light-emitting diode (OLED) to ensure conductivity, the cathode is made of a transparent conductive material, such as indium tin oxide (ITO), or of an opaque conductive material with a very thin profile. Since the surface resistance of the cathode increases in this case, luminance variation with position increases significantly in proportion to the increase in surface resistance.

[0007] To solve this problem, a method was proposed to prevent a voltage drop depending on position by forming a low-potential supply voltage line with a low-resistance material and connecting the low-potential supply voltage line to a cathode. Since, according to the related technique, the low-potential supply voltage line in the proposed method is formed on a lower substrate containing transistors, a pixel must, in addition to a thin-film transistor area and a storage capacitor area, also have a connection between the low-potential supply voltage line and the cathode. Therefore, it was difficult to apply the related technique to a high-resolution display with small pixel units.

[0008] EP 3 179 302 A1 describes a reflective display device comprising a first and a second substrate, which are opposite each other and which each have an emitting display area and a reflective area, a display element provided in the display area and comprising an organic light-emitting layer, and a reflective control element provided in the reflective area and comprising, among other things, an electrochromic layer and an electrolyte, wherein the reflective control element is controlled by means of a control element, for example a thin-film transistor, in such a way as to control the reflection of externally incident light.

[0009] US 2016 / 0043343A1 describes an OLED display device comprising a matrix substrate and a packed substrate, wherein the matrix substrate comprises a first base substrate, an anode layer, a cathode layer, and an electroluminescent layer arranged between the anode layer and the cathode layer, the anode layer or the cathode layer being arranged as the top layer of the matrix substrate, and wherein the packed substrate comprises a second base substrate and a graphene layer, the graphene layer being arranged as a top layer of the packed substrate, a conductive filler material being provided between the matrix substrate and the packed substrate, and the graphene layer being electrically connected via the conductive filler material to the anode layer or the cathode layer being arranged as the top layer of the matrix substrate. SUMMARY OF THE INVENTION

[0010] The present disclosure provides an organic light-emitting diode (OLED) display capable of achieving a uniform luminance by minimizing fluctuations in a low-potential supply voltage as a function of position. Various embodiments of the present disclosure provide an organic light-emitting diode display according to claim 1. Further embodiments are described in the dependent claims.

[0011] An organic light-emitting diode display is provided according to the main claim. Advantageous further developments are described in the dependent claims.

[0012] In one aspect, an organic light-emitting diode display is provided, comprising a first substrate on which pixels, each containing an organic light-emitting diode, are arranged; a second substrate with a supply line that is supplied with a supply voltage, the second substrate facing the first substrate;and a conductive filler layer arranged between the first substrate and the second substrate, the conductive filler layer comprising a conductive medium, the first substrate comprising an auxiliary electrode, a first barrier arranged on the auxiliary electrode, a cathode contained in the organic light-emitting diode and divided by the first barrier, the cathode exposing at least a part of the auxiliary electrode and one end of the cathode directly contacting the auxiliary electrode, and a protective layer arranged on the cathode and divided by the first barrier, the protective layer exposing at least a part of the auxiliary electrode, the conductive filler layer filling a region between the first barrier and the protective layer, the cathode being electrically connected to the supply line through the conductive filler layer and the exposed part of the auxiliary electrode.

[0013] In one or more embodiments, the organic light-emitting diode display further comprises a sealant arranged at an edge of the first substrate and an edge of the second substrate, wherein the conductive filler layer is arranged within the sealant, wherein a supply electrode is arranged on the first substrate and within the sealant, and a second barrier is arranged on the supply electrode. The cathode is divided by the second barrier and exposes at least a portion of the supply electrode. The protective layer is divided by the second barrier and exposes at least a portion of the supply electrode. The supply electrode is electrically connected to the supply line via the conductive filler layer.

[0014] In one or more embodiments, one end of the cathode directly contacts the supply electrode.

[0015] In one or more embodiments, the organic light-emitting diode display further comprises a connecting element located outside the sealing medium and connected to the first substrate. The first substrate further comprises a supply contact pad connected to the connecting element, which is supplied with the supply voltage via the connecting element and transmits the supply voltage to the supply electrode.

[0016] In one or more embodiments, both the first substrate and the second substrate have an emission region towards which light is emitted by the organic light-emitting diode, and a non-emission region outside the emission region. The supply line is located in the non-emission region.

[0017] In one or more embodiments, the second substrate further comprises an auxiliary supply line, one surface of which directly contacts the supply line, and another surface, opposite the first surface, directly contacts the conductive filler layer. The auxiliary supply line has a larger area than the supply line and comprises a transparent conductive material.

[0018] In one or more embodiments, the first barrier comprises a first structure arranged on a second structure. An edge of the first structure projects outwards from an edge of the second structure by a predetermined distance.

[0019] In one or more embodiments, the first barrier has a shape in which an edge of an upper side projects outwards from an edge of a lower side by a predetermined distance.

[0020] In one or more embodiments, the second substrate further comprises color filters, each assigned to a pixel. The color filters are separated by the supply line.

[0021] In one or more embodiments, the first substrate further comprises color filters, each assigned to a pixel. The color filters are arranged on the cathode or on the protective layer.

[0022] In one or more embodiments, the supply line has a material with low resistance.

[0023] In one or more embodiments, the organic light-emitting diode display further comprises an organic light-emitting layer contained within the organic light-emitting diode and divided by the first barrier, wherein the organic light-emitting layer exposes at least a portion of the auxiliary electrode. On the auxiliary electrode, the cathode extends beyond the organic light-emitting layer.

[0024] In one or more embodiments, part of the cathode and part of the protective layer are stacked successively on the first barrier.

[0025] In one or more embodiments, the conductive filler layer comprises at least one poly(3,4-ethylenedioxythiophene) (PEDOT), which is a conductive polymer, and an ionic liquid. In one or more embodiments, the distance between the first substrate and the second substrate is selected depending on the viscosity of the conductive filler layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings, which may be included to provide a further understanding of the revelation and are part of this description, illustrate embodiments of the revelation and, together with the description, serve to explain various principles of the revelation. Fig. Figure 1 is a block diagram schematically showing an organic light-emitting diode (OLED) display according to one embodiment of the disclosure. Fig. Figure 2 schematically illustrates the configuration of a Fig. 1 pixel shown. Fig. Figure 3 is a cross-sectional view of an OLED display according to a first embodiment of the disclosure. Fig. 4 is an enlarged view of one in Fig. 3 shown area AR1. Fig. 5 is an enlarged view of one in Fig. 3 shown area AR2. Fig. Figure 6 are cross-sectional views that schematically show a form of a barrier with first and second barriers. Fig. Figure 7 is a cross-sectional view of an OLED display according to a second embodiment of the disclosure. Fig. Figure 8 is a cross-sectional view of an OLED display according to a third embodiment of the disclosure. DETAILED DESCRIPTION OF THE EXECUTION FORMS

[0027] Reference is now made in detail to embodiments of the disclosure, examples of which are shown in the accompanying drawings. Wherever possible, the same reference numerals are used in all drawings to refer to the same or similar parts. Detailed descriptions of known techniques are omitted if they could mislead the embodiments of the disclosure. When describing different embodiments, the same components may be described in a first embodiment, and a description of them may be omitted in other embodiments.

[0028] The terms "first," "second," etc., can be used to describe different components, but the components are not limited by such terms. The terms merely serve to distinguish one component from another.

[0029] Fig. Figure 1 is a block diagram schematically showing an organic light-emitting diode (OLED) display according to one embodiment of the disclosure. Fig. Figure 2 schematically illustrates the configuration of a Fig. 1 pixel shown.

[0030] Referring to Fig. 1 comprises an OLED display 10 according to an embodiment of the disclosure, a display driver circuit and a display panel DIS.

[0031] The display driver circuit comprises a data driver circuit 12, a gate driver circuit 14, and a timing control device 16. The display driver circuit applies a video data voltage of an input image to pixels of the display panel DIS. The data driver circuit 12 converts digital RGB video data received by the timing control device 16 into an analog gamma compensation voltage and generates a data voltage. The data voltage output by the data driver circuit 12 is supplied to data lines D1 to Dm, where m is a positive integer. The gate driver circuit 14 sequentially supplies a gate signal synchronized with the data voltage to gate lines G1 to Gn and selects pixels of the display panel DIS to which the data voltage is applied, where n is a positive integer.

[0032] The timing control device 16 receives timing signals, such as a vertical sync signal Vsync, a horizontal sync signal Hsync, a data release signal DE, and a master clock MCLK, from a host system 19 and synchronizes the operating timing of the data driver circuit 12 with the operating timing of the gate driver circuit 14. A data timing control signal for controlling the data driver circuit 12 includes a source sample clock SSC, a source output release signal SOE, and the like. A gate timing control signal for controlling the gate driver circuit 14 includes a gate start pulse GSP, a gate shift clock GSC, a gate output release signal GOE, and the like.

[0033] The host system 19 can be a television system, set-top box, navigation system, DVD player, Blu-ray player, personal computer (PC), home theater system, telephone system, or other system that has or operates a display. The host system 19 includes a system-on-a-chip (SoC) with an embedded scaler that converts the RGB digital video data of the input image into a format suitable for displaying the input image on the display panel DIS. The host system 19 transmits the RGB digital video data of the input image and the clock signals Vsync, Hsync, DE, and MCLK to the timing control device 16.

[0034] The DIS display panel features a pixel array. The pixel array comprises pixels defined by data lines D1 to Dm and gate lines G1 to Gn. Each pixel contains an organic light-emitting diode (OLED) that serves as a self-emitting element.

[0035] Referring to Fig. 2. The display panel DIS has a plurality of data lines D, a plurality of gate lines G that intersect the data lines D, and pixels arranged in a matrix at the intersection points of the data lines D and the gate lines G. Each pixel has an OLED, a driver thin-film transistor (TFT) DT for controlling the amount of current flowing through the OLED, and a programming unit SC for setting a gate-source voltage of the driver TFT DT.

[0036] The programming unit SC can include at least one switching TFT and at least one storage capacitor. The switching TFT is turned on in response to a gate signal from the gate line G, thereby applying a data voltage from the data line D to an electrode of the storage capacitor. The driver TFT DT controls the amount of current supplied to the OLED, depending on the magnitude of a voltage stored in the storage capacitor, thus controlling the amount of light emitted by the OLED. The amount of light emitted by the OLED is proportional to the amount of current supplied by the driver TFT DT. The pixel is connected to a high-potential supply voltage source and a low-potential supply voltage source and receives a high-potential supply voltage EVDD and a low-potential supply voltage EVSS from a current generator (not shown).The TFTs that form the pixel can be p-type or n-type TFTs. Furthermore, the semiconductor layers of the pixel-forming TFTs can be amorphous silicon, polycrystalline silicon, or oxide. In the following description, embodiments of the disclosure use, for example, an oxide-containing semiconductor layer. The OLED has an anode ANO, a cathode CAT, and an organic light-emitting layer between the anode ANO and the cathode CAT. The anode ANO is connected to the driver TFT DT. <Erste Ausführungsform>

[0037] Fig. Figure 3 is a cross-sectional view of an OLED display according to a first embodiment of the disclosure. Fig. 4 is an enlarged view of one in Fig. 3 shown area AR1.

[0038] Referring to Fig. Figure 3 comprises an OLED display according to a first embodiment of the disclosure, comprising a display panel with a first substrate SUB1 and a second substrate SUB2 facing each other, and a conductive filler layer CFL between the first substrate SUB1 and the second substrate SUB2. The first substrate SUB1 is a thin-film transistor array substrate on which a thin-film transistor T and an organic light-emitting diode OLE are arranged. The second substrate SUB2 is a substrate on which a low-potential supply voltage line (hereinafter referred to as the "EVSS line") EVL is arranged. The second substrate SUB2 can serve as an encapsulation substrate. The first substrate SUB1 and the second substrate SUB2 can be joined to each other using a sealant SL.The sealant SL is positioned at one edge of the first substrate SUB1 and one edge of the second substrate SUB2, maintaining a predetermined distance between the first substrate SUB1 and the second substrate SUB2. The conductive filler layer CFL can be positioned within the sealant SL.

[0039] The first substrate SUB1 can be made of glass or plastic material. For example, the first substrate SUB1 can consist of a plastic material such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polycarbonate (PC) and exhibit flexible properties.

[0040] The thin-film transistor T and the organic light-emitting diode OLE, which is connected to the thin-film transistor T, are formed on the first substrate SUB1. A light-shielding layer LS and a buffer layer BUF can be formed between the first substrate SUB1 and the thin-film transistor T. The light-shielding layer LS is arranged to overlap a semiconductor layer, in particular a channel of the thin-film transistor T, and can protect an oxide semiconductor element from external light. The buffer layer BUF can block ions or impurities diffusing from the first substrate SUB1 and also block the ingress of moisture from the outside.

[0041] The thin-film transistor T has a semiconductor layer ACT, a gate electrode GE, a source electrode SE and a drain electrode DE.

[0042] A gate insulating layer GI and the gate electrode GE are arranged on the semiconductor layer ACT. The gate insulating layer GI serves to insulate the gate electrode GE and can be made of silicon dioxide (SiOx). However, embodiments are not limited to this. The gate electrode GE is arranged to overlap the semiconductor layer ACT with the gate insulating layer GI positioned between them. The gate electrode GE can be formed as a single layer or a multiple layer using copper (Cu), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), tantalum (Ta), tungsten (W), or a combination thereof. The gate insulating layer GI and the gate electrode GE can be structured using the same mask. In this case, the gate insulating layer GI and the gate electrode GE can have the same area.Although not shown, the gate insulating layer GI can be designed to cover the entire surface of the first substrate SUB1.

[0043] An interlayer dielectric layer IN is arranged on the gate electrode GE. The interlayer dielectric layer IN serves to insulate the gate electrode GE from the source and drain electrodes SE and DE from each other. The interlayer dielectric layer IN can be formed from silicon oxide (SiOx), silicon nitride (SiNx), or a multiple layer thereof. However, embodiments are not limited to these materials.

[0044] The source electrode SE and the drain electrode DE are positioned on the interlayer dielectric layer IN. The source electrode SE and the drain electrode DE are spaced apart from each other by a predetermined distance. The source electrode SE contacts one side of the semiconductor layer ACT through a source contact hole that penetrates the interlayer dielectric layer IN. The drain electrode DE contacts the other side of the semiconductor layer ACT through a drain contact hole that also penetrates the interlayer dielectric layer IN.

[0045] Each of the source electrode (SE) and drain electrode (DE) can be configured as a single layer or as a multilayer. If both the source electrode (SE) and the drain electrode (DE) are configured as single layers, they can be made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof. If both the source electrode (SE) and the drain electrode (DE) are configured as multilayers, they can be configured as a double layer of Mo / Al-Nd, Mo / Al, Ti / Al, or Cu / MoTi, or as a triple layer of Mo / Al-Nd / Mo, Mo / Al / Mo, Ti / Al / Ti, or MoTi / Cu / MoTi.

[0046] A passivation layer PAS1 is arranged on the thin-film transistor T. The passivation layer PAS1 protects the thin-film transistor T and can be made of silicon oxide (SiOx), silicon nitride (SiNx), or a multiple layer thereof.

[0047] A planarization layer OC is placed on top of the passivation layer PAS1. The planarization layer OC can reduce or planarize the height difference (or step coverage) of an underlying structure and can be made of an organic material, such as photoacrylic, polyimide, a benzocyclobutene-based resin, or an acrylate-based resin. If necessary or desired, one of the passivation layers PAS1 and the planarization layer OC can be omitted.

[0048] The organic light-emitting diode (OLE) and an auxiliary electrode (AE) are arranged on the planarization layer (OC). The OLE has an anode (ANO), an organic light-emitting layer (OL), and a cathode (CAT).

[0049] More precisely, the anode ANO is located on the planarization layer OC. The anode ANO is connected to the drain electrode DE of the thin-film transistor T via a contact hole that penetrates the passivation layer PAS1 and the planarization layer OC. The anode ANO can have a reflective layer and thus serve as a reflective electrode. The reflective layer can be made of aluminum (Al), copper (Cu), silver (Ag), palladium (Pd), nickel (Ni), or a combination thereof. For example, the reflective layer can be made of an Ag / Pd / Cu (APC) alloy. The anode ANO can be configured as a multilayer structure with a reflective layer.

[0050] The auxiliary electrode AE ​​is located on the planarization layer OC. The auxiliary electrode AE ​​can be formed from the same material as the anode ANO on the same layer. Since no separate process is required to form the auxiliary electrode AE ​​in this case, the number of processes can be reduced. Therefore, manufacturing time and costs can be reduced, and the product yield can be significantly improved. As described later, the auxiliary electrode AE ​​can receive a low-potential supply voltage from the EVSS lead EVL through the conductive filler layer CFL and transfer the low-potential supply voltage to the cathode CAT.

[0051] A bank layer BN is arranged on the first substrate SUB1, on which the anode ANO and the auxiliary electrode AE ​​are formed, and subdivides pixels. The bank layer BN can be made of an organic material such as polyimide, a benzocyclobutene-based resin, or acrylate. A central part of the anode ANO, exposed by the bank layer BN, can be defined as an emission region.

[0052] The bank layer BN can be configured to expose the central part of the anode ANO and cover one edge of the anode ANO. The exposed area of ​​the anode ANO can be designed to have the largest possible surface area to ensure sufficient open-field coverage. Furthermore, the bank layer BN can be configured to expose a central part of the auxiliary electrode AE ​​and cover one edge of the auxiliary electrode AE. The exposed area of ​​the auxiliary electrode AE ​​can be designed to have the largest possible surface area to ensure sufficient contact between the auxiliary electrode AE ​​and the conductive filler layer CFL.

[0053] A first barrier BR1 is arranged on the first substrate SUB1, on which the bank layer BN is formed. The first barrier BR1 is located on the auxiliary electrode AE. The first barrier BR1 serves to physically separate the organic light-emitting layer OL, the cathode CAT, and a protective layer PAS2, which is formed subsequently. In other words, each of the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2 is located on the auxiliary electrode AE ​​and physically separated by the first barrier BR1. Therefore, the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2 can be formed non-contiguously on the auxiliary electrode AE.

[0054] The bank layer BN and the planarization layer OC can be structured to cover only the thin-film transistor T and a storage capacitor Cst connected to the thin-film transistor T within the pixel. As shown in Fig. As shown in Figure 3, the storage capacitor Cst can have a triple structure in which the first to third capacitor electrodes are stacked. However, embodiments are not limited to this. For example, the storage capacitor Cst can be implemented as a plurality of layers.

[0055] The organic light-emitting layer (OL) is arranged on the first substrate SUB1, on which the first barrier BR1 is formed. The OL can extend over a large area of ​​the front surface of the first substrate SUB1. The OL is a layer in which electrons and holes combine and emit light. The OL includes an emission layer (EML) and may further include one or more hole injection layers (HIL), hole transport layers (HTL), electron transport layers (ETL), and electron injection layers (EIL). The emission layer (EML) may contain a light-emitting material that produces white light.

[0056] The organic light-emitting layer OL on the auxiliary electrode AE ​​is physically divided by the first barrier BR1. The organic light-emitting layer OL is divided by the first barrier BR1 and exposes at least a portion of the auxiliary electrode AE ​​around the first barrier BR1. A portion of the organic light-emitting layer OL that is divided by the first barrier BR1 is located on the first barrier BR1.

[0057] The cathode CAT is located on the organic light-emitting layer OL. The cathode CAT can be extensively distributed across the front surface of the first substrate SUB1. The cathode CAT can be formed from a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO). Alternatively, the cathode CAT can be formed from a material thin enough to transmit light, such as magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or a combination thereof.

[0058] The cathode CAT on the auxiliary electrode AE ​​is physically divided by the first barrier BR1. The cathode CAT, divided by the first barrier BR1, exposes at least a portion of the auxiliary electrode AE ​​around the first barrier BR1. A portion of the cathode CAT, divided by the first barrier BR1, is located on the first barrier BR1. As described later, the cathode CAT can directly contact the auxiliary electrode AE ​​and can be supplied with the low-potential supply voltage via the auxiliary electrode AE.

[0059] The cathode CAT covers the organic light-emitting layer OL, and one end of the cathode CAT directly contacts the auxiliary electrode AE. An exposed end of the cathode CAT, separated by the first barrier BR1, is in direct contact with an exposed upper surface of the auxiliary electrode AE. Such a structure can be implemented by a step coverage difference between the materials forming the organic light-emitting layer OL and the cathode CAT. For example, since the cathode CAT is made of a transparent conductive material with better step coverage than a forming material of the organic light-emitting layer OL, the cathode CAT can be configured to directly contact the auxiliary electrode AE. To implement this structure, the organic light-emitting layer OL and the cathode CAT can be formed using various methods.For example, the organic light-emitting layer OL can be formed using a thermal deposition process, and the cathode CAT can be formed using a sputtering process. Therefore, one end of the split cathode CAT can extend further than one end of the split organic light-emitting layer OL and can directly contact the auxiliary electrode AE.

[0060] The protective layer PAS2 is located on the cathode CAT. The protective layer PAS2 can extend across much of the front surface of the first substrate SUB1. The protective layer PAS2 can be made of a material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0061] In particular, the protective layer PAS2 is arranged on the cathode CAT and can block the ingress of foreign material that could enter the organic light-emitting diode (OLE). Since, for example, the cathode CAT, which has a transparent conductive material, is a crystalline component and cannot block the ingress of ions and moisture, ionic components or external impurities from an ionic liquid contained in the conductive filler layer CFL can penetrate the cathode CAT and enter the organic light-emitting layer OL. The first embodiment of the disclosure further includes the protective layer PAS2 on the organic light-emitting diode OLE and can block the ingress of foreign material that could enter the organic light-emitting diode OLE. Therefore, the first embodiment of the disclosure can prevent a reduction in the lifetime of the organic light-emitting diode OLE and a reduction in luminance.

[0062] Additionally, the protective layer PAS2 is arranged on the cathode CAT and can buffer or mitigate mechanical stress exerted on the cathode CAT when the first substrate SUB1 and the second substrate SUB2 are attached to each other. Since, for example, the cathode CAT, which comprises the transparent conductive material, has brittle properties, it can easily crack due to an applied external force. The first embodiment of the disclosure further incorporates the protective layer PAS2 on the cathode CAT and can prevent the formation of a crack in the cathode CAT. Furthermore, the first embodiment of the disclosure can prevent the ingress of oxygen or moisture through the crack.

[0063] As described later, the conductive filler layer CFL according to the first embodiment of the disclosure can contain an ionic liquid. Since in this case the ionic liquid directly contacts the cathode CAT, a defect can occur in that the cathode CAT becomes oxidized. The first embodiment of the disclosure further includes the protective layer PAS2 between the cathode CAT and the conductive filler layer CFL and can prevent the problem of cathode CAT deterioration.

[0064] The protective layer PAS2 on the auxiliary electrode AE ​​is physically divided by the first barrier BR1. This division exposes at least a portion of the auxiliary electrode AE ​​surrounding the first barrier BR1. A portion of the protective layer PAS2, divided by the first barrier BR1, is positioned on top of the first barrier BR1. Therefore, the portion of the organic light-emitting layer OL, the portion of the cathode CAT, and the portion of the protective layer PAS2, each divided by the first barrier BR1, are stacked sequentially on top of the first barrier BR1.

[0065] The EVSS lead EVL and a color filter CF are formed on the second substrate SUB2. The stacking order of the EVSS lead EVL and the color filter CF on the second substrate SUB2 can be reversed. For example, the color filter CF can be formed after the EVSS lead EVL is formed, or the EVSS lead EVL can be formed after the color filter CF is formed.

[0066] The EVSS lead (EVL) consists of a conductive material with low resistance. For example, the EVSS lead (EVL) can be made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or a combination thereof.

[0067] The EVSS line EVL can comprise a weakly reflective, conductive material. For example, the EVSS line EVL is formed from the weakly reflective, conductive material and can thus prevent the visibility from being reduced by the reflection of external light. Therefore, a display device according to embodiments of the disclosure does not need to have a separate component for shielding (or absorbing) externally incident light, such as a polarizing film.

[0068] The EVSS line EVL can serve as a black matrix. Therefore, the EVSS line EVL can prevent color mixing errors between adjacent pixels. The EVSS line EVL can be arranged in a non-emission region to expose at least the emission region. Furthermore, the first embodiment of the disclosure can use the EVSS line EVL as the black matrix and thus does not require a separate process for forming the black matrix. Therefore, the first embodiment of the disclosure can further reduce the number of processes compared to a structure of the related technology, thereby reducing manufacturing time and costs and significantly improving product yield.

[0069] The color filter CF can have red (R), blue (B), and green (G) color filters. The pixel can have subpixels that emit red, blue, and green light, and the color filters CF can each be assigned to the corresponding subpixels. The red, blue, and green color filters CF can be separated by the EVSS line EVL. If required or desired, the pixel can also have a white (W) subpixel.

[0070] The conductive filler layer CFL is arranged between the first substrate SUB1 and the second substrate SUB2 and comprises a conductive medium. The conductive filler layer CFL can be formed by dispersing conductive fillers in a solvent. Alternatively, the conductive filler layer CFL can comprise a conductive solvent. For example, the conductive filler layer CFL can comprise at least one of a conductive polymer, such as poly(3,4-ethylenedioxythiophene) (PEDOT), and an ionic liquid. However, embodiments are not limited to these.

[0071] The distance between the first substrate SUB1 and the second substrate SUB2 can be suitably selected depending on the viscosity of the conductive filler layer CFL. Since the embodiment of the disclosure uses conductive fillers that have a lower viscosity than non-conductive fillers, the distance between the first substrate SUB1 and the second substrate SUB2 can be reduced. Therefore, the embodiment of the disclosure can ensure a large viewing angle and a high opening ratio.

[0072] The cathode CAT of the first substrate SUB1 and the EVSS line EVL of the second substrate SUB2 are electrically connected by the conductive filler layer CFL. Thus, the low-potential supply voltage is applied to both the cathode CAT and the EVSS line EVL.

[0073] Since, in the embodiment of the disclosure, the protective layer PAS2 is arranged between the conductive filler layer CFL and the cathode CAT, it is particularly difficult to bring the conductive filler layer CFL into direct contact with the cathode CAT without using the first barrier BR1. Referring to Fig. 4. The embodiment of the disclosure features the first barrier BR1 and can thus expose at least a portion of the auxiliary electrode AE, while physically separating each of the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2. The exposed portion of the auxiliary electrode AE ​​can directly contact the conductive filler layer CFL to receive the low-potential supply voltage from the EVSS line EVL of the second substrate SUB2, and can also directly contact the cathode CAT to transmit the received low-potential supply voltage to the cathode CAT.

[0074] The first embodiment of the disclosure can reduce voltage variation (or deviation) depending on a position by connecting the EVSS lead EVL, formed from the low-resistance conductive material, to the cathode CAT. Therefore, the first embodiment of the disclosure can reduce luminance unevenness or luminance variation.

[0075] The first embodiment of the disclosure does not require separate areas for forming the EVBS line EVL and areas for connecting the EVSS line EVL and the cathode CAT to the thin-film transistor array substrate, as in the related technique. Therefore, the first embodiment of the disclosure can be readily applied to a high-resolution display with a high pixels per inch (PPI) and can significantly improve the degree of design freedom.

[0076] Referring to Fig. Section 5 describes in detail below a supply path for the low-potential supply voltage generated by a current generator (not shown). Fig. 5 is an enlarged view of one in Fig. 2 shown area AR2.

[0077] Referring to Fig. 3 and Fig. 5. According to the first embodiment of the disclosure, the OLED display further comprises a connecting element LM, which is attached to at least one side of the display panel, in particular to at least one side of the first substrate SUB1. The connecting element LM may be a chip-on-film (COF). However, embodiments are not limited to this.

[0078] The first substrate SUB1 features a low-potential supply voltage contact pad (hereinafter referred to as the "EVSS contact pad") EVP and a supply electrode POE. The EVSS contact pad EVP is located outside the sealant SL and is electrically connected to the connecting element LM. The supply electrode POE is located inside the sealant SL and is electrically connected to the conductive filler layer CFL.

[0079] The EVSS contact pad EVP receives the low-potential supply voltage generated by the current generator (not shown) and transmitted via the connecting element LM, and transfers the received low-potential supply voltage to the supply electrode POE. The supply electrode POE then transfers the low-potential supply voltage to the conductive filler layer CFL.

[0080] The connecting element LM, the EVSS contact pad EVP, the supply electrode POE, the conductive filler layer CFL and the cathode CAT can be electrically connected to form a low-potential supply voltage path and / or the connecting element LM, the EVSS contact pad EVP, the supply electrode POE, the conductive filler layer CFL, the EVSS lead EVL and the cathode CAT can be electrically connected to form a low-potential supply voltage path.

[0081] More precisely, the EVSS contact pad (EVP) has at least one contact pad electrode. When multiple contact pad electrodes are used, the contact pad electrodes can be arranged in different layers with at least one insulating layer between them and can be electrically connected by a contact pad contact hole that penetrates the at least one insulating layer. For example, as in Fig. As shown in Figure 3, the EVSS contact pad EVP can have a first contact pad electrode PE1 and a second contact pad electrode PE2 arranged on different layers, with the passivation layer PAS1 positioned between them. The first contact pad electrode PE1 and the second contact pad electrode PE2 can be connected to each other by a first contact pad contact hole PH1 that penetrates the passivation layer PAS1. The embodiment of the disclosure is described below as an example in which the EVSS contact pad EVP has the first contact pad electrode PE1 and the second contact pad electrode PE2, for the sake of simplicity.

[0082] The first contact pad electrode PE1 is located outside the sealant SL and is exposed to the outside. The exposed first contact pad electrode PE1 can be attached to the connecting element LM. The first contact pad electrode PE1 and the connecting element LM can be joined to each other by an interposed anisotropic conductive film layer (ACF layer) (not shown).

[0083] The second contact pad electrode PE2 extends to the inside of the sealant SL and is electrically connected to the supply electrode POE. In this case, the second contact pad electrode PE2 can contact the supply electrode POE through a second contact pad contact hole PH2 that penetrates the passivation layer PAS1. Fig. Figure 3 illustrates, as an example, that the second contact pad electrode PE2 and the supply electrode POE are arranged only with the passivation layer PAS1 placed between them. However, embodiments are not limited to this. For example, the second contact pad electrode PE2 and the supply electrode POE can be arranged on different layers, with the passivation layer PAS1 and the planarization layer OC placed between them, and be electrically connected to each other by a contact hole that penetrates the passivation layer PAS1 and the planarization layer OC.

[0084] The supply electrode POE can be formed simultaneously with the anode ANO. This is because the supply electrode POE can be made from the same material as the anode ANO and the auxiliary electrode AE. However, embodiments are not limited to this.

[0085] A second barrier, BR2, is arranged on the supply electrode, POE. BR2 can be formed simultaneously with BR1, as it can be made of the same material and have the same shape. BR2 serves to physically separate each of the organic light-emitting layer (OL), the cathode (CAT), and the protective layer (PAS2) on the supply electrode. In other words, BR2 physically separates each of these layers. Therefore, BR2 allows the OL, CAT, and PAS2 to be arranged non-contiguously on the supply electrode.

[0086] In the embodiment of the disclosure, the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2 are arranged within the sealant SL and on the entire surface of the first substrate SUB1. If the second barrier BR2 is not provided, the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2 are formed to completely cover the supply electrode POE, which is arranged within the sealant SL. In this case, the supply electrode POE and the cathode CAT cannot be electrically connected to each other due to the organic light-emitting layer OL, and the supply electrode POE and the conductive filler layer CFL cannot be electrically connected to each other due to the organic light-emitting layer OL and the protective layer PAS2.

[0087] The first embodiment of the disclosure forms the second barrier BR2 on the supply electrode POE and can thus expose at least a portion of the supply electrode POE while physically dividing each of the organic light-emitting layer OL, the cathode CAT, and the protective layer PAS2 on the supply electrode POE. A portion of the organic light-emitting layer OL, a portion of the cathode CAT, and a portion of the protective layer PAS2, each of which is divided by the second barrier BR2, are stacked successively on the second barrier BR2.

[0088] An exposed portion of the POE supply electrode directly contacts the conductive filler layer CFL and supplies the low-potential supply voltage to the conductive filler layer CFL. Therefore, a power supply path can be formed that connects the LM connector, the EVSS contact pad EVP, and the conductive filler layer CFL.

[0089] The cathode CAT on the supply electrode POE can cover the organic light-emitting layer OL, and one end of the cathode CAT can directly contact the supply electrode POE. Specifically, one end of the cathode CAT, which is split by the second barrier BR2 and exposed, can directly contact an exposed upper surface of the supply electrode POE. Therefore, a power supply path can be formed connecting the connecting element LM, the EVSS contact pad EVP, and the cathode CAT.

[0090] With reference to Fig. Section 6 below describes an example of a barrier form according to an embodiment of the disclosure. Fig. Figure 6 are cross-sectional views that schematically show a form of a barrier with first and second barriers.

[0091] A barrier BR can be configured as a bilayer comprising a first structure B1 and a second structure B2. The first structure B1 can be positioned adjacent to the second structure B2, and one edge of the first structure B1 can have a beveled shape. Specifically, the edge of the first structure B1 can project outwards from an edge of the second structure B2 by a predetermined distance RR. The distance RR between the edge of the first structure B1 and the edge of the second structure B2 can be suitably chosen so that the barrier BR can expose at least part of an auxiliary electrode AE ​​while simultaneously sharing an organic light-emitting layer, a cathode, and a protective layer. In other words, the organic light-emitting layer OL (see Fig. 3) as well as the cathode CAT (see Fig. 3) and the protective layer PAS2 (see Fig. 3) structured to expose at least part of the auxiliary electrode AE ​​while it is divided around the barrier BR due to the predetermined distance RR between the edge of the first structure B1 and the edge of the second structure B2. The first structure B1 may have a widening shape, as in (a) of Fig. 6 is shown and can have a tapered shape, as in (b) of Fig. Figure 6 shows that the first structure B1 and the second structure B2 can be made of different materials.

[0092] A barrier BR can be formed as a single layer with a first structure B1. In this case, the first structure B1 has a shape in which an edge of an upper side projects outwards from an edge of a lower side by a predetermined distance RR. For example, the first structure B1 can have a widening shape, as in (c) of Fig. Figure 6 shows that the vertical cross-sectional shape of the first structure B1 can be trapezoidal, the upper side can be longer than the lower side, and one end of the upper side can project outwards from an end of the lower side by a predetermined distance RR. The distance RR between an end of the upper side and an end of the lower side can be chosen appropriately such that the barrier BR can expose at least part of an auxiliary electrode AE ​​while simultaneously separating an organic light-emitting layer, a cathode, and a protective layer. In other words, the organic light-emitting layer OL (see Figure 6) is... Fig. 3), the cathode CAT (see Fig. 3) and the protective layer PAS2 (see Fig. 3) each structured to expose at least part of the auxiliary electrode AE ​​while being divided around the barrier BR due to the distance RR between one end of the upper side and one end of the lower side. <Zweites Ausführungsbeispiel>

[0093] Fig. Figure 7 is a cross-sectional view of an OLED display according to a second embodiment of the disclosure. The description of structures and components that are identical or equivalent to those shown in the first embodiment is omitted in the second embodiment.

[0094] Referring to Fig. Figure 7 of an OLED display according to a second embodiment of the disclosure comprises a display panel with a first substrate SUB1 and a second substrate SUB2 facing each other, and a conductive filler layer CFL between the first substrate SUB1 and the second substrate SUB2. The first substrate SUB1 is a thin-film transistor array substrate on which a thin-film transistor T and an organic light-emitting diode OLE connected to the thin-film transistor T are formed. The second substrate SUB2 is a substrate on which an EVSS line EVL is formed.

[0095] In contrast to the first embodiment, according to the second embodiment of the disclosure, a color filter CF is formed on the first substrate SUB1. Specifically, the thin-film transistor T and the organic light-emitting diode OLE connected to the thin-film transistor T are formed on the first substrate SUB1, and the color filter CF is formed on the organic light-emitting diode OLE. The color filter CF can be arranged on a cathode that forms the organic light-emitting diode OLE or a protective layer PAS2. Compared to the first embodiment, the second embodiment of the disclosure can further reduce the distance between the color filter CF and an organic light-emitting layer OL, thus increasing the viewing angle and ensuring a sufficiently adequate aperture ratio. <Drittes Ausführungsbeispiel>

[0096] Fig. Figure 8 is a cross-sectional view of an OLED display according to a third embodiment of the disclosure. The description of structures and components that are identical or equivalent to those shown in the first embodiment is omitted in the third embodiment.

[0097] Referring to Fig. Figure 8 of an OLED display according to a third embodiment of the disclosure comprises a display panel with a first substrate SUB1 and a second substrate SUB2 facing each other, and a conductive filler layer CFL between the first substrate SUB1 and the second substrate SUB2. The first substrate SUB1 is a thin-film transistor array substrate on which a thin-film transistor T and an organic light-emitting diode OLE connected to the thin-film transistor T are formed. The second substrate SUB2 is a substrate on which an EVSS line EVL is formed.

[0098] The EVSS lead EVL and an auxiliary EVSS lead (or referred to as an "auxiliary supply lead") AEVL are formed on the second substrate SUB2. A color filter CF can be arranged on the second substrate SUB2 as in the first embodiment and on the first substrate SUB1 as in the second embodiment.

[0099] One surface of the auxiliary EVSS line AEVL directly contacts the EVSS line EVL, and the other surface of the auxiliary EVSS line AEVL directly contacts the conductive filler layer CFL. The auxiliary EVSS line AEVL serves to increase the contact area between the EVSS line EVL and the conductive filler layer CFL and can have a larger area than that of the EVSS line EVL. The auxiliary EVSS line AEVL can be positioned between the EVSS line EVL and the conductive filler layer CFL. The auxiliary EVSS line AEVL can be formed to cover the EVSS line EVL and the color filter CF and can extend over a large area on a front surface of the second substrate SUB2, including an emission region. The auxiliary EVSS lead AEVL can be made of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0100] Since the third embodiment of the disclosure can adequately ensure the contact area between the EVSS lead EVL and the conductive filler layer CFL using the auxiliary EVSS lead AEVL, the third embodiment of the disclosure can minimize contact failure between the EVSS lead EVL and the conductive filler layer CFL. Furthermore, the third embodiment of the disclosure can more efficiently reduce voltage variation depending on a position and thus reduce luminance unevenness or luminance variation.

[0101] Although the present disclosure has been described with reference to a number of illustrative embodiments thereof, numerous other modifications and embodiments can be conceived by a person skilled in the art which fall within the scope of the principles of this disclosure. In particular, various variations and modifications in the component parts and / or arrangements of the combination in question are possible within the scope of the disclosure, the drawings and the accompanying claims. In addition to variations and modifications in the component parts and / or arrangements, alternative uses will also be obvious to a person skilled in the art.

Claims

[1] Organic light-emitting diode display comprising: a first substrate (SUB1) on which a plurality of pixels are arranged, each of which has an organic light-emitting diode (OLE); a second substrate (SUB2) with a supply line (EVL) configured to be supplied with a supply voltage and facing the first substrate (SUB1); and a conductive filler layer (CFL) that is arranged between the first substrate (SUB1) and the second substrate (SUB2) and contains a conductive medium, where the first substrate (SUB1) has: an auxiliary electrode (AE); a first barrier (BR1) located on the auxiliary electrode (AE); a cathode (CAT) contained within the organic light-emitting diode (OLE) and divided by the first barrier (BR1), wherein the cathode (CAT) exposes part of the auxiliary electrode (AE) and one end of the cathode (CAT) directly contacts the auxiliary electrode (AE); and a protective layer (PAS2) arranged on the cathode (CAT) and divided by the first barrier (BR1), wherein the protective layer (PAS2) exposes part of the auxiliary electrode (AE), wherein the conductive filler layer (CFL) fills an area between the first barrier (BR1) and the protective layer (PAS2), wherein the cathode (CAT) is electrically connected to the supply line (EVL) through the conductive filler layer (CFL) and the exposed part of the auxiliary electrode (AE). [2] Organic light-emitting diode display according to claim 1, further comprising: a sealing agent (SL) arranged at one edge of the first substrate (SUB1) and one edge of the second substrate (SUB2) and accommodating the conductive filler layer (CFL) with the first and second substrates (SUB1, SUB2); a supply electrode (POE) located at the first substrate (SUB1) and within the sealing medium (SL); and a second barrier (BR2) located on the supply electrode (POE), where the cathode (CAT) is divided by the second barrier (BR2) and exposes part of the supply electrode (POE). [3] Organic light-emitting diode display according to claim 2, wherein the protective layer (PAS2) is divided by the second barrier (BR2) and exposes part of the supply electrode (POE), wherein the supply electrode (POE) is electrically connected to the supply line (EVL) via the conductive filler layer (CFL). [4] Organic light-emitting diode display according to claim 2 or 3, wherein one end of the cathode (CAT) directly contacts the supply electrode (POE). [5] Organic light-emitting diode display according to any one of claims 2 to 4, further comprising a connecting element (LM) arranged outside the sealing medium (SL) and connected to the first substrate (SUB1), wherein the first substrate (SUB1) further comprises a supply contact pad (EVP) connected to the connecting element (LM) which is configured to be supplied with the supply voltage by the connecting element (LM) and configured to transmit the supply voltage to the supply electrode (POE). [6] Organic light-emitting diode display according to any one of claims 1 to 5, wherein both the first substrate (SUB1) and the second substrate (SUB2) have an emission region to which light is emitted by the organic light-emitting diode (OLE) and a non-emission region outside the emission region, wherein the supply line (EVL) is arranged in the non-emission region. [7] Organic light-emitting diode display according to any one of claims 1 to 6, wherein the second substrate (SUB2) further comprises an auxiliary supply line (AEVL) having a first surface which directly contacts the supply line (EVL) and a second surface which is opposite the first surface and directly contacts the conductive filler layer (CFL), wherein the auxiliary supply line (AEVL) has an area which is larger than that of the supply line (EVL) and comprises a transparent conductive material. [8] Organic light-emitting diode display according to any one of claims 1 to 7, wherein the first barrier (BR1) has a first structure (B1) arranged on a second structure (B2), wherein an edge of the first structure (B1) extends outwards from an edge of the second structure (B2) by a predetermined distance. [9] Organic light-emitting diode display according to any one of claims 1 to 8, wherein the first barrier (BR1) has a shape in which an edge of an upper side protrudes from an edge of a lower side. [10] Organic light-emitting diode display according to any one of claims 1 to 9, wherein the second substrate (SUB2) further comprises a plurality of color filters (CF) corresponding to the plurality of pixels, wherein the color filters (CF) are divided by the supply line (EVL). [11] Organic light-emitting diode display according to any one of claims 1 to 10, wherein the first substrate (SUB1) further comprises a plurality of color filters (CF) corresponding to the plurality of pixels, wherein the color filters (CF) are arranged on the cathode (CAT) or on the protective layer (PAS2). [12] Organic light-emitting diode display according to any one of claims 1 to 11, wherein the supply line (SPL) comprises a low-resistance material. [13] Organic light-emitting diode display according to any one of claims 1 to 12, further comprising an organic light-emitting layer (OL) in the organic light-emitting diode (OLE) and which is divided by the first barrier layer (BR1), wherein the organic light-emitting layer (OL) exposes part of the auxiliary electrode (AE), where the cathode (CAT) extends horizontally further on the auxiliary electrode (AE) than the organic light-emitting layer (OL). [14] Organic light-emitting diode display according to any one of claims 1 to 13, wherein a portion of the cathode (CAT) and of the protective layer (PAS2) are each stacked successively on the first barrier (BR1). [15] Organic light-emitting diode display according to any one of claims 1 to 14, wherein the conductive fill layer (CFL) comprises at least one of poly(3,4-ethylenedioxythiophene) (PEDOT), which is a conductive polymer, and an ionic liquid.

Images