Method for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment using an address assignment stream

Abstract

Method for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment using an address assignment stream, - wherein the data bus system comprises a data bus, a bus master and n bus nodes and - where each bus node is inserted into the data bus and - where the bus master is located at one end of the data bus and - where a bus node that is closer to the bus master in the order of bus nodes along the data bus than another bus node is referred to below as the preceding bus node and the other bus node as the subsequent bus node and - where each bus node can feed an address assignment stream into the data bus towards the bus master and - wherein each bus node is traversed by the address assignment stream of subsequent bus nodes in the event of such an injection by subsequent bus nodes and - where each of the bus nodes can capture such an address assignment stream flowing through it, with the steps - Performing the vehicle address assignment of the n bus nodes; - Initiation of the injection of an address assignment stream by a bus node - the injection bus node - , whereby the initiation is carried out by the bus master; - Capturing the data bus flow through the bus nodes and determining a bus node-specific bus flow measurement value; - Decision as to whether an address assignment stream flows through the respective bus node and determination of a bus node-specific address assignment stream availability value, whereby the decision can be made in the bus node and / or in the bus master; - Transmission of the bus node-specific bus current measurement value and / or the bus node-specific address assignment current availability value from the bus node to the bus master - Formation of a feed-in bus node-specific result vector from the obtained bus node-specific address assignment stream availability values; - Comparison of the feed-in bus node-specific result vector with a feed-in bus node-specific expectation vector.

Description

Field of invention

[0001] The invention relates to a method for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment by means of an address assignment stream and an associated device. General introduction

[0002] Auto-address assignment schemes have been known for some time. To understand the following disclosure, familiarity with the following documents is strongly recommended: EP 1490772 B1, EP 1 603 282 B1, DE 102017122365 B3 and DE 10 2010 026 431 B4.

[0003] The automatic address assignment technique described in these documents is used primarily in the automotive industry for the automatic address assignment of bus nodes in a sequential LIN data bus with a bus master controlling these bus nodes. The method presented here assumes that the bus nodes are inserted into the data bus so that they form a linear chain along the data bus, with the bus master located at one of the two ends, which is referred to below as the bus start.

[0004] For the automatic address assignment of such linear chains of bus nodes along a data bus, the document presented here refers to the following documents: DE 10 2017 128 489 A1, DE 10 2017 128 923 A1, DE 10 2018 104 488 A1, DE 102018104489 A1, DE 10 2018 124 279 A1, DE 10 2018 124 281 A2, DE 10 2017 012 179 A1.

[0005] A key feature of the automatic address assignment methodology proposed in these documents is that each bus node with an unassigned address feeds an automatic address assignment stream toward the bus master in an address assignment cycle initiated by the bus master. All bus nodes located between the address assignment stream and the bus master can then detect that they are not the bus nodes furthest away from the bus master. Only the bus node that, firstly, does not yet have a valid bus node address and, secondly, does not detect an address assignment stream from a subsequent bus node located further away from the bus master, accepts the bus node address offered by the bus master upon a command from the bus master. A valid bus node address is defined as an address that was correctly assigned to the bus node during the address assignment process.It is conceivable to assign the bus node a provisional bus node address in another way before the address assignment process, for example using a random number method that has no connection to the physical position in the data bus. By accepting the bus node address to be assigned offered by the bus master, this bus node then immediately possesses a valid bus node address within the meaning of this document and no longer participates in subsequent address assignment cycles until the bus node address becomes invalid, for example, upon command from the bus master. In particular, it no longer feeds an address assignment stream towards the bus master in subsequent address assignment cycles, whereby the nearest bus node with an address not yet assigned can then identify itself as the last bus node in the next address assignment cycle and can accept the additional bus node address then offered by the bus master.For the purposes of this document, a "bus node with an unassigned address" is defined as a bus node that has not yet received a new, valid bus node address during the address assignment process described here. This process continues until all bus nodes have received a bus node address and the bus thus contains only bus nodes with assigned addresses.

[0006] However, it cannot be ruled out that errors may occur in this address assignment.

[0007] In the event of a failed address assignment, whether due to duplicate assignment or swapping of a bus node address for whatever reason, which ultimately are irrelevant here, it is impossible to determine the actual physical location of a bus node with an incorrect bus node address. Therefore, the detection position is verified in a complex end-of-production test at the automaker. These costs are to be avoided.

[0008] Currently, increased security of the address assignment cycle is achieved by a redundant second address assignment cycle for verification purposes (Assign ID and Check ID). However, in the case of static errors that repeat themselves for whatever reason, an incorrect position is repeatedly assigned the same way, or with a high probability, the same incorrect position. Therefore, the current state of the art can only reliably detect the error for intermittent errors with a high change rate.

[0009] The technical teaching of DE 10 2018 104 852 A1 relates to a method for addressing the bus nodes of a differential two-wire communication bus with a bus master, the two-wire communication bus originating from the bus master, and a plurality of addressable bus nodes connected to the two-wire communication bus. The two-wire communication bus of DE 10 2018 104 852 A1 consists of a first and a second single-wire bus. Each bus node of DE 10 2018 104 852 A1 that has not yet been addressed feeds an addressing current into at least one single-wire bus, the addressing single-wire bus, for identification purposes. All other bus nodes of DE 10 2018 104 852 A1 that have not yet been addressed also feed their addressing current into the addressing single-wire bus. All addressing currents of DE 10 2018 104 852 A1 flow through the two-wire communication bus towards the bus master.Each unaddressed bus node of DE 10 2018 104 852 A1 detects the current flowing through the addressing single-wire bus of the serial, bidirectional, differential two-wire communication bus. According to the technical teaching of DE 10 2018 104 852 A1, only the unaddressed bus node that detects no current or only detects a current whose magnitude is smaller than a predeterminable first threshold is identified as an unaddressed bus node. According to the technical teaching of DE 10 2018 104 852 A1, the bus node thus identified is assigned an address as a valid bus node address for addressing purposes. According to the technical teaching of DE 10 2018 104 852 A1, the aforementioned steps are performed without the last addressed bus node in each case until all unaddressed bus nodes have been addressed.

[0010] The technical teaching of DE 10 2007 025 852 B3 describes a monitoring device for detecting incorrect addressing of an actuator-sensor interface slave in an actuator-sensor interface system, with a voltage detection unit. According to DE 10 2007 025 852 B3, the voltage detection unit has a bus connection for connection to an actuator-sensor interface bus. According to the technical teaching of DE 10 2007 025 852 B3, the voltage detection unit detects the modulation voltage present between the two conductors of the actuator-sensor interface bus without any feedback. According to DE 10 2007 025 852 B3, the impedance circuit of DE 10 2007 025 852 B3 is designed in such a way that its impedance is adapted to the impedance of the actuator-sensor interface power supply of DE 10 2007 025 852 B3.According to the technical teaching of DE 10 2007 025 852 B3, the evaluation unit of DE 10 2007 025 852 B3 measures the current flowing through the impedance circuit. According to the technical teaching of DE 10 2007 025 852 B3, the measured current can be used to detect incorrect addressing of at least one actuator-sensor interface slave, in particular, incorrect addressing of two actuator-sensor interface slaves with the same address.

[0011] From document EP 2 348 374 A1, a method for detecting incorrect multiple addressing in a network operating according to the master-slave principle and a corresponding actuator-sensor interface network are known. According to EP 2 348 374 A1, the technical teaching of EP 2 348 374 A1 relates to a method for detecting incorrect multiple addressing in a network operating according to the master-slave principle, consisting of a master and a number of slaves connected to it via a line. According to EP 2 348 374 A1, the method described in EP 2 348 374 A1 comprises the steps of: - measuring at least one first voltage pulse generated by a master call from the master at a measuring location on the line according to the technical teaching of EP 2 348 374 A1;- Deriving a threshold value from this at least one voltage pulse and a previously carried out simulation or measurement of all characteristics of the network according to the technical teaching of EP 2 348 374 A1; - Measuring at least a first further voltage pulse generated by a slave response according to the technical teaching of EP 2 348 374 A1 at the same measuring location, wherein the slave response is generated by a slave addressed with the master call in response to this master call; - Comparing this at least one further voltage pulse with the threshold value according to the technical teaching of EP 2 348 374 A1; - Detecting faulty multiple addressing according to the technical teaching of EP 2 348 374 A1 if the threshold value is exceeded.

[0012] EP 1 676 403 B1 discloses a method for serially assigning addresses in a bus system having a bus to which a control unit and a plurality of participants to be addressed are connected. In the method according to EP 1 676 403 B1, the control unit assigns an address to a participant to be addressed within each address assignment cycle, wherein the control unit outputs a start signal at the beginning of each address assignment cycle. In the method according to EP 1 676 403 B1, each participant yet to be addressed records the number of start signals received until it is addressed and stores a numerical value corresponding to the number of start signals received up to that point within the address assignment cycle in which it is assigned an address by the control unit (12).According to EP 1 676 403 B1, the method of EP 1 676 403 B1 is characterized in that, in order to check the address allocation in the bus system, the control unit queries the stored counter values ​​of the addressed participants after addressing the last participant not yet addressed or after expiry of a number of address allocation cycles equal to the number of participants and, based on this query, checks the address allocation for plausibility. Object of the invention

[0013] The invention is therefore based on the object of creating a solution that eliminates the above-mentioned disadvantages of the prior art and also allows for the detection of static errors. Furthermore, the method offers further advantages.

[0014] This object is achieved by a method according to claim 1 and a device according to claim 8.

[0015] The further embodiments of the method are the subject of the subclaims. Solution to the inventive problem

[0016] In a data bus system with automatic address assignment using an address assignment current of the type described above, the object is achieved according to the invention in that the bus master initiates the feeding of an address assignment current through a bus node - the feed bus node, the bus nodes then detect the respective data bus current through these bus nodes at their respective bus node positions and determine a bus node-specific bus current measured value. A decision is then made as to whether an address assignment current is flowing through the respective bus node, and a bus node-specific address assignment current presence value is determined, wherein the decision can be made in the bus node and / or in the bus master. The method also comprises transmitting the bus node-specific bus current measured value and / or the bus node-specific address assignment current presence value from the bus node to the bus master.The bus node-specific address assignment current presence value can also be determined in the bus master. The method also includes the formation of a feeder bus node-specific result vector from the received bus node-specific address assignment current presence values ​​and the comparison of a feeder bus node-specific result vector with a feeder bus node-specific expectation vector. The specific further processing of the comparison results is the subject of further developments of this method.

[0017] Thus, a method for verifying the correct position of bus nodes after an automatic address assignment is proposed. This method is designed and suitable for detecting incorrect address assignment even after the modules have been installed and subjected to an automatic address assignment. Such incorrect address assignment can also be caused by a failure of the address assignment logic in a bus node.

[0018] A further advantage of the procedure presented here is that it can also be carried out after delivery of the vehicle during operation or when the vehicle is idle.

[0019] After performing an automatic address assignment method based on an address assignment stream, in particular after one or more of the steps mentioned above, an independent test sequence follows, according to the proposal, from which the position of the sensors can be clearly identified. This is the core of the invention.

[0020] The bus master requests each bus node in turn, preferentially, to feed its address assignment stream into the data bus toward the bus master. The bus master performs a test cycle for each bus node, during which each bus node feeds its address assignment stream for test purposes. The bus master requests all bus nodes to measure the bus current at their bus node position and determine a bus current measurement value. The bus nodes transmit their respective bus current measurement values ​​to the bus master in such a way that the bus master can assign a bus node address to each of the transmitted bus current measurements. Bus hub d Bus hub c Bus hub b Bus hub a Measuring cycle 1 = Measuring cycle A measure current, measure current, measure current, Switch on power and measure Result: Current detected Result: Current detected Result: Current detected Result A: NO power detected Result B: Power detected Measuring cycle 2 = Measuring cycle B measure current, measure current, Switch on power and measure measure current, Result: Current detected Result: Current detected Result: NO power detected Result A: NO power detected Result B: Power detected Measuring cycle 3 = Measuring cycle C measure current, Switch on power and measure measure current, measure current, Result: Current detected Result: NO power detected Result: NO power detected Result A: NO power detected Result B: Power detected Measuring cycle 4 = Measuring cycle D Switch on power and measure measure current, measure current, measure current, Result: NO power detected Result: NO power detected Result: No power detected Result A: NO power detected Result B: Power detected

[0021] To better understand the table above, here is an important note: • Result A: If an auto-addressing methodology is used where the address assignment current of a bus node does not flow through its associated bus shunt resistor, the result must be that the bus node does not measure its own address assignment current. [e.g. EP 1 490 772 B1] • Result B: If an auto-address assignment methodology is used, but where the address assignment current of a bus node flows through its associated bus shunt resistor, the result must be that the bus node measures its own address assignment current. [e.g. DE 10 2017 122 365 B3]

[0022] Example of 4 bus nodes on the data bus with correct address assignment.

[0023] Since the correct order of the bus nodes is usually known from the design, this information can be made available to the bus master during production, which is typically done by programming.

[0024] The bus master can now perform the following four checks: First, the bus master can determine whether only the bus nodes located between the incoming bus node and itself measure an address assignment current as expected. Second, the bus master can determine whether all the bus nodes located between the incoming bus node and itself are measuring an address assignment current as expected. Thirdly, the bus master can determine whether only the bus nodes that are NOT located between it and the incoming bus node and itself are measuring NO address assignment current, as expected. FOURTH, the bus master can determine whether all the bus nodes NOT located between the injecting bus node and itself are, as expected, measuring NO address assignment current.

[0025] If one of these questions does not correspond to the expected value, an error has occurred. This error can be signaled by the bus master to a higher-level in-vehicle system or an external system, such as a test system or a vehicle user, depending on the application, safety requirements, and usage situation.

[0026] However, in production and / or during maintenance work, it is useful to be able to determine exactly which bus node is faulty. Furthermore, complete fault coverage is usually required.

[0027] To do this, the bus master repeats the test cycle for each of the bus nodes. This allows the bus master to determine a response vector for each of the bus nodes. In a bus system with n bus nodes, the response vector comprises n entries. The bus master thus determines an nxn response matrix, where each entry in a response matrix is ​​either a 1 or a 0. The diagonal refers to the feeding bus nodes themselves and is assigned a 1 or 0 depending on the programmer's perspective. A 1 can, for example, mean that an address assignment current was measured during the test. A 0 must then mean that no address assignment current was measured. An example matrix for a system with four bus nodes with correct assignment looks like this: −dcbaA1110B1100C1000D0000

[0028] The bus nodes are numbered with the letters a, b, c, d as an example.

[0029] In measurement cycle 1 = measurement cycle A, bus node a injected an address assignment current. Since bus node a is located furthest from the bus master, bus nodes b, c, and d detect an address assignment current. Therefore, the corresponding values ​​of the matrix are set to 1.

[0030] In measurement cycle 2 = measurement cycle B, bus node b injected an address assignment stream. Since bus node a follows bus node b from the bus master's perspective, it did not detect an address assignment stream on the data bus. Therefore, its value is set to 0. Since bus nodes c and d precede bus node b from the bus master's perspective, they each detected an address assignment stream on the data bus. Therefore, their values ​​are set to 1.

[0031] In measurement cycle 3 = measurement cycle C, bus node c injected an address assignment stream. Since bus nodes a and b follow bus node c from the bus master's perspective, they did not detect an address assignment stream on the data bus. Therefore, their values ​​are set to 0. Since bus node d precedes bus node c from the bus master's perspective, it detected an address assignment stream on the data bus. Therefore, its value is set to 1.

[0032] In measurement cycle 4 = measurement cycle D, bus node d injected an address assignment current. Since bus nodes a, b, and c follow bus node d from the bus master's perspective, they did not detect an address assignment current on the data bus. Therefore, their values ​​are set to 0.

[0033] The matrix is ​​deformed in a characteristic way when certain errors are present.

[0034] Some examples are listed below:

[0035] Failure of the address assignment power source node b at the time of test (address assignment may be correct.): −dcbaA1110B0000C1000D0000

[0036] Failure of the address assignment power source node b at the test time and at the address assignment time: −dcbaA0110B0000C0000D0000

[0037] Because bus node c believed it was the last node due to the missing address assignment stream from bus node b, both bus node c and bus node b assumed the same bus node address, as they believed they were the last bus nodes at the same time during the address assignment process. Therefore, the bus node address for bus node d was not assumed by any bus node.

[0038] Once the master has the results from all cycles (current detected / no current detected), it can be clearly evaluated whether addresses were correctly assigned to the bus nodes in sequence on the data bus.

[0039] A method is thus proposed for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment using an address assignment stream.

[0040] The data bus system comprises a data bus, a bus master, and n bus nodes. Each bus node is inserted into the data bus and is therefore passed through by an electrical current towards the bus master, which is fed by a downstream bus node. The method cannot therefore be used in a star configuration. The bus master is therefore located at one end of the data bus. The bus node that is closer to the bus master than another bus node in the sequence of bus nodes along the data bus is referred to below as the upstream bus node, and the other bus node is referred to as the downstream bus node. Each bus node can feed an address assignment current into the data bus towards the bus master. Each bus node is therefore passed through by the address assignment current of downstream bus nodes if such a current is fed by downstream bus nodes.Each of the bus nodes has a measuring device designed to detect the address assignment current of subsequent bus nodes. The proposed method comprises the following steps: • Performing the auto-address assignment of the n bus nodes; • Initiating the injection of an address assignment stream by a bus node - the injection bus node -, the initiation being carried out by the bus master; • Recording the data bus current through the bus nodes and determining a bus node-specific bus current measurement value; • Decision as to whether an address assignment current flows through the respective bus node and determination of a bus node-specific address assignment current presence value, whereby the decision can be made in the bus node and / or in the bus master; • Transmission of the bus node specific bus current measurement value and / or the bus node specific address assignment current presence value from the bus node to the bus master • Formation of an input bus node-specific result vector from the received bus node-specific address assignment current presence values; • Comparison of a feeder bus node-specific result vector with a feeder bus node-specific expectation vector.

[0041] Preferably, the previously described process steps are performed for all bus nodes as feeder bus nodes. Of course, the step of performing the automatic address assignment of the n bus nodes for all other bus nodes as feeder bus nodes is not repeated.

[0042] Preferably, the determined feed-in bus node-specific result vectors are then compared with feed-in bus node-specific expectation vectors for a proper assignment and a conclusion is drawn about a proper assignment if the determined feed-in bus node-specific result vectors agree with the feed-in bus node-specific expectation vectors for a proper assignment.

[0043] Likewise, the determined feed-in bus node-specific result vectors are then preferably compared with feed-in bus node-specific expectation vectors for a correct assignment and a conclusion is drawn about a NON-correct assignment if the determined feed-in bus node-specific result vectors do NOT match the feed-in bus node-specific expectation vectors for a correct assignment.

[0044] Furthermore, specific errors can be predicted using the resulting patterns. This can be used to identify the type of error.

[0045] Preferably, therefore, the determined feed-in bus node-specific result vectors are also compared with feed-in bus node-specific expectation vectors for an IMPROPER assignment and a conclusion is drawn about a predetermined concrete error if the determined feed-in bus node-specific result vectors agree with the feed-in bus node-specific expectation vectors for an IMPROPER assignment.

[0046] Depending on the error detected, an error-specific signal can then be sent to a user, to a test device and / or to a higher-level system. Advantage of the invention

[0047] Such a method for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment using an address assignment stream enables, at least in some implementations: • Increased security in auto-address assignment by separating it into two different mechanisms for address assignment and checking whether the address assignment was correct. • Detection of incorrect address assignments. • Increasing test coverage and simplifying final production testing at the automaker. • Enabling functional safety mechanisms. In particular, this enables a so-called "safety measure," i.e., a safety measurement value for successful auto-address assignment using the proposed method. • The test can be carried out when a vehicle is at rest or in operation.

[0048] But the advantages are not limited to this. List of Works Cited EP 1 490 772 B1, EP 1 603 282 B1, DE 10 2010 026 431 B4, DE 10 2017 122 365 B3, OF 10 2017 128 489 A1, OF 10 2017 128 923 A1, DE 10 2018 104 488 A1, DE 10 2018 104 489 A1, OF 10 2018 124 279 A1, OF 10 2018 124 281 A1. OF 10 2017 012 179 A1.

Claims

[1] Method for detecting an incorrect bus node address assignment in data bus systems with auto-address assignment using an address assignment stream, - wherein the data bus system comprises a data bus, a bus master and n bus nodes and - where each bus node is inserted into the data bus and - where the bus master is located at one end of the data bus and - where a bus node which, viewed from the bus master, is located closer to the bus master than another bus node in the sequence of bus nodes along the data bus is referred to below as the preceding bus node and the other bus node as the following bus node and - where each bus node can feed an address assignment stream into the data bus in the direction of the bus master and - each bus node being passed through by the address assignment stream of subsequent bus nodes in the case of such feeding by subsequent bus nodes and - wherein each of the bus nodes can detect such an address assignment stream flowing through it, comprising the steps - Performing the auto-address assignment of the n bus nodes; - Initiating the injection of an address assignment stream by a bus node - the injection bus node -, whereby the initiation is carried out by the bus master; - Detecting the data bus current through the bus nodes and determining a bus node-specific bus current measurement value; - Decision as to whether an address assignment current flows through the respective bus node and determination of a bus node-specific address assignment current presence value, whereby the decision can be made in the bus node and / or in the bus master; - Transmission of the bus node specific bus current measurement value and / or the bus node specific address assignment current presence value from the bus node to the bus master - Formation of a feeder bus node specific result vector from the received bus node specific address assignment current presence values; - Comparison of the feeder bus node specific result vector with a feeder bus node specific expectation vector. [2] Method according to claim 1 - Carrying out the steps of claim 1 except for the step “carrying out the auto-address assignment of the n bus nodes” for all bus nodes other than feeder bus nodes. [3] Method according to claim 1 or 2 • Comparison of the determined feed-in bus node specific result vectors with feed-in bus node specific expectation vectors for a proper allocation and • Inferring a correct assignment if the determined feeder bus node-specific result vectors match the feeder bus node-specific expectation vectors for a correct assignment. [4] Method according to claim 1 or 2 • Comparison of the determined feed-in bus node specific result vectors with feed-in bus node specific expectation vectors for a proper allocation and • Inferring that the assignment is NOT correct if the determined feeder bus node-specific result vectors do NOT match the feeder bus node-specific expectation vectors for a correct assignment. [5] Method according to claim 1 or 2 or 3 or 4 • Comparison of the determined feed-in bus node specific result vectors with feed-in bus node specific expectation vectors for a NOT correct assignment and • Inferring a predetermined concrete error if the determined feeder bus node-specific result vectors match the feeder bus node-specific expectation vectors for a NOT correct assignment. [6] Method according to one or more of claims 1 to 5 - the method being carried out when a vehicle is at rest. [7] Method according to one or more of claims 1 to 5 - wherein the method is carried out during operation of a vehicle. [8] Data bus system which is arranged and / or intended to carry out one or more of the methods according to claims 1 to 7.