Method for manufacturing a semiconductor body and semiconductor arrangement
Electrochemical porosification and mesa structuring in semiconductor layers address lattice mismatch issues, enabling defect-free growth and improved device performance by compensating for stress and maintaining crystalline quality.
Patent Information
- Application Number
- DE102020128680
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-10-30
- Publication Date
- 2026-05-28
- Estimated Expiration
- 2040-10-30
AI Technical Summary
The growth of semiconductor devices with high lattice constant mismatch results in high defect density and phase separation due to differing lattice constants, particularly in InGaN and InGaAIP materials, leading to manufacturing challenges and reduced crystalline quality.
A method involving electrochemical porosification of semiconductor layers to introduce porosity and mesa structures, reducing the impact of lattice constant differences by introducing cavities that compensate for stress and allow epitaxial growth without significant defects.
This approach reduces stress and defect formation, enabling high-quality epitaxial growth of layers with varying lattice constants, allowing for the production of semiconductor devices with improved electrical and optical properties.
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Abstract
Description
[0001] The present invention relates to a method for manufacturing a semiconductor body, in particular an optoelectronic component. The invention also relates to a semiconductor arrangement, in particular an optoelectronic component.
[0002] In the production of semiconductor devices, various or at least modified material systems are often used to create the necessary functionality. These material systems can have different lattice constants, meaning that the atoms in their lattice structure have different spacings in the respective material system. Besides the lattice spacing, electrical properties also change. A well-known diagram showing the relationship between the band gap and the lattice constant can be found at the following address: https: / / de.wikipedia.org / wiki / III-V-Verbin-dungshalbleiter# / media / Datei:III-V-Halbleiter.png. It shows the band gap plotted against the lattice constant in a wurtzite and a zincblende structure. The lines between the elements represent the ternary compounds. The wurtzite crystallization has two lattice constants, a and c, while zincblende has only one.
[0003] In optoelectronic components, for example, the increased indium content (more than 30%) causes difficulties in the growth of InGaN quantum wells that emit at wavelengths above 600 nm. This is due to the increased lattice spacing, which increases with rising indium content. Such InGaN-rich alloys have a large lattice.
[0004] The different lattice constants generally lead to a constant mismatch with the underlying GaN layers when such a material is deposited on a GaN buffer layer, resulting in a higher defect density and / or phase separation with different In concentrations.
[0005] A similar problem arises in the case of InGaAIP devices with improved temperature stability and / or efficiency. In this material system, the growth of carrier-limiting barriers on both sides of a multi-quantum well for light generation would favor a direct bandgap material with a larger bandgap. However, such a material would exhibit a significant lattice mismatch with the GaAs substrate and cannot be grown with good crystalline quality.
[0006] In general, the growth of specific compound semiconductors with a high lattice constant mismatch to the underlying layers is therefore difficult when high crystalline quality is required.
[0007] To avoid or at least reduce these problems, very thick, gradually adjusted buffers, lattice relaxation through defect induction, small patterning, and masking with dielectric masks are used, for example. However, thick layers or gradually adjusted buffer layers, for instance, have disadvantages in their electrical properties for some applications. Furthermore, the manufacturing effort and the control of the manufacturing conditions are increased.
[0008] Some aspects of this are also described, for example, in US 2017 / 0 237 234 A1 and in the printed document US 2020 / 0 227 255 A1.
[0009] However, there remains a need to specify a method for manufacturing a semiconductor device that can reduce the problems mentioned above. SUMMARY OF THE INVENTION
[0010] This need is addressed by the subject matter of claims 1 and 20. Further aspects are the subject of the dependent claims.
[0011] The following describes a method in which the holding force between the sapphire substrate and the layers forming part of the device is reduced. This lessens the impact of different lattice constants due to varying material systems. In particular, this reduces stress, enabling epitaxial growth even with minimal adjustment of the lattice constants. This is achieved by modifying individual layers using an electrochemical dissolution process.
[0012] The inventors propose a method for producing a semiconductor body, which in a first step involves providing an auxiliary substrate. Subsequently, a layer sequence is deposited on the substrate, including a first layer with a doped semiconductor material, in particular a III-V semiconductor material, and a second layer with an undoped semiconductor material on the first layer. In a subsequent step, the first layer is electrochemically porous, achieving a porosity of at least 20 volume%.
[0013] The inventors further propose the optional formation of mesa structures in the first porous layer and in the second layer. Subsequently, a functional layer sequence is created on the second layer. This functional layer sequence includes at least one planar third layer deposited on the second layer containing the mesa structures, wherein the at least one planar third layer has a specific lattice constant different from that of the second layer. The porosity can also be between 50% and 90% by volume.
[0014] Through porosification, spaces or cavities are introduced into the structure of the first layer. These cavities allow for the compensation of stresses without causing an increased number of defects in a layer applied over this porous layer. In other words, porosification can compensate for stresses caused by differing lattice constants in such a way that no lattice effects occur. This effect is further enhanced by an optional additional mesa structure. In some material systems, mesa structuring with porosification of the first layer is particularly suitable for compensating for even larger differences in lattice constant.
[0015] In this context, a lattice constant is understood to be the length of a unit cell in a defined material system. This material system is uniform and contains no defects or lattice flaws; it is therefore unstressed. The lattice constant is a characteristic value for each material system and, with respect to the unstressed material system, is also referred to as the specific lattice constant. Different material systems can thus have different specific lattice constants, as illustrated in the link above. Therefore, when material systems with different lattice constants are combined, a strain occurs in a boundary region between these systems, meaning the lattice constants change. This change decreases with increasing distance from the boundary region. Furthermore, excessively large differences in the lattice constants can lead to defects or flaws.The proposed method and the explanations provided allow this effect to be exploited in a targeted manner.
[0016] In the following, a functional semiconductor layer sequence or functional semiconductor body refers to a sequence of layers structured in such a way that it can perform an electrical function as a finished component. A functional semiconductor layer sequence can be divided into individual elements, with each individual element then exhibiting the desired functionality. An example of a functional semiconductor layer sequence would be a layer sequence that includes, for instance, a region suitable for light emission. Another example would be an npn junction, which has a transistor function. The layer sequence can also combine several functions.
[0017] An auxiliary substrate is a support made of an inert material that serves as a base for subsequent processes, particularly the epitaxial deposition of semiconductor materials. Examples of auxiliary substrate materials include sapphire (Al₂O₃), silicon nitride, and others. It can be advantageous for the material to be inert to the various etching processes used in the fabrication of semiconductor devices. In some cases, the auxiliary substrate remains attached to the device and becomes part of it; in this case, it is also referred to simply as the substrate. In other cases, a device fabricated on the auxiliary substrate is detached (as described below).
[0018] A semiconductor material is generally understood to be an undoped compound semiconductor material, unless explicitly stated otherwise. In this context, "undoped" means that no dedicated, deliberate, and intentional doping with another element or material is carried out. Defects or impurities, which are always present in practice, do not constitute doping within the meaning of this application. A compound semiconductor material is a combination of two, three, or more elements produced in a crystal structure such that a band structure is formed, and the resulting element exhibits semiconductor electrical properties. A typical compound semiconductor is a so-called III-V compound semiconductor, consisting of one or more elements from group 5 and one or more elements from group 3.Examples of compound semiconductor materials include GaAs, AlGaAs, GaN, AlGaN, InGaN, GaP, InGaP, AlGaP, AlInGaN, AlInGaP, and others mentioned here.
[0019] A doped semiconductor is a semiconductor material into which a dopant has been introduced. Depending on the desired doping, the dopant can be Si, Te, Se, Ge, or Ge for n-type doping in a III-V compound semiconductor, and, for example, Mg, Be, or C for p-type doping. Further dopants are listed in this application. The dopant is introduced during epitaxial deposition of the III-V compound semiconductor material, but doping can also be carried out subsequently by various methods. The dopant concentration is several orders of magnitude lower than the concentration of atoms in the starting or base material. For example, the concentration is in the range of 1 × 10⁻⁶. 17 dopants / cm³ 3 up to 5*10 21 dopants / cm³ 3 .
[0020] Electrochemical decomposition, or electrochemical etching, is a process in which a semiconductor material is dissolved using an electrical voltage and current. This allows a layer of the semiconductor material to be dissolved or etched. However, this process is not uniform but rather uneven, for example, due to dislocations or material defects. This can be exploited by selecting appropriate parameters, such as the applied voltage and the concentration of a dopant and the semiconductor material being etched. For example, different rates and porosities of the material being etched can be achieved. The term electrochemical porosification thus refers to an electrochemical process that selectively dissolves material from a body, leaving behind a porous or sponge-like structure.A porous semiconductor body or layer thus creates a network structure similar to a sponge or bone, which has sufficient stability while having low mass or material volume.
[0021] A layer can be subjected to a selective porosification process in which a structured mask is applied prior to the process. This mask reduces or prevents current flow in certain areas of the layer due to a phenomenon known as shading, resulting in no or very low porosity in the areas covered by the mask. Accordingly, a non-porosified semiconductor body does not exhibit a network-like or sponge-like structure, although it may still contain various defects or lattice flaws. Furthermore, in some applications, effects can occur at the interface where a section of an otherwise non-porosified area exhibits low porosity, particularly at the edges of such an area, with the so-called porosity level (see below) decreasing with increasing distance from the edges.
[0022] In non-porous areas, the penetration of electrolyte beneath the shaded areas during the electrochemical etching process is hindered or even prevented, thus preventing the formation of further etch channels or the expansion of existing channels by the electrolyte. As a result, the material removal rate is significantly lower beneath the shaded areas, leading to considerably less or even no porosity of the material there.
[0023] The term porosity describes the ratio of material volume to the total volume of the layer. A porosity of 30% therefore means that 30% of the original material has been removed. At a porosity of 90%, 90% of the material has been removed by the electrochemical deposition process, leaving only 10%.
[0024] After fabrication of the functional semiconductor layer sequence, in some aspects it is possible to detach the functional layer sequence from the first layer, with the second layer optionally remaining attached to the functional layer sequence. Alternatively, the functional layer sequence can be detached from the support substrate in such a way that the porous first layer remains attached to the functional semiconductor layer sequence and can optionally be used as an output coupling structure for electromagnetic radiation. In such embodiments, the porous first layer can also be further processed. For example, contact areas can be deposited on it.
[0025] In some aspects, the mesa structures are formed by first applying a structured mask to the second layer. Subsequently, both the second and the porous first layer are etched to create depressions. In some examples, these are designed as trenches in the porous first layer.
[0026] In some aspects, the mesa structures are formed after porosification of the first layer. However, depending on the material system used, it is also possible to form the mesa structures before the electrochemical porosification step.
[0027] Another aspect concerns the design of the first layer. In some implementations, the first layer is applied in stages. After the first stage, the application is interrupted, and a thin separating layer, particularly an undoped separating layer, is deposited. Epitaxial deposition of the first layer then continues. This divides the first layer into a region facing the substrate and a region facing away from it. In some implementations, the doping concentration differs between the regions of the first layer, or a different material system is used for the separating layer. By creating the first layer with varying doping concentrations and / or thin separating layers, different porosity levels can be achieved.This allows the porosity level to be adjusted both for the entire wafer and locally to meet the needs for growing further layers.
[0028] Another aspect concerns the creation of further structures within the first layer. In one aspect, the process of creating a layer sequence includes generating non-porosified areas. This is achieved by applying a structured mask to the second layer of the sequence to create non-porosified areas beneath the structured mask, and then removing the structured mask after electrochemically porosifying the first layer. This leaves areas of the first layer beneath the "shadowed" regions, meaning they are not porous or only very slightly so. These areas now exhibit different mechanical and electrical properties. For example, a non-porosified or only slightly porous area can generate stresses when the third layer is applied.In some aspects, this is used to create, for example, active areas that emit light with different wavelengths.
[0029] The functional layer sequence can thus consist of an active region for emitting light of a first wavelength above a porous region and an active region for emitting light of a second wavelength above a non-porous region. The different wavelengths are caused, among other things, by the strains resulting from different lattice constants above the porous and non-porous regions.
[0030] In some aspects, it may be advantageous to choose slightly larger dimensions for the structured mask than the non-porosity-modified area(s) of the first layer beneath the mask. The mask's shading prevents or reduces current flow along and beneath these areas in the first layer during the electrochemical process. This keeps the first layer material essentially intact. The slightly larger mask dimensions also compensate for any minor undercutting that may be present.
[0031] In some aspects, mesa structuring can be carried out before or after the selective porosification described above. This also allows for at least partial control of porosification. A combination of structured masking and mesa structuring can therefore be implemented, resulting in a structure after the individual process steps in which porosified and non-porosified areas of the first layer alternate, separated by a trench.
[0032] The depressions, particularly in the form of trenches, have a width in some configurations ranging from 5 nm to 500 nm, particularly from 20 nm to 300 nm, and especially less than 200 nm. The trenches can extend to the support structure, but can also end before it, or, if a separation layer is present in the first layer, end there.
[0033] To accommodate potential stresses resulting from differences in the lattice constant, the mesa structures, which may be trenches or depressions, should not be too large. The values mentioned above have proven suitable in experiments. However, the spacing between mesa structures should also not be too large to compensate for stresses caused by the trenches or depressions. A spacing between two adjacent mesa structures is proposed in the range of 400 nm to 4 µm, particularly in the range of 800 nm to 2.5 µm, and especially less than 2 µm. In some aspects, a ratio between the width of a mesa structure and the spacing between two mesa structures can be defined. This ratio can be in the range of 4 to 15, particularly in the range of 8 to 12, and especially in the range of 9.5 to 10.5.
[0034] Another aspect concerns deviations in lattice constants, particularly between the second and third layers that form part of the functional layer sequence. The lattice constant of the planar third layer can deviate from the lattice constant of the second layer by a maximum of 20%, specifically in the range of approximately 0.4% to 3%, and particularly in the range of 0.5% to 2.7%. GaN or GaAs-based materials can be used for the various layers, which in turn can be doped with Si, C, Ge, or Mg. The third layer of the functional layer sequence can, in particular, comprise an indium-containing layer. This layer can also be a superlattice or itself comprise a layer sequence. The indium content can range from 0.0001% to 25%, for example, from 2% to 20%.Later layers of the second semiconductor layer sequence, particularly those contributing to optical functionality, can have an indium content of at least 20%, particularly at least 40%, and especially in the range of 30% to 60%. In some embodiments, the indium content can even reach up to 100%. Alternative base materials are listed above. Doping can be performed during epitaxial deposition. This also allows the doping concentration to be continuously adjusted.
[0035] In one embodiment, the second layer consists of undoped GaN and the planar third layer of an indium-containing material, for example InGaN. The first layer is formed from doped GaN, with a doping concentration in the range of 1 × 10⁻⁶ 17 atoms / cm² 3 up to 5*10 21 atoms / cm² 3 lies.
[0036] The inventors have recognized that the orientation of the crystal structure, especially in mesa structuring, is a relevant factor in further reducing the defect density and obtaining a smooth surface during the deposition and growth processes. Therefore, in some aspects, it is proposed to orient coalescence surfaces in materials with a wurtzite structure so that they are perpendicular to the a-axis
[1120] .
[0037] Another aspect concerns the various configurations of the functional layer sequence. In some implementations, the epitaxial generation of a functional layer sequence involves the creation of a multiple quantum wave structure. This structure is designed to emit light of a specific wavelength. The multiple quantum wave structure can extend over at least one mesa structure. In some implementations, the multiple quantum wave structure extends over both porous and non-porous regions of the first layer. This results in a different band profile in the multiple quantum wave structure across the respective regions of the first layer due to existing strain. This is achieved because the strain locally alters the lattice constant, thus changing the stoichiometric composition of the grown material during the growth process, which in turn alters the band gap.This effect can be exploited, for example, in indium-containing material systems, since with increasing lattice constant the Ga / In ratio shifts towards indium and thus towards longer wavelengths. This allows light of different wavelengths to be generated.
[0038] The inventors discovered that, contrary to an obvious assumption, when the third layer is deposited on the mesa-structured second layer, material from the third layer does not, or only very little, enter the grooves. Specifically, the material of the third layer does not fill these grooves, but rather forms a bridge across them, leaving a void. Simultaneously, the mesa structure, in combination with the porous first layer, compensates for the stresses resulting from the altered lattice constant.
[0039] Another aspect concerns a semiconductor assembly or semiconductor body. In some aspects, this comprises a substrate and a sequence of layers with a first layer containing a doped semiconductor material and a second layer deposited thereon. This second layer contains an undoped semiconductor material, with the first layer including at least one porous region having a porosity of at least 20% by volume. Furthermore, a mesa structure consisting of several depressions is incorporated into both the first and second layers. A functional sequence of layers with at least one planar third layer is deposited on the second layer containing the mesa structure, the at least one planar third layer having a lattice constant different from that of the second layer.
[0040] The incorporated mesa structure, in combination with the porous first layer, reduces or even prevents stress in the third planar layer. This allows the use of material systems with different lattice constants, as the porosification enables relaxation of the third layer and the functional layer sequence.
[0041] In some aspects, the width of a depression or trench is less than 200 nm, and the distance between two depressions is less than 2000 nm. Further dimensions for trenches and the distances between them are given above. In some examples, the width of a depression is approximately 1 / 5 to 1 / 20 of the distance between two adjacent depressions.
[0042] In some other aspects, the first layer is not completely porous. Rather, at least one non-porous region can be provided, which is at least partially surrounded by a porous region. This enables various applications. For example, the non-porous region can serve as a support structure for a functional semiconductor body subsequently mounted on it. Similarly, the non-porous region could be used to introduce localized stress in subsequent layers, thereby changing the band gap or electrical properties.
[0043] It can be provided that at least one non-porous area is separated from the porous area by a trench forming the mesa structure.
[0044] Another aspect concerns the design of the functional layer sequence. In some embodiments, the functional layer sequence is configured with a multiple quantum wave structure deposited on the third layer. In some cases, a first region of the multiple quantum wave structure, located above a porous area of the first layer, is designed to emit light of a first wavelength, and a second region of the multiple quantum wave structure, located above a non-porous area of the first layer, is designed to emit light of a second, shorter wavelength.
[0045] In some other aspects, the first layer can have a first sub-region with a first porosity level and a second sub-region with a second porosity level, separated by a separating layer. This allows for the implementation of various applications that, for example, require spatially separated, different lattice constants. Furthermore, an additional separating layer can further reduce the defect density in the third layer.
[0046] In one embodiment, the first layer comprises an n-type doping layer, while the second layer is undoped, with both layers having the same base material. For example, the second layer may comprise an undoped GaN layer, and the third layer may be formed with InGaN containing an indium content in the range of 0.0001% to 25%, particularly less than 15%. The third layer may also be configured as a superlattice or may itself comprise a sequence of layers. Subsequent layers of the second semiconductor layer sequence, particularly those contributing to optical functionality, may have an indium content of at least 20%, particularly at least 40%, and particularly in the range of 30% to 60%. In some embodiments, an indium content of 100% may also be used, especially if the indium layer is very thin.During an epitaxial growth process, strain causes a local change in the lattice constant, thus altering the stoichiometric composition of the grown material. This allows, for example, the indium content in the growing material system to be varied locally, thereby changing the band gap. This makes it possible to create regions that generate light of different wavelengths within a single operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] Further aspects and embodiments of the proposed principle will become apparent in relation to the various embodiments and examples, which are described in detail in conjunction with the accompanying drawings. These show: Fig. 1 and Fig. 2 several steps of a process for manufacturing a functional semiconductor body, which implements some aspects of the proposed principle; Fig. 3A and Fig. 3B some aspects of a further embodiment according to the proposed principle; Fig. 4 and Fig. 5 Another embodiment with several process steps for the production of a functional semiconductor body, which realizes some aspects of the proposed principle; Fig. 6. A design of a possible mesa structure for a material system with wurtzite structure; Fig. 7 a further embodiment of a possible mesa structure for a material system with wurtzite structure; Fig. 8 Another embodiment with some process steps for producing a functional semiconductor body, which realize some aspects of the proposed principle; Fig. 9 Two top views of emission surfaces of optoelectronic components produced using the method according to Fig. 8 can be manufactured. DETAILED DESCRIPTION
[0048] The following embodiments and examples illustrate various aspects and their combinations according to the proposed principle. The embodiments and examples are not always to scale. Likewise, various elements may be enlarged or reduced to highlight specific aspects.
[0049] Furthermore, the individual figures, features, and aspects are not necessarily depicted at the correct size, and the proportions between the individual elements may not be entirely accurate. Some aspects and features are emphasized by being shown enlarged. However, terms such as "above," "above," "below," "below," "larger," "smaller," and the like are correctly represented in relation to the elements within the figures. Thus, it is possible to deduce such relationships between the elements from the illustrations.
[0050] The inventors recognized that the partial electrochemical decomposition (referred to here as porosification) of a precisely defined GaN-containing layer significantly reduces the holding force of a GaN epitaxy stack to the epitaxy substrate (sapphire or Si, GaN) or to other layers yet to be grown. This process etchs very uniform pores (in the range of 20 nm to 100 nm) – homogeneously distributed – into the specific GaN layer. The selectivity of the porosification can be achieved through a high n-doping (Si) of the GaN layer. This means that only sufficiently doped layers become porous. In addition to reduced adhesion, improved relaxation is also achieved. This means that porosification also reduces the force between the porous layer and subsequent layers to be grown.With differing lattice constants, porosification significantly reduces the stresses in the growing layer, allowing it to grow essentially without lattice defects. This effect can be exploited, firstly, by alternating porous and non-porous areas to create local stresses. Secondly, the stress compensation effect can be enhanced by introducing additional mesa structures with trenches, which can relax when overgrown, thus contributing to a reduction in stresses caused by differing lattice constants.
[0051] Due to the varying lattice constants in the layer grown in this way, epitaxial deposition of an indium-containing material results in the indium content being incorporated with varying stoichiometric compositions, depending on the existing strain and thus the different lattice constants. This local change in the indium content within the material system alters the band gap. Besides indium, this effect can also be achieved with aluminum or another material, which is incorporated with a stoichiometrically altered composition depending on the lattice constant, thereby changing the band gap.
[0052] Since chemical etching occurs via vertical dislocation of the material within the GaN epitaxy layer stack across the entire surface, "porosity" can occur across the entire wafer. The layer to be porous can be buried beneath further GaN or other material layers.
[0053] Alternatively, a laterally selective etching attack can be achieved through partial passivation of the surface during porosification. An applied mask prevents the buried areas in the first layer to be porosified from being laterally porosified or only minimally etched beneath the masked surface areas, resulting in different chemical and mechanical properties in subsequent process steps. Optionally, an additional second layer can be inserted between the first layer to be porosified and the subsequent layers forming the semiconductor device. This additional layer can then serve as a mechanical fracture surface in a further process step. In this way, different areas can exhibit varying degrees of porosity laterally or vertically, depending on the application and design.
[0054] Fig. 1 and Fig. Figure 2 shows an exemplary first embodiment of a method according to the proposed principle for the production of a semiconductor body in which the lattice stresses are reduced and which can be removed from a support particularly easily by means of a porous separating layer.
[0055] In a first step, a support substrate 1 is provided as an auxiliary support. In the present embodiments, this is a sapphire support substrate; however, a support substrate with a different material system can also be used. Suitable support substrates include, for example, silicon-based, silicon nitride-based, or, as shown, sapphire-based. The auxiliary support is selected, among other things, according to the material system used later.
[0056] In a next step S2, a first layer 2 of the layer sequence 4 is deposited onto the support carrier 1. This first layer 2 is also doped with a dopant during epitaxial deposition on the substrate of the support carrier 1. The thickness of the layer is in the range between 500 nm and 3 µm, for example, 1.5 µm. GaN or AlInGaP, or as another material system, AlGaAs, can be used, the latter for the fabrication of red LEDs. In the present embodiment, GaN is used as the material for the first layer, which is epitaxially deposited onto the support carrier 1 with silicon (Si) as a dopant. The doping concentration of silicon atoms is in the range of 10 × 10 19 atoms / cm² 3Additionally, prior to the epitaxial growth of the GaN layer 2, one or more thin buffer layers in the range of a few tens of nm to 100 nm can be deposited on the material of the support 1. These are not shown separately in step S2, but can be used for further planarization of the support 1. Furthermore, depending on the material system used, the additional buffer layers also serve as an etch stop or lattice-matching structure, or as a current-expansion layer for the subsequent electrochemical dissolution process.
[0057] In a subsequent step S3, an undoped GaN layer 3 is deposited onto the doped, epitaxially deposited GaN layer 2. Alternatively, AlInGaP can be used if layer 2 consists of doped AlGaAs or AlInGaP. The thickness of layer 3 is, for example, 100 nm (range from 20 nm to 150 nm) and is significantly thinner than the doped GaN layer 2. Consequently, layer 3 exhibits different mechanical, chemical, and electrical properties. The undoped GaN layer 3 and the doped GaN layer 2 together form layer sequence 4.
[0058] In step S4, the wafer produced in this way is subjected to an electrochemical delamination process. This is also known as the porosification process. A voltage is applied to the formed wafer structure and the layer sequence 4, causing an electric current to flow through the undoped GaN layer 3 and the doped GaN layer 2. This current causes a partial chemical decomposition of the doped GaN layer. This process is called porosification. During this process, the electrochemical process etches uniform pores with a size ranging from a few tens of nm to 100 nm into the doped GaN layer 2. It was found that the distribution of the pores is essentially homogeneous and mainly perpendicular to the sapphire surface.The etch rate, pore size, and associated material removal depend on the applied voltage, the current flow during the electrochemical process, the electrolyte used, and the concentration of dopants in GaN layer 2. It should be noted that the undoped GaN layer 3 is also attacked by the electrochemical process. Material removal occurs in both layers because they are not electrically insulating. However, the conductivity of the undoped GaN layer is significantly lower, so the silicon doping in layer 2 achieves selectivity during the porosification process.
[0059] In other words, the doped GaN layer 2 is attacked and etched much more intensely during the electrochemical process, resulting in material being removed, than the undoped GaN layer 3. Since the current in this example is applied across the entire surface of the wafer during porosification, the electrochemical process in layer stack 4 proceeds across the entire surface. The porosified layer 2a in step S4 is thus buried beneath the undoped GaN layer 3.
[0060] The amount of material removed during porosification is adjustable by the duration and the parameters described above. To ensure successful subsequent removal by laser lift-off or other mechanical methods, the inventors propose a porosity level of at least 20 volume%. It was found that up to a porosity level of approximately 90 to 95 volume%, the mechanical stability of the remaining material is still sufficient to allow the subsequent manufacturing steps. However, the high material removal significantly reduces the adhesive force between the substrate 1 and the porous GaN layer 2a, and between the latter and the undoped GaN layer 3. Therefore, a porosity level between 40 and 90 volume% is considered suitable.
[0061] After porosification of the first layer 2 of the layer sequence 4, the wafer produced in this way can be further processed to prepare it for the deposition of further layers with a different lattice constant. For this purpose, a structured mask is applied to the undoped GaN layer 3 in step S5. In this embodiment, the mask is represented in plan view as a plurality of strips. The ratio of the strip width to the distance between two adjacent strips is approximately 10. The distance between two strips in this embodiment is in the range of 1 µm to 2 µm. Such a distance and a width of approximately 100 nm to 200 nm can still be produced lithographically with current technologies.
[0062] Subsequently, in step S6, a selective etching process is carried out, etching through the undoped GaN layer and the porous layer to just before the support structure. This creates a mesa structure with narrow but deep trenches. The depth-to-width ratio of a trench is in the range of 5 to 14, and particularly in the range of 10. The structure produced in this way, in combination with the mesa-structured porous layer, offers the special property of being able to absorb strain caused by mismatched lattice constants. In other words, this layer is suitable for being overgrown with a material system of different lattice constants without causing strain and thus defects in the crystal structure. Rather, the mesa-structured porous layer 2a becomes strained, allowing a further layer to be grown without significant strain itself.This allows a layer grown on the mesa-structured porous layer to be produced without major defects and essentially planar, and this layer can therefore serve as a base layer for a functional semiconductor body or a functional semiconductor layer sequence.
[0063] The illustration of step S7 shows such a first step in the growth of an n-doped indium-containing layer 10, for example, an InGaN layer, whose lattice constant is larger than that of the layer sequence 4. The growth process of the n-doped InGaN layer 10 creates stresses in the layer sequence 4, which are compensated by the porous regions 2a and the mesa structure in the layer sequence 4. As a result, the InGaN layer 10 grows essentially without defects. Additionally, material bridges are formed during the growth process, spanning the trenches 20. In other words, the InGaN material of layer 10 grows only slightly into the trenches 20, primarily in the surface region of the undoped GaN layer 3, but does not fill these trenches.
[0064] This creates cavities, as shown in step S7, which can absorb the crystal strains in layer sequence 4. By varying the porosity across layer 2c or by using further lithographic or epitaxial techniques, a high degree of relaxation can be achieved in layer sequence 4, so that the defect density in layer 10 remains low. After the growth process, the grown layer 10 thus has a substantially planar and defect-free surface, allowing further layers of a functional semiconductor or a functional layer sequence 6 to be deposited on it with high quality. Step S8 shows the fabrication of such a layer sequence 6, in which the layer is n-doped during the growth process.
[0065] On this n-doped layer 10, further layers 11 and 12 are deposited. Layer 11 forms a multiple quantum well for the emission of light of a defined wavelength. Layer 12 is formed by a p-doped GaN or a p-doped AlInGaP layer. The use of a GaN layer is particularly easy to implement. Alternatively, however, layer combinations, e.g., of p-doped InGaN / AlGaN / GaN layers, can also be formed. Thus, layer sequence 6 forms a device which, when an electric current flows through it, generates light of a defined wavelength. The wavelength is determined by the band structure of the multiple quantum well, which in turn depends on possible strains in the underlying layer 10. Due to the low defect density and the essentially planar surface, the defect density of the multiple quantum well is also low in this example, so that a high radiative recombination rate can be achieved.
[0066] In step S9, the component(s) produced in this way are transferred from the auxiliary carrier 1 to a final carrier substrate 5. For this purpose, the final carrier substrate 5 is covered with a metallization layer 70, which forms the p-contact for contacting the functional layer sequence 6. The p-doped layer 12 is attached to the metallization layer 70 using a solder. Subsequently, the auxiliary carrier 1 is removed by means of a laser lift-off or another method. Due to the porosity of the areas 2a, the adhesive force between the auxiliary carrier 1 and the porous areas 2a is significantly reduced. This also reduces the energy input required for a laser lift-off process, resulting in only minimal surface damage.
[0067] In a further process step S10, any remaining structures of layer sequence 4 can be removed after a laser lift-off, exposing the planar layer 10. A further metallized contact area 7 is then applied to this layer, resulting in a vertical light-emitting diode (LED). This structure is shown as the result for a single LED in step S10.
[0068] Alternatively, the mesa-structured and porous layer 2a can also remain on the device and serve both for electrical contacting and as a coupling structure. Such an embodiment is described in step S10' of the Fig. Figure 2 shows that metallic contacts 7a are deposited on the porous regions 2a. Since the porous regions and the underlying layer 3 are conductive, current flows through the various layers 2a, 3, 10, and 12 in this example as well, resulting in charge carrier recombination in the multi-quantum well 11. Furthermore, the porous regions 2a are used as a coupling structure because they form a refractive index transition between layer 3 and the air medium. Therefore, in this embodiment, additional roughening of layer 10 or further coupling structures and measures could be omitted.
[0069] Depending on the application, various variations of the proposed principle, i.e., the porosification of a first layer of a layer sequence, are now possible.
[0070] Fig. Figure 3A shows such an example, in which differently doped areas are proposed to generate different degrees of porosity. Fig. Figure 3A shows the result of the first steps in the manufacturing process of a semiconductor device. A first layer 2 was deposited on a substrate 1, comprising a region 2' adjacent to the substrate 1 and a region 2''. Regions 2' and 2'' are separated by a thin separating layer 3b. Separating layer 3b serves as a predetermined breaking point and comprises AlGaInN or silicon nitride (SiN), the latter, for example, as a monolayer. Furthermore, layer 3b separates different doping concentrations. Thus, the doping levels of regions 2' and 2'' differ, resulting in different porosity levels during a subsequent electrochemical process. In the present embodiment, the doping concentration in region 2' is significantly higher than in region 2''.As a result, significantly more material is removed and decomposed during the electrochemical process in region 2' than in region 2'', which is closer to the undoped GaN layer 3.
[0071] The structure produced in this way is particularly suitable, for example, as an output coupling structure. After forming a functional semiconductor body configured for light emission, the auxiliary carrier is separated from the material 2' and the separating layer 3b. In a further step, the predetermined breaking point 3b can also be removed, so that only the porous region 2'' of the first layer remains on the device. The porosity of this porous layer is chosen such that layer 2'' serves as the output coupling structure, since its pore structure forms a suitable refractive index step. Subsequent roughening with KOH or other measures is therefore unnecessary.
[0072] Fig. 3B shows the structure of the Fig. 3A after a mesa structuring, as in the previous example of the Fig. The etching process was carried out in steps S5 and S6. It penetrated the two sub-areas 2' and 2'' as well as the thin separating layer 3b and extends to just before the auxiliary support 1. As in the previous example, the structure produced in this way can be overgrown with another material system of different lattice constants without causing stress or defects.
[0073] Fig. 4 and Fig. Figure 5 shows various steps of a further development of the proposed principle, in which additional measures and a structuring of the layer sequence 4 are carried out before the formation of a mesa structure. This allows for further applications.
[0074] Steps S1 and S2 are the same as in the exemplary embodiment of the Fig. 1 or Fig. 2. Thus, after providing an auxiliary support 1, a doped GaN layer 2 is epitaxially grown. A thin sulfur break or separation layer 3a is then deposited on the doped GaN layer 2. This layer can be formed, for example, from AlGaInN or from intrinsic silicon nitride, such as a monolayer SiN, and in the present embodiment also extends over the entire wafer. The undoped GaN layer 3 is then epitaxially deposited over the thin sulfur break layer 3a. The resulting layer sequence 4 on the support substrate 1 is in Fig. 4 shown in step S3.
[0075] In step S3, a structured mask 8 is applied to two locations on the undoped GaN layer 3. The mask 8 is chemically inert to the subsequent electrochemical porosification step and is, for example, a hard mask. As shown in step S4, the electrochemical porosification is carried out after the application of the structured mask 8. The structure of the mask 8 acts as a shading layer, so that areas below the mask 8 in the first layer 2a are not porous or etched, but remain as non-porous areas 2b. In the example of steps S3 and S4, these are two areas that are a few µm wide and essentially form squares in plan view. However, other dimensions and / or a different number of such areas can also be provided. Likewise, the shape can be different, for example as polygons, circles, or rectangles.
[0076] The reason for this selective porosification is that the insulating properties of mask 8 largely prevent current flow through layer 3, layer 3a, and the first layer 2. In other words, current always takes the path of least resistance (and thus usually the shortest path if the resistivity is constant) and would therefore not flow beneath the areas covered or shaded by mask 8 during the electrochemical process. As a result, porosification due to current flow occurs primarily in the unshaded areas of the first layer, leading to the formation of porous regions 2c. Similarly, the penetration of electrolyte beneath the shaded areas during the electrochemical etching process is hindered or prevented, thus preventing the formation of further etch channels there.Existing channels are not enlarged by the electrolyte.
[0077] The dimensions of mask 8 are adapted to the dimensions of the subsequent non-porosified area 2b. Although the surface resistance beneath the mask is higher and the current flow there significantly lower, slight underetching still occurs to a limited extent in the edge region. Due to the underetching during electrochemical porosification, it is advantageous to design the lacquer mask 8 to be slightly larger than the intended dimensions of the subsequent non-porosified area. This compensates for the slight underetching beneath the mask and thus into the shaded area. For nitrides, this underetching can range from 200 nm to approximately 800 nm; for materials based on GaAs or GaP, the underetching can also exceed 1000 nm. The dimensions and lateral extent must be selected accordingly.
[0078] In the subsequent process step S5, mask 8 is removed and replaced with mask 8a, which is applied to the surface of layer 3 to create the mesa structure. The mask is designed such that parts of the non-porous areas 2b are covered by the mask structure. Only at the edges between the porous and non-porous areas of layer 2 are there recesses in the mask. Furthermore, a mask structure is also arranged over the remaining modified areas 2c, which has recesses at periodic intervals. This creates a mask structure 8a, which can be used to etch the mesa structure described in the previous examples.
[0079] Process step S6 shows the result after such a selective etching process, in which trenches 20 are etched into the layer sequence 4 at regular intervals. In particular, two trenches 20 are provided adjacent to the non-porosified areas, so that each trench 20 separates a porous area 2c from a non-porosified area 2b.
[0080] The AlInGaN layer 10 is then deposited onto the structure thus produced. As in the previous examples, this layer is p-, n-, or undoped, depending on the application and desired design of the device. The additional mesa structures reduce strain in layer 10, allowing it to grow as defect-free and planar as possible. A multi-quantum well 11 is deposited on the grown layer 10, followed by a doped layer 12. Layers 10, 11, and 12 form layer sequence 6 of the functional semiconductor layer sequence. Subsequently, a structured mask 8b is applied to the deposited layer 12. Mask components cover the non-porosified regions 2b and the adjacent grooves 20, as well as a portion of the subsequent porous regions 2c. Parts of the surface of layer 12 remain exposed between the individual masks 8b.
[0081] In a subsequent selective etching process, shown in step S7, the free regions of layer 12, as well as the underlying regions of the multiple quantum well structure 11 of layer 10 and layer sequence 4, are etched. This divides the semiconductor layer sequence into individual functional devices. The etch trench 20' extends from the surface of the semiconductor layer sequence 6 to approximately the substrate 1. Following this etching step, contact areas 7A and 7 are provided in the respective devices. Contact area 7A is electrically insulated from layer 12 and the multiple quantum well 11, and contacts the doped buried layer 10. Contact area 7 directly connects to layer 12.
[0082] The grooves 20' created by the selective etching process allow the porous areas 2c to be accessed and removed using a wet-chemical and selective etching process. This leaves the column-like structures 20b, depicted in process step S8, made of non-porous material, forming a support structure for the components located on them. The selective process also slightly roughens layer 3a and layer 3, enabling them to serve as output structures for the light generated in the multi-quantum wave. These columns can assume different shapes depending on the design. In some aspects, the support structure can form a truncated cone, a truncated pyramid, or a trapezoid, with the smaller base of this body connected to the component. In other words, the diameter decreases towards the component.This decrease in diameter, or more generally, a change in diameter, is achieved through varying doping levels during the epitaxial deposition of the first layer. The doping also controls the rate of porosification, thus influencing the undercutting beneath the shaded areas.
[0083] In one or more further process steps, as shown in step S9, a stamp pad 30 is selectively applied to the functional semiconductor body 60, and subsequently, the functional semiconductor body is separated from the column and holding structure 20b by means of a mechanical process or a laser lift-off process. The semiconductor body 60 now adheres to the stamp pad 30 and can be transferred for further processing or further processing. The remaining depressions in layer 3a or 3, caused by the structuring, can serve as additional extraction structures or be filled with a suitable material.
[0084] Depending on the material system, various prerequisites may be necessary or need to be considered for the production of a mesa structure to reduce possible stress on layers grown on it.
[0085] Firstly, the thickness of the layer to be porous, and therefore also the height of the trenches, should not exceed a few micrometers to ensure sufficient stress compensation. Secondly, if the ratio between depth and width of the trench is too large, it cannot be etched uniformly, resulting in a triangular depression in cross-section instead of the essentially rectangular shape shown in the cross-sectional diagram. Therefore, the thickness of the layer to be porous, as in the previous examples, should be approximately 1 µm to 2 µm, or possibly only 500 nm.
[0086] With a width of the same order of magnitude as the height of layer 2, for example in step S6 of the Fig. As shown in Figure 1, the width of the trenches can be chosen to be approximately ten times smaller than the width of the respective section of layer 2 to be porous. This results in the solution described in step S6 of the Fig. 1. Square cross-sectional area shown. In general, the trenches should be as narrow as possible, but large enough to ensure relaxation, i.e., stress compensation of the prestressed layer applied to layer sequence 4.
[0087] The various etching and masking steps are achieved through different lithography processes. For the formation of the mesa structure, both a wet-chemical and a dry-chemical etching process are feasible for layer 2a.
[0088] The Fig. 6 and Fig. Figure 7 shows various geometries for such a mesa structure in a top view. Depending on the material system, it is necessary to form the mesa structures along a predefined axis or orientation. In the Fig. 6 and Fig. Figure 7 illustrates this using a wurtzite structure for nitride-based material systems. In a wurtzite structure, it is advantageous to orient the coalescence surfaces 21 so that they are essentially perpendicular to the a-axis
[1120] . This ensures that the trenches of the mesa structure are also etched parallel to the coalescence surfaces, resulting, for example, in the Fig. 6 structures shown.
[0089] Another design form, in which mesa structures are executed as periodic hexagons, shows Fig. 7. The trenches and coalescence surfaces 21 are designed to form polygons, and in particular a hexagonal structure. The edge length of this hexagonal structure is, as shown, less than 2 µm, and the width of a trench is essentially one-tenth less, i.e., in the range of 200 nm or less.
[0090] Fig. Figure 8 shows a further embodiment and an application in which porous and non-porous regions are used to create a light-emitting semiconductor body that emits light of different wavelengths. In the first process step shown, as already explained in the previous examples, an auxiliary support 1 is provided onto which a doped GaN layer 2 is deposited. An undoped layer of the same material system is then deposited on this layer, resulting in the layer sequence 4 shown in process step S1.
[0091] In subsequent process steps, a mask structure 8 is first deposited on the surface of the undoped GaN layer 3. The resulting structure is then subjected to an electrochemical deposition and decomposition process, primarily porousing the unshadowed areas of the doped layer 2. At the points where the mask 8 covers layer 2, no dedicated porosification occurs due to the reduced or non-existent current flow, as explained above. Consequently, these areas essentially remain composed of continuous doped GaN material. Therefore, no subsequent reduction of stresses due to porosification is expected in areas 2b.
[0092] In a further process step, shown in S3, mask 8 is removed and mask 8b is reapplied to layer 3. However, the mask structuring is performed such that part of mask 8b is positioned over the non-porous areas 2b. Similarly, mask sections are deposited over the porous areas 2c. A small open area is left between each mask section, exposing layer 3 underneath. The position of this open area is chosen to lie essentially along the interface between the porous areas 2c and the non-porous areas 2b. Subsequently, a selective etching process can be performed, creating grooves at the interfaces between areas 2b and 2c down to the support 1.This creates a structure that separates the porous areas 2c from the non-porous areas 2b by a trench.
[0093] The resulting mesa structure is then overgrown with an indium-containing layer, in this case a GaN layer 10. As in the previous examples, the InGaN layer forms bridges between the individual trenches 20, so that the trenches essentially remain as cavities and are not overgrown. However, the InGaN material can at least partially penetrate into the upper part of the trenches between the undoped layer 3.
[0094] Due to the non-porous areas 2b, the deposited material of layer 10 is strained over these areas, which manifests itself in a change and strain of the lattice structure. Whether this strain leads to additional lattice defects depends on the design of the dimensions and the difference in the two lattice constants between the doped InGaN layer 10 and the undoped layer 3.
[0095] In further deposition processes, layer 12, containing a different multiple quantum well, is deposited on layer 10. Layer 12 comprises AlInGaN, which, depending on the specific configuration, is doped or has a doping gradient. Due to the strains introduced by the non-porosified regions 2b, the band structure and thus the band gap of the multiple quantum well 11 change. This is achieved by the strains propagating through layer 10 and extending into layer 12 and the multiple quantum well 11. For this to occur, it is necessary to make the InGaN layer 10 as thin as possible while remaining planar, in order to transmit the strain through layer 10 into layer 11. As a result, the strains lead to the emission of light of different wavelengths.This resulted in a wide range of possible wavelengths being achievable through a suitable choice of tension and material system.
[0096] An electronic component manufactured in this way is available in various alternative configurations in Fig. Figure 9 shows a top view. The emission surfaces are visible, with the multi-quantum well and any porous areas of varying porosity located below them. By appropriate porosity and the introduction of a mesa structure, different stresses can be generated in the material above. The resulting different band gaps due to the altered indium content, caused by these stresses, lead to the emission of light with different wavelengths. In this way, in a suitable material system, such as the AlInGaN mentioned above, light emission in the blue, green, and red ranges can be achieved through this stress.
[0097] In the left part of the figure Fig. Figure 9 shows the area b in the upper left with the greatest strain; for example, a non-porous layer 2b is located there. Area r, in contrast, has significantly less strain, so the multiple quantum well emits primarily red light there. The two lower areas g have a porosity level between that of the blue and red areas b, r, so the multiple quantum well is slightly strained here and thus emits light in the green range. Alternatively, such a pixel with a blue, red, and green emitter surface can also be arranged side by side. Such a configuration is shown in the right part of the Fig. Figure 9 shows areas with varying degrees of porosity designed to generate light in the blue, red, and green spectrum.
[0098] To create different degrees of porosity, for example, the individual masks 8 are to be arranged as in step S2 of the Fig. As shown above, the surface can be selectively removed and then the electrochemical deposition process continued. For example, to create different porosity levels to form blue, red, and green emitter areas, a shadow mask 8 can be applied to the future blue and green emitter areas. The red area remains untreated.
[0099] Subsequently, an initial electrochemical delamination process is performed, creating initial porosity for the red emitter area. This electrochemical delamination process is then stopped, the mask over the green area is removed, and the electrochemical delamination process is then resumed. Accordingly, the red and green areas (or layer 2, which will later lie beneath the multiple quantum well) are further porous. This allows for different porosity levels to be achieved in the respective areas. Alternatively, as in the... Fig. 3A and Fig. 3B additional layers are provided which create differences in porosity and can thus be used to form the differently colored areas. REFERENCE MARK LIST 1 Auxiliary carrier 2 first doped layer 2', 2'' areas of the first doped layer 2a porous first layer 2b non-porous area 2c porous area 3 second undoped layer 3a, 3b separating layer 4-layer sequence 5 carriers 6 functional semiconductor bodies 7, 7a Contact areas 8, 8a, 8b Paint mask 10 shifts 11 Multiple quantum wells 12 layers 20' trench 20 Mesa structure 20b Support structure 21 coalescence area 30 stamps 60 functional semiconductor bodies 70 contact area
Claims
A method for producing a semiconductor body comprising: - providing an auxiliary support (1); - producing a sequence of layers with a first layer (2) comprising a doped semiconductor material and a second layer (3) deposited thereon, comprising an undoped semiconductor material; - electrochemically porosifying the first layer (2) of the sequence, wherein a porosity degree is at least 20 volume %; - forming mesa structures in the second layer (3) and at least partially in the porosified first layer (2, 2a); - epitaxially producing a functional sequence of layers (6) with at least one planar third layer (10) deposited on the second layer (3) provided with mesa structures, wherein the at least one planar third layer (10) has a specific lattice constant different from that of the second layer (3). The method of claim 1, further comprising one of the following steps: - detaching the functional layer sequence (6) from the first layer (2), wherein optionally the second layer (3) remains attached to the functional layer sequence (6); or - detaching the functional layer sequence (6) from the auxiliary carrier (1), wherein the porous first layer (2a) remains attached to the functional semiconductor layer sequence (6) and is optionally configured as an output coupling structure for electromagnetic radiation. Method according to one of the preceding claims, wherein the functional layer sequence (6) comprises at least one active area designed for light emission. Method according to one of the preceding claims, wherein the formation of mesa structures comprises: - generating a structured mask (8) on the second layer (3); - etching the second (3) and the porous first layer (2) to form depressions, in particular in the form of trenches in the porous first layer (2). Method according to one of the preceding claims, in which, in the step of generating a layer sequence during an epitaxial deposition of the first layer (2), a thin separating layer (3b), in particular an undoped separating layer, is deposited, so that the first layer (2) is divided into a region (2') facing the auxiliary carrier (1) and into a region (2") facing away from the auxiliary carrier (1). Method according to one of the preceding claims, wherein in the step of generating a layer sequence during an epitaxial deposition of the first layer (2) a dopant with at least 2 different dopant concentrations is introduced into the first layer (2). A method according to any of the preceding claims, wherein the step of generating a layer sequence comprises generating non-porosified areas by: - applying a structured mask (8) to the second layer (3) of the layer sequence to generate non-porosified areas below the structured mask (8); and - removing the structured mask (8) after electrochemical porosification of the first layer (2). Method according to claim 7, wherein dimensions in the structured mask (8) are selected to be somewhat larger than the non-porosifying area(s) of the first layer (2) below the structured mask (8). Method according to one of claims 7 or 8, wherein the functional layer sequence (6) is configured with an active region designed to emit light of a first wavelength over a porous region and an active region designed to emit light of a second wavelength over a non-porous region. Method according to claim 4, wherein the depressions, in particular in the form of trenches, have a width in the range of 5 nm to 500 nm, in particular in the range of 20 nm to 300 nm and further in particular less than 200 nm, wherein the trenches optionally extend to the auxiliary support (1). Method according to one of claims 4 or 10, wherein two adjacent trenches have a distance in the range of 400 nm to 4 µm, in particular in the range of 800 nm to 2.5 µm and in particular less than 2 µm. Method according to one of claims 4, 10 or 11, wherein a ratio between a width of a mesa structure and the width of a trench is in the range of 4 to 15, in particular in the range of 8 to 12, and in particular 9.5 to 10.
5. Method according to one of the preceding claims, wherein the lattice constant of the planar third layer (10) deviates from a lattice constant of the second layer (3) in the range between 0.2% and 3%, in particular in the range of 0.5% to 2.7%. A method according to one of the preceding claims, wherein the first layer (2) and the second layer (3) comprise at least one of the following materials: - GaN; - GaP; - AlGaN; - InGaN; - AlInGaN; - AlInGaP; and - AlGaAs; and the first layer (2) is provided with a dopant during epitaxial deposition. Method according to one of the preceding claims, wherein the second layer (3) comprises undoped GaN and the planar third layer (10) comprises an indium-containing material, with an indium content in the range between 0.0001% and 25%. Method according to one of the preceding claims, wherein coalescence surfaces in materials with a wurtzite structure are oriented such that they are perpendicular to the a-axis [1120]. Method according to one of the preceding claims, wherein the epitaxial generation of the functional layer sequence (6) comprises:- generating a multiple quantum wave structure configured to emit light of one wavelength, wherein the multiple quantum wave structure extends over at least one mesa structure. Method according to one of the preceding claims, wherein the epitaxial generation of the functional layer sequence (6) comprises: - depositing the planar third layer (10) onto the mesa-structured second layer (3), wherein the mesa structure remains substantially unfilled. Method according to claim 18, wherein the material of the planar third layer (10) forms a bridge over an end region of the mesa structure facing away from the auxiliary support (1). Semiconductor arrangement comprising: - a support carrier (1); - a layer sequence (4) with a first layer (2) comprising a doped semiconductor material and a second layer (3) deposited thereon, which comprises an undoped semiconductor material; wherein - the first layer (2) comprises at least one porosified region (2a) whose porosity is at least 20 volume%; and - a mesa structure consisting of several depressions is incorporated in the first and second layers (2, 3); - a functional layer sequence (6) with at least one planar third layer (10) deposited on the second layer (3) provided with the mesa structure, wherein the at least one planar third layer (10) has a lattice constant different from that of the second layer (3);wherein the first layer (2) comprises at least one non-porous area (2b) which is at least partially surrounded by a porous area (2c) and which at least one non-porous area (2b) is separated from the porous area (2c) by a trench (20) forming the mesa structure. Semiconductor arrangement according to claim 20, wherein the width of the depression is approximately 1 / 5 to 1 / 20 of the distance between two adjacent depressions. Semiconductor arrangement according to one of claims 20 to 21, wherein the functional layer sequence (6) comprises a multiple quantum well structure applied to the planar third layer (10). Semiconductor arrangement according to claim 22, wherein a first region of the multiple quantum wave structure lying over a porous region of the first layer (2) is configured for the emission of light of a first wavelength and a second region of the multiple quantum wave structure lying over a non-porous region of the first layer is configured for the emission of light of a second shorter wavelength. Semiconductor arrangement according to one of claims 20 to 23, wherein the first layer (2) has a first sub-area with a first porosity degree and comprises a second sub-area with a second porosity degree, wherein the first sub-area is separated from the second sub-area by an optional separating layer (3b). Semiconductor arrangement according to one of claims 20 to 24, wherein the first layer (2) comprises n-doping and the second layer (3) is undoped, wherein the first and second layers (2, 3) have the same base material. Semiconductor arrangement according to one of claims 20 to 25, wherein the second layer (3) comprises an undoped GaN layer and the planar third layer (10) comprises InGaN with an indium content in the range of 0.0001% to 25%, in particular in the range of 5% to 20%.
Citation Information
Patent Citations
A method for GAN vertical microcavity surface emitting laser (VCSEL)
US20170237234A1
Method for porosifying a material and semiconductor structure
US20200227255A1
Iii-nitride light emitting device including porous semiconductor layer
WO2010112980A1
Semiconductor structure and method for forming the same
WO2012065536A1
