Optical device, system and method for phase shifting an optical signal

Abstract

An optical device (102, 202, 402, 502) comprising the following: an optical waveguide (104, 204, 404, 504) comprising a first semiconductor material region (110, 210, 410, 510) and a second semiconductor material region (112, 212, 412, 512) defining a transition between them, the transition being a PN junction (114, 214, 414) formed at the touching boundaries of the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512); an insulating layer (116, 216, 416, 516) formed on top of the optical waveguide (104, 204, 404, 504); and a III-V semiconductor layer (118, 218, 418, 518) formed on top of the insulating layer (116, 216, 416, 516) causes an optical mode (107, 207, 407, 507) of an optical signal traveling through the optical waveguide (104, 204, 404, 504) to overlap with the first semiconductor material region (110, 210, 410, 510), the second semiconductor material region (112, 212, 412, 512), the insulating layer (116, 216, 416, 516), and the III-V semiconductor layer (118, 218, 418, 518), thereby causing a phase shift in the signal traveling through the optical waveguide (104, 204, 404, 504) running optical signal is created.

Description

DECLARATION ON THE RIGHTS OF THE GOVERNMENT

[0001] This invention was made with government support under Award No. DE-AR0001039 from the DOE, Office of ARPA-E. The government holds certain rights to this invention. BACKGROUND

[0002] Phase shifters are typically used in photonic integrated circuits to control the phase of an optical signal. They are widely used in many optical devices, such as optical modulators and Mach-Zehnder (MZI) optical interferometers. Since there are no other significant electro-optical effects on silicon, silicon photonics-based optical phase shifters are generally designed to induce a phase shift in an optical signal through a plasma dispersion effect. Common types of optical phase shifters used in photonic integrated circuits include PN and PIN junctions, as well as metal-oxide-semiconductor capacitors (MOSCAPs).

[0003] In the phase shifters mentioned above, the densities of free charge carriers (e.g., free electrons and holes) can be controlled by a plasma dispersion effect when an electrical voltage is applied to the respective phase shifter. For example, to achieve a phase shift of the optical signal, the PN junction can be operated in a carrier depletion mode, while the PIN junction can be operated in a carrier injection mode. A MOSCAP structure generally consists of two semiconductor layers and a thin insulating layer between them. Thus, when an electric field is applied to the semiconductor layers, free charge carriers accumulate on both sides of the insulating layer. Changing the density of free charge carriers in a particular region alters the refractive index of that region.A change in the refractive index causes a phase shift of the optical signal passing through the affected region. However, this plasma dispersion effect in silicon is relatively weak when it comes to producing the desired changes in the refractive index, resulting in a less efficient optical phase shift.

[0004] US 9 523 870 B2 concerns a vertical PN silicon modulator.

[0005] US 10,381,801 B1 relates to a device comprising a structure over an air gap. US 8,937,981 B2 relates to directly modulated lasers.

[0006] US 10 241 354 B1 relates to an electro-optic modulator with a periodic transition arrangement.

[0007] The present invention is defined by independent claims 1, 12 and 18. Embodiments are the subject of the respective dependent claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The following describes various examples with reference to the figures below. Fig. Figure 1 shows a cross-sectional view of an exemplary optical device. Fig. Figure 2 shows a cross-sectional view of another example of an optical device. Fig. 3A and Fig. Figure 3B shows graphical representations of the simulated free charge carrier distributions for different control voltage settings for the exemplary optical device of Fig. 2. Fig. Figure 4 shows a cross-sectional view of another example of an optical device. Fig. Figure 5 shows a cross-sectional view of another example of an optical device. Fig. Figure 6 shows a block diagram of an exemplary electronic system with an exemplary optical device. Fig. Figure 7 shows a flowchart of an exemplary procedure for manufacturing an exemplary optical device. Fig. Figure 8 shows a flowchart of an exemplary procedure for operating an exemplary optical device.

[0009] It is emphasized that the various features in the drawings are not drawn to scale. Rather, the dimensions of the various features in the drawings have been arbitrarily enlarged or reduced to ensure better clarity. DETAILED DESCRIPTION

[0010] The following detailed description refers to the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and in the following description to indicate identical or similar parts. It is expressly stated that the drawings are for illustration and description purposes only. Although several examples are described in this document, modifications, adaptations, and other embodiments are possible. Accordingly, the following detailed description does not limit the disclosed examples. Instead, the proper scope of the disclosed examples can be defined by the accompanying claims.

[0011] Optical systems comprise optical devices capable of generating, processing, and / or transmitting optical signals from one point to another. In certain embodiments, optical systems, such as optical communication systems, can facilitate data transmission over greater distances with higher bandwidth and smaller cable widths (or diameters) compared to communication systems using electrical wires. In an optical communication system, an optical signal (i.e., light) can be generated by a light source, such as a laser. This optical signal can then be modulated with an information signal using an optical modulator, and this modulated optical signal can be transmitted via an optical fiber to an optoelectronic receiver. The optoelectronic receiver can demodulate the received signal to extract the information signal transmitted by the optical signal.

[0012] Optical components, such as an optical modulator, can use a phase shifter to shift the phase of an optical signal and achieve a desired modulation. Phase shifters implemented using silicon photonics typically employ the well-known plasma dispersion effect to adjust the phase of the optical signal, as there are no other significant electro-optical effects on silicon. The most common types of optical phase shifters that utilize the plasma dispersion effect are a PN junction in carrier depletion mode, a PIN junction in carrier injection mode, and a MOSCAP junction in carrier accumulation mode. In these phase shifters, the free carrier densities in the respective regions can be controlled by applying an electrical voltage to the phase shifter, resulting in a phase shift of the optical signal passing through the region.

[0013] Using experimental results, a refractive index change (Δn) for silicon at the optical wavelengths 1310 nm and 1550 nm can be expressed using equations 1 and 2 respectively, as shown below. Δn(@1310nm)=−2.98×10−22×ΔN1.016−1.25×10−18×ΔP0.835 Δn(@1550nm)=−5.4×10−22×ΔN1.011−1.53×10−18×ΔP0.838

[0014] In equations 1 and 2, ΔN and ΔP represent a change in the density of free electrons and a change in the hole density, respectively. Based on the equations above, it is clear that a change in hole density allows for a larger refractive shift than a change in free electrons. For example, even a smaller change in hole density compared to a change in electron density leads to a larger variation in the refractive index change (Δn) due to the different values ​​of the multipliers of ΔP and ΔN in equations (1) and (2). One way to improve the efficiency of the phase shift is therefore to create more holes in a silicon waveguide. This is generally achieved by forming material regions (e.g., p-doped regions and n-doped regions) that form plasma dispersion effect transitions (e.g., PN or PIN junctions) in the silicon waveguide.In the case of silicon waveguides, however, the plasma dispersion effect is less efficient at generating a larger number of holes. This leads to smaller fluctuations in the refractive index of the silicon waveguide and thus to inefficient optical phase shifting. Another commonly used technique to improve phase shift efficiency is to increase the total density of free charge carriers (e.g., both electrons and holes) in the silicon waveguide. However, this can lead to increased optical losses due to the absorption of the optical signal by the free carriers.

[0015] As presented in the examples below, an optical device with a phase shifter is introduced, comprising an optical waveguide with a PN or PIN junction and a waveguide-integrated capacitor. In particular, in some examples, the optical waveguide includes a first semiconductor material region (e.g., a p-type silicon region) and a second semiconductor material region (e.g., an n-type silicon region) that are adjacent to each other and define a junction (e.g., a PN junction) between them. Furthermore, in some examples, a III-V semiconductor layer (e.g., with n-type doping) is heterogeneously integrated into the optical waveguide by a thin oxide compound layer (also referred to as an insulating layer), thus forming a waveguide-integrated capacitor. Accordingly, the proposed phase shifter benefits from the dual control of charge carrier densities within the same optical waveguide.In particular, if a first control voltage (e.g., a reverse bias voltage) is applied to the PN junction of the silicon waveguide, a depletion phase shifter can be implemented in the optical waveguide. Accordingly, the free charge carrier densities on both sides of the PN junction can be varied (e.g., reduced) with the applied first control voltage. Likewise, if a second control voltage (e.g., a reverse bias voltage) is applied to the silicon waveguide and the III-V semiconductor layer, positive and negative charge carriers (e.g., holes in the first semiconductor region and electrons in the second semiconductor region) are removed (e.g., their number is reduced) on both sides of the insulating layer, depending on the magnitude of the applied second control voltage.

[0016] The bias voltage (e.g., the second bias voltage) applied to the waveguide's integrated capacitor can be determined based on the carrier mode of a junction formed in the optical waveguide. Specifically, the first and second bias voltages are applied to effect changes in the charge carrier densities in the waveguide-integrated capacitor and a junction formed in the optical waveguide (e.g., a PN or PIN junction) in the same direction (e.g., either increasing or decreasing them). For example, for the optical waveguide with a PN junction operating in a depletion mode (e.g., the first control voltage is a reverse bias), the second bias applied to the waveguide-integrated capacitor can also be a reverse bias, causing the charge carrier densities in the III-V semiconductor layer and the first semiconductor material region near the insulating layer to also decrease.A reduction in charge carrier density in a given material increases the refractive index of that material. Accordingly, in the present case, if both the PN junction and the waveguide-integrated capacitor are operated with the reverse voltages, the charge carrier densities of the PN junction, the III-V semiconductor layer, and the first semiconductor material region can be reduced collectively, resulting in a larger overall change (e.g., an increase) in the refractive index. Such an increased change in the refractive index improves the phase shift efficiency of the optical device. The term "phase shift efficiency" used here refers to the amount of phase shift caused in the optical signal per unit length (e.g., per 1 micrometer) of the optical waveguide for a unit change (e.g., per 1 volt) in the applied control voltages.

[0017] In another example implementation, where the optical waveguide includes a PIN junction operating in a charge carrier injection mode (e.g., the first control voltage is a forward bias), the second bias applied to the waveguide's integrated capacitor can also be set to a forward bias, thus increasing the charge carrier densities in the III-V semiconductor layer and the first semiconductor material region near the insulating layer. Increasing the charge carrier densities in a given material decreases the refractive index of that material.Accordingly, in the present case, operating both the PIN junction and the waveguide-integrated capacitor with the forward bias voltages can jointly increase the charge carrier densities of the PN junction, the III-V semiconductor layer, and the first semiconductor material region, leading to an overall larger change (e.g., a decrease in this case) in the refractive index. Such a larger change in the refractive index improves the phase-shift efficiency of the optical device.

[0018] The term "forward bias" used here can refer to a potential difference between two contact regions, such that the potential at a p-doped contact region (or with holes as the main charge carriers) is higher than the potential at a contact region with n-doping (or with electrons as the main charge carriers). Furthermore, the term "reverse bias" used here can refer to a potential difference between two contact regions, such that the potential at a p-doped contact region (or with holes as the main charge carriers) is lower than the potential at a contact region with n-doping (or with electrons as the main charge carriers).

[0019] Furthermore, the heterogeneous integration of the III-V semiconductor layer on the optical waveguide causes an optical mode within the waveguide to overlap with all regions of the first semiconductor material, the second semiconductor material, the insulating layer, and the III-V semiconductor layer where the charge carrier densities are altered by the application of electrical voltages. The optical mode is an electric field distribution of an optical signal traveling through the optical waveguide. Generally, the optical mode is confined to the medium with a high refractive index. Typically, a silicon waveguide is formed in a silicon device layer on top of a buried oxide layer.In the proposed example configuration of the optical device, the III-V semiconductor layer on top of the silicon waveguide is formed by wafer bonding over thin oxide and / or epitaxial growth of the III-V semiconductor layer. The III-V semiconductor layer can exhibit a much higher refractive index compared to the oxide. Therefore, the optical mode overlaps not only with the first and second semiconductor material regions but also with the III-V semiconductor layer.

[0020] The increased overlap of the optical mode with the material layers of the phase shifter further enhances the efficiency of the phase shift by controlling the charge carrier densities in the first semiconductor material region (near the PN junction and the insulating layer), in the second semiconductor material region (near the PN junction), and in the III-V semiconductor layer (near the insulating layer) using control voltages. Specifically, the change in material properties (e.g., charge carrier concentrations) in a given region, caused by the application of the control voltages, is effective only if an optical mode of the optical signal also occurs in the same region and thereby causes the phase shift of the optical signal.In some examples, the proposed phase-shifting structure with the optical waveguide featuring a PN junction and the heterogeneously integrated III-V semiconductor layer achieves an improvement in the effective refractive index of the optical waveguide of up to 43.8% compared to an individual, stand-alone bias of the PN junction. This significant improvement in the effective refractive index is achieved, at least in part, by the overlap of the optical mode with the entire first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer.

[0021] Furthermore, by using two control voltages (e.g., the first voltage at the integrated capacitor of the waveguide and the second voltage at the PN junction of the optical waveguide) to control the carrier densities, more complex tuning functions with broader refractive index control can be achieved. For example, by implementing such a phase shifter controlled by two different control voltages in optical modulators, a non-return-to-zero (NRZ) modulation with a larger optical modulation amplitude (OMA) can be achieved using two synchronous electrical NRZ signals, as well as a four-stage pulse amplitude modulation (PAM4) using two separate electrical NRZ signals.Since an optical phase shifter is a fundamental component of photonic integrated circuits, many optical devices can be implemented using this highly efficient optical phase shifter to achieve higher performance. Furthermore, the heterogeneous integration of the III-V semiconductor layer on silicon ensures that the resulting photonic integrated circuit remains highly compatible with other semiconductor fabrication processes, thus facilitating the integration of such photonic integrated circuits with other optical and non-optical devices.

[0022] Referring to the drawings, in Fig. Figure 1 shows a cross-sectional view 100 of an exemplary optical device 102 with an integrated phase shifter 101. The optical device 102 can represent any optical device that requires a phase shift of an optical signal. For example, the optical device 102 can be an optical modulator such as a ring modulator or a linear modulator. In another example, the optical device 102 can be an MZI (multi-channel optical modulator). In some examples, the optical device 102 can form part of an integrated photonic circuit. In one embodiment, the integrated photonic circuit can be implemented in an optical transceiver. In some examples, the optical transceiver is arranged in an electronic system, e.g.,in (stationary or portable) computers, servers, storage systems, wireless access points, network switches, routers, docking stations, printers or scanners, without being limited to these.

[0023] In some examples, the optical device 102 can comprise an optical waveguide 104 and a capacitor 106 integrated in the waveguide, as well as electrical contact structures 108A, 108B, and 108C. In the example implementation of Fig. Figure 1 shows three electrical contact structures 108A-108C for illustrative purposes. In some other examples, the optical device 102 may have a smaller or larger number of electrical contact structures. During operation of the optical device 102, the optical waveguide 104 may allow the passage of light, and control voltages may be applied to the electrical contact structures 108A-108C to cause a phase shift of the optical signal traveling through the optical waveguide 104. In some examples, the wavelength of the optical signal traveling through the optical waveguide 104 may be in the range of 1100 nanometers (nm) to 2000 nm. The marked optical mode (with the dashed circle 107, hereafter referred to as optical mode 107) also overlaps with the integrated capacitor 106 of the waveguide.The extent of the phase shift of the optical signal can be proportional to the magnitude and / or polarity of the control voltages.

[0024] In some examples, the optical waveguide 104 can be formed from a semiconductor material, e.g., silicon (Si), indium phosphide (InP), gallium arsenide (GaAs), silicon carbide (SiC), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (InGaAs), or combinations thereof. For illustration, in Fig. Figure 1 and the remaining drawings describe the optical waveguide 104 as being made of silicon. The optical waveguide 104 can be configured in a variety of shapes, depending on the specific application. For example, the optical waveguide 104 can have a linear shape, a nonlinear shape, or a ring-shaped shape, such as a ring or a loop shape (e.g., a circular loop, an oval loop, a rounded rectangular loop, a rounded square loop, a rounded triangular loop, etc.). In some examples, the optical waveguide 104 can have an elongated loop shape (e.g., a racetrack shape).

[0025] The optical waveguide 104 can comprise a first semiconductor material region (110) and a second semiconductor material region (112) (hereinafter referred to as waveguide regions 110 and 112) that are adjacent to each other and form a transition (114) between them. In an embodiment where the optical waveguide 104 has a ring shape, the waveguide regions 110 and 112 can also be ring-shaped. The two waveguide regions 110 and 112 can be made of the same material (e.g., silicon) but have different doping types. For example, waveguide region 110 can have a first type of doping and waveguide region 112 a second type of doping. For illustrative purposes, the first type of doping is referred to as p-type and the second type as n-type. In other examples, the first type of doping can be n-type and the second type of doping can be p-type.For illustrative purposes, the waveguide areas 110 and 112 are shown with p-doping and n-doping respectively in the following description and in the drawings.

[0026] n-type doping can be achieved by doping a suitable semiconductor material with impurities containing donor ions, including but not limited to phosphorus (P), arsenic (As), antimony (Sb), or bismuth (Bi). Accordingly, the n-type semiconductor material can exhibit an excess of electrons relative to holes. In the n-type semiconductor material, the electrons that exceed the number of holes are also referred to as free electrons, which act as free charge carriers. p-type doping can be achieved by doping a suitable semiconductor material with impurities containing acceptor ions, including but not limited to boron (B), gallium (Ga), indium (In), or aluminum (Al). Accordingly, the p-type semiconductor material can exhibit an excess of holes relative to electrons.In p-doped semiconductor materials, the holes that are present in excess of electrons are also called free holes, which act as free charge carriers. n- or p-doping can be achieved through techniques such as impurity diffusion, ion implantation, in-situ doping, and the like. In the following description, the term "free charge carriers" or "free carriers" can refer to the free electrons in relation to the semiconductor material when it is n-doped. Furthermore, the term "free charge carriers" or "free carriers" can refer to the free holes in relation to the semiconductor material when it is p-doped.

[0027] The differently doped waveguide regions 110, 112 are formed adjacent to each other, thus defining the transition 114 (e.g., a PN junction) at the boundaries of the waveguide regions 110, 112 that touch each other. Furthermore, in some examples, the waveguide regions 110, 112 can be shaped such that a larger transition area is created between them. In the implementation of Fig. 1. The waveguide regions 110 and 112 are, for example, shaped such that an L-shaped connection 114 is formed. In particular, the waveguide region 112 can be shaped such that it has a rectangular cross-section, and the waveguide region 110 is shaped such that it has an L-shaped cross-section, for example, having a short and a long side. The optical waveguide 104 can be configured such that at least part of the waveguide region 110 is formed above the waveguide region 112, and wherein an insulating layer 116 is formed on top of the first waveguide region 110, as shown in Fig. 1 shown.

[0028] In some examples, the waveguide-integrated capacitor 106 can be formed via the optical waveguide 104, the insulating layer 116, and a III-V semiconductor layer 118. The III-V semiconductor layer 118 can be formed from III-V semiconductor materials such as InP, GaAs, AlGaAs, InGaAs, InAs, or combinations thereof. For illustration, in Fig. 1 and in the remaining drawings, the III-V semiconductor layer 118 is described as being formed from GaAs. The insulating layer 116 is formed on top of the optical waveguide 104, as shown in Fig. Figure 1 illustrates this. In particular, the insulating layer 116 is configured to be embedded between the waveguide region 110 and the III-V semiconductor layer 118. The insulating layer 116 can be formed from one or more dielectric materials, including, but not limited to, native oxides of the materials of the optical waveguide 104 or the III-V semiconductor layer 118, or both, or from external dielectric materials such as high-k dielectrics or polymers, which can be formed by deposition, oxidation, wafer bonding, or other dielectric coating processes. Examples of dielectric materials that can be used to form the insulating layer 116 are silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum oxide (Al2O3), hafnium dioxide (HfO2), polyimide, benzocyclobutene (BCB), or combinations thereof.

[0029] The III-V semiconductor layer 118 can be formed on top of the insulating layer 116. In particular, the III-V semiconductor layer 118 can be heterogeneously integrated onto the optical waveguide 104 by a thin oxide bonding layer, e.g., the insulating layer 116. In some examples, due to the heterogeneous integration of the III-V semiconductor layer 118 on the optical waveguide, the optical mode 107 overlaps with the region of the first semiconductor material, the region of the second semiconductor material, the insulating layer, and the III-V semiconductor layer, within which the charge carrier densities are varied by applying the (later described) control voltages. Such increased overlap of the optical mode 107 with the material layers of the phase shifter with such variable charge carrier densities further increases the efficiency of the phase shift.

[0030] In some examples, the phase shifter 101 can receive control voltages via the electrical contact structures 108A-108C to control the phase shift of the optical signal traveling through the optical waveguide 104. Each of the electrical contact structures 108A-108C can contain a highly doped semiconductor-based contact area, a metal contact, or both. To induce a phase shift of the optical signal traveling through the optical waveguide 104, a first control voltage (e.g., a reverse bias) can be applied to the PN junction 114. This can be achieved by applying the first control voltage (e.g., a reverse bias) across the waveguide areas 110 and 112 via the respective electrical contact structures 108A and 108B. For example, when the reverse bias is applied across the electrical contact structures 108A and 108B, the PN junction 114 operates in a charge carrier depletion mode.In charge carrier depletion mode, a depletion region 115 at the PN junction 114 can increase in size due to the reduction in charge carrier density near the PN junction 114 between the waveguide regions 110 and 112. Specifically, due to the applied reverse bias, there are no majority charge carriers (e.g., electrons in n-type silicon and holes in p-type silicon) in the depletion region 115. Typically, minority charge carriers (e.g., holes in n-type silicon and electrons in p-type silicon) remain in the depletion region 115, but their quantity is very small compared to the majority charge carriers. Such an overall reduction in charge carrier density can lead to an increase in the refractive index of the optical waveguide 104. In particular, when the first control voltage is applied, the refractive index within the optical waveguide 104 can increase due to the enlarged depletion region 115.

[0031] Furthermore, in some examples, a second control voltage (e.g., a reverse bias voltage) can be applied to the waveguide-integrated capacitor 106, causing charge carriers to be dissipated from both sides of the insulating layer 116. When such a control voltage, which causes the dissipation of charge carriers, is applied, the waveguide-integrated capacitor 106 is said to operate in a charge carrier dissipation mode. In particular, when the reverse bias voltage is applied across the electrical contact structures 108A and 108C, electrons are dissipated from the III-V semiconductor layer 118 and holes from the waveguide region 110, resulting in a decrease in the density of electrons and holes in the III-V semiconductor layer 118 and the waveguide region 110, respectively, near the insulating layer 116. Such a decrease in the density of holes and electrons leads to an increase in the refractive indices of the respective material regions.

[0032] Since the heterogeneously integrated III-V semiconductor layer 118 has a much higher refractive index compared to the insulating layer 116, in the proposed structure of the phase shifter 101, the optical mode 107 of the optical signal traveling through the optical waveguide 104 overlaps with the III-V semiconductor layer 118 along with the waveguide regions 110 and 112. By applying the first and second control voltages, the charge carrier densities in the waveguide regions 110, 112, and the III-V semiconductor layer 118 with overlapping optical mode 107 are varied, leading to an improvement in the phase shift efficiency. Furthermore, in the example implementation of the optical device 102, the first and second control voltages are applied such that the charge carrier densities in the waveguide-integrated capacitor 106 and in the depletion region 115 near the PN junctions are simultaneously reduced.Such a simultaneous reduction in charge carrier densities leads to a significant increase in the refractive index and thus to improved phase shift efficiency. As will be described later, the proposed phase shifter structure with the PN junction optical waveguide 104 and the heterogeneously integrated III-V semiconductor layer 118 achieves an improvement in the effective refractive index of up to 43.8% in some examples compared to an individual, stand-alone bias of the PN junction 114.

[0033] In some examples, both the PN junction 114 and the waveguide-integrated capacitor 106 are operated with forward bias voltages. This leads to an accumulation of charges near the PN junction 114 and the insulating region 116 of the waveguide-integrated capacitor 106, resulting in an overall greater decrease in the refractive index of the optical waveguide 104. Such a significant decrease in the refractive index also improves the phase-shift efficiency of the optical device.

[0034] Furthermore, in some examples, the first control voltage applied to the PN junction 114 and / or the second control voltage applied to the waveguide-integrated capacitor 106 can be modulated by a signal (in Fig. (1 not shown) can be modulated. In particular, when the first control voltage is modulated, the refractive index within the optical waveguide 104 near the PN junction 114 can vary in accordance with such a modulation signal. When the second control voltage is modulated, the refractive index in the optical waveguide 104 near the insulating layer 116 and the refractive index of the III-V semiconductor layer 118 can vary according to the modulation signal. This results in a modulation of the optical signal traveling through the optical waveguide 104 based on the modulation signal. In some examples, the modulation signals applied to the PN junction 114 and the waveguide-integrated capacitor 106 can be different.

[0035] In Fig. Figure 2 shows a cross-sectional view 200 of an exemplary optical device 202. The optical device 202 can be an example of the optical device 102. The optical device 202 can comprise a device structure 203 formed on a substrate 213. The device structure 203 can include an optical waveguide 204 and a waveguide-integrated capacitor 206, which are exemplary representatives of the optical waveguide 104 and the waveguide-integrated capacitor 106 shown in Figure 2. Fig. 1 are described.

[0036] The substrate 213 can be a silicon-on-insulator (SOI) substrate. In some examples, the substrate 213 can include a base substrate layer 219, a base oxide layer 215, and a device layer 217. The base substrate layer 219 can consist of a semiconductor material, e.g., silicon (Si). Other examples of materials that can be used to form the base substrate layer 219 are III-V semiconductors such as InP, GaAs, AlGaAs, or combinations thereof. As in Fig. As shown in Figure 2, the substrate 213 can further contain a base oxide layer 215 arranged on an underlying base substrate layer 219. The base oxide layer 215 can be formed, for example, by oxidation of the substrate 213. In the embodiment of Fig. 2. The base oxide layer 215 for the base substrate layer 219, which consists of silicon, can comprise SiO2, which can be formed in the presence of oxygen at a temperature in the range of 900 °C to 1380 °C. In some examples, the base oxide layer 215 can be a buried oxide layer (BOX) (e.g., the SiO2 can be buried in the base substrate layer 219). In some examples, a layer of SiO2 in the base substrate layer 219 can be buried at a depth of less than 100 nm to several micrometers from the wafer surface, depending on the application. Other examples for the base oxide layer 215 can include, but are not limited to, Si3N4, Al2O3, HfO2, diamond, SiC, or combinations thereof.

[0037] Furthermore, the component layer 217 is arranged on top of the base oxide layer 215. In the exemplary embodiment of Fig. 2. The component layer 217 consists of silicon. The component layer 217 can be shaped in a suitable manner (e.g., by techniques such as photolithography and etching) to form one or more regions, e.g., the optical waveguide 204 and contact regions such as a first contact region 208A and a second contact region 208B. The optical waveguide 204 can be an example of the optical waveguide 104 and comprise waveguide regions 210 and 212 that are adjacent to each other and define a PN junction at the boundaries of the waveguide regions 210 and 212 that touch each other. In addition, the waveguide-integrated capacitor 206 can be formed over the waveguide region 210, an insulating layer 216, and a heterogeneously integrated III-V semiconductor layer 218 on top of the insulating layer 216. Furthermore, the device structure 203 can include a third contact region 208C.The contact areas 208A, 208B and 208C and the respective metal contacts 220A, 220B and 220C form electrical contact structures for the optical device 202.

[0038] To illustrate, in Fig. Figure 2 shows contact areas 208A-208B made of silicon and contact area 208C made of GaAs. In some other examples, contact areas 208A-208C may consist of other semiconductor materials, including but not limited to InP, GaAs, AlGaAs, or combinations thereof. The first contact area 208A may contain first-type doping (e.g., p-type doping) and is in contact with waveguide area 210. Furthermore, the second contact area 208B may contain second-type doping (e.g., n-type doping) and is in contact with waveguide area 212. Furthermore, the third contact area 208C may have second-type doping (e.g., n-type doping) and be in contact with the III-V semiconductor layer 218.In some examples, the contact regions 208A-208C can have a higher concentration of the respective doping compared to the doping concentrations in the waveguide regions 210, 212 and the III-V semiconductor layer 218 for good metal contact resistance. Accordingly, the contact regions 208A-208C can be considered highly doped regions and are designated with the designations "n++" and "p++", as in . Fig. 2 shown.

[0039] Furthermore, in some examples, the optical device 202 may include metal contacts, such as a first metal contact 220A, a second metal contact 220B, and a third metal contact 220C (hereinafter collectively referred to as metal contacts 220A-220C). As shown in Fig. As shown in Figure 2, the first metal contact 220A and the second metal contact 220B are each in electrical contact (e.g., in direct physical contact or via an intervening electrically conductive material) with the waveguide regions 210 and 212. The third metal contact 220C is in electrical contact with the III-V semiconductor layer 218. In some examples, the metal contacts 220A, 220B, and 220C can be located on top of (i.e., vertically above) the waveguide regions 210, 212, and the III-V semiconductor layer 218, respectively. Examples of materials used to form the metal contacts 220A–220C include copper (Cu), gold (Au), aluminum, and / or platinum (Pt).

[0040] During operation of the optical device 202, the optical waveguide 204 allows the passage of light, and control voltages (V1 and V2) can be applied to the metal contacts 220A-220C to cause a phase shift of the optical signal traveling through the optical waveguide 204. Specifically, control voltages are applied to the PN junction 214 and the waveguide-integrated capacitor 206 to simultaneously increase the charge carrier densities near the PN junction 214 and in the waveguide-integrated capacitor 206. This is particularly evident in the example implementation of Fig. Both the control voltages V1 and V2 can be blocking bias voltages. For example, a current source 222 can be connected to contacts 220A and 220B to apply the first blocking bias voltage (V1). Accordingly, the PN junction 214 can be operated in a charge carrier depletion mode.

[0041] Furthermore, in some examples, a second reverse bias voltage (V2) can be applied to the waveguide-integrated capacitor 206. Specifically, a current source 224 can be connected to contacts 220A and 220C to apply the second reverse bias voltage (V2) to the waveguide-integrated capacitor 206. Due to the application of the second reverse bias voltage (V2), the waveguide-integrated capacitor 206 can be operated in a charge carrier dissipation mode. In some examples, the reverse bias voltages V1 and V2 can be modulated by (identical or different) modulation signals, which are representative of the data to be transmitted, for example, in order to achieve the desired light modulation.Accordingly, in the present case, the operation of both the PN junction 214 and the waveguide-integrated capacitor 206 with the blocking bias voltages can jointly reduce the charge carrier densities of the PN junction, the III-V semiconductor layer and the first semiconductor material region, resulting in an overall greater change (in this case, for example, an increase) in the refractive index.

[0042] Fig. 3A and Fig. Figures 3B and 300A, respectively, represent graphical representations simulating the distributions of free charge carriers for different control voltage settings (e.g., blocking bias voltages V1 and V2) for the exemplary optical device 202. Fig. Figure 2 shows. In particular, in the graphical representations 300A and 300B, only the device structure 203 (without metal contacts) is shown to illustrate the distributions of the free charge carriers. In the graphical representations 300A and 300B, the X-axes 302 and 304 represent a width in µm with respect to an imaginary center line 301, which divides the device structure 203 into two equal parts. Furthermore, the Y-axes 306 and 308 represent the structure heights in µm. A charge density distribution scale 310 represents the distribution of the free charge carrier densities. In particular, graphical representation 300A shows the simulated distributions of the free charge carriers when both voltages V1 and V2 are set to 0 (zero) volts (V), which is referred to below as the first bias condition.Graphic 300B shows the simulated free charge carrier distributions when both voltages V1 and V2 are set to 2 (two) V, which is referred to below as the second bias condition. The graphical representations in . Fig. 3A and Fig. 3B were obtained using simulations performed with photonic simulation software.

[0043] For these simulations, the thicknesses of the insulating layer 216, the optical waveguide 204, and the III-V semiconductor layer 218 are set to 10 nm, 400 nm, and 190 nm, respectively. The materials of the insulating layer 216, the optical waveguide 204, and the III-V semiconductor layer 218 are chosen for these simulations to be Al₂O₃, silicon, and GaAs, respectively. As shown in the enlarged views 314 and 316, a charge carrier profile corresponding to the second bias condition differs from a charge carrier profile corresponding to the first bias condition. In particular, the difference in the charge carrier profiles near the PN junction and the insulating layer of the waveguide-integrated capacitor structure is clearly visible for the second bias condition (e.g. when V1 = V2 = 2 volts) compared to the first bias condition (e.g. when V1 = V2 = 0 volts).In particular, in the graphical representations 300A and 300B, the waveguide region 212, the contact region 208B, and the III-V semiconductor layer 218 exhibit electrons as the majority carriers, and the corresponding free carrier density (e.g., electron density) is read from the lower half 312A of the charge density distribution scale 310. Similarly, in the graphical representations 300A and 300B, the waveguide region 210 and the contact region 208A exhibit holes as the majority carriers, and the corresponding free carrier density (e.g., hole density) is read from the upper half 312B of the charge density distribution scale 310.

[0044] Based on such spatial distributions of charge carriers, the photonic simulation software is configured to determine an effective refractive index (n). effThe effective refractive index n of an optical waveguide (e.g., optical waveguide 204) is calculated according to the different settings of the voltages V1 and V2 (e.g., biasing conditions). Table 1 below contains example values ​​for the effective refractive index n. eff of the optical waveguide for specific quantities of the control voltages V1 and V2. Table 1 -- Example of effective refractive indices V1 V2 n eff(V1, V2) Δn (referring to the unstressed state and based on real values ​​for n) eff ) 0 0 n eff (0, 0) = 3,170105 + 8,414270e-7i Δn1 = Re n eff (0, 0) - Re n eff (0, 0) = 0 0 2 n eff (0, 2) = 3.170119 + 8.191513e-7i Δn2 = Re neff (0, 2) - Re neff (0, 0) =0,000014 2 0 n eff (2, 0) = 3.170137 + 7.900994e-7i Δn3 = Re n eff (2, 0) - Re n eff (0, 0) =0,000032 2 2 n eff (2, 2) = 3.170151 + 7.678920e-7i Δn4 = Re n eff (2, 2) - Re neff (0, 0) =0,000046

[0045] Table 1 shows that, compared to biasing the PN junction alone with 2 volts (i.e., V1 = 2 V and V2 = 0 V), the proposed dual biasing with V1 = V2 = 2 V leads to an improvement in the effective refractive index of approximately 43.8% (= Δn4 / Δn3). Specifically, when both the PN junction 214 and the waveguide-integrated capacitor 206 are biased with 2 volts (e.g., V1 = V2 = 2 V), the effective refractive index increases to 3.170151, resulting in a refractive index change (Δn4) that is approximately 43.8% higher than the refractive index change (Δn3) caused by biasing the PN junction 214 alone (e.g., when V1 = 2 V, V2 = 0 V).

[0046] In Fig. Figure 4 shows a cross-sectional view 400 of an exemplary optical device 402. The optical device 402 can be an example of the optical device 202 of Fig. 2 and comprises several structural layers and aspects that are similar to those in Fig. 2 are similar to those described and their details are not repeated here. For example, the optical device 402 can include a device structure 403 formed on a substrate 413. The device structure 403 can include an optical waveguide 404 and a waveguide-integrated capacitor 406, which are exemplary representatives of the optical waveguide 104 and the waveguide-integrated capacitor 106 described in Fig. 1 are described. The substrate 413 can contain a base substrate layer 419, a base oxide layer 415 and a component layer 417, which are described in Fig. The two described layers are similar.

[0047] The component layer 417 can be shaped in a suitable manner (e.g., by techniques such as photolithography and etching) to form one or more regions, such as the optical waveguide 404 and contact regions, such as a first contact region 408A and a second contact region 408B. The optical waveguide 404 can be an example of the optical waveguide 104 and may include waveguide regions 410 and 412. Furthermore, the waveguide-integrated capacitor 406 can be formed over the waveguide region 410, an insulating layer 416, and a heterogeneously integrated III-V semiconductor layer 418 on top of the insulating layer 416. In particular, contact region 408A is formed in contact with waveguide region 410, and contact region 408B is formed in contact with waveguide region 412. Furthermore, the device structure 403 can include a third contact area 408C formed on top of the III-V semiconductor layer 418.Furthermore, metal contacts 420A, 420B and 420C are electrically connected to contact areas 408A, 408B and 408C respectively.

[0048] Waveguide regions 410 and 412 are formed adjacent to each other, thus defining a PN junction 414 at the boundaries of the touching waveguide regions 410 and 412. This is particularly evident in the example implementation of Fig. 4. The waveguide regions 410 and 412 can be shaped such that a larger transition region is created between them. In the implementation of Fig. For example, waveguide regions 410 and 412 are shaped such that a U-shaped transition 414 is formed. Waveguide region 410 can be configured on top of waveguide region 412 such that three sides of waveguide regions 410 and 412 are in contact, resulting in an inverted U-shaped or C-shaped transition 414 between waveguide regions 410 and 412. Such an inverted U-shaped or C-shaped transition 414 provides a large contact area between waveguide regions 410 and 412 and enables better control of the charge carrier densities in the optical waveguide 404. This improved control of the charge carrier densities can enhance the phase shift efficiency of the optical device 402.Furthermore, an optical mode 407 of the optical signal passing through the optical waveguide 404 overlaps with the waveguide regions 410, 412, the insulating layer 416 and the III-V semiconductor layer 418, which improves the phase shift efficiency of the optical device 402.

[0049] In some examples, control voltages (e.g., blocking bias voltages) for the optical waveguide 404 and the waveguide-integrated capacitor 406 can be applied to the optical device 402 via the metal contacts 420A, 420B, and 420C. In some examples, when the control voltages are applied, the PN junction 414 and the waveguide-integrated capacitor 406 are operated in charge carrier depletion mode. Therefore, the charge carrier densities around the PN junction 414 in the optical waveguide 404 and the insulating layer 416 in the waveguide-integrated capacitor 406 can be reduced simultaneously, resulting in a greater overall increase in the refractive index.

[0050] In Fig. Figure 5 shows a cross-sectional view 500 of an exemplary optical device 502. The optical device 502 can be an example of the optical device 202 of Fig. 2 and comprises several structural layers and aspects that are similar to those in Fig. 2 are similar and their details are not repeated here. For example, the optical device 502 can include a device structure 503 formed on a substrate 513. The device structure 503 can include an optical waveguide 504 and a waveguide-integrated capacitor 506, which are exemplary representatives of the device described in Section 2. Fig. The optical waveguide 204 and the waveguide-integrated capacitor 206 described in section 2 are involved. The substrate 513 can contain a base substrate layer 519, a base oxide layer 515, and a device layer 517, which are described in section 2. Fig. The two described layers are similar.

[0051] The component layer 517 can be shaped in a suitable manner (e.g., by techniques such as photolithography and etching) to form one or more regions, such as the optical waveguide 504 and contact regions such as a first contact region 508A and a second contact region 508B. Compared to the optical waveguide 204 of Fig. In Figure 2, which has a PN junction 214, the optical waveguide 504 is configured with a PIN junction 514. The optical waveguide 504 also includes waveguide regions 510 and 512, which are exemplary representatives of waveguide regions 210 and 212, respectively. Furthermore, in this example, the optical waveguide 504 contains a region of intrinsic semiconductor material 509 located between waveguide regions 210 and 212. The waveguide regions 210, 212, and the intervening region of intrinsic semiconductor material 509 form the PIN junction 514. Although the PIN junction 514 in Fig. Since Figure 5 is shown in an L-shape, the use of PIN junctions with different shapes is conceivable within the scope of the present disclosure. An optical mode 507 of the optical signal, which travels through the optical waveguide 504, also overlaps with the area of ​​the intrinsic semiconductor material 509.

[0052] Furthermore, the waveguide-integrated capacitor 506 can be formed via the waveguide area 510, an insulating layer 516, and a heterogeneously integrated III-V semiconductor layer 518 on top of the insulating layer 516. The device structure 503 can also include a third contact area 508C formed on top of the III-V semiconductor layer 418. Additionally, metal contacts 520A, 520B, and 520C can be formed in electrical contact with the contact areas 508A, 508B, and 508C, respectively.

[0053] During operation of the optical device, the PIN junction 514 can be operated in a charge carrier injection mode by applying a first control voltage. The first control voltage in the example implementation of Fig. 5 is a forward bias. In particular, the first control voltage can be applied such that the electrical potential at contact region 508A is higher than the electrical potential at contact region 508B. When the PIN junction 514 is operated under such a forward bias, charge carriers are injected into the intrinsic semiconductor material region 509 due to a forward electric field caused by the first control voltage. Therefore, the charge carrier density in the intrinsic semiconductor material region 509 increases. In particular, the refractive index of the intrinsic semiconductor material region 509 is reduced by the increase in charge carrier density.

[0054] In the example implementation of Fig. 5. The waveguide-integrated capacitor 506 can be operated in charge carrier accumulation mode by applying a second forward control voltage to the waveguide-integrated capacitor 506. In particular, the second control voltage can be applied such that the electrical potential at contact area 508A is higher than the electrical potential at contact area 508C. When the waveguide-integrated capacitor 506 is operated under such a forward bias, the charge carriers on both sides of the insulating region 516 in the III-V semiconductor layer 518 and the waveguide region 510 are accumulated due to a forward electric field caused by the second control voltage. This increases the charge carrier density in the III-V semiconductor layer 518. In particular, the increase in charge carrier density reduces the refractive index of the region of intrinsic semiconductor material 509.In some examples, simultaneous operation of the waveguide-integrated capacitor 506 and the PIN junction 514 with the forward bias voltages can achieve a larger overall change (e.g., reduction) in the charge carrier densities, leading to a larger refractive index change. This results in improved phase shift efficiency.

[0055] Fig. Figure 6 shows a block diagram of an exemplary electronic system 600. Examples of the electronic system 600 include, but are not limited to, computers (stationary or portable), servers, storage systems, wireless access points, network switches, routers, docking stations, printers, or scanners. The electronic system 600 can be offered as a standalone product or as a packaged solution and can be used on the basis of a one-time purchase of the entire product or solution or on a pay-per-use basis. The electronic system 600 can contain one or more multi-chip modules, for example, a multi-chip module (MCM) 602 for processing and / or storing data. In some examples, the MCM 602 may contain a processing resource 604 and a storage medium 606 mounted on a printed circuit board 608. In some examples, the MCM 602 may also incorporate a photonic chip 610 on the printed circuit board 608.In some other examples, one or more of the processing resources 604, the storage medium 606, and the photonic chip 610 may be housed on a separate MCM (not shown). The circuit board 608 may be a printed circuit board (PCB) containing several electrically conductive traces (not shown) to connect the processing resource 604, the storage medium 606, and the photonic chip 610 to each other and / or to other components located on or outside the PCB.

[0056] The processing resource 604 can be a physical device, such as one or more central processing units (CPUs), one or more semiconductor-based microprocessors, microcontrollers, one or more graphics processing units (GPUs), application-specific integrated circuits (ASICs), a field-programmable gate array (FPGA), other hardware devices, or combinations thereof, capable of retrieving and executing the instructions stored in the memory medium 606. The processing resource 604 can retrieve, decode, and execute the instructions stored in the memory medium 606. Alternatively or in addition to executing the instructions, the processing resource 604 can include at least one integrated circuit (IC), control logic, electronic circuitry, or combinations thereof, comprising a set of electronic components.The storage medium 606 can be any electronic, magnetic, optical, or other physical storage device that contains or stores instructions that can be read and executed by the processing resource 604. For example, the storage medium 606 can be random-access memory (RAM), non-volatile memory (NVRAM), electrically erasable programmable solid-state memory (EEPROM), a storage device, an optical disk, and the like. In some embodiments, the storage medium 606 can be a non-transient storage medium, the term "non-transient" including any transitive transmission signals.

[0057] Furthermore, in some examples, the photonic chip 610 can include a photonic controller 612 and one or more photonic devices such as the optical device 614. The optical device 614 can be an example of one of the optical devices 102, 202, 402, or 502. For illustration, in Fig. Figure 6 shows that the photonic chip 610 comprises a single optical device 614. The use of a different number of optical devices or the use of several different types of optical devices in the photonic chip 610 is also conceivable within the scope of this disclosure. For example, the photonic chip 610 can also comprise other photonic devices, such as optical converters, optical cables, waveguides, optical modulators (e.g., ring modulator), optical demodulators (e.g., ring demodulator), resonators, light sources (e.g., lasers), and the like. The photonic chip 610 can function as an optical receiver, optical transmitter, optical transceiver, optical communication, and / or processing medium for the data and control signals (e.g., control voltages) received by the photonic controller 612. Non-limiting examples of the photonic controller 612 can be implemented using an IC chip, such as...B. an ASIC, an FPGA chip, a processor chip (e.g. CPU and / or GPU), a microcontroller, or a special processor. During operation of the electronic system 600, the photonic controller 612 can apply control voltages (e.g., voltages V1 and V2, as in ). Fig. (2 described) to control the phase shifts applied to the optical signal passing through the optical device 614. In some examples, better control of the phase shift contributes to better modulation of the optical signals, resulting in effective data communication.

[0058] Fig. Figure 7 shows an example of a method 700 for manufacturing an optical device such as the optical device 202 of Fig. 2. For illustration, procedure 700 is shown in conjunction with Fig. 2 described, but the procedure steps described here can also apply to other optical devices described above.

[0059] Block 702 provides a substrate. In one example, the substrate can be an SOI substrate (e.g., substrate 213). Block 704 also provides an optical waveguide (e.g., optical waveguide 204) comprising a first semiconductor material region (e.g., waveguide region 210) and a second semiconductor material region (e.g., waveguide region 212) that are adjacent to each other and define a transition (e.g., transition 214) between them. In some examples, the optical waveguide can be formed in a component layer (e.g., component layer 217) of the SOI substrate by shaping the component layer appropriately, e.g., by techniques such as photolithography and etching. In particular, in one example, the first and second semiconductor material regions are shaped such that at least part of the first semiconductor material region is formed over the second semiconductor material region.In some examples, the first and second semiconductor material regions are designed such that an L- or U-shaped transition is formed at the contact surfaces of the first and second semiconductor material regions.

[0060] In some examples, the component layer can be used to form a PIN junction (e.g., the one in Fig. The PIN transition 514 shown in Figure 5 is shaped in a suitable manner to form the optical waveguide (e.g., the optical waveguide 504) and the contact areas (e.g., the contact areas 508A and 508B). Once these areas are defined, impurity doping is carried out to effect appropriate dopings, such as those found, for example, in Fig. Figure 5 is shown. In some examples, doping with impurities cannot be carried out in the area of ​​intrinsic semiconductor material 509. This leads to the formation of the PIN junction 514 via the waveguide areas 510, 512 and the area of ​​intrinsic semiconductor material 509.

[0061] Furthermore, an insulating layer (e.g., insulating layer 216) can be formed on top of the optical waveguide in block 706. This insulating layer can be formed using thermal growth techniques and / or deposition techniques, such as chemical vapor deposition (CVD). Additionally, a III-V semiconductor layer (e.g., III-V semiconductor layer 218) can be formed on top of the insulating layer in block 708. The III-V semiconductor layer can be formed by epitaxial growth, deposition techniques (e.g., CVD), wafer bonding, transfer printing, or combinations thereof. In particular, techniques such as epitaxial growth and / or wafer bonding of the III-V semiconductor layer facilitate the planar heterogeneous integration of other device structures, such as lasers, modulators, and photon detectors, on a common substrate (e.g., substrate 213).As previously described, the first semiconductor material region, the insulating layer, and the III-V semiconductor layer form a waveguide-integrated capacitor (e.g., the waveguide-integrated capacitor 206). When an optical signal travels through the optical waveguide, the optical mode of the optical signal overlaps with the entire first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, resulting in an efficient phase shift of the optical signal.

[0062] Furthermore, in some examples in block 710, one or more contact areas (e.g., contact areas 208A, 208B, and 208C) can be formed. For example, contact areas 208A, 208B, and 208C can be formed in contact with the first semiconductor material area, the second semiconductor material area, and the III-V semiconductor layer, respectively, as shown in Fig. Figure 2 illustrates this. The contact regions 208A-208C can be formed by techniques such as thermal growth, CVD, wafer bonding, molecular beam epitaxy (MBE), and / or doping of the respective regions with suitable impurities. For example, contact regions 208B and 208C are doped to contain a second-type (e.g., n-type) dopant, and contact region 208A is doped to contain a first-type (e.g., p-type) dopant. Furthermore, in some examples in Block 712, metal contacts such as the metal contacts (e.g., metal contacts 220A, 220B, and 220C) are formed over contact regions 208A, 208B, and 208C, respectively.

[0063] In Fig. 8 will now be an example method 800 for the operation of an optical device such as the optical device 202 of Fig. 2. To illustrate, procedure 800 is presented in conjunction with Fig. 2 described, but the procedure steps described here can also apply to other optical devices described above.

[0064] In block 802, an optical signal can be guided, for example, through an optical waveguide 204 of the optical device 202. Due to the heterogeneous integration of the III-V semiconductor layer 218 on the optical waveguide 204 across the thin insulating layer 216, the optical mode 207 of the optical signal overlaps with the waveguide regions 210, 212, the insulating layer 216, and the III-V semiconductor layer 218. Furthermore, a first control voltage is applied in block 804 via a transition in the optical waveguide 204. As in Fig. As shown in Figure 2, the first blocking bias V1 can, for example, be applied to the PN junction 214 to effect a change (e.g., an increase in the case of the optical device 202) of the refractive index of the optical waveguide 204, as previously described in conjunction with Fig. 2 described. Furthermore, in some examples in Block 806, a second control voltage is applied to the waveguide's integrated capacitor 206 to effect a change in the refractive index of the waveguide's integrated capacitor 206. In particular, the second control voltage is adjusted such that the change in the refractive index of the waveguide-integrated capacitor 206 is in the same direction as the change in the refractive index of the optical waveguide 204, thus achieving an overall greater change in the refractive index. In the optical device 202 of Fig. 2. The second control voltage is, for example, also a reverse bias, so that the waveguide-integrated capacitor 206 operates in charge carrier dissipation mode, thereby increasing the refractive index of the waveguide-integrated capacitor 206. In this way, a large change in the refractive index is achieved by simultaneously operating both the PN junction 214 and the waveguide-integrated capacitor 206 with reverse bias, leading to an improved phase shift efficiency of the optical device 202.

[0065] In another example implementation (e.g., the optical device 502 from Fig. 5) With the optical waveguide having the PIN junction 514, a first control voltage (i.e., the voltage applied to the PIN junction 514) and the second control voltage (i.e., the voltage applied to the integrated capacitor 506 of the waveguide) are forward bias voltages. Applying such forward bias voltages to the optical device 502 of Fig. 5 leads to a simultaneous reduction of the refractive index of the optical waveguide and the refractive index of the capacitor integrated in the waveguide. Accordingly, the refractive indices of the PIN junction 514 and the waveguide-integrated capacitor 506 can be reduced together, resulting in an improved phase shift efficiency of the optical device 502.

[0066] The terminology used here serves to describe specific examples and is not intended to be restrictive. The singular forms "ein," "eine," and "der," "die," "das" used here also include the plural forms, unless the context clearly indicates otherwise. The term "ein anderer" (another) used here is defined as at least one other or more. The term "gekoppelt an" (coupled to), as used here, is defined as connected, either directly without any intervening elements or indirectly with at least one intervening element, unless otherwise specified. For example, two elements may be mechanically, electrically, optically, or communicatively connected via a communication channel, path, network, or system. Furthermore, the term "und / or," as used here, refers to and includes all possible combinations of the elements listed.Although the terms "first," "second," "third," etc., are used here to describe different elements, these elements should not be limited by these terms, as these terms are only used to distinguish one element from another unless otherwise stated or the context indicates otherwise. As used herein, the term "includes" means that it includes but is not limited to; the term "including" means that it includes but is not limited to; the term "based on" means at least partially based on.

[0067] Although specific implementations have been shown and described above, various changes in form and details are possible. For example, some features and / or functions described in relation to one implementation and / or process may also apply to other implementations. In other words, processes, features, components, and / or properties described in relation to one implementation may also be useful in other implementations. Furthermore, it should be noted that the systems and procedures described here may include various combinations and / or subcombinations of the components and / or features of the different implementations described. Additionally, the process blocks described in the various procedures may be executed sequentially, in parallel, or in a combination of both.Furthermore, the process blocks can also be executed in a different order than shown in the flowcharts.

[0068] Furthermore, numerous details are provided in the preceding description to facilitate understanding of the subject matter described herein. However, an implementation may also be carried out without some or all of these details. Other implementations may include modifications, combinations, and variations of the details described above. The following claims are intended to cover such modifications and variations.

Claims

[1] An optical device (102, 202, 402, 502) comprising the following: an optical waveguide (104, 204, 404, 504) comprising a first semiconductor material region (110, 210, 410, 510) and a second semiconductor material region (112, 212, 412, 512) defining a transition between them, the transition being a PN junction (114, 214, 414) formed at the touching boundaries of the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512); an insulating layer (116, 216, 416, 516) formed on top of the optical waveguide (104, 204, 404, 504); and a III-V semiconductor layer (118, 218, 418, 518) formed on top of the insulating layer (116, 216, 416, 516) causes an optical mode (107, 207, 407, 507) of an optical signal traveling through the optical waveguide (104, 204, 404, 504) to overlap with the first semiconductor material region (110, 210, 410, 510), the second semiconductor material region (112, 212, 412, 512), the insulating layer (116, 216, 416, 516), and the III-V semiconductor layer (118, 218, 418, 518), thereby causing a phase shift in the signal traveling through the optical waveguide (104, 204, 404, 504) running optical signal is created. [2] Optical device (102, 202, 402, 502) according to claim 1, wherein the transition between the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512) is L-shaped, and wherein at least a part of the first semiconductor material region (110, 210, 410, 510) is formed over the second semiconductor material region (112, 212, 412, 512), and wherein the insulating layer (116, 216, 416, 516) is formed on top of the first semiconductor material region (110, 210, 410, 510). [3] Optical device (102, 202, 402, 502) according to claim 1, wherein the transition between the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512) is inverted U-shaped, wherein the first semiconductor material region (110, 210, 410, 510) is formed over the second semiconductor material region (112, 212, 412, 512) and wherein the insulating layer (116, 216, 416, 516) is formed on top of the first semiconductor material region (110, 210, 410, 510). [4] Optical device (102, 202, 402, 502) according to claim 1, wherein the optical device (102, 202, 402, 502) is arranged in an optical transceiver. [5] Optical device (102, 202, 402, 502) according to claim 4, wherein the optical transceiver is arranged in one or more of a server, a storage device, a router, a network switch or an access point. [6] Optical device (102, 202, 402, 502) according to claim 1, wherein the first semiconductor material region (110, 210, 410, 510) has p-doping and the second semiconductor material region (112, 212, 412, 512) and the III-V semiconductor layer (118, 218, 418, 518) have n-doping. [7] Optical device (102, 202, 402, 502) according to claim 6, wherein the PN junction (114, 214, 414) is operated in a charge carrier depletion mode by applying a first control voltage across the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512), which leads to a depletion of charge carriers from a depletion region (115) near the PN junction (114, 214, 414). [8] Optical device (102, 202, 402, 502) according to claim 1, wherein the first semiconductor material region (110, 210, 410, 510), the insulating layer (116, 216, 416, 516) and the III-V semiconductor layer (118, 218, 418, 518) form a waveguide-integrated capacitor (106, 206, 406, 506) which is integrated with the optical waveguide (104, 204, 404, 504), wherein the waveguide-integrated capacitor (106, 206, 406, 506) is operated in a charge carrier dissipation mode by applying a second control voltage, which leads to a dissipation of holes in the first semiconductor material region (110, 210, 410, 510) near the insulating layer (116, 216, 416, 516) and a dissipation of electrons in the III-V semiconductor layer (118, 218, 418, 518) near the insulating layer (116, 216, 416, 516). [9] Optical device (102, 202, 402, 502) according to claim 8, wherein the operation of the PN junction (114, 214, 414) in a charge carrier depletion mode and of the waveguide integrated capacitor (106, 206, 406, 506) in charge carrier dissipation mode causes an increase in the effective refractive index of the optical waveguide (104, 204, 404, 504) of up to about 43.8%, resulting in improved phase shift efficiency. [10] Optical device (102, 202, 402, 502) according to claim 7, wherein a wavelength of the optical signal passing through the optical waveguide (104, 204, 404, 504) is in a range of 1100 nanometers (nm) to 2000 nm. [11] Optical device (102, 202, 402, 502) according to claim 1, wherein the optical waveguide (104, 204, 404, 504) further comprises an area of ​​intrinsic semiconductor material (509) arranged between the first semiconductor material area (110, 210, 410, 510) and the second semiconductor material area (112, 212, 412, 512), and wherein the optical mode (107, 207, 407, 507) overlaps with the area of ​​intrinsic semiconductor material. [12] An electronic system (600) comprising the following: a processing resource (604); a storage medium (606) that is communicatively coupled to the processing resource (604); and a photonic chip (610) that is communicatively coupled to the processing resource (604) and comprises an optical device (102, 202, 402, 502), wherein the optical device (102, 202, 402, 502) comprises: an optical waveguide (104, 204, 404, 504) comprising a first semiconductor material region (110, 210, 410, 510) and a second semiconductor material region (112, 212, 412, 512) which are formed adjacent to each other and form a transition between them, wherein the transition is a PN junction (114, 214, 414) formed at the touching boundaries of the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512); an insulating layer (116, 216, 416, 516) formed on top of the optical waveguide (104, 204, 404, 504); and a III-V semiconductor layer (118, 218, 418, 518) formed on top of the insulating layer (116, 216, 416, 516) causes an optical mode (107, 207, 407, 507) of an optical signal traveling through the optical waveguide (104, 204, 404, 504) to overlap with the first semiconductor material region (110, 210, 410, 510), the second semiconductor material region (112, 212, 412, 512), the insulating layer (116, 216, 416, 516), and the III-V semiconductor layer (118, 218, 418, 518), thereby causing a phase shift in the signal traveling through the optical waveguide (104, 204, 404, 504) running optical signal is created. [13] Electronic system (600) according to claim 12, wherein the transition between the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512) is L-shaped, and wherein at least a part of the first semiconductor material region (110, 210, 410, 510) is formed over the second semiconductor material region (112, 212, 412, 512), and wherein the insulating layer (116, 216, 416, 516) is formed on top of the first semiconductor material region (110, 210, 410, 510). [14] Electronic system (600) according to claim 12, wherein the transition between the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512) is inverted U-shaped, and wherein the first semiconductor material region (110, 210, 410, 510) is formed over the second semiconductor material region (112, 212, 412, 512), and wherein the insulating layer (116, 216, 416, 516) is formed on top of the first semiconductor material region (110, 210, 410, 510). [15] Electronic system (600) according to claim 12, wherein the first semiconductor material region (110, 210, 410, 510) has n-doping and the second semiconductor material region (112, 212, 412, 512) and the III-V semiconductor layer (118, 218, 418, 518) have p-doping. [16] Electronic system (600) according to claim 12, wherein the optical waveguide (104, 204, 404, 504) further comprises an area of ​​intrinsic semiconductor material (509) arranged between the first semiconductor material area (110, 210, 410, 510) and the second semiconductor material area (112, 212, 412, 512), and wherein the optical mode (107, 207, 407, 507) also overlaps with the area of ​​intrinsic semiconductor material. [17] Electronic system (600) according to claim 12, wherein one or more of the processing resources (604), the storage medium (606) and the photonic chip (610) are mounted on a printed circuit board (608) forming a multi-chip module. [18] Method (700) for operating an optical device (102, 202, 402, 502) comprising the following: Transmission of an optical signal through an optical waveguide (104, 204, 404, 504) of the optical device, wherein the optical waveguide (104, 204, 404, 504) comprises a first semiconductor material region (110, 210, 410, 510) and a second semiconductor material region (112, 212, 412, 512) defining a transition between them, an insulating layer (116, 216, 416, 516) formed on top of the optical waveguide (104, 204, 404, 504), and a III-V semiconductor layer (118, 218, 418, 518) formed on top of an insulating layer (116, 216, 416, 516), wherein the first semiconductor material region (110, 210, 410, 510), the insulating layer (116, 216, 416, 516) and the III-V semiconductor layer (118, 218, 418, 518) form a waveguide-integrated capacitor (106, 206, 406, 506), and wherein an optical mode (107, 207, 407, 507) of an optical signal interacts with the first semiconductor material region (110, 210, 410, 510),the second semiconductor material region (112, 212, 412, 512), the insulating layer (116, 216, 416, 516) and the III-V semiconductor layer (118, 218, 418, 518), the transition being a PN junction (114, 214, 414) formed at the touching boundaries of the first semiconductor material region (110, 210, 410, 510) and the second semiconductor material region (112, 212, 412, 512); Applying an initial control voltage across the transition to cause a change in the refractive index of the optical waveguide (104, 204, 404, 504); and Applying a second control voltage across the waveguide-integrated capacitor (106, 206, 406, 506) to cause a change in the refractive index of the waveguide-integrated capacitor (106, 206, 406, 506) in the same direction as the change in the refractive index of the optical waveguide (104, 204, 404, 504). [19] Method (700) according to claim 18, wherein the first control voltage and the second control voltage are blocking bias voltages which lead to a simultaneous increase in the refractive index of the optical waveguide (104, 204, 404, 504) and the refractive index of the waveguide-integrated capacitor (106, 206, 406, 506). [20] Method (700) according to claim 18, wherein the transition is a PIN transition (514) and wherein the first control voltage and the second control voltage are forward bias voltages that result in a simultaneous reduction of the refractive index of the optical waveguide (104, 204, 404, 504) and the refractive index of the waveguide-integrated capacitor (106, 206, 406, 506).

Images