PIXEL DRIVER CIRCUIT, PIXEL DRIVE METHOD, DISPLAY FIELD AND DISPLAY DEVICE

Abstract

Pixel driver circuit applied to a display field, wherein the display field comprises multiple pixel elements, and wherein the pixel driver circuit comprises the following: a driver module (11) comprising a driver transistor (Tm) whose input terminal (111) is coupled to a driver voltage terminal (VDD) and whose output terminal (112) is coupled to a subpixel element (M); a data write module (12) whose output terminal is coupled between the input terminal (111) of the driver transistor (Tm) and the driver voltage terminal (VDD) and which serves to write a data voltage to the driver transistor (Tm) during a compensation write phase; and a voltage stabilization module (13) coupled to a first control terminal (113) of the driver transistor (Tm) and serves to maintain a stable voltage of the first control terminal (113) of the driver transistor (Tm) during a reset phase; characterized in that the driver transistor (Tm) further comprises a second control terminal (114), wherein the first control terminal (113) in conjunction with an active layer of the driver transistor (Tm) forms a first parasitic capacitance (Cgd), while the second control terminal (114) is coupled to a DC signal terminal, such that the second control terminal (114) and the active layer (4) form a second parasitic capacitance (Cgd2).

Description

Technical field

[0001] The present application relates to the field of display technology, specifically a pixel driver circuit, a pixel drive method, a display field and a display device. State of the art

[0002] With the development of the LCD display industry, organic light-emitting display (OLED) technology, thanks to its self-illuminating properties, lightweight construction, thin design, and other advantages, is finding significant applications in televisions, mobile phones, laptops, and other products. Since OLEDs are driven by electrical current, a deviation from the threshold voltage (Vth) of a thin-film transistor (TFT) causes a fluctuation or change in the current drive of the OLED, which in turn leads to uneven brightness. Currently, current compensation is implemented as a countermeasure using a driver compensation circuit, which includes a TFT connected to a pixel element and a capacitor element. One control terminal of the TFT is connected to a data voltage, and one input terminal is connected to a driver voltage.The capacitor element is connected between its output terminal and control terminal, so that a voltage written to the pixel element is regulated via the data voltage. For conventional displays and low-power (low-frequency) displays, there is currently no solution available for unstable image display and changes in the display effect over extended periods.US 2020 / 0410937 A1 and DE 10 2015 223 456 A1 each disclose a pixel driver circuit used in a display field, wherein the display field comprises multiple pixel elements, and wherein the pixel driver circuit comprises: a driver module comprising a driver transistor whose input terminal is coupled to a driver voltage terminal and whose output terminal is coupled to a subpixel element; a data write module whose output terminal is coupled between the input terminal of the driver transistor and the driver voltage terminal and which serves to write a data voltage to the driver transistor during a compensation write phase; and a voltage stabilization module coupled to a first control terminal of the driver transistor and which serves to maintain a stable voltage of the first control terminal of the driver transistor during a reset phase. Content of the present application

[0003] The present application provides a pixel driver circuit, a display field and a display device to solve the problem of unstable image display and change in display effect over a longer period of time in conventional display fields and display fields with low energy consumption (low frequency) in the prior art.

[0004] An embodiment of a first aspect of the present application provides a pixel driver circuit that is applied to a display field, wherein the display field comprises several pixel elements, and wherein the pixel driver circuit comprises the following: a driver module comprising a driver transistor whose input terminal is coupled to a driver voltage terminal and whose output terminal is coupled to a subpixel element; a data write module whose output terminal is coupled between the input terminal of the driver transistor and the driver voltage terminal, and which serves to write a data voltage to the driver transistor during a compensation write phase; and a voltage stabilization module coupled to a first control terminal of the driver transistor and used to maintain a stable voltage at the first control terminal of the driver transistor during a reset phase.

[0005] In an optional embodiment, the voltage stabilization module comprises the following: a voltage stabilization transistor whose control terminal is coupled to a first sampling line and whose input terminal and output terminal are each coupled to the driver voltage terminal and the first control terminal of the driver transistor respectively, so that the first control terminal of the driver transistor is coupled to the driver voltage terminal.

[0006] In an optional embodiment, the pixel driver circuit further comprises the following: a storage capacitor which is coupled at one terminal to the first control terminal of the driver transistor and at the other terminal to the output terminal of the driver transistor.

[0007] In an optional embodiment, the data writing module includes the following: a first data write control transistor, whose control terminal is coupled to a second sampling line and whose input and output terminals are each coupled to a data voltage terminal and the input terminal of the driver transistor, respectively; and a second data write control transistor, whose control terminal is coupled to the second sampling line, whose input terminal is coupled to the first control terminal of the driver transistor, and whose output terminal is coupled to the output terminal of the driver transistor; wherein, when writing the data voltage, it is written via the first data write control transistor, the driver transistor, and the second data write control transistor into the first control terminal of the driver transistor.

[0008] In an optional embodiment, the pixel driver circuit further comprises the following: a first input control transistor, whose control terminal is coupled to a signal transmitter line and whose input and output terminals are each coupled to the driver voltage terminal and the input terminal of the driver transistor, respectively, such that the input terminal of the driver transistor is coupled to the driver voltage terminal; and / or that the pixel driver circuit further includes the following: a second input control transistor, whose control terminal is coupled to the signal generator line and whose input terminal and output terminal are each coupled to the subpixel element and the output terminal of the driver transistor respectively, so that the output terminal of the driver transistor is coupled to the subpixel element.

[0009] In an optional embodiment, the pixel driver circuit further comprises the following: a reset module which, in response to a reset response voltage output by a reset response voltage line, pulls down the voltage at the terminal of the storage capacitor coupled to the subpixel element to a reset voltage.

[0010] In an optional embodiment, the reset module comprises a reset transistor whose control terminal is coupled to the reset response voltage line and whose input terminal and output terminal are coupled between the output terminal of the driver transistor and a reset voltage terminal.

[0011] In an optional embodiment, the reset response voltage line is provided to be a first gate signal control line, or that the pixel driver circuits in the display field are arranged in a cascade configuration, wherein a first gate control signal of an adjacent, previous pixel driver circuit serves as a second gate control signal of an adjacent, next pixel driver circuit, wherein a reset response signal output by the reset response voltage line serves as the first gate control signal of the adjacent, previous pixel driver circuit after a delay.

[0012] According to the present invention, the driver transistor further comprises a second control terminal, wherein the first control terminal, in conjunction with an active layer of the driver transistor, forms a first parasitic capacitance, while the second control terminal is coupled to a DC signal terminal, such that the second control terminal and the active layer form a second parasitic capacitance.

[0013] An embodiment of a second aspect of the present application provides a pixel drive method that is applied in the above-mentioned pixel driver circuit, wherein the pixel drive method comprises the following:

[0014] Writing a data voltage to the driver transistor during a compensation write phase in a drive cycle;

[0015] Writing a constant potential to the first control terminal and the output terminal of the driver transistor during a light emission phase to maintain a stable voltage at the first control terminal and the output terminal of the driver transistor.

[0016] An embodiment of a third aspect of the present application provides a display field comprising several pixel units, each of which comprises several subpixel elements, each of which is coupled to a pixel driver circuit mentioned above.

[0017] An embodiment of the fourth aspect of the present application provides a display device comprising a display field as described above.

[0018] As can be seen from the above embodiments, the present application provides a pixel driver circuit, a display field, and a display device. The voltage stabilization module maintains a stable voltage at the first control terminal of the driver transistor during the reset phase, thus ensuring a constant voltage at the output terminal of the driver transistor. The interaction of these two components ensures the driver transistor functions as a switching element, resulting in uniform brightness and improving the display performance and stability of the display field. Brief description of the drawing

[0019] To better illustrate the embodiments of the exemplary embodiments according to the present application or in the prior art, the accompanying drawings used in the explanation of the exemplary embodiments or the prior art are briefly described below. It is understood that the following drawings represent some exemplary embodiments of the application and that it is possible for persons skilled in the art in this field to derive further drawings from such drawings without inventive steps. These drawings show Fig. 1 a schematic representation of the modules of a pixel driver circuit according to an embodiment of the present application, Fig. 2 a schematic structural view of the pixel driver circuit according to an embodiment of the present application, Fig. 3 a schematic structural view of a driver transistor of the pixel driver circuit according to an embodiment of the present application, Fig. 4 a schematic representation of the with Fig. 2 corresponding time sequence control, Fig. 5 A schematic structural view of the layers of a component with four terminals. Fig. 6 a schematic structural view of a display device according to an embodiment of the present application.

[0020] Reference symbols: 1 - substrate; 2 - first metal layer; 3 - buffer layer; 4 - active layer; 5 - second metal layer; 6 - gate insulating film layer; 71 - via; 72 - via; 8 - dielectric intermediate layer; 9 - electrically conductive metal; 11 - Driver module; 12 - Data write module; 13 - Voltage stabilization module; 14 - Reset module; Tm - Driver transistor; T5 - Voltage stabilization transistor; T1 - First data write control transistor; T2 - First input control transistor; T3 - Second input control transistor; T4 - Second data write control transistor; T6 - Reset transistor; Cst - Storage capacitor; M - Subpixel element; Cgd - First parasitic capacitor; Cgd2 - Second parasitic capacitor; EM - Signal generator line; Vin - Reset signal line; S1 - First sampling line; S2 - Second sampling line; VDD - Driver voltage line; DATA - Data voltage line. Detailed description of the embodiments

[0021] To clarify and explain the aforementioned subject matter, features, and advantages of the present application, specific embodiments of the present application are described in detail below in conjunction with the accompanying drawings. It is understood that the specific embodiments described herein serve only to explain the present application and not to limit it.

[0022] Furthermore, the terms “first” and “second” are used for descriptive purposes only and are not to be understood as indicating a relative significance or as an implicit indication of the number of the specified technical features. Thus, a feature designated as “first” and “second” may explicitly or implicitly include one or more such features. In the description of the present application, “multiple” means two or more, unless expressly and specifically limited otherwise. It should be noted that the pixel driver circuit, display field, and display device disclosed in the present application may be used in the field of display technology or in any field other than the field of display technology, and the scope of application of the pixel driver circuit, display field, and display device disclosed in the present application is not limited. First embodiment

[0023] Fig. Figure 1 shows a schematic structural view of a pixel driver circuit according to an embodiment of the present application. As in Fig. As shown in Figure 1, it specifically comprises: a driver module 11, which includes a driver transistor Tm, whose input terminal 111 is coupled to a driver voltage terminal VDD and whose output terminal 112 is coupled to a subpixel element M; a data write module 12, whose output terminal is coupled between the input terminal 111 of the driver transistor Tm and the driver voltage terminal VDD and which serves to write a data voltage to the driver transistor Tm during a compensation write phase; and a voltage stabilization module 13, which is coupled to a first control terminal 113 of the driver transistor Tm and serves to maintain a stable voltage of the first control terminal 113 of the driver transistor Tm during a reset phase.

[0024] In one embodiment of the present application, the aforementioned pixel driver circuit is applied to a display field comprising several pixel units, each of which contains several subpixel elements. The individual subpixel elements can be red pixel elements, blue pixel elements, or green pixel elements, namely red subpixels, green subpixels, and blue subpixels. Typically, three pixel elements form a pixel unit, which represents the smallest integration unit for forming a pixel array structure. The pixel array structure forms a display area of ​​a display field. That is, the pixel array comprises several pixel units arranged according to a specific configuration. Each of the pixel units comprises several pixel elements, for example, red pixel elements, blue pixel elements, and green pixel elements.Each pixel element is electrically connected to a driver IC (integrated circuit) via an independent driver line. The driver IC controls and energizes the individual subpixel elements, thereby emitting colored light.

[0025] It is understood that, in the present application, the subpixel elements in a pixel unit may comprise a red subpixel element, a blue subpixel element, and a green subpixel element, and the number of subpixel elements may be three or four, etc. There is no such restriction in the present application.

[0026] When the subpixel elements of a pixel unit are provided in a quantity of three, they typically comprise a red subpixel element, a blue subpixel element, and a green subpixel element. If four subpixel elements are provided, the colors of the subpixel elements can be red, blue, green, and one other color other than red, blue, and green. For example, this other color could be white, yellow, or cyan. It should be noted that the display brightness of the display device containing the pixel array structure can be increased if the other color is white; if the other color is a different color, then the color gamut of the display device can be expanded. There are no restrictions in this regard.

[0027] In the prior art, the operating phase of a pixel driver circuit comprises a reset phase, a compensation phase, a write phase, and a light emission phase. During an operating process of the circuit structure, the operation of the driver transistor Tm plays the most important role.The inventor of the present application found that the main cause of insufficient display effect in the above-mentioned circuit structure is that, firstly, the fixed leakage current property of the driver transistor Tm leads to a constant change in the electrical potential of its control terminal, thereby impairing the property of the driver transistor Tm as a switching element; secondly, a change in the gate insulating film of a three-terminal device significantly alters the property of the device; and thirdly, a constant reduction in the voltage at the control terminal and the output terminal of the driver transistor leads to a constant leakage current at the control terminal and the output terminal of the driver transistor.Against this background, the inventor of the application stabilizes the voltage at the control terminal and the output terminal of the driver transistor, based on the aforementioned cause, by providing a voltage stabilization module in order to at least solve the problem resulting from one of the above causes and to improve the display performance. As stated above, the present application provides a pixel driver circuit. The voltage stabilization module maintains a stable voltage at the first control terminal of the driver transistor during the reset phase, thus achieving a constant voltage at the output terminal of the driver transistor. Therefore, the interaction of the two components ensures the functionality of the driver transistor as a switching element, resulting in uniform brightness and improving the display performance and stability of the display field.

[0028] As in Fig. As shown in Figure 2, the voltage stabilization module 13 in an optional embodiment comprises the following: a voltage stabilization transistor T5, whose control terminal is coupled to a first sampling line S1 and whose input terminal 111 and output terminal 112 are each coupled to the driver voltage terminal VDD and the first control terminal 113 of the driver transistor Tm respectively, so that the first control terminal 113 of the driver transistor Tm is coupled to the driver voltage terminal VDD.

[0029] It is understood that in the present application, the voltage stabilization transistor T5 is connected to the driver voltage terminal and the first sampling line S1 is controlled such that it is only set to HIGH during a reset phase, so that during the reset phase a driver voltage is written to the first control terminal of the driver transistor, which corresponds to a node N1. Thus, node N1 is kept stable during the reset phase.

[0030] Furthermore, in a preferred embodiment, the storage capacitor in the present application is configured differently from conventional storage capacitors. In the present application, the storage capacitor Cst is configured as follows:

[0031] As can be seen from Fig. As shown in Figure 2, the pixel driver circuit according to the present application further comprises a storage capacitor Cst, which is coupled at one terminal to the first control terminal 113 of the driver transistor Tm and at the other terminal to the subpixel element M. In the prior art, the storage capacitor Cst is generally arranged between VDD and node N1. In the present application, however, Cst is arranged between nodes N1 and N4, and a constant potential of Cst is electrically connected to node N4 of the anode, so that during the light emission phase the Vgs potential of Tm is kept constant and thus the switching characteristic of the driver transistor is ensured.

[0032] It is understood that, alternatively, in the present application, the storage capacitor can be configured in a conventional manner. That is, the storage capacitor is arranged between the driver voltage terminal and the first control terminal. Further explanation is unnecessary in this case. However, it is conceivable that, in conjunction with a change in the arrangement of the storage capacitor during the light emission phase, a stable voltage can also be maintained at node N1 in the present application, and interaction with the voltage stabilization transistor can be achieved.

[0033] In practical application, the input terminal of the voltage stabilization transistor T5 is connected to VDD, so that T5 is switched to the conducting state when the first control line S1 outputs a HIGH level, thus pulling node N1 up. Since VDD provides a positive voltage signal, a positive electrical signal is present at both the source and drain of Tm. The reduced voltage difference of the electrical signal further reduces the leakage current of the TFT device, thus helping to solve the leakage current problem of node N1.

[0034] Based on the storage capacitor and the voltage stabilization transistor mentioned above, the control terminal of the driver transistor Tm (corresponding to node N1 in Fig. 2) and the output terminal of the driver transistor Tm (corresponding to node N4, which is connected to node N3, in Fig. 2) held stable.

[0035] As in Fig. As shown in 2, the data writing module 12 in a preferred embodiment of the present application comprises the following: a first data write control transistor T1, whose control terminal is coupled to a second sampling line S2 and whose input and output terminals are each coupled to a data voltage terminal and the input terminal of the driver transistor Tm, respectively; and a second data write control transistor T4, whose control terminal is coupled to the second sampling line S2, whose input terminal is coupled to the first control terminal of the driver transistor Tm and whose output terminal is coupled to the output terminal of the driver transistor Tm; wherein, when writing the data voltage, it is written via the first data write control transistor T1, the driver transistor Tm and the second data write control transistor T4 into the first control terminal 113 of the driver transistor Tm.

[0036] Furthermore, in an optional embodiment for achieving respective control of the compensation writing phase, the light emission phase, etc., the pixel driver circuit according to the present application further comprises the following: a first input control transistor T2, whose control terminal is coupled to a signal transmitter line EM and whose input terminal and output terminal are each coupled to the driver voltage terminal VDD and the input terminal of the driver transistor Tm, respectively, so that the input terminal of the driver transistor Tm is coupled to the driver voltage terminal VDD.

[0037] The pixel driver circuit further comprises: a second input control transistor T3, whose control terminal is coupled to the signal generator line EM and whose input terminal and output terminal are each coupled to the subpixel element M and the output terminal of the driver transistor Tm respectively, so that the output terminal of the driver transistor Tm is coupled to the subpixel element M.

[0038] Furthermore, to achieve a reset of the pixel driver circuit of the present application, it is provided that the pixel driver circuit of the application may also include a reset module which, in response to a reset response voltage output by a reset response voltage line, pulls down the voltage at the terminal of the storage capacitor coupled to the subpixel element to a reset voltage.

[0039] In the present embodiment, the reset response voltage line outputs a reset response voltage at a HIGH level during the reset phase, thereby switching it to the conducting state, so that node N4 of the storage capacitor is pulled down to the reset voltage.

[0040] For example, the reset module includes a reset transistor T6, whose control terminal is coupled to the reset response voltage line and whose input terminal and output terminal are coupled between the output terminal of the driver transistor Tm and a reset voltage terminal Vin.

[0041] It will be on Fig. 2. Furthermore, in an optional embodiment, the reset response voltage line is provided for as a first gate signal control line S1. That is, in the present application, the first gate signal control line S1, which is coupled to the control terminal of the voltage stabilization transistor T5, is additionally used for multiple purposes in the reset module, thereby reducing the number of control lines.

[0042] In one embodiment (not shown), the pixel driver circuits in the display are arranged in a cascade configuration. A first gate control signal from an adjacent, preceding pixel driver circuit serves as a second gate control signal for an adjacent, subsequent pixel driver circuit. A reset signal output via the reset response voltage line serves as the first gate control signal of the adjacent, preceding pixel driver circuit after a delay.

[0043] In a preferred embodiment, the present application can further solve the problem that the fixed leakage current property of the driver transistor Tm leads to a constant change in the electrical potential of its control terminal, thereby impairing the property of the driver transistor Tm as a switching element, and the problem that a change in the gate insulating film of a three-terminal device significantly alters the device's properties, as described in Fig. 1 and Fig. 2 shown.

[0044] In an optional embodiment, the driver transistor comprises, as shown in Fig. Figure 3 shows a second control terminal. The first control terminal, in conjunction with an active layer of the driver transistor, forms a first parasitic capacitance Cgd, while the second control terminal is coupled to a DC signal terminal, so that the second control terminal and the active layer form a second parasitic capacitance Cgd2.

[0045] In detail, the driver transistor Tm is designed as a component with four terminals. The first control terminal 113 is used for driver control. The second control terminal 114 serves to support the control signal and to adjust a threshold value, so that a stable current can be generated. In conjunction with the voltage stabilization module, a set voltage is applied to a second terminal of the capacitor element Cst during the light emission phase. This keeps the voltage at the output terminal of the driver transistor Tm constant, ensuring that the driver transistor Tm functions as a switching element through the interaction of these two components. This results in uniform brightness and improves the display performance and stability of the display field.

[0046] Furthermore, it is understood that the switching element in the present application can be a thin-film transistor (TFT). Of course, some of the components in the pixel driver circuit can alternatively be arranged in a non-display area of ​​the display field, which is why, in some embodiments, the switching element can be a transistor of a different type. There is no such restriction in the present application.

[0047] As a rule, the switching element according to the present application comprises a control terminal, an input terminal, and an output terminal. Accordingly, the control terminal is the gate of the switching element, and the input and output terminals are the source and drain of the switching element, respectively.

[0048] As can be seen from Fig. As 3 results, a component with four terminals will be discussed in more detail below. The driver transistor Tm according to the present application comprises a first control terminal (TG), an input terminal (Source), and an output terminal (Drain). Furthermore, the driver switch of the present application comprises a second control terminal (BG terminal), which is coupled to a DC signal line. As in Fig. As shown in Figure 5, it comprises in detail: a substrate 1; a first metal layer 2 formed on the surface of one side of the substrate 1; an active layer 4 formed on a side of the first metal layer 2 facing away from the substrate 1; and a switching element structure located on a side of the active layer 4 facing away from the first metal layer 2, and a gate made of a second metal layer 5 as well as a source (formed by depositing a metal in a via 72 in Fig. 1) and a drain (formed by depositing a metal into a via 71 in Fig. 1), which are located on two sides of the second metal layer 5 and are in electrical contact with the active layer 4; the first metal layer 2 is coupled to a DC voltage terminal.

[0049] In the embodiment of the present application, the first metal layer 2 is formed on the surface of one side of the substrate 1, and the first metal layer 2 forms a lower gate of the thin-film transistor according to the embodiment of the present application. In the present application, the lower gate can be electrically connected to an external DC line via an electrically conductive metal 9 deposited in the via, for example by welding one end of the DC line to the electrically conductive metal in the via.

[0050] The active layer is formed on the side of the first metal layer 2 facing away from the substrate 1 and is therefore located above the first metal layer 2. In specific manufacturing processes, a buffer layer 3 can be provided between the active layer 4 and the first metal layer 2, which serves on the one hand for electrical insulation and on the other hand provides certain mechanical support and buffering.

[0051] The second metal layer 5 is formed above the active layer 4. The second metal layer 5 forms an upper gate. A gate insulating film (GI) layer 6 can be provided between the second metal layer 5 and the active layer 4.

[0052] Furthermore, a dielectric intermediate layer 8 is deposited onto the active layer 4, after which the dielectric intermediate layer 8 undergoes exposure and masking processes. A pair of vias 71 and 72 can be formed on the active layer, after which a metal is deposited onto the vias 71 and 72, thereby forming a source and a drain located on opposite sides of the second metal layer 5 and in electrical contact with the active layer 4. In this way, the switching element structure according to the present application is formed, which in detail comprises the following: the source and the drain, which are served by the metal deposited in the pair of vias, and the gate, which is served by the second metal layer.

[0053] In the present embodiment, the first metal layer is directly coupled to the DC terminal, thus providing an additional capacitor element Cgd2 (second parasitic capacitance) compared to the three-terminal TFT in the prior art. The electrode plate area of ​​this capacitor element Cgd2 can be located in a less restricted environment, allowing for a larger capacitor element Cgd2 and flexible adjustment of its capacitance. Therefore, in the present application, the TFT is configured as a four-terminal device. A metal layer is used as the lower gate of the device on the side opposite the insulating layer at the lower end of the device. The lower gate is connected to a DC signal in the circuit. A capacitor element Cgd2 is formed between the lower gate, the source, and the drain of the device.Since the area of ​​the lower gate typically covers other electrodes of the entire component, the additional capacitor element Cgd2 has a large capacitance. When the capacitor element Cst is coupled, the change in the potential of the driver TFT's control terminal depends on the size of the parasitic capacitor element Cgd (first parasitic capacitance), the storage capacitor of the driver TFT's control terminal, and the capacitance of the additional element Cgd2. Therefore, Cgd2 can act as a fixed storage capacitor element to effectively compensate for the influence of Cgd and Cst, thus further stabilizing the voltage and ensuring pixel display functionality.

[0054] It is understood that in the present application the driver transistor Tm can also be formed by a differently designed TFT, provided that the second control terminal is coupled to the DC voltage terminal.

[0055] In the above embodiment, other switching elements can also be components with four terminals, and there is no restriction in this regard in the present application.

[0056] The following is a discussion based on the timeline diagram according to Fig. 4. The present application was discussed in more detail.

[0057] First, a reset phase takes place. Reset phase: The signal generator line EM is pulled down and the first input control transistor T2 and the second input control transistor T3 are switched off, so that the drive current of the OLED device is switched off; The first sampling line S1 is pulled up, the voltage stabilization transistor T5 and the reset transistor T6 are switched on, node N1 is reset to the driver voltage VDD and node N4 is reset to the Vin signal voltage of the reset signal line.

[0058] This is followed by a compensation phase and a write phase. Compensation + Write Phase: The signal generator line EM is constantly set LOW, so the first input control transistor T2 and the second input control transistor T3 are kept in the off state; the first sampling line S1 is pulled down, so the voltage stabilization transistor T5 and the reset transistor T6 are switched off; the second sampling line S2 is pulled up, the first data write control transistor T1 and the second data write control transistor T4 are switched on, and a data voltage DATA is written to node N2. Since the driver voltage VDD is written to node N1 during the previous phase, thus switching on the driver transistor Tm, the data voltage DATA is written in reverse to node N1 via the driver transistor Tm and the second data write control transistor T4 until the driver transistor Tm is switched off.

[0059] Finally, during a light emission phase, both the first scanning line S1 and the second scanning line S2 are set to LOW. The first data write control transistor T1, the voltage stabilization transistor T5, the data write control transistor T4, and the reset transistor T6 are switched off. The potential of node N1 is maintained, keeping the driver transistor Tm in the on state. The signal generator line EM is pulled high, switching on the first input control transistor T2 and the second input control transistor T3. The driver voltage VDD is applied to the anode of the OLED device via the first input control transistor T2, the driver transistor Tm, and the second input control transistor T3, thus providing holes for the OLED light emission device. These holes combine with electrons passed through the cathode to emit light.

[0060] Furthermore, in the embodiment of the present application, it is provided that a diode element D1 according to the present invention can prevent a backflow of a large electric current from the display field to the driver voltage VDD at the driver voltage terminal VDD, since at high temperatures, due to the increased leakage current of the display field, a backflow of the electric current from the display field to the driver voltage VDD at the driver voltage terminal VDD can occur and thereby impair the stability of the electric current provided by the driver voltage VDD at the driver voltage terminal VDD.

[0061] For those skilled in the art in this field, it is understandable that "coupling" in the present application can refer to a direct or indirect electrical connection. For example, A can be directly electrically connected to B, or alternatively, A can be electrically connected to B via C if A is coupled to B. There is no such restriction in the present application. Second embodiment

[0062] The present application provides a display field comprising several pixel units, each of which comprises several subpixel elements, each of which is coupled to a pixel driver circuit according to the first embodiment.

[0063] It is understood that in the display device according to the present application, the voltage stabilization module maintains a stable voltage at the first control terminal of the driver transistor during the reset phase, thus achieving a constant voltage at the output terminal of the driver transistor. Therefore, the interaction of the two components ensures the driver transistor functions as a switching element, resulting in consistent brightness and improving the display performance and stability of the display field. Third example

[0064] As in Fig.Figure 5 shows a display device 20 according to an embodiment of the present application comprising a display field and a driver circuit 22 according to the first embodiment. The display field comprises several pixel units, each of which comprises several subpixel elements 23, each of which is coupled via a line 21 to a pixel driver circuit according to the first embodiment of the present application.

[0065] In a specific embodiment, the display device according to the exemplary embodiment of the invention can be a mobile phone, a tablet, a television, a display, a laptop, a digital picture frame, a navigator or any product or component with a display function.

[0066] It is understood that in the display device according to the present application, the voltage stabilization module maintains a stable voltage at the first control terminal of the driver transistor during the reset phase, thus achieving a constant voltage at the output terminal of the driver transistor. Therefore, the interaction of the two components ensures the driver transistor functions as a switching element, resulting in consistent brightness and improving the display performance and stability of the display field. Fourth embodiment

[0067] An embodiment of the present application further provides a driver method for a display device, which is implemented using a pixel driver circuit according to the first embodiment and specifically comprises the following: Writing a data voltage to the driver transistor during a compensation write phase in a drive cycle; Writing a constant potential to the first control terminal and the output terminal of the driver transistor during a light emission phase to maintain a stable voltage at the first control terminal and the output terminal of the driver transistor.

[0068] In detail, a reset phase occurs first. Reset phase: The signal generator line is pulled down, and the first and second input control transistors are switched off, thus switching off the drive current of the OLED device; the first sampling line is pulled up, the voltage stabilization transistor and a voltage stabilization circuit element are switched on, node N1 is reset to the driver voltage, and node N4 is reset to a signal from the reset signal line.

[0069] This is followed by a compensation phase and a write phase. Compensation + Write Phase: The signal generator line is constantly set LOW, so the first input control transistor and the second input control transistor are kept in the off state; the first sample line is pulled down, so the voltage stabilization transistor and the voltage stabilization circuit element are switched off; the second sample line is pulled up, the first data write control transistor and the second data write control transistor are switched on, and a data voltage is written to N2. Since the driver voltage is written to N1 during the previous phase, thus switching on the driver transistor, the data voltage is written in reverse to node N1 via the driver transistor and the second data write control transistor until the driver transistor is switched off.

[0070] Finally, during a light emission phase, both the first and second sampling lines are set to LOW. The first data write control transistor, the voltage stabilization transistor, and the voltage stabilization switching element are switched off. The potential of node N1 is maintained, keeping the driver transistor in the ON state. The signal generator line is pulled up, switching on the first and second input control transistors. The driver voltage is applied to the anode of the OLED device via the first input control transistor, the driver transistor, and the second input control transistor, providing holes for the OLED light emission device. These holes combine with electrons passed through the cathode to emit light.

[0071] As can be seen from the above description, in the driver method according to the embodiment of the application, the driver transistor is designed as a component with four terminals. The first control terminal is used for driver control. The second control terminal serves to support the control and to adjust a threshold value so that a stable current can be generated and, in conjunction with the voltage stabilization module, a set voltage is applied to a second terminal of the capacitor element during the light emission phase. Thus, the voltage at the output terminal of the driver transistor is kept constant, so that the interaction of the two components ensures the driver transistor functions as a switching element, thereby achieving uniform brightness and improving the display performance and stability of the display field.

[0072] It should be noted that, with regard to the embodiment of the driver circuit, the embodiment of the display device, the embodiment of the drive method, and the embodiment of the commissioning method according to the embodiments of the invention, mutual reference to one another is possible, and there is no restriction in this respect in the embodiments of the invention. With regard to the steps of the embodiment for the manufacturing method of the display field according to the embodiments of the invention, it may be possible to add or omit certain steps. Any method variants that are obvious to those skilled in the art within the scope of disclosure of the application should be covered by the scope of protection of the application, and therefore a more detailed explanation is omitted here.

[0073] So far, only optional embodiments of the application have been described, which in no way serve to restrict the present application. Any modifications, equivalent substitutions, and improvements within the scope of the spirit and principles of the application are intended to be covered by the scope of protection of the application.

Claims

[1] Pixel driver circuit applied to a display field, wherein the display field comprises multiple pixel elements, the pixel driver circuit comprising: a driver module (11) comprising a driver transistor (Tm) whose input terminal (111) is coupled to a driver voltage terminal (VDD) and whose output terminal (112) is coupled to a subpixel element (M); a data write module (12) whose output terminal is coupled between the input terminal (111) of the driver transistor (Tm) and the driver voltage terminal (VDD) and which serves to write a data voltage to the driver transistor (Tm) during a compensation write phase; and a voltage stabilization module (13) coupled to a first control terminal (113) of the driver transistor (Tm) and serves to maintain a stable voltage of the first control terminal (113) of the driver transistor (Tm) during a reset phase; characterized by , that the driver transistor (Tm) further comprises a second control terminal (114), wherein the first control terminal (113) in conjunction with an active layer of the driver transistor (Tm) forms a first parasitic capacitance (Cgd), while the second control terminal (114) is coupled to a DC signal terminal, such that the second control terminal (114) and the active layer (4) form a second parasitic capacitance (Cgd2). [2] Pixel driver circuit according to claim 1, characterized by , that the voltage stabilization module (13) comprises the following: a voltage stabilization transistor (T5) whose control terminal is coupled to a first sampling line (S1) and whose input terminal and output terminal are each coupled to the driver voltage terminal (VDD) and the first control terminal (113) of the driver transistor (Tm), respectively, so that the first control terminal (113) of the driver transistor (Tm) is coupled to the driver voltage terminal (VDD). [3] Pixel driver circuit according to claim 1, characterized by , that the pixel driver circuit further comprises: a storage capacitor (Cst) which is coupled at one terminal to the first control terminal (113) of the driver transistor (Tm) and at the other terminal to the output terminal (112) of the driver transistor (Tm). [4] Pixel driver circuit according to claim 1, characterized by , that the data write module (12) includes the following: a first data write control transistor (T1), whose control terminal is coupled to a second sampling line (S2) and whose input and output terminals are each coupled to a data voltage terminal and the input terminal (111) of the driver transistor (Tm), respectively; and a second data write control transistor (T4), whose control terminal is coupled to the second sampling line (S2), whose input terminal is coupled to the first control terminal (113) of the driver transistor (Tm) and whose output terminal is coupled to the output terminal (112) of the driver transistor (Tm); wherein when writing the data voltage, it is written via the first data write control transistor (T1), the driver transistor (Tm) and the second data write control transistor (T4) into the first control terminal (113) of the driver transistor (Tm). [5] Pixel driver circuit according to claim 1, characterized by , that the pixel driver circuit further includes the following: a first input control transistor (T2) whose control terminal is coupled to a signal transmitter line (EM) and whose input terminal and output terminal are each coupled to the driver voltage terminal (VDD) and the input terminal (111) of the driver transistor (Tm), respectively, so that the input terminal (111) of the driver transistor (Tm) is coupled to the driver voltage terminal (VDD). [6] Pixel driver circuit according to claim 1, characterized by , that the pixel driver circuit further includes the following: a second input control transistor (T3) whose control terminal is coupled to the signal generator line (EM) and whose input terminal and output terminal are each coupled to the subpixel element (M) and the output terminal (112) of the driver transistor (Tm), respectively, so that the output terminal (112) of the driver transistor (Tm) is coupled to the subpixel element (M). [7] Pixel driver circuit according to claim 3, characterized by, that the pixel driver circuit further comprises: a reset module which, in response to a reset response voltage output by a reset response voltage line, pulls down the voltage at the terminal of the storage capacitor (Cst) coupled to the subpixel element (M) to a reset voltage. [8] Pixel driver circuit according to claim 7, characterized by , that the reset module includes a reset transistor (T6) whose control terminal is coupled to the reset response voltage line and whose input terminal and output terminal are coupled between the output terminal (112) of the driver transistor (Tm) and a reset voltage terminal (Vin). [9] Pixel driver circuit according to claim 7, characterized by , that the reset response voltage line is a first sampling line (S1). [10] Pixel driver circuit according to claim 7, characterized by, that the pixel driver circuits in the display field are arranged in cascade configuration, wherein a first gate control signal of an adjacent, previous pixel driver circuit serves as a second gate control signal of an adjacent, next pixel driver circuit, wherein a reset response signal output by the reset response voltage line serves as the first gate control signal of the adjacent, previous pixel driver circuit after a delay. [11] Pixel drive method applied in the pixel driver circuit according to any one of claims 1 to 10, wherein the pixel drive method comprises: Writing a data voltage to the driver transistor during a compensation write phase in a drive cycle; and Writing a constant potential to the first control terminal (113) and the output terminal of the driver transistor during a light emission phase to maintain a stable voltage at the first control terminal (113) and the output terminal of the driver transistor. [12] Display field, characterized by , that it comprises several pixel units, each of which comprises several subpixel elements, each of which is coupled to a pixel driver circuit according to any one of claims 1 to 10. [13] Display device, characterized by that it comprises a display field according to claim 12.

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