IMAGE SENSOR STRUCTURE

Abstract

Image sensor comprising: a silicon substrate (202); a germanium region (224) arranged in the silicon substrate (202); a doped semiconductor insulating layer (222) arranged between the silicon substrate (202) and the germanium region (224); a heavily p-doped region (228) arranged on the germanium region (224); a heavily n-doped region (208) arranged on the silicon substrate (202); a first n-well (218) arranged immediately below the germanium region (224); a second n-well (206) arranged immediately below the heavily n-doped region (208); a deep n-well (204) arranged below and in contact with the first n-well (218) and the second n-well (206); and a semiconductor cap layer (226) that is arranged on the germanium region (224), wherein the heavily p-doped region (228) extends through the semiconductor cap layer (226).

Description

[0001] This application is a non-provisional application of, and claims priority of, the provisional US patent application with serial number 63 / 333,440, filed on April 21, 2022, the entire disclosure of which is hereby incorporated by reference into the present text. BACKGROUND

[0002] The electronics industry is experiencing ever-increasing demand for smaller and faster electronic devices that can simultaneously support a greater number of increasingly complex and sophisticated functions. Accordingly, the trend in the semiconductor industry continues to be the production of cost-effective, high-performance, and energy-efficient integrated circuits (ICs). To date, these goals have been largely achieved by reducing the dimensions of semiconductor ICs (for example, the minimum feature size), thereby improving production efficiency and reducing associated costs. However, such scaling has also led to increased complexity in the semiconductor manufacturing process, meaning that further advances in ICs require similar advances in semiconductor manufacturing processes and technology.

[0003] Semiconductor sensors are widely used in a variety of applications for measuring physical, chemical, biological, and / or environmental parameters. Specific types of semiconductor sensors include gas sensors, pressure sensors, temperature sensors, and image sensors. For image sensors, dark current is an important factor affecting performance and reliability. Dark current, that is, current flowing in the absence of light, can be more generally described as leakage current present in an image sensor. In at least some cases where a low-bandgap semiconductor material is used, the low-bandgap semiconductor material or its interface with a substrate can introduce significant dark current. Although existing optical image sensors and fabrication methods are generally suitable for their intended purpose, they are not satisfactory in every respect. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The present disclosure is best understood with reference to the following detailed description, when read in conjunction with the accompanying figures. It should be noted that, in accordance with common industry practice, various structural elements are not drawn to scale and are for illustrative purposes only. The dimensions of the various structural elements may, in fact, be enlarged or reduced as necessary for the clarity of this discussion. Fig. Figure 1 is a flowchart of a process 100 for manufacturing a light-sensitive device according to various aspects of the present disclosure. Fig. Figures 2-11 are fragmentary cross-sectional views of a workpiece at different manufacturing stages of process 100 in Fig. 1, according to various aspects of the present revelation. Fig. Figures 12-14 are fragmentary cross-sectional views of various examples of light-sensitive devices according to different aspects of the present disclosure. Fig. Figures 15-17 are fragmentary schematic top views of various examples of light-sensitive devices according to different aspects of the present disclosure. Fig. Figure 18 is a flowchart of a process 300 for manufacturing a light-sensitive device according to various aspects of the present disclosure. Fig. Figures 19-26 are fragmentary cross-sectional views of a workpiece at various manufacturing stages of process 300 in Fig. 17, according to various aspects of the present revelation. Fig. Figures 27-29 are fragmentary cross-sectional views of various examples of light-sensitive devices according to different aspects of the present disclosure. Fig. Figures 30-32 are fragmentary schematic top views of various examples of light-sensitive devices according to different aspects of the present disclosure. Fig. 33 and Fig. Figure 34 are fragmentary schematic top views of light-sensitive pixel designs according to various aspects of the present disclosure. Fig. Figure 35 illustrates an exemplary stacked image sensor comprising image sensors according to various aspects of the present disclosure. DETAILED DESCRIPTION

[0005] The following disclosure provides many different embodiments or examples for implementing various features of the subject matter discussed herein. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, only examples and are not intended to limit the scope of the disclosure. For example, the formation of a first structural element above or on top of a second structural element in the following description may include embodiments in which the first and second structural elements are in direct contact, and may also include embodiments in which additional structural elements may be formed between the first and second structural elements, so that the first and second structural elements are not necessarily in direct contact.Furthermore, this disclosure may repeat reference numbers and / or letters in the various examples. This repetition serves the purpose of simplicity and clarity and does not automatically establish a relationship between the various embodiments and / or devices discussed.

[0006] Spatially relative terms, such as "below," "under," "lower," "above," "upper," and the like, may be used in this text to simplify descriptions and to describe the relationship of one element or feature to one or more other elements or features, as illustrated in the figures. These spatially relative terms are intended to encompass other orientations of the device in use or operation besides the orientation shown in the figures. The device may also be oriented differently (rotated by 90 degrees, or in other orientations), and the spatially relative descriptors used in this text may be interpreted accordingly.

[0007] Furthermore, when a number or range of numbers is described using terms like "about," "approximately," and the like, the term should also include numbers that lie within a meaningful range that accounts for variations inherent in any manufacturing process, as understood by the person skilled in the art. For example, the number or range of numbers includes a meaningful range that contains the stated number plus a span of, for example, ±10% of the stated number, based on known manufacturing tolerances associated with the production of a feature that has a property linked to the number. For example, a layer of material that is "about 5 nm" thick may encompass a dimensional range of 4.25 nm to 5.75 nm if the person skilled in the art knows that the manufacturing tolerances associated with the deposition of the layer of material are ±15%.Furthermore, this disclosure may repeat reference numbers and / or letters in the various examples. This repetition serves the purpose of simplicity and clarity and does not automatically establish a relationship between the various embodiments and / or devices discussed.

[0008] Some image sensors or light-sensitive devices feature a semiconductor structure consisting of a first semiconductor material embedded in a semiconductor substrate made of a second semiconductor material different from the first. In most cases, the first semiconductor material may have a smaller band gap or be more sensitive to incident light than the second semiconductor material. Due to its light sensitivity and its connection to the semiconductor substrate, the dark current level may be higher, which reduces the signal-to-noise ratio (SNR).

[0009] The present disclosure provides an image sensor structure in which the metal compounds that generate the electric field for moving the photon electrons are arranged in different semiconductor regions. In an exemplary structure, a germanium light-sensing region (Ge light-sensing region) is arranged in a silicon substrate (Si substrate). A deep recess is arranged in the silicon substrate and extends at least partially beneath the germanium light-sensing region. A first metal compound is made to the germanium light-sensing region, while a second metal compound is made directly to the deep recess through the silicon substrate. That is, not all of the first metal compound and not all of the second metal compound are made directly to the germanium light-sensing region.Because the two metal compounds are made to different semiconductor regions, electron transition pathways are moved further away from the germanium light-sensing region, and the dark current can be significantly reduced.

[0010] The various aspects of the present revelation will now be described in more detail with reference to the figures. Fig. 1 and Fig. Figure 18 illustrates flowcharts of a method 100 and a method 300 for forming an image sensor structure. Methods 100 and 300 are merely examples and are not intended to limit the present disclosure to what is expressly illustrated therein. Additional steps may be provided before, during, and after methods 100 and 300, and some of the described steps may be substituted, omitted, or rearranged to obtain additional embodiments of the methods. For the sake of simplicity, not all steps are described in detail here. Method 100 is discussed below in conjunction with the Fig. 2-11 describes the fragmentary cross-sectional views of a workpiece 200 at different manufacturing stages according to embodiments of the method 100. Fig. Figures 12-14 show embodiments that are alternatives of the in Fig. 10 of the workpieces shown represent 200. Fig. Figures 15-17 illustrate schematic top views of workpiece 200 to demonstrate various exemplary arrangements for improving electron transfer efficiency. Method 300 is described below in conjunction with the Fig. 19-26 describe the fragmentary cross-sectional views of a workpiece 200 at different manufacturing stages according to embodiments of the method 300. Fig. 27-29 show embodiments that are alternatives of the in Fig. The workpiece shown in section 24 represents 200. Fig. Figures 30-32 illustrate schematic top views of workpiece 200 to demonstrate various exemplary devices for improving electron transfer efficiency. Fig. 33 and Fig. Figure 34 illustrates fragmentary schematic top views of light-sensitive pixel designs. Because a light-sensitive device or an image sensor structure is formed from the workpiece 200, the workpiece 200 can be referred to as a light-sensitive device 200, an image sensor 200, or an image sensor structure 200, depending on the context. In the Fig. 2-17 and Fig. In Figures 19-34, the X-direction, the Y-direction, and the Z-direction are perpendicular to each other and are used consistently. For example, the X-direction in one figure runs parallel to the X-direction in another figure. Furthermore, the same reference numerals are used throughout this disclosure to denote identical structural elements.

[0011] Referring to Fig., the method 100 comprises a block 102 in which a deep recess 204 is formed in a substrate 202 of a workpiece 200. The operations in block 102 can include receiving the substrate 202 (in Fig. 2 shown) and the formation of the deep depression 204 in the substrate 202 (in Fig. (shown in Figure 3). Because several layers and structural elements are to be formed on or in the substrate 202, the substrate 202 and all structural elements formed on it can generally be referred to as a workpiece 200. With reference to Fig. 2 The substrate 202 is received. The substrate 202 can be a silicon substrate (Si substrate). In some alternative embodiments, the substrate 202 can be a silicon-on-insulator substrate (SOI substrate) with a buried oxide layer (BOX layer). With reference to Fig. 3. The deep well 204 is formed in the substrate 202. In some embodiments shown in the figures, the deep well 204 is an n-well. Because the deep well 204 is formed in the substrate 202, it can also be referred to as a deep silicon n-well (DSNW) 204 or deep n-well (DNW) 204. In an exemplary process, a shielding oxide layer (not explicitly shown) is first deposited on the substrate 202, and a structured photoresist layer is formed over the shielding oxide to cover regions of the workpiece 200 into which nothing is to be implanted. With the structured photoresist layer in place, an n-doped element, such as phosphorus (P) or arsenic (As), is implanted into the workpiece 200. After implantation, the n-doping agent is thermally driven further into the substrate 202 by a tempering process.In some cases, the deep depression 204 can have a dopant concentration of approximately 1 × 10. 16 cm -3 and approximately 9 × 10 18 cm -3 exhibit. As described further below, and as in the Fig. 15, Fig. 16 or Fig. As illustrated in Figure 17, it has an elongated shape extending lengthwise along the X-direction. The deep depression 204 serves as part of a conduit for trapped photon electrons.

[0012] With reference to Fig. 1 and Fig. In the embodiment shown, the method 100 comprises a block 104 in which a first implantation region 206 is formed such that it extends partially through the substrate 202 until it reaches the deep well 204. In the embodiment shown, the first implantation region 206 extends vertically downward from a top surface of the substrate 202 until it adjoins or overlaps an end of the deep well 204. Like the deep well 204, the first implantation region 206 provides a vertical conduction path from the deep well 204 to the top surface of the substrate 202 and is also part of the conduction path for captured photon electrons. The first implantation region 206 can also be referred to as a silicon n-well (SNW) or n-well (NW).In an exemplary process, a shielding oxide layer (not explicitly shown) is first deposited on the substrate 202, and a structured photoresist layer is formed over the shielding oxide to cover regions of the workpiece 200 where nothing is to be implanted. With the structured photoresist layer in place, an n-doping agent, such as phosphorus (P) or arsenic (As), is implanted into the workpiece 200. During implantation, the n-doping agent is thermally driven further into the substrate 202 by an annealing process until it reaches the deep well 204. In some cases, the first implantation region 206 can have a doping concentration of approximately 1 × 10⁻⁶. 16 cm -3 and approximately 9 × 10 18 cm -3 exhibit. In contrast to the deep depression 204, the first implantation region 206 extends along a vertical direction perpendicular to a top surface of the substrate 202.

[0013] With reference to Fig. 1 and Fig. In section 4, the method 100 comprises a block 106 in which a heavily n-doped region 208 is formed on the first implantation region 206. The heavily n-doped region 208 serves to reduce the contact resistance in the case of a common interface with a metal contact structure element. The heavily n-doped region 208 can be formed by ion implantation. In some embodiments, the heavily n-doped region 208 contains an n-doped element, such as phosphorus (P) or arsenic (As). As the name suggests, the dopant concentration in the heavily n-doped region 208 is higher than the dopant concentration in the first implantation region 206. In some implementations, the dopant concentration in the heavily n-doped region 208 is approximately 1 × 10⁻⁶. 17 cm -3 and approximately 9 × 10 20 cm -3 As illustrated in Fig. As shown in Figure 4, the heavily n-doped region 208 can vertically overlap the first implantation region 206 and is located next to the top of the substrate 202.

[0014] With reference to Fig. 1 and Fig. Figure 5 of the process 100 comprises a block 108 in which a cavity 210 is etched into the substrate 202 such that part of the cavity 210 lies directly above the deep depression 204. Although not explicitly shown in the figures, photolithography and etching processes can be used to form the cavity 210 in the substrate 202. In an exemplary process, a hard mask layer is deposited over the substrate 202 using CVD or another suitable deposition method. A photolithography process is then performed to form a structured photoresist layer over the hard mask layer. The hard mask is then etched using the structured photoresist as an etching mask to form a structured hard mask. The structured hard mask is then applied as an etching mask to etch the substrate 202 and form the cavity 210.The hard mask is formed from a material that differs from that of substrate 202. In some examples, the hard mask may contain silicon oxide, silicon nitride, or a combination thereof. As in . Fig. As shown in Figure 5, the cavity 210 can have a depth D along the Z-direction and an upper width W along the X-direction. In some embodiments, the depth D is approximately 900 nm to approximately 2100 nm. In some embodiments, the upper width W is approximately 2000 nm to approximately 10000 nm. A suitable etching process for forming the cavity 210 can be a dry etching process, a wet etching process, or a combination thereof.

[0015] With reference to Fig. 1 and Fig. In section 6, the procedure 100 comprises a block 110 in which a second implantation region 218 is formed between a floor surface of the cavity 210 and the deep depression 204. The second implantation region 218 serves as a conduit for photon electrons between the floor surface of the cavity 210 and the deep depression 204. As described in Fig. As shown in Figure 6, both the first implantation region 206 and the second implantation region 218 are coupled to or overlap the deep recess 204. In some embodiments, which are shown in Figure 6, the implantation region 204 is also coupled to or overlaps the deep recess 204. Fig. As shown in Figure 6, both the first implantation region 206 and the second implantation region 218 are doped with an n dopant. In some implementations, the second implantation region 218 and the first implantation region 206 have the same dopant concentration. In an exemplary process for forming the second implantation region 218, a first structured implantation mask 212 is first formed over the workpiece 200, including over the cavity 210. As shown in Fig. As shown in Figure 6, the first structured implantation mask 212 has an opening 214 that exposes the implantation area for block 110. In some cases, the first structured implantation mask 212 can be a photoresist layer or a bottom antireflective coating (BARC layer). In the embodiments shown, the first structured implantation mask 212 is a photoresist layer. With the first structured implantation mask 212 in place, an ion implantation process is performed to form the second implantation region 218. After the second implantation region 218 has been formed, the first structured implantation mask 212 can be removed by ashing or selective etching.

[0016] In some embodiments, which are in Fig. As shown in Figure 6, the second implantation region 218 is thermally advanced in such a way that it is slightly removed from the bottom surface of the cavity 210. This prevents too much n-doping from being deposited into the germanium layer 224 to be formed in subsequent processes or thermal cycles (in Figure 6). Fig. (9 shown) diffuses. While some diffusion of n-doped atoms into the germanium layer 224 can facilitate the capture of photon electrons, it can also increase the dark current. The controlled diffusion of n-doped atoms into the germanium layer 224 is also the reason why the germanium layer 224 is not formed in such a way that it rests directly on the deep depression 204, which would increase the contact area. A larger contact area can lead to excessive diffusion of n-doped atoms, causing an undesirable level of dark current. Although in Fig. Although not explicitly shown in Figure 6, the second implantation region 218 is located directly beneath only a small central region of the cavity 210. The small and controlled intervention area between the germanium layer 224 and the second implantation region 218 reduces the diffusion of n-dopeds into the germanium layer 224 to prevent an excessive increase in dark current.

[0017] With reference to Fig. 1, Fig. 7 and Fig. In section 8, the process 100 comprises a block 112 in which an interface implantation region 222 is formed along surfaces of the cavity 210. The interface implantation region 222 fulfills at least two functions. First, the interface implantation region 222 can correct the lattice mismatch between silicon in the substrate 202 and the germanium layer 224 to be formed (in Fig. (9 shown). Due to a lattice mismatch of 4.2% between the silicon and germanium lattices, lattice mismatch defects, such as line defects, can originate near the Si-Ge interface and propagate through the germanium layer 224, resulting in additional dark current. It has been observed that forming a p-doped region near the Si-Ge interface can significantly reduce the effect of a lattice mismatch. Secondly, the interface implantation region 222 can act as a photon electron trap to prevent photon electrons from penetrating the substrate 202. In an exemplary process for forming the interface implantation region 222, a second structured implantation mask 220 is formed over the workpiece 200 to protect the top surface of the substrate 202 as well as the second implantation region 218.Since the second structured implantation mask 220 may have similar properties to the first structured implantation mask 212, a detailed description is omitted for the sake of brevity. An ion implantation process is performed to dope uncovered areas of the cavity 210 with a p-doped compound, such as boron (B) or boron difluoride (BF₂), to form the interfacial implantation region 222. In some embodiments, the interfacial implantation region 222 may extend at least partially into the bottom surface of the cavity 210 and the second implantation region 218, despite the use of the second structured implantation mask 220. Compared to the other doped regions, the interfacial implantation region 222 is quite thin, with a thickness between approximately 20 nm and approximately 100 nm. The interfacial implantation region 222 may have a dopant concentration of approximately 5 × 10⁻⁶. 16 atoms / cm² 3 (cm-3 ) and about 1 × 10 19 cm -3 exhibit. As in Fig. As shown in Figure 8, the second structured implantation mask 220 can be removed by ashyming or selective etching after the second implantation region 218 and the interface implantation region 222 have been formed.

[0018] With reference to Fig. 1 and Fig. In section 9, the process 100 comprises a block 114 in which a germanium layer 224 is formed within the cavity 210. After the formation of the interface implantation region 222, the germanium layer 224 is formed within the cavity 210 and fills a remaining portion of it. The germanium layer 224 is formed directly on the interface implantation region 222 and is separated from the substrate 202 by the interface implantation region 222. Because the interface implantation region 222 occupies very little space within the cavity 210, the germanium layer 224 can have a similar depth D and upper width W to the cavity 210. That is, the germanium layer 224 can have a depth D between approximately 900 nm and approximately 2100 nm and an upper width W between approximately 2000 nm and approximately 10000 nm.In some embodiments, the germanium layer 224 is undoped (or unintentionally doped, UID) (that is, the germanium layer 224 is essentially free of dopants). In some embodiments, the germanium layer 224 has a dopant concentration that is considered undoped. In some alternative embodiments, the germanium layer 224 can be replaced by other semiconductor materials with a smaller band gap than that of silicon or with a direct band gap. For example, the germanium layer 224 can be replaced by a gallium antimony layer (GaSb layer), a lead selenide layer (PbSe layer), a lead telluride layer (PbTe layer), a lead sulfide layer (PbS layer), an indium phosphide layer (InP layer), a gallium arsenide layer (GaAs layer), a cadmium telluride layer (CdTe layer) or a cadmium selenide layer (CdSe layer).

[0019] In some embodiments, the germanium layer 224 is formed by a deposition process that selectively grows germanium on the interface implantation region 222 without growing germanium on a structured dielectric layer formed on the top surfaces of the substrate 202. For example, the germanium layer 224 is formed by epitaxial growth of germanium from the interface implantation region 222, while little or no germanium is epitaxially deposited on the structured dielectric layer. In some cases, the structured dielectric layer may contain silicon oxide. An epitaxial process for forming the germanium layer 224 may implement CVD deposition techniques (for example, VPE, UHV-CVD, LPCVD, and / or PECVD), molecular beam epitaxy, other suitable SEG processes, or combinations thereof. The epitaxial process may use gaseous and / or liquid precursors.For example, the epitaxy process uses a germanium-containing precursor (e.g., German (GeH4), Digerman (GeH4). 26 ), germanium tetrachloride (GeCl4), germanium dichloride (GeCl2), other suitable germanium-containing precursors or combinations thereof) and a support precursor (for example, a hydrogen precursor (e.g., H2), an argon precursor (e.g., Ar), a helium precursor (e.g., He), a nitrogen precursor (e.g., N2), a xenon precursor, another suitable inert precursor, or combinations thereof). In some embodiments, the epitaxial growth process is carried out until epitaxially grown germanium substantially fills the cavity 210. A planarization process, such as chemical-mechanical polishing (CMP), can be performed to remove excess epitaxially grown germanium and thus obtain a planar top surface.

[0020] With reference to Fig. 1 and Fig. Figure 9 of the process 100 comprises a block 116 in which a capping layer 226 is formed over the germanium layer 224. Although not explicitly shown in the figures, the CMP process performed in block 114 can remove the germanium layer 224 at a faster rate, forming a recess directly over the germanium layer 224. That is, after the CMP process, the top surface of the germanium layer 224 is lower than the top surface of the substrate 202. In block 116, an undoped (or UID) capping layer 226 is formed over the germanium layer 224. In the embodiment shown, the capping layer 226 is formed by undoped silicon layers (that is, silicon layers that are essentially free of dopants, such as n-doped dopants (for example, phosphorus) or p-doped dopants (for example, boron)). In some embodiments, the capping layer 226 has a dopant concentration that is considered undoped.In an exemplary process, the cap layer 226 is formed by a deposition process in which silicon is selectively grown on the germanium layer 224 while the substrate 202 is covered with a structured dielectric layer. The structured dielectric layer used in block 116 can be different from, or the same as, the structured dielectric layer used in block 114. For example, the cap layer 226 is formed by epitaxial growth of silicon from the germanium layer 224. An epitaxial process for forming the cap layer 226 can implement CVD deposition techniques (for example, VPE, UHV-CVD, LPCVD, and / or PECVD), molecular beam epitaxy, other suitable SEG processes, or combinations thereof. The epitaxial process can use gaseous and / or liquid precursors, such as a silicon-containing precursor and a support precursor, such as those described in this text.In some embodiments, an optional planarization process, such as CMP, can be performed to remove excess capping layer 226 and thus obtain a planar top surface.

[0021] As in Fig. As shown in Figure 9, the heat energy generated during the formation of the germanium layer 224 can cause the n-doped molecule in the second implantation region 218 to diffuse into the germanium layer 224 and form an n-diffusion region 219. The doped molecule concentration in the n-diffusion region 219 is lower than that in the second implantation region 218. The n-diffusion region 219 can facilitate the capture of photon electrons generated in the germanium layer 224.

[0022] With reference to Fig. 1 and Fig. In the process 100, a block 118 is formed in which a strongly p-doped region 228 is formed through the capping layer 226 and into the germanium layer 224. The strongly p-doped region 228 serves to reduce the contact resistance in the case of a common interface with a metal contact structure element approaching from above. The strongly p-doped region 228 can be formed by ion implantation. In some embodiments, the strongly p-doped region 228 contains a p-doped compound, such as boron (B) or boron difluoride (BF₂). As the name suggests, the dopant concentration in the strongly p-doped region 228 is higher than the dopant concentration in the interface implantation region 222. In some implementations, the dopant concentration in the strongly p-doped region 228 is between approximately 1 × 10⁻⁶ 17 cm -3 and about 1 × 10 21 cm -3 As illustrated in Fig. As shown in Figure 10, the strongly p-doped region 228 extends completely through the cap layer 226 and ends in the germanium layer 224.

[0023] As in Fig. As shown in Figure 10, the heavily p-doped region 228 has a width WP along the X-direction and a depth DP along the Z-direction. Compared to the width W of the cavity 210 or the germanium layer 224, the width WP can range from approximately 0.3 times W to approximately 1.5 times W. That is, the ratio of width WP to width W can range from approximately 0.3 to approximately 1.5. Although not explicitly illustrated in the figures, the heavily p-doped region 228 can have a greater width and area than the germanium layer 224, such that the entire germanium layer 224 is located beneath the heavily p-doped region 228. This width ratio range is not trivial. If the ratio falls below 0.3, the heavily p-doped region 228 may not generate an electric field sufficient to drive the photon electrons sufficiently towards the second implantation region 218.If the ratio is greater than 1.5, the heavily p-doped region 228 may occupy too much space to increase the pixel size. Compared to the depth D of cavity 210 or germanium layer 224, the depth DP can range from approximately 0.1 to approximately 0.5 times D. That is, the ratio of depth DP to depth D can range from approximately 0.1 to approximately 0.5. The depth ratio range is also non-trivial. If the ratio falls below 0.1, the heavily p-doped region 228 may not generate a sufficiently strong electric field to adequately drive the photon electrons toward the second implantation region 218. If the ratio is greater than 0.5, the heavily p-doped region 228 would be too close to the second implantation region 218, so that all electric field lines are concentrated exactly between the heavily p-doped region 228 and the second implantation region 218.As a result, an excessively deep, heavily p-doped region 228 cannot propel the photon electrons distributed over the entire germanium layer 224.

[0024] With reference to Fig. 1 and Fig. In embodiment 10, the process 100 comprises a block 120 in which a dielectric layer 230 is formed over the workpiece 200. In some embodiments, the dielectric layer 230 can be an interlayer dielectric (ILD) layer deposited using chemical vapor deposition (CVD), flowable CVD (FCVD), spin coating, or another suitable deposition method. The dielectric layer 230 can contain materials such as tetraethyl orthosilicate oxide (TEOS oxide), undoped silicate glass, or doped silicon dioxide such as boron phosphosilicate glass (BPSG), fused silica (FSG), phosphosilicate glass (PSG), boron-doped silicon dioxide (BSG), and / or other suitable dielectric materials.Although not explicitly shown in the figures, a contact etch stop layer (CESL) can be deposited over the workpiece 200 prior to the deposition of the dielectric layer 230. The CESL can contain silicon nitride, silicon oxynitride, or other dielectric materials that exhibit different etching properties than the dielectric layer 230.

[0025] With reference to Fig. 1 and Fig. In section 11, the process 100 comprises a block 122 in which contact structure elements are formed in the dielectric layer 230 to establish a connection to the heavily n-doped region 208 and the heavily p-doped region 228. As in Fig. As shown in Figure 11, such contact structure elements can have a first via 232 located on the heavily n-doped region 208, a first metal conductor 234 located on the first via 232, a second via 236 located on the heavily p-doped region 228, and a second metal conductor 238 located on the second via 236. In an exemplary process, a dual damascus process can be performed to form the openings for the via and the metal conductors, and then a metal filler layer is deposited in the via and conductor openings to form the vias and metal conductors. In some embodiments, the metal filler layer can contain copper (Cu), titanium nitride (TiN), doped polysilicon, cobalt (Co), tungsten (W), or nickel (Ni).If the metal filler layer contains copper (Cu), a barrier layer can be deposited along the sidewalls of the openings to prevent direct contact between copper and oxygen in the dielectric layer 230. The barrier layer can contain titanium nitride, tantalum nitride, manganese nitride, or another transition metal nitride. Although not explicitly shown in the figures, an optional metal silicide structural element can be formed between the metal filler layer and the heavily p-doped region 228. The metal silicide structural element further reduces the contact resistance and can contain titanium silicide, nickel silicide, cobalt silicide, or tungsten silicide.

[0026] Fig. 12, Fig. 13 and Fig. Figure 14 illustrates exemplary alternative embodiments that can also be formed using Method 100. Fig. Figure 12 illustrates a first alternative image sensor 200-1 in which several p-wells are formed in the germanium layer 224 to increase the electron transfer efficiency. In the embodiments shown, a central p-well 240 and a surrounding p-well 242 are formed in the germanium layer 224. In some embodiments, the surrounding p-well 242 is more heavily doped than the central p-well 240. In some cases, the dopant concentration in the surrounding p-well 242 is between approximately 1 × 10⁻⁶ 18 cm -3 and approximately 1 × 1020 cm -3 , while a dopant concentration in the central p-well 240 is between approximately 1 × 1015 cm -3 and approximately 9 × 10 17 cm -3Due to the p-doping gradient, electrons generated by incident photons can be guided from the surrounding p-well 242 towards the central p-well. From there, the photon electrons can migrate along the conduction path (the second implantation region 218, the deep well 204, the first implantation region 206) towards the heavily n-doped region 208.

[0027] Fig. Figure 13 illustrates a second alternative image sensor 200-2, which has p-well insulation structure elements. The p-well insulation structure elements have a bottom insulation p-well 250 and a sidewall insulation p-well 252. The sidewall insulation p-well 252 extends completely around the germanium layer 224. The second alternative image sensor 200-2 can be referred to as the image sensor 200 in Fig. 11, which is surrounded or enclosed by the bottom insulation p-well 250 and the side wall insulation p-well 252. The bottom insulation p-well 250 and the side wall insulation p-well 252 contain a p-doped compound, such as boron (B) or boron difluoride (BF2), and a doped compound concentration of approximately 5 × 10 16 atoms / cm² 3 (cm -3 ) and approximately 5 × 10 18 cm -3

[0028] Fig. Figure 14 illustrates a third alternative image sensor 200-3, which has hybrid insulation structure elements. The hybrid insulation structure elements have a bottom insulation p-well 250 and a sidewall insulation structure element 262. The sidewall insulation structure element 262 extends completely around the germanium layer 224. The third alternative image sensor 200-3 can be referred to as the image sensor 200 in Fig. 11, which is surrounded or enclosed by the bottom insulation p-well 250 and the side wall insulation structure element 262. The bottom insulation p-well 250 contains a p-doped element such as boron (B) or boron difluoride (BF2), and a doped element concentration of approximately 5 x 10 16 atoms / cm² 3 (cm -3 ) and approximately 5 × 10 18 cm -3 The sidewall insulation structure element 262 can be made of a dielectric material or a metal. For example, the sidewall insulation structure element 262 can contain silicon oxide, silicon nitride, titanium nitride, copper, or aluminum.

[0029] Fig. 15, Fig. 16 and Fig. Figure 17 shows a schematic top view of the image sensor 200, which was manufactured using method 100. For the sake of simplicity, the illustration is shown below. Fig. 15, Fig. 16 and Fig. 17 only the germanium layer 224, the heavily p-doped region 228, the deep depression 204 and the heavily n-doped region 208. In some embodiments, which are described in Fig. 15, Fig. 11, Fig. 12, Fig. 13 and Fig. As illustrated in Figure 14, the deep trough 204 extends elongated along the X-direction and electrically connects only a single heavily n-doped region 208 and the heavily p-doped region 228. The deep trough 204 begins at one side of the germanium layer 224, extends beneath the germanium layer 224, and terminates directly beneath the germanium layer 224. In some embodiments, which are shown in Figure 14, the deep trough 204 extends elongated along the X-direction and electrically connects only a single heavily n-doped region 208 and the heavily p-doped region 228. Fig. As illustrated in Figure 16, the deep trough 204 extends further along the X-direction, such that the germanium layer 224 vertically overlaps a central section of the deep trough 204, while two end sections lie outside the vertical projection surface of the germanium layer 224. The deep trough 204 in Fig. 16 electrically connects the heavily p-doped region 228 to a first heavily n-doped region 208-1 and a second heavily n-doped region 208-2. In some other embodiments described in Fig. As illustrated in Figure 17, the deep depression 204 is cross-shaped or has the shape of a plus sign with four arms. Although the germanium layer 224 is arranged above a central connecting section of the cross-shaped deep depression 204, the four arms extend beyond the vertical projection surface of the germanium layer 224. The cross-shaped deep depression 204 in Fig. 17 electrically connects the heavily p-doped region 228 to a first heavily n-doped region 208-1, a second heavily n-doped region 208-2, a third heavily n-doped region 208-3, and a fourth heavily n-doped region 208-4. Compared to the one in Fig. The embodiment shown in 15 can be used in Fig. 16 and Fig. 17 embodiments shown provide a larger conduction path for the captured photon electrons at the expense of pixel size.

[0030] We now turn Fig. 18, which illustrates a flowchart for an alternative procedure 300. Although procedure 300 shares some operations with procedure 100, procedure 300 differs from procedure 100 in that it connects the first implantation region 206 and the heavily n-doped region 208 by an extended through-contact 2320 (in Fig. 26 shown) replaced.

[0031] With reference to Fig. 18, Fig. 2 and Fig. In section 3, the process 300 comprises a block 302 in which a deep recess 204 is formed in a substrate 202 of a workpiece 200. The operations in block 302 are essentially similar to those in block 102. For this reason, a detailed description of the operations in block 302 is omitted for the sake of brevity.

[0032] With reference to Fig. 18 and Fig. In section 19, process 300 comprises a block 304 in which a cavity 210 is etched into the substrate 202 such that part of the cavity 210 lies directly above the deep depression 204. The operations in block 304 are essentially similar to those in block 108. For this reason, a detailed description of the operations in block 304 is omitted for the sake of brevity. Block 304 differs from block 108 at least in that the workpiece 200 in 304 does not have equivalents of the first implantation region 206 and the heavily n-doped region 208 formed in the substrate 202. This is because process 300 does not include operations for forming equivalents of the first implantation region 206 and the heavily n-doped region 208 prior to the formation of the cavity 210.

[0033] With reference to Fig. 18 and Fig. Procedure 300 comprises a block 306 in which a second implantation region 218 is formed between a floor surface of the cavity 210 and the deep depression 204. The operations in block 306 are essentially similar to those in block 110. For this reason, a detailed description of the operations in block 306 is omitted for the sake of brevity.

[0034] With reference to Fig. 18, Fig. 21 and Fig. Procedure 300 comprises a block 308 in which an interface implantation region 222 is formed along surfaces of the cavity 210. The operations in block 308 are essentially similar to those in block 112. For this reason, a detailed description of the operations in block 308 is omitted for the sake of brevity.

[0035] With reference to Fig. 18 and Fig. In section 23, the process 300 comprises a block 310 in which a germanium layer 224 is formed in the cavity 210. The operations in block 310 are essentially similar to those in block 114. For this reason, a detailed description of the operations in block 310 is omitted for the sake of brevity.

[0036] With reference to Fig. 18 and Fig. In section 23, process 300 comprises a block 312 in which a cap layer 226 is formed over the germanium layer 224. The operations in block 312 are essentially similar to those in block 116. For this reason, a detailed description of the operations in block 312 is omitted for the sake of brevity.

[0037] With reference to Fig. 18 and Fig. In section 24, procedure 300 comprises a block 314 in which a strongly p-doped region 228 is formed through the capping layer 226 and into the germanium layer 224. The operations in block 314 are essentially similar to those in block 118. For this reason, a detailed description of the operations in block 314 is omitted for the sake of brevity.

[0038] With reference to Fig. 18 and Fig. In section 25, the process 300 comprises a block 316 in which a dielectric layer 230 is formed over the workpiece 200. The operations in block 316 are essentially similar to those in block 120. For this reason, a detailed description of the operations in block 316 is omitted for the sake of brevity.

[0039] With reference to Fig. 18 and Fig. 26 The process 300 comprises a block 318 in which contact structure elements are formed in the dielectric layer 230 to establish a connection to the deep trough 204 and the heavily p-doped region 228. As in Fig. As shown in Figure 26, such contact structure elements can comprise an expanded via 2320 located on the deep recess 204, a first metal conductor 234 located on the expanded via 2320, a second via 236 located on the heavily p-doped region 228, and a second metal conductor 238 located on the second via 236. In one exemplary process, a dual damascus process can be performed to form the openings for the via and the metal conductors, and then a metal filler layer is deposited in the via and conductor openings to form the vias and metal conductors. In some alternative embodiments, the expanded via 2320 and the second via 236 are formed separately.Because the enlarged via 2320 extends much deeper into the substrate 202 than the second via 236 extends into the germanium layer 224, simultaneous etching of the via openings can cause significant over-etching of the heavily p-doped region 228 or even the germanium layer 224. In these alternative embodiments, one of the enlarged vias 2320 and the second via 236 is formed before the other to avoid over-etching and damage to the germanium layer 224. In some embodiments, the metal filler layer can contain copper (Cu), titanium nitride (TiN), doped polysilicon, cobalt (Co), tungsten (W), or nickel (Ni). If the metal filler layer contains copper (Cu), a barrier layer can be deposited along the sidewalls of the openings to prevent direct contact between copper and oxygen in the dielectric layer 230.The barrier layer can contain titanium nitride, tantalum nitride, manganese nitride, or another transition metal nitride. Although not explicitly shown in the figures, an optional metal silicide structural element can be formed between the metal filler layer and the heavily n-doped region 208 or the heavily p-doped region 228. The metal silicide structural element further reduces the contact resistance and can contain titanium silicide, nickel silicide, cobalt silicide, or tungsten silicide.

[0040] As in Fig. As shown in Figure 26, the extended via 2320 replaces the first implantation region 206, the heavily n-doped region 208, and the first via 232. Like the structural elements it replaces, it also serves as part of the conduction path for the captured photon electrons. Because the extended via 2320 is better defined than the first implantation region 206 or the heavily n-doped region 208, its use can reduce the pixel size. We return to Fig. 11 back. The heavily n-doped region 208 can be separated from the germanium layer 224 by a first distance S1. As in Fig. As shown in Figure 26, the extended via 2320 can be spaced from the germanium layer 224 by a second distance S2. The second distance S2 is smaller than the first distance S1.

[0041] Fig. 27, Fig. 28 and Fig. 29 illustrate exemplary alternative embodiments which can also be formed using the method 300. Fig. Figure 27 illustrates a fourth alternative image sensor 200-4 in which several p-wells are formed in the germanium layer 224 to increase the electron transfer efficiency. In the embodiments shown, a central p-well 240 and a surrounding p-well 242 are formed in the germanium layer 224. In some embodiments, the surrounding p-well 242 is more heavily doped than the central p-well 240. In some cases, the dopant concentration in the surrounding p-well 242 is between approximately 1 × 10⁻⁶ 18 cm -3 and about 1 × 10 20 cm -3 , while the dopant concentration in the central p-well 240 is between approximately 1 × 10 15 cm -3 and approximately 9 × 10 17 cm -3Due to the p-doping gradient, electrons generated by incident photons can be guided from the surrounding p-well 242 towards the central p-well 240. From there, the photon electrons can migrate along the conduction path (the second implantation region 218 and the deep well 204) towards the extended via 2320.

[0042] Fig. Figure 28 illustrates a fifth alternative image sensor 200-5, which has p-well insulation structure elements. The p-well insulation structure elements have a bottom insulation p-well 250 and a sidewall insulation p-well 252. The sidewall insulation p-well 252 extends completely around the germanium layer 224. The fifth alternative image sensor 200-5 can be referred to as the image sensor 200 in Fig. 26, which is surrounded or enclosed by the bottom insulation p-well 250 and the side wall insulation p-well 252. The bottom insulation p-well 250 and the side wall insulation p-well 252 contain a p-doped compound, such as boron (B) or boron difluoride (BF2), and a doped compound concentration of approximately 5 × 10 16 atoms / cm² 3 (cm -3 ) and approximately 5 × 10 18 cm -3 .

[0043] Fig. Figure 29 illustrates a sixth alternative image sensor 200-6, which has hybrid insulation structure elements. The hybrid insulation structure elements have a bottom insulation p-well 250 and a sidewall insulation structure element 262. The sidewall insulation structure element 262 extends completely around the germanium layer 224. The sixth alternative image sensor 200-6 can be referred to as the image sensor 200 in Fig. 26, which is surrounded or enclosed by the bottom insulation p-well 250 and the side wall insulation structure element 262. The bottom insulation p-well 250 contains a p-doped element such as boron (B) or boron difluoride (BF2), and a doped element concentration of approximately 5 × 10 16 atoms / cm² 3 (cm -3 ) and approximately 5 × 10 18 cm -3 The sidewall insulation structure element 262 can be made of a dielectric material or a metal. For example, the sidewall insulation structure element 262 can contain silicon oxide, silicon nitride, titanium nitride, copper, or aluminum.

[0044] Fig. 30, Fig. 31 and Fig. Figure 32 shows a schematic top view of the image sensor 200, which was manufactured using method 300. For the sake of simplicity, the illustration is shown below. Fig. 30, Fig. 31 and Fig. 32 only the germanium layer 224, the heavily p-doped region 228, the deep well 204 and the extended via 2320. In some embodiments, which are described in Fig. 30, Fig. 26, Fig. 27, Fig. 28 and Fig. As illustrated in Figure 29, the deep trough 204 extends elongated along the X-direction and electrically connects only a single extended via 2320 and the heavily p-doped region 228. The deep trough 204 begins at one side of the germanium layer 224, extends beneath the germanium layer 224, and ends directly beneath the germanium layer 224. In some embodiments, which are illustrated in Fig. As illustrated in Figure 31, the deep trough 204 extends further along the X-direction, such that the germanium layer 224 vertically overlaps a central section of the deep trough 204, while two end sections lie outside the vertical projection surface of the germanium layer 224. The deep trough 204 in Fig. 31 electrically connects the heavily p-doped region 228 to a first extended via 2320-1 and a second extended via 2320-2. In some other embodiments described in Fig. As illustrated in Figure 32, the deep depression 204 is cross-shaped or has the shape of a plus sign with four arms. Although the germanium layer 224 is arranged above a central connecting section of the cross-shaped deep depression 204, the four arms extend beyond the vertical projection surface of the germanium layer 224. The cross-shaped deep depression 204 in Fig. 32 electrically connects the heavily p-doped region 228 to a first extended via 2320-1, a second extended via 2320-2, a third extended via 2320-3, and a fourth extended via 2320-4. Compared to the one in Fig. The embodiment shown in 30 can be used in Fig. 31 and Fig. 32 embodiments shown provide a larger conduction path for the captured photon electrons at the expense of pixel size.

[0045] The in Fig. 11, Fig. 12, Fig. 13, Fig. 14, Fig. 26, Fig. 27, Fig. 28 and Fig. The 29 image sensors shown can each form a pixel unit in an image acquisition array, or they can be connected together to function as a macropixel. We now turn to Fig. 33 and Fig. 34 to. Fig. Figure 33 illustrates an exemplary image acquisition arrangement 400, which has multiple pixel units 402. Each of the multiple pixel units 402 can be measured using an image sensor similar to the one shown in Fig. 11, Fig. 12, Fig. 13, Fig. 14, Fig. 26, Fig. 27, Fig. 28 and Fig. 29 in Fig. The image sensor 200 shown in Figure 33 is implemented. Each of the pixel units 402 can capture photon electrons and send a signal via the signal lines 404. Because each of the pixel units 402 individually detects incident electromagnetic waves, isolation between pixel units 402 can be of significant importance. It follows that the second alternative image sensor 200-2 in Fig. 13, the third alternative image sensor 200-3 in Fig. 14, the fifth alternative image sensor 200-5 in Fig. 28 and the sixth alternative image sensor 200-6 in Fig. 29 may be particularly suitable for implementing the 402 pixel units, as they have different isolation structures. Fig. Figure 34 illustrates an example macropixel 500, which has several pixel units 502. The pixel units 502 can be created using an image sensor similar to the one in Fig. 11, Fig. 12, Fig. 13, Fig. 14, Fig. 26, Fig. 27, Fig. 28 and Fig. 29 in Fig. The image sensor 200 shown in Figure 33 is implemented. The pixel units 502 can capture photon electrons and collectively emit a signal as a macropixel. Because signals from the pixel units 502 are combined by interconnect signal lines 504, the pixel units 502 may not require much pixel-to-pixel isolation between them. It follows that the image sensor 200 in Fig. 11 or Fig. 26, the first alternative image sensor 200-1 in Fig. 12 or the fourth alternative image sensor 200-4 in Fig. 27 may be particularly suitable for implementing the Macropixel 500, as they do not have isolation structures and can be designed more compactly.

[0046] Fig. Figure 35 illustrates an exemplary stacked image sensor 600, comprising an array of image sensors 200. It is understood that each of the image sensors 200 is in Fig. 35 of the in Fig. 11 shown image sensor 200, which is in Fig. 12 shown first alternative image sensor 200-1, which is in Fig. 13 shown second alternative image sensor 200-2, which is in Fig. 14 shown third alternative image sensor 200-3, which is in Fig. 27 shown fourth alternative image sensor 200-4, which is in Fig. 28 shown fifth alternative image sensor 200-5 or the one in Fig. The sixth alternative image sensor shown in image 29 may be the 200-6. Referring to Fig. The stacked image sensor 600 comprises an application-specific integrated circuit (ASIC) 620 and an image sensor die 650, which is arranged above and bonded to the ASIC die 620. The ASIC die 620 comprises a first substrate 602 and a first interconnect structure 630, which is arranged on the first substrate 602. The image sensor die 650 comprises a second interconnect structure 660 and a second substrate 642, which is arranged on and bonded to the second interconnect structure 660. The first substrate 602 has several transistors 610 formed on it. The transistors 610 can be planar devices or multi-gate devices. A multi-gate device generally refers to a device that has a gate structure, or a section thereof, arranged over more than one side of a channel region.Fin-like field-effect transistors (FinFETs) and multi-bridge-channel transistors (MBCs) are examples of multi-gate devices that have become popular and promising candidates for high-power, low-leakage applications. A FinFET has a raised channel that is enclosed on more than one side by a gate (the gate encloses, for example, the top and side walls of a "fin" made of semiconductor material extending from a substrate). An MBC has a gate structure that can extend—partially or completely—around a channel region to provide access to the channel region on two or more sides. Because its gate structure surrounds the channel regions, an MBC can also be referred to as a "surrounding-gate transistor" (SGT) or a "gate-all-around transistor" (GAA).

[0047] Each of the first interconnect structure 630 and the second interconnect structure 660 has multiple conductive structural elements embedded in multiple intermetal dielectric (IMD) layers. The conductive structural elements include metal wires and vias. The metal wires provide horizontal signal transmission, and the vias provide vertical connection. The conductive structural elements may contain copper (Cu) and may be separated from the IMD layers by barrier layers. The barrier layers may contain a metal nitride, such as titanium nitride. For clarity, only metal wires are shown. Although the first interconnect structure 630 and the second interconnect structure 650 are each shown to have four metallization layers, each of them may have four (4) to nineteen (19) metallization layers.The image sensor die 650 and the ASIC die 620 are bonded by means of an interconnect structure 640, which may have bonding layers that may have vertically oriented bonding pads.

[0048] The image sensor die 650 further features a metal grid 644 arranged over the second substrate 642, including over the image sensors 200. Although in Fig.Not explicitly shown in Figure 35, the second substrate 642 can have deep trench isolation (DTI) structural elements that provide subdivision for various image sensors 200. The metal grid 644 is arranged in a passivation structure 646, which can contain silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof. The image sensor die 650 also includes a color filter assembly 648 arranged on the passivation structure 646 and microlens structural elements 652 arranged on the color filter assembly 648. The image sensor die 650 also has pad structures 654 formed along scribe lines of the image sensor die 650.

[0049] In one aspect, an image sensor is provided. The image sensor comprises a silicon substrate, a germanium region located in the silicon substrate, a doped semiconductor insulating layer located between the silicon substrate and the germanium region, a heavily p-doped region located on the germanium region, a heavily n-doped region located on the silicon substrate, a first n-well located immediately below the germanium region, a second n-well located immediately below the heavily n-doped region, and a deep n-well located below, and in contact with, the first n-well and the second n-well.

[0050] In some embodiments, the doped semiconductor insulating layer contains silicon and a p-type dopant. In some implementations, the image sensor further includes a semiconductor cap layer arranged on the germanium region. In some cases, the top surfaces of the semiconductor cap layer and the silicon substrate are substantially coplanar. In some embodiments, the heavily p-doped region extends through the semiconductor cap layer. In some implementations, the germanium region comprises a first p-well arranged on top of the first n-well and a second p-well surrounding the first p-well. In some cases, both the first p-well and the second p-well contain a p-type dopant, and the concentration of the p-type dopant in the first p-well is lower than the concentration of the p-type dopant in the second p-well.In some embodiments, the heavily n-doped region is separated from the germanium region by a section of the silicon substrate.

[0051] In another aspect, an image sensor structure is provided. The image sensor structure comprises a silicon substrate, a germanium region located in the silicon substrate, a heavily p-doped region located on the germanium region, an n-well located immediately below the germanium region, a metal contact structure element extending into the silicon substrate, and a deep n-well located below, and in contact with, the n-well and the metal contact structure element.

[0052] In some embodiments, the image sensor structure further comprises a doped semiconductor insulating layer located between the silicon substrate and the germanium region. In some implementations, the doped semiconductor insulating layer contains boron-doped silicon (Si:B). In some embodiments, the image sensor structure further comprises a semiconductor capping layer located on top of the germanium region. In some cases, the semiconductor capping layer consists essentially of silicon. In some cases, the heavily p-doped region extends through the semiconductor capping layer and partially into the germanium region. In some embodiments, the image sensor structure further comprises a bottom-insulation p-well located below the deep n-well.

[0053] In a further aspect, a method is provided. The method comprises: forming a deep n-well in a silicon substrate, forming a first n-well through the silicon substrate until the deep n-well is reached, forming a heavily n-doped region on the first n-well, forming a cavity in the silicon substrate such that at least one section of the cavity is located directly above the deep n-well and that the cavity is spaced apart from the first n-well, forming a second n-well between a bottom surface of the cavity and the deep n-well, forming a p-insulating layer on surfaces of the cavity, and after forming the p-insulating layer, depositing a germanium layer in the cavity, forming a silicon cap over top surfaces of the germanium layer, and forming a heavily p-doped region through the silicon cap until it terminates in the germanium layer.

[0054] In some embodiments, the method further comprises: depositing a dielectric layer over the heavily p-doped region and the heavily n-doped region, and forming a first contact structure element and a second contact structure element through the dielectric layer until the heavily p-doped region and the heavily n-doped region, respectively, are contacted. In some implementations, forming the second n-well comprises: forming a first structured photoresist layer such that a first section of the bottom surface of the cavity is covered and a second section of the bottom surface of the cavity remains uncovered, and implanting an n-doped element into the second section using the first structured photoresist layer as an implantation mask.In some cases, forming the p-insulation layer involves: removing the first structured photoresist layer, forming a second structured photoresist layer such that the second section of the cavity floor is covered and the first section of the cavity floor remains uncovered, and implanting a p-doped into the first section using the second structured photoresist layer as an implantation mask. In some embodiments, the deep n-well is elongated and comprises a first end section, a second end section, and a middle section located between the first and second end sections. The germanium layer is positioned directly above the middle section but does not extend over the first and second end sections.

[0055] The above outlines features of various embodiments so that the person skilled in the art can better understand the aspects of the present disclosure. It is clear to the person skilled in the art that they can readily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or the same advantages as in the embodiments presented in this text. It should also be clear to the person skilled in the art that such equivalent designs do not depart from the essence and scope of protection of the present disclosure, and that they can make various changes, substitutions, and modifications to the present invention without departing from the essence and scope of protection of the present disclosure.

Claims

[1] Image sensor comprising: a silicon substrate; a germanium region located in the silicon substrate; a doped semiconductor insulating layer located between the silicon substrate and the germanium region; a heavily p-doped region located on the germanium region; a heavily n-doped region located on the silicon substrate; a first n-well located directly below the germanium region; a second n-well located directly below the heavily n-doped region; and a deep n-well located below, and in contact with, the first n-well and the second n-well. [2] Image sensor according to claim 1, wherein the doped semiconductor insulating layer comprises silicon and a p-doped dopant. [3] Image sensor according to claim 1 or 2, further comprising a semiconductor cap layer arranged on the germanium region. [4] Image sensor according to claim 3, wherein the top surfaces of the semiconductor cap layer and the silicon substrate are substantially coplanar. [5] Image sensor according to claim 3 or 4, wherein the heavily p-doped region extends through the semiconductor cap layer. [6] Image sensor according to any one of claims 1 to 5, wherein the germanium region comprises: a first p-well arranged on top of the first n-well; and a second p-well surrounding the first p-well. [7] Image sensor according to claim 6, wherein the first p-well and the second p-well comprise a p-dotande, wherein a concentration of the p-dotande in the first p-well is less than a concentration of the p-dotande in the second p-well. [8] Image sensor according to one of claims 1 to 7, wherein the heavily n-doped region is spaced apart from the germanium region by a section of the silicon substrate. [9] Image sensor structure, which includes: a silicon substrate; a germanium region located in the silicon substrate; a heavily p-doped region located on the germanium region; an n-well located directly below the germanium region; a metal contact structure element that extends into the silicon substrate; and a deep n-well located below, and in contact with, the n-well and the metal contact structure element. [10] Image sensor structure according to claim 9, further comprising: a doped semiconductor insulating layer that is positioned between the silicon substrate and the germanium region. [11] Image sensor structure according to claim 10, wherein the doped semiconductor insulating layer comprises boron-doped silicon (Si:B). [12] Image sensor structure according to one of claims 9 to 11, which further comprises a semiconductor cap layer arranged on the germanium region. [13] Image sensor structure according to claim 12, wherein the semiconductor cap layer consists essentially of silicon. [14] Image sensor structure according to one of claims 12 and 13, wherein the heavily p-doped region extends through the semiconductor cap layer and partially into the germanium region. [15] Image sensor structure according to any one of claims 9 to 14, further comprising: a soil insulation p-trough located below the deep n-trough. [16] Procedure that includes: Forming a deep n-well in a silicon substrate; Forming an initial n-well through the silicon substrate until the deep n-well is reached; Formation of a heavily n-doped region on the first n-well; Forming a cavity in the silicon substrate, such that at least one section of the cavity is arranged directly above the deep n-well and that the cavity is spaced apart from the first n-well; Forming a second n-trough between a bottom surface of the cavity and the deep n-trough; Formation of a p-insulation layer on surfaces of the cavity; After forming the p-insulation layer, a germanium layer is deposited in the cavity; Forming a silicon cap over the tops of the germanium layer; and Forming a heavily p-doped region through the silicon cap until it ends in the germanium layer. [17] The method of claim 16, which further comprises: Deposition of a dielectric layer over the heavily p-doped region and the heavily n-doped region; and Forming a first contact structure element and a second contact structure element through the dielectric layer until the heavily p-doped region or the heavily n-doped region is contacted. [18] Method according to claim 16 or 17, comprising forming the second n-well: Forming a first structured photoresist layer such that a first section of the floor surface of the cavity is covered and a second section of the floor surface of the cavity remains free, and Implanting an n-dotted endpoint into the second section using the first structured photoresist layer as an implantation mask. [19] Method according to claim 18, wherein forming the p-insulation layer comprises: Removal of the first structured photoresist layer; Forming a second structured photoresist layer such that the second section of the cavity floor is covered and the first section of the cavity floor remains uncovered; and Implanting a p-dot into the first section using the second structured photoresist layer as an implantation mask. [20] Method according to any one of claims 16 to 19, wherein the deep n-trough is elongated and comprises a first end section, a second end section and a central section that is taken up between the first end section and the second end section, the germanium layer is located directly above the middle section, but not above the first end section and the second end section.