Method for joining an arrangement consisting of an electronic component and a joining partner, as well as an arrangement consisting of an electronic component and a joining partner

Abstract

The invention relates to a method for joining an arrangement (100) consisting of an electronic component (10), in particular a semiconductor component and / or an electronic power module, and a joining partner (40), in particular a heat sink (42), comprising providing the electronic component (10); providing the planar joining partner (40); applying a sintered layer (30) to a rear side (11) of the electronic component (10) and / or to a side (41) of the joining partner (40) facing the electronic component (10), wherein an areal density of the sintered layer (30) is adapted to a locally occurring electrical power loss of the electronic component (10) and / or a local mechanical stress of the electronic component (10) during intended operation;The rear side (11) of the electronic component (10) and the side (41) of the joining partner (40) facing the electronic component (10) are brought together and pressed together under a predetermined temperature and pressure. The invention further relates to an arrangement (100) consisting of an electronic component (10) and a joining partner (40).

Description

[0001] The invention relates to a method for joining an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink, as well as an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink.

[0002] A power module is typically connected to a heat sink to dissipate the heat generated by the semiconductor components. This is usually achieved using a solder or sintered connection. Solder connections are inexpensive but have disadvantages in terms of lifespan and thermal conductivity. Sintered connections are superior in both respects but are also significantly more expensive.

[0003] DE 10 2014 222 818 B4 discloses an electronic sandwich structure comprising at least a first and a second joining partner, which are sintered together by means of a sintered layer. The flexibility and elasticity of the sintered layer, preferably a silver sintered layer, are influenced by a locally targeted density in order to give the sintered layer improved compensation properties for the mismatch in the coefficients of thermal expansion of the joining partners.

[0004] DE 10 2014 222 819 B4 further describes a power semiconductor contact structure comprising at least one substrate and a metal body as an electrode, which are sintered together by means of a substantially closed sintered layer with areas of varying thickness. The metal body is designed as a flexible contact foil with a thickness such that its side facing the sintered layer is substantially fully sintered to the areas of varying thickness of this corrugated sintered layer. This deliberately created corrugated structure is also formed on the side facing away from the sintered layer to enable an integral material bond.

[0005] Furthermore, DE 10 2012 221 396 A1 discloses an arrangement for electronic assemblies comprising at least one electronic component, in particular a semiconductor component, at least one joining partner, and at least one interconnection layer between them. The interconnection layer is a metallic sintered layer applied by a dispensing or inkjet process and has a gradient structure and / or a rounded edge in at least one corner region.

[0006] From JP 2017-139345 A, a semiconductor device is known comprising a plurality of semiconductor elements, an insulating board on which the plurality of semiconductor elements are mounted, a heat dissipation board which is connected to the insulating board via a bonding layer, wherein the bonding layer has first sintered metal layer elements which are located directly beneath the semiconductor elements, and second sintered metal layer elements which have a greater porosity than the first sintered metal layer elements, wherein the second sintered metal layer elements are in contact with an outer edge part of the insulating board and surround the first sintered metal layer elements.

[0007] From US 2018 / 0240728A1, another semiconductor device is known, comprising a heat dissipation substrate, an insulating substrate arranged on the heat dissipation substrate and having a compound layer, a plurality of semiconductor elements arranged on the insulating substrate, a conductive block electrically connected to a front electrode of the semiconductor element, and a terminal electrode, wherein the conductive block has a convex section connected to the insulating substrate.

[0008] One object of the invention is to provide an efficient method for joining an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink.

[0009] Another task is to create an arrangement consisting of an electronic component, in particular a semiconductor component and / or electronic power module, and a joining partner, in particular a heat sink, which can be manufactured using such an efficient method.

[0010] The aforementioned tasks are solved using the characteristics of independent claims.

[0011] Favorable embodiments and advantages of the invention will become apparent from the further claims, the description and the drawing.

[0012] According to one aspect of the invention, a method for joining an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink, is proposed, comprising providing the electronic component; providing the planar joining partner;Applying a sintered layer to a back side of the electronic component and / or to a side of the joining partner facing the electronic component, wherein the areal density of the sintered layer is adapted to the electrical power loss of the electronic component occurring locally during intended operation and to the local mechanical stress of the electronic component, wherein the areal density is a ratio of the area of ​​a surface element covered by the sintered layer to the total area of ​​the surface element, wherein the density of the sintered layer is chosen to be higher in spatial regions where high electrical power loss occurs than in regions with low electrical power loss, and wherein the density of the sintered layer is chosen to be higher in spatial regions with high mechanical stress than in regions with low mechanical stress;and joining the back side of the electronic component and the side of the joining partner facing the electronic component, and pressing together under a predetermined temperature and pressure.

[0013] The surface element for determining the areal density of the sintered layer can represent a unit area of ​​the electronic component.

[0014] The proposed method serves to join an arrangement consisting of an electronic component, such as a semiconductor component and / or an electronic power module, and a joining partner such as a heat sink, which is mechanically and thermally coupled to the electronic component by means of a sintered connection.

[0015] The electrical power dissipation in an electronic component, such as a semiconductor device and / or an electronic power module, can vary considerably at different positions within the component. It is proposed to vary the areal density of the sintered layer positioned between the electronic component and the joining partner, depending on the locally occurring electrical power dissipation and / or the local mechanical stress of the connection.

[0016] This allows the sintering paste to be applied only as needed, reducing the total amount required for the component. Therefore, sintering paste is applied only to areas subjected to thermal or mechanical stress, while its density is reduced in unstressed areas. This ensures the necessary performance of the sintered layer is achieved with minimal material usage.

[0017] The local electrical power dissipation of the respective components within the device is used as a parameter for adjusting the local layer density of the sintered layer. In areas with high electrical power dissipation, such as around power transistors, the sintered layer density is chosen to be higher than in areas with low electrical power dissipation. This allows the thermal conductivity between the component and the heat sink to be specifically increased in areas with high electrical power dissipation, while this is not necessary in areas with low electrical power dissipation.

[0018] A further parameter used is the local mechanical stress on the component. In areas with high mechanical stress, the density of the sintered layer is chosen to be greater than in areas with low mechanical stress. For example, the mechanical load is particularly high at the edge of the component, where the component is usually subjected to the highest stress. Therefore, a high sintered layer density is chosen in this edge region. This allows the mechanical strength of the sintered joint to be specifically increased in areas with high mechanical stress.

[0019] This can advantageously reduce the manufacturing costs of the arrangement and save resources.

[0020] According to an advantageous embodiment of the process, the sintered layer can be applied using a screen printing process. Varying the areal density of the sintered layer is easily achieved, since the sintering paste is typically applied using screen printing. The density of the sintering paste can be varied depending on the design of the stencil or mask used for applying the sintering paste.

[0021] According to an advantageous embodiment of the process, the geometric structure of a screen-printing mask can be selected and / or varied to adjust the areal density of the sintered layer. The desired local areal density of the sintered paste can advantageously be adjusted by means of the geometric structure of the mask used to apply the sintering paste.

[0022] According to an advantageous embodiment of the process, the screen printing mask can have geometric patterns with differently selectable areal densities to adjust the areal density of the sintered layer. For example, patterns with different areal densities can be used, such as different dot patterns and / or corner patterns, for example polygons such as quadrilateral / rectangle / square / hexagon.

[0023] According to an advantageous embodiment of the process, the areal density of the sintered layer can be varied between 0% and 100%. The areal density of the sintered layer can, in principle, vary between 0% (no coating / coverage at all) and 100% (complete / maximum coverage).

[0024] According to an advantageous embodiment of the method, in a surface element with high electrical power loss, in particular with an electrical power loss of at least 6 W / mm² 2The areal density must be at least 80%. In a surface element with medium electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm². 2 and at most 6 W / mm 2 The areal density can be at least 20% and at most 80%. In a surface element with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm². 2 The surface density can be a maximum of 20%. This allows the necessary performance of the sintered layer to dissipate thermal energy from the component and to ensure the mechanical stability of the assembly to be achieved with minimal material usage.

[0025] According to an advantageous embodiment of the process, the thickness of the sintered layer can be kept constant. In particular, the thickness of the sintered layer can be kept constant over the entire joining surface. The thickness of the sintered layer can be at least 50 µm and at most 80 µm. This advantageously provides an efficient manufacturing process for joining the assembly.

[0026] According to a further aspect of the invention, an arrangement consisting of an electronic component, in particular a semiconductor component and / or electronic power module, and a joining partner, in particular a heat sink, is proposed to be manufactured using a method described above, wherein a back side of the electronic component is arranged on a side of the joining partner facing the electronic component by means of a sintered layer.The areal density of the sintered layer is adapted to the electrical power loss and local mechanical stress of the electronic component that occur locally during intended operation, wherein the areal density is a ratio of the area of ​​a surface element covered by the sintered layer to the total area of ​​the surface element, wherein the density of the sintered layer is chosen to be higher in spatial areas where high electrical power loss occurs than in areas with low electrical power loss, and wherein the density of the sintered layer is chosen to be higher in spatial areas with high mechanical stress than in areas with low mechanical stress.

[0027] The proposed arrangement comprises an electronic component, such as a semiconductor component and / or an electronic power module, and an joining partner, such as a heat sink, which is mechanically and thermally coupled to the electronic component by means of a sintered connection.

[0028] The electrical power dissipation in an electronic component, such as a semiconductor device and / or an electronic power module, can vary significantly at different locations within the component. Therefore, the areal density of the sintered layer positioned between the electronic component and the joining partner is adapted to the locally occurring electrical power dissipation and / or the local mechanical stress of the connection.

[0029] This allows the sintering paste to be applied only as needed, reducing the total amount required for the component. Therefore, sintering paste is applied only to areas subjected to thermal or mechanical stress, while its density is reduced in unstressed areas. This ensures the necessary performance of the sintered layer is achieved with minimal material usage.

[0030] The local electrical power dissipation of the respective components within the device is used as a parameter for adjusting the local layer density of the sintered layer. In areas with high electrical power dissipation, such as around power transistors, the sintered layer density is chosen to be higher than in areas with low electrical power dissipation. This allows the thermal conductivity between the component and the heat sink to be specifically increased in areas with high electrical power dissipation, while this is not necessary in areas with low electrical power dissipation.

[0031] A further parameter used is the local mechanical stress on the component. In areas with high mechanical stress, the density of the sintered layer is chosen to be greater than in areas with low mechanical stress. For example, the mechanical load is particularly high at the edge of the component, where the component is usually subjected to the highest stress. Therefore, a high sintered layer density is chosen in this edge region. This allows the mechanical strength of the sintered joint to be specifically increased in areas with high mechanical stress.

[0032] This can advantageously reduce the manufacturing costs of the arrangement and save resources.

[0033] According to an advantageous embodiment of the arrangement, a surface element with high electrical power loss, in particular with an electrical power loss of at least 6 W / mm², can be used. 2The areal density must be at least 80%. In a surface element with medium electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm². 2 and at most 6 W / mm 2 The areal density can be at least 20% and at most 80%. In a surface element with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm². 2 The surface density can be a maximum of 20%. This allows the necessary performance of the sintered layer to dissipate thermal energy from the component and to ensure the mechanical stability of the assembly to be achieved with minimal material usage.

[0034] According to an advantageous embodiment of the arrangement, the thickness of the sintered layer can be constant. In particular, the thickness of the sintered layer can be constant over the entire joining surface. Specifically, the thickness of the sintered layer can be at least 50 µm and at most 80 µm. This ensures a reliable bond between the joining partner and the electronic component.

[0035] Further advantages will become apparent from the following description of the drawings. The drawings illustrate an embodiment of the invention. The drawings, the description, and the claims contain numerous features in combination. A person skilled in the art will expediently consider the features individually and combine them into meaningful further combinations.

[0036] This shows: Fig. 1 a schematic sectional view through an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink, according to an embodiment of the invention; Fig. 2 a schematic top view of an arrangement consisting of an electronic power module and a heat sink according to a further embodiment of the invention; and Fig. 3 a flowchart of the method for joining an arrangement consisting of an electronic component, in particular a semiconductor component and / or an electronic power module, and a joining partner, in particular a heat sink, according to an embodiment of the invention.

[0037] In the figures, identical or similar components are numbered with the same reference symbols. The figures merely show examples and are not to be understood as limiting.

[0038] Fig. Figure 1 shows a schematic sectional view through an arrangement 100 consisting of an electronic component 10, in particular a semiconductor component and / or electronic power module, and a joining partner 40, in particular a heat sink 42, according to an embodiment of the invention.

[0039] Arrangement 100 shows an exemplary structure of an electronic component 10, which is connected to a heat sink.

[0040] Component 10 comprises several metal layers 20, 24, for example copper layers, with a thickness of 280 µm, with an intervening ceramic layer 22, for example an aluminum nitride layer, with a thickness of 640 µm. An active semiconductor 16 is deposited onto this composite via a bonding layer 18, for example a solder layer or sintered layer. The semiconductor 16 can, for example, have a thickness of 100 µm. An additional active layer 14 is deposited on the surface of the semiconductor 16 and is contacted by means of a bonding wire 12.

[0041] The heat sink 42, as the joining partner 40 of the component 10, comprises a metal base plate 44, for example a copper plate, for example 3 mm thick. The metal base plate 44 has individual projecting fingers 45 on its underside for heat dissipation. The fingers 45 can be surrounded by a coolant 48, which is contained within a frame of a heat sink 46. The heat sink 46 tightly encloses the fingers 45 of the metal base plate 44.

[0042] A rear side 11 of the electronic component 10 is arranged by means of a sintered layer 30 on a side 41 of the joining partner 40 facing the electronic component 10.

[0043] The thickness 32 of the sintered layer 30 is constant. In particular, the thickness 32 of the sintered layer 30 can be constant over the entire joining surface. The thickness 32 of the sintered layer 30 can typically be at least 50 µm and at most 80 µm.

[0044] In the proposed arrangement, the areal density of the sintered layer 30 is adapted to the electrical power loss of the electronic component 10 occurring locally during intended operation and / or to the local mechanical stress on the electronic component 10. The areal density represents the ratio of the area covered by the sintered layer 30 of a surface element 50, 52, 54 (see Fig. 2) and a total area of ​​the surface element 50, 52, 54.

[0045] Fig. Figure 2 shows a schematic top view of an arrangement 100 consisting of an electronic power module with a series of active semiconductors 16 and a heat sink 42 (not visible) according to a further embodiment of the invention.

[0046] The active semiconductors 16, acting as power semiconductors, exhibit high electrical power dissipation and thus represent area elements 50 with high electrical power dissipation. Electrical conductors 60 for electrical contacting in the arrangement 100 represent area elements 52 with medium electrical power dissipation. Electrical insulation areas 62 between the active semiconductors 16 and the electrical conductors 60 represent area elements 54 with low electrical power dissipation.

[0047] Advantageously, according to one embodiment of the arrangement 100, it can be located in a surface element 50 with high electrical power loss, in particular with an electrical power loss of at least 6 W / mm². 2 , the areal density of the sintered layer 30 is at least 80%. In a surface element 52 with average electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm² 2and at most 6 W / mm 2 The areal density of the sintered layer 30 can be at least 20% and at most 80%. In a surface element 54 with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm² 2 The surface density can be a maximum of 20%.

[0048] The mechanically stressed area 56 at the edge of the arrangement 100 is shown with a dashed line. The edge of a circuit board on which the component 10 is arranged is usually subject to the highest mechanical stress and is particularly susceptible to cracking. In this area 56, the areal density of the sintered layer 30 can advantageously be chosen to be very high.

[0049] In Fig.Figure 3 shows a flowchart of the method for joining such an arrangement 100 from an electronic component 10, in particular a semiconductor component and / or an electronic power module, and a joining partner 40, in particular a heat sink 42, according to an embodiment of the invention.

[0050] The proposed procedure includes, in step S100, the provision of the electronic component 10. In step S102, the planar joining partner 40, for example in the form of the heat sink 42, is provided.

[0051] In step S104, a sintered layer 30 is applied to a back side 11 of the electronic component 10 and / or to a side 41 of the joining partner 40 facing the electronic component 10. The areal density of the sintered layer 30 is adapted to the electrical power dissipation of the electronic component 10 and / or the local mechanical stress on the electronic component 10 that occurs locally during normal operation.

[0052] The sintered layer 30 can be advantageously applied using a screen printing process. To adjust the areal density of the sintered layer 30, a geometric structure of a screen printing mask can be selected and / or varied. For example, the screen printing mask can have suitably shaped geometric patterns with differently selectable areal densities to adjust the areal density.

[0053] Advantageously, the areal density of the sintered layer 30 can be varied between 0% and 100%. This allows, for example, a surface element 50 with high electrical power dissipation, particularly with an electrical power dissipation of at least 6 W / mm², to be constructed with a high density of 30%. 2 , the areal density must be at least 80%. In a surface element 52 with average electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm² 2 and at most 6 W / mm 2 , the areal density can be at least 20% and at most 80% and in an area element 54 with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm² 2 The surface density can be a maximum of 20%.

[0054] The thickness 32 of the sintered layer 30 can be kept constant, particularly over the entire joining surface. The thickness 32 of the sintered layer 30 can, as is typical, be at least 50 µm and at most 80 µm.

[0055] In step S106, the back side 11 of the electronic component 10 and the side 41 of the joining partner 40 facing the electronic component 10 are brought together and pressed under a specified temperature and pressure. Reference symbol list 10 components 11 Back 12 Bond wire 14 active layers 16 active semiconductors 18 Compound layer 20 metal layer 22 ceramic layer 24 copper layers 30 sintered layer 32 layer thickness 40 joining partners 41 facing side 42 heat sinks 44 Metal base plate 45 fingers 46 Heat sink 48 Coolant 50 surface elements with high electrical power loss 52 Area element of average electrical power loss 54 surface element low electrical power loss 56 Area of ​​mechanical stress 60 electrical conductors 62 electrical insulation range 100 arrangement

Claims

[1] Method for joining an arrangement (100) consisting of an electronic component (10), in particular a semiconductor component and / or an electronic power module, and a joining partner (40), in particular a heat sink (42), comprising Providing the electronic component (10); Providing the surface-extended joining partner (40); Applying a sintered layer (30) to a back side (11) of the electronic component (10) and / or to a side (41) of the joining partner (40) facing the electronic component (10), wherein an areal density of the sintered layer (30) is adapted to a locally occurring electrical power loss of the electronic component (10) and a local mechanical stress of the electronic component (10) during intended operation, wherein the areal density is a ratio of an area of ​​a surface element (50, 52, 54) covered by the sintered layer (30) and a total area of ​​the surface element (50, 52, 54), wherein in spatial regions where a high electrical power loss occurs, the density of the sintered layer (30) is chosen to be greater than in regions with low electrical power loss.and wherein in spatial areas with high mechanical stress the density of the sintered layer (30) is chosen to be greater than in areas with low mechanical stress; Joining the back side (11) of the electronic component (10) and the side (41) of the joining partner (40) facing the electronic component (10) and pressing together under a predetermined temperature and pressure. [2] Method according to claim 1, wherein the sintered layer (30) is applied using a screen printing process. [3] Method according to claim 2, wherein a geometric structure of a screen printing mask is selected and / or varied to adjust the areal density of the sintered layer (30). [4] Method according to claim 3, wherein, to adjust the areal density of the sintered layer (30), the mask of the screen printing process has geometric patterns with differently selectable areal densities. [5] Method according to any of the preceding claims, wherein the areal density of the sintered layer (30) is varied between 0% and 100%. [6] Method according to one of the preceding claims, wherein in a surface element (50) with high electrical power loss, in particular with an electrical power loss of at least 6 W / mm² 2 the area density is at least 80%, wherein in a surface element (52) with average electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm² 2 and at most 6 W / mm 2 the area density is at least 20% and at most 80%, wherein in a surface element (54) with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm² 2 The area density is at most 20%. [7] Method according to one of the preceding claims, wherein a layer thickness (32) of the sintered layer (30) is kept constant, in particular wherein the layer thickness (32) of the sintered layer (30) is kept constant over an entire joining surface, in particular wherein the layer thickness (32) of the sintered layer (30) is at least 50 µm and at most 80 µm. [8] Arrangement (100) comprising an electronic component (10), in particular a semiconductor component and / or an electronic power module, and a joining partner (40), in particular a heat sink (42), manufactured by a method according to one of the preceding claims, wherein a rear side (11) of the electronic component (10) is arranged by means of a sintered layer (30) on a side (41) of the joining partner (40) facing the electronic component (10), wherein an areal density of the sintered layer (30) is adapted to a locally occurring electrical power loss of the electronic component (10) during intended operation and a local mechanical stress of the electronic component (10), wherein the areal density is a ratio of an area of ​​a surface element (50, 52, 54) covered by the sintered layer (30) and a total area of ​​the surface element (50, 52, 54), wherein in spatial regions where a high electrical power loss occurs, the density of the sintered layer (30) is chosen to be larger than in regions with low electrical power loss, and wherein in spatial regions with high mechanical stress, the density of the sintered layer (30) is chosen to be larger than in regions with low mechanical stress. [9] Arrangement according to claim 8, wherein in a surface element (50) with high electrical power loss, in particular with an electrical power loss of at least 6 W / mm² 2 the area density is at least 80%, wherein in a surface element (52) with average electrical power loss, in particular with an electrical power loss of at least 0.6 W / mm² 2 and at most 6 W / mm 2 the area density is at least 20% and at most 80%, wherein in a surface element (54) with low electrical power loss, in particular with an electrical power loss of at most 0.06 W / mm² 2 The area density is at most 20%. [10] Arrangement according to claim 8 or 9, wherein a layer thickness (32) of the sintered layer (30) is constant, in particular wherein the layer thickness (32) of the sintered layer (30) is constant over an entire joining surface, in particular wherein the layer thickness (32) of the sintered layer (30) is at least 50 µm and at most 80 µm.

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