DISPLAY PANEL AND METHOD FOR MAKING THE DISPLAY PANEL

Abstract

Embodiments disclose a display device and a method for manufacturing the display device. The disclosed display device comprises a bank pattern arranged on a substrate, a first electrode pattern arranged on the bank pattern, a light-emitting element arranged on the first electrode pattern such that it is electrically connected to the first electrode pattern, a second electrode pattern designed to cover the light-emitting element, an inorganic insulating layer designed to cover the bank pattern, the first electrode pattern, and the light-emitting element between the first electrode pattern and the second electrode pattern, and a diffusion layer comprising several diffusion particles and in contact with the inorganic insulating layer.

Description

[0001] This application claims priority to Korean Patent Application No. 2023-0094593, filed on July 20, 2023. BACKGROUND 1. Area of ​​Revelation

[0002] The disclosure relates to a display panel and to a method for manufacturing the display panel. 2. Discussion of the state of the art

[0003] Electroluminescent display devices can generally be divided into organic light-emitting display devices (OLEDs), in which organic light-emitting diodes (OLEDs) are arranged in pixels, and inorganic light-emitting display devices (hereinafter referred to as "LED display devices"), in which inorganic light-emitting diodes (hereinafter referred to as "LEDs") are arranged in pixels.

[0004] The electroluminescent display device displays images using self-luminous elements and therefore does not require a separate light source such as a backlight unit. It can be thin and implemented in various forms. The electroluminescent display device not only exhibits excellent power consumption, excellent response time, excellent luminance, a wide viewing angle, and the like, but also has an excellent contrast ratio and color gamut, as black gradations can be expressed as perfect black.

[0005] Since an oxidation phenomenon may occur between an organic light-emitting layer and an electrode in an organic light-emitting display device due to the penetration of moisture and oxygen, a design that prevents the penetration of oxygen and moisture is required.

[0006] As an example of an inorganic light-emitting display device, a microLED display device, in which microLEDs are arranged in pixels, has attracted attention as a next-generation display device. The microLED can be an inorganic LED with a size of 100 µm or less. MicroLEDs are fabricated in a separate semiconductor process and transferred to pixel positions on a display panel substrate of the display device, allowing them to be arranged in subpixels for each color. SUMMARY OF THE INVENTION

[0007] Since a gap is created during a display panel manufacturing process due to the weakening of the adhesion between an AlOx passivation layer and a diffusion layer (a sidewall diffuser, SWD), a cathode may be affected by the stretching or compression of the diffusion layer. Accordingly, separation may occur during cathode formation.

[0008] The object of the invention is to provide a display device and a method for producing a display device in which the cathode of the LED is not affected by the stretching or compression of the diffusion layer.

[0009] Another object is to provide a display device in which the adhesion between a light-emitting element and a diffusion layer (SWD) is improved by using an inorganic insulating layer with strong adhesion so that cathode separation defects are suppressed, and a method for manufacturing the display device.

[0010] The object is achieved by the features of the independent claims. Preferred embodiments are specified in the dependent claims.

[0011] According to one aspect, there is provided a display panel comprising a bank pattern arranged on a substrate, a first electrode pattern arranged on the bank pattern, a light-emitting element arranged on the first electrode pattern so as to be electrically connected to the first electrode pattern, a second electrode pattern configured to cover the light-emitting element, an inorganic insulating layer configured to cover the bank pattern, the first electrode pattern, and the light-emitting element between the first electrode pattern and the second electrode pattern, and a diffusion layer comprising a plurality of diffusion particles and in contact with the inorganic insulating layer.

[0012] According to another aspect, there is provided a method for manufacturing a display panel, comprising: forming a bank pattern on a substrate, forming a first electrode pattern on the bank pattern, disposing a light-emitting element on the first electrode pattern so as to be electrically connected to the first electrode pattern, disposing an inorganic insulating layer configured to cover the bank pattern, the first electrode pattern, and the light-emitting element, disposing a diffusion layer comprising a plurality of diffusion particles and in contact with the inorganic insulating layer, planarizing the diffusion layer and the inorganic insulating layer to expose an upper part of the light-emitting element, and disposing a second electrode pattern configured to cover the light-emitting element, the inorganic insulating layer, and the diffusion layer.

[0013] In one or more embodiments, the inorganic insulating layer may be at least one layer selected from inorganic insulating materials, including a silicon nitride (SiN) film and a silicon oxide (SiO2) film.

[0014] In one or more embodiments, the inorganic insulating layer may be formed with a thickness of 10 Å to 500 Å.

[0015] In one or more embodiments, the diffusion layer may be formed by selecting at least one of the following materials: an organic compound in which TiOx is added to Si-HO, a material containing a photoactive compound (PAC) and polyimide (PI), a sidewall diffuser (SWD) from which TiOx is removed, and an insulating material containing SiOx and SiN.

[0016] In one or more embodiments, the light-emitting element may include a first p-type semiconductor layer, a second n-type semiconductor layer, and an active layer disposed between the first p-type semiconductor layer and the second n-type semiconductor layer.

[0017] In one or more embodiments, the light-emitting element may further comprise a first electrode in contact with the first p-type semiconductor layer and a second electrode in contact with the second n-type semiconductor layer.

[0018] In one or more embodiments, a pad pattern connected to the first electrode pattern may be arranged on a lower surface of the light-emitting element.

[0019] In one or more embodiments, a solder pattern may be disposed in contact with the pad pattern on the first electrode pattern.

[0020] In one or more embodiments, the contact pad pattern may have an area greater than or equal to the area of ​​the solder pattern.

[0021] In one or more embodiments, the display panel may further comprise a passivation layer disposed on an outer surface of the light-emitting element.

[0022] In one or more embodiments, the passivation layer may be in contact with the inorganic insulating layer.

[0023] In one or more embodiments, the passivation layer may be formed from at least one material selected from insulating materials including aluminum oxide (AlOx), Al2O3, and aluminum.

[0024] In one or more embodiments, the first electrode pattern may comprise an anode electrode and the second electrode pattern may comprise a cathode electrode.

[0025] In one or more embodiments, a drive circuit and an insulating layer may be disposed between the bank pattern, the inorganic insulating layer and the diffusion layer and the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other objects, features and advantages of the invention will become more apparent to those skilled in the art when exemplary embodiments thereof are described in detail with reference to the accompanying drawings, in which: Fig. 1 is a plan view showing a pixel in a display panel of one embodiment of the disclosure; Fig. 2 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel along the line II' in Fig. 1 shows; Fig. 3 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel along the line II-II' in Fig. 1 shows; Fig. 4 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel along the line III-III' in Fig. 1 shows; and Fig. 5A to 5M are cross-sectional views of a process for manufacturing the display panel of an embodiment of the disclosure. DESCRIPTION OF EMBODIMENTS

[0027] Advantages and features of the disclosure, and a method for achieving them, will become apparent from the embodiments described in detail below with reference to the accompanying drawings. However, the disclosure is not limited to the embodiments described below and may be implemented in a variety of different forms. The embodiments are provided merely to enable those skilled in the art to fully understand the scope of the disclosure, and the disclosure is defined only by the scope of the claims.

[0028] The figures, dimensions, ratios, angles, numbers, and the like disclosed in the drawings to describe the embodiments of the disclosure are for illustrative purposes only and are not limited to the circumstances shown in the disclosure. Furthermore, in describing the disclosure, detailed descriptions of known technologies are omitted if it is determined that they might unnecessarily obscure the essence of the disclosure.

[0029] Terms such as "comprise," "comprise," and "consist of," used herein, are intended to allow for the addition of other elements, unless the terms are used with the term "only." When a component is expressed in the singular form, it may include a case where the plural form is included, unless explicitly stated otherwise.

[0030] Components are designed to include a normal margin of error, even if this is not explicitly stated.

[0031] For example, when describing a positional relationship, if the positional relationship between two parts is described as "on", "over", "under", "next to", and the like, one or more parts may be inserted between them, provided that the expression does not use the term "immediate" or "direct".

[0032] When an element or layer is placed "on top of" another element or layer, the element is placed directly on top of another element or layer, or is placed on top of another element or layer with another element between them.

[0033] Furthermore, the terms "first," "second," and the like may be used herein to describe various components, but the components are not limited by the terms. These terms are used only to distinguish one component from another. Accordingly, a first component discussed below could be referred to as a second component without departing from the teachings of the disclosure.

[0034] The same reference symbols generally designate the same elements throughout the application text.

[0035] The size and thickness of each component illustrated in the drawings are shown for convenience of description, and the disclosure is not necessarily limited to the size and thickness of the illustrated component.

[0036] The features of various embodiments of the disclosure may be partially or fully connected or combined with one another. The embodiments may technically interact and be implemented in various ways and may be implemented independently of one another or in conjunction with one another.

[0037] In the following, various embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0038] A display device of one embodiment of the disclosure includes a display region in which an image is displayed, or a display panel on which a screen is arranged, and a pixel drive circuit that drives pixels of the display panel. The display region includes a pixel region in which the pixels are arranged. The pixel region includes a plurality of light-emitting regions. A light-emitting element is arranged in each of the light-emitting regions. The pixel drive circuit may be incorporated into the display panel.

[0039] Fig. 1 is a plan view showing a pixel in a display panel of an embodiment of the disclosure. Fig. 2 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel taken along line II' in Fig. 1 shows. Fig. 3 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel taken along the line II-II' in Fig. 1 shows. Fig. 4 is a cross-sectional view showing a partial longitudinal cross-sectional structure of the display panel taken along the line III-III' in Fig. 1 shows.

[0040] With reference to Fig. 1 to 4, a display panel 10 has a length in an X-axis direction, a width in a Y-axis direction, and a thickness in a Z-axis direction. A plane shape of the display panel 10 may include a rectangular panel or a heterogeneous panel structure including a circular shape, an oval shape, or the like. A display area or screen on which an image is displayed in the display panel 10 includes a plurality of pixels PXL. Each of the pixels PXL includes a plurality of sub-pixels having different colors. For example, each of the pixels PXL may include a red sub-pixel in which a light-emitting element emitting light with a red wavelength is arranged, a green sub-pixel in which a light-emitting element emitting light with a green wavelength is arranged, and a blue sub-pixel in which a light-emitting element emitting light with a blue wavelength is arranged. The pixels PXL may further include white pixels.

[0041] The pixel PXL can contain several subpixels of the same color. As shown in Fig. 1, for example, each of the pixels PXL may include a first red sub-pixel in which a 1-1 light-emitting element ED11 that emits red wavelength light is arranged, a second red sub-pixel in which a 1-2 light-emitting element ED12 that emits red wavelength light is arranged, a first green sub-pixel in which a 2-1 light-emitting element ED21 that emits green wavelength light is arranged, a second green sub-pixel in which a 2-2 light-emitting element ED22 that emits green wavelength light is arranged, a first blue sub-pixel in which a 3-1 light-emitting element ED31 that emits blue wavelength light is arranged, and a second blue sub-pixel in which a 3-2 light-emitting element ED32 that emits blue wavelength light is arranged.

[0042] Viewed from a longitudinal cross-section of the display panel 10 as shown in Fig. 2 and Fig. 3, the display panel 10 may include a drive circuit 220 disposed on a substrate 210, a first insulating layer 224, a wiring pattern 230, a second insulating layer 234, a bank pattern 240, a first electrode pattern 250, a solder pattern 260, light-emitting elements ED11 to ED32, a passivation layer 150, an inorganic insulating layer 270, a diffusion layer 280, a common electrode 292, a black matrix BM, and a third insulating layer 294.

[0043] The display substrate 210 may be formed from a flexible plastic. For example, the display substrate 210 may be a single-layer substrate or a multi-layer substrate made of a material selected from, but not limited to, polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, and a cyclic olefin copolymer. For example, the display substrate 210 may be a glass substrate.

[0044] The drive circuit 220, which drives pixels, may be arranged on the display substrate 210. The drive circuit 220 may receive a drive voltage, an image signal (a digital signal), a synchronization signal synchronized with the image signal, and the like, and output an anode voltage and a cathode voltage of the light-emitting element to drive a plurality of pixels. The drive circuit 220 may receive the image signal and the synchronization signal from a host system. The host system may include a motherboard of a portable system, a mobile system, a television system (TV), a tablet computer, a notebook computer, a navigation device system, a personal computer (PC), or the like.

[0045] The drive circuit 220 may include a plurality of transistors and one or more capacitors. The transistors may include a plurality of transistors using an amorphous silicon semiconductor, a polycrystalline silicon semiconductor, or an oxide semiconductor. The transistors may be metal-oxide-semiconductor field-effect transistors (MOSFETs) on a semiconductor substrate. In this case, the drive circuit 220 may be integrated into a microchip disposed on the display substrate 210 and covered by an insulating layer. One microchip may drive multiple pixels PXL.

[0046] When the drive circuit 220 is a microchip, after an adhesive layer (not shown in the drawings) is applied to the display substrate 210, the microchip may be transferred to the display substrate 210 and attached to the display substrate 210 in a transfer process. The adhesive layer may be made of, but is not necessarily limited to, an acrylic resin, a silicone resin, or the like.

[0047] The first insulating layer 224 may be disposed on the display substrate 210 to cover the drive circuit 220. The first insulating layer 224 may be formed of an organic insulating material, such as, but not limited to, photosensitive acrylic or photosensitive polyimide.

[0048] A lower conductive pattern 230 may be disposed on the first insulating layer 224. Lines connecting the drive circuit 220 and the light-emitting elements ED11 to ED32 may consist of lines to which conductive patterns divided into multiple layers are connected. In this case, an insulating layer may be disposed between conductive patterns disposed on different layers in the display panel 10, and the conductive patterns may be connected by contact holes extending through the insulating layer.

[0049] The lower conductive pattern 230 may be a single-layer metal line or a multi-layer metal line selected from aluminum (Al), titanium (Ti), copper (Cu), molybdenum (Mo), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), and the like. For example, the lower conductive pattern 230 may be a metal line stacked in a three-layer structure such as Ti / Al / Ti or Mo / Al / Mo.

[0050] The lower line pattern 230 may be covered by the second insulating layer 234. The second insulating layer 234 may be formed from an organic insulating material, such as, but not limited to, photosensitive acrylic or photosensitive polyimide. For example, the second insulating layer 234 may comprise a single-layer insulating layer or a multi-layer insulating layer made of an inorganic insulating material such as, but not limited to, silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide.

[0051] A plurality of bank patterns 240 may be arranged on the second insulating layer 234. Each of the bank patterns 240 may be arranged under one light-emitting element or two or more light-emitting elements. For example, as shown in Fig. As shown in Figure 1, a first bank pattern may be arranged under the 1-1 and 1-2 light-emitting elements ED11 and ED12, and a second bank pattern may be arranged under the 2-1 and 2-2 light-emitting elements ED21 and ED22. A third bank pattern may be arranged under the 3-1 and 3-2 light-emitting elements ED31 and ED32.

[0052] The bank pattern 240 may be formed of an organic insulating material such as, but is not limited to, photosensitive acrylic or photosensitive polyimide. The bank pattern 240 may direct a position where the light-emitting element is mounted during the light-emitting element transfer process. The bank pattern 240 may be omitted.

[0053] At least one first electrode pattern 250 may be arranged on the bank pattern 240. As shown in Fig. As shown in Figure 3, the first electrode pattern 250 may extend in one direction, for example, in the X-axis direction, to cover a top surface and a side surface of the bank pattern 240 and a portion of an upper surface of the second insulating layer 234. Thus, the first electrode pattern 250 may form a step.

[0054] The first electrode pattern 250 may be electrically connected to one of the lower conductive patterns 230 through a contact hole formed in the second insulating layer 234 and receive a signal from the drive circuit 220.

[0055] The first electrode pattern 250 may be a single metal layer or a multilayer metal layer selected from titanium (Ti), molybdenum (Mo), aluminum (Al), and other metal materials. However, the disclosure is not necessarily limited thereto. The first electrode pattern 250 may also be used as an anode electrode.

[0056] A transparent electrode material layer selected from indium tin oxide (ITO) and indium zinc oxide (IZO) may be stacked on this metal layer.

[0057] The solder pattern 260 may be arranged on the first electrode pattern 250. The solder pattern 260 may be formed of, but is not necessarily limited to, indium (In), tin (Sn), or an alloy thereof. In a light-emitting region, contact pad patterns 160 are arranged on lower surfaces of the first electrodes (140 in Fig. 4) of the light-emitting elements ED11 to ED32 are in contact with upper surfaces of the solder patterns 260, and the first electrode patterns 250 are in contact with lower surfaces of the solder patterns 260.

[0058] A conductive pattern 252 may be a single metal layer or a multilayer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al). A transparent electrode material layer selected from indium tin oxide (ITO) and indium zinc oxide (IZO) may be stacked on the metal layer.

[0059] The light-emitting elements ED11 to ED32 can be inorganic light-emitting diodes (LEDs) that implement micro-LEDs.

[0060] Furthermore, the light-emitting elements ED11 to ED32 in the disclosure have the same meaning as the light-emitting elements 100 and are therefore collectively referred to as the light-emitting elements 100 hereinafter.

[0061] The light-emitting elements 100 may be inorganic LEDs implementing micro-LEDs.

[0062] With reference to Fig. 4, the light-emitting elements 100 of the embodiment of the disclosure may be transferred and arranged on the bank pattern 240 arranged on the display substrate 210 and overlap the bank pattern 240.

[0063] Furthermore, the light-emitting element 100 may be in contact with the first electrode pattern 250 arranged on the bank pattern 240 and / or may overlap the first electrode pattern 250.

[0064] The light-emitting element 100 may include a light-emitting layer 130 including a first p-type semiconductor layer 136, a second n-type semiconductor layer 132, and an active layer 134 therebetween, a first electrode 140 in contact with the first p-type semiconductor layer 136 of the light-emitting layer 130, and a second electrode 120 in contact with the second n-type semiconductor layer 132 of the light-emitting layer 130.

[0065] The first electrode 140 in contact with the p-type semiconductor layer 136 may comprise an anode electrode, and the second electrode 120 in contact with the n-type semiconductor layer 132 may comprise a cathode electrode. The light-emitting layer 130 may comprise one or more quantum well layers.

[0066] The first and second semiconductor layers 136 and 132 and the active layer 134 of the light-emitting element 100 may be made of a group II-VI or group III-V compound semiconductor. The light-emitting element 100 may be formed on a growth substrate through a separate manufacturing process and disposed on the solder pattern 260 through a transfer process.

[0067] The light-emitting layer 130 of the light-emitting element 100 of the embodiment is a PN junction structure in which the p-type first semiconductor layer 136, the active layer 134, and the n-type second semiconductor layer 132 are sequentially formed.

[0068] Furthermore, the passivation layer 150 is formed on the outer surfaces of the first electrode 140 and the light-emitting layer 130 of the light-emitting element 100. The passivation layer 150 may be formed from an insulating material layer containing aluminum oxide (AlO3) or an aluminum oxide series to protect the light-emitting element. The passivation layer 150 may partially surround the light-emitting element at its lower part and sidewalls. Thus, the passivation layer 150 is in contact with the first electrode 140, the second electrode 120, and the light-emitting layer 130. The passivation layer 150 does not cover the upper surface of the second electrode 120.

[0069] A portion of the first electrode 140 is exposed on a lower surface of the light-emitting element 100, and the pad pattern 160 is formed on the exposed first electrode 140 to form an ohmic contact.

[0070] The pad pattern 160 is bonded and electrically connected to the solder pattern 260 formed on the first electrode pattern 250 arranged on the bank pattern 240 formed on the display substrate 210, which will be described later.

[0071] An area of ​​the contact pad pattern 160 is greater than or equal to an area of ​​the solder pattern 260. Accordingly, the contact pad pattern 160 may be in contact with the solder pattern 260 and completely cover the solder pattern 260, or may also be in contact with the solder pattern 260 and the first electrode pattern 250 below the solder pattern 260.

[0072] Although not shown in the drawing, the pad pattern 160 may be formed in a stacked structure of a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer, or in a single-layer structure formed of a single metal layer of any of these metal layers, but is not necessarily limited thereto.

[0073] When the pad pattern 160 has a stacked structure, the second and third metal layers may be disposed between the first metal layer and the fourth metal layer. Each of the first to fourth metal layers may be formed of gold (Au), aluminum (Al), and nickel (Ni), or an alloy thereof, and the first and fourth metal layers may be formed of different metals than the second and third metal layers, but are not limited thereto. The second metal layer may be formed of a different metal than the first, third, and fourth metal layers. For example, the first and fourth metal layers may contain gold (Au), the second metal layer may contain aluminum (Al), and the third metal layer may contain nickel (Ni).

[0074] The first p-type semiconductor layer 136, which forms the light-emitting layer 130, is a semiconductor layer in which holes with positive charges move as carriers to generate current, and may be formed of a p-GaN-based material. The p-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, or the like, and Mg, Zn, Be, or the like may be used as impurities used to dope the p-type semiconductor layer.

[0075] The first electrode 140 is formed on the p-type semiconductor layer 136 to form an ohmic contact. When the light-emitting element 100 is transferred to the panel, the light-emitting element 100 comes into contact with a pixel electrode (not shown) and can receive a voltage corresponding to a data voltage via a thin-film transistor.

[0076] The second n-type semiconductor layer 132 is a semiconductor layer in which free electrons with negative charges move as carriers to generate electricity, and may be formed of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, or the like, and Si, Ge, Se, Te, C, or the like may be used as impurities used to dope the n-type second semiconductor layer 132.

[0077] The active layer 134 may be disposed on the first p-type semiconductor layer 136 and may have a multiple quantum well (MQW) structure including a well layer and a barrier layer with a larger band gap than that of the well layer. For example, the active layer 134 may have a multiple quantum well structure such as InGaN / GaN or the like.

[0078] The first electrode 140 may be in contact with the first p-type semiconductor layer 136 of the light-emitting layer 130, and the second electrode 120 may be in contact with the second n-type semiconductor layer 132.

[0079] The first electrode 140 and the second electrode 120 may be formed from, but are not necessarily limited to, a transparent electrode material or a translucent electrode material. A transparent electrode layer or translucent electrode layer may include at least one or more elements selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

[0080] So if the on a growth substrate (110 in Fig. 5A) is transferred to the display substrate 210 through a support substrate 190, current flows between the pixel electrode (not shown) and the common electrode 292 due to the movement of electrons in the second n-type semiconductor layer 132 and the flow of holes in the first p-type semiconductor layer 136, since the first electrode 140 is connected to the pixel electrode (not shown) through the pad pattern 160, and thus a positive voltage is applied to the first electrode 140, which is in contact with the first p-type semiconductor layer 136 through the pixel electrode, and a negative voltage is applied to the second electrode 120, which is in contact with the second n-type semiconductor layer 132 through the common electrode 292.

[0081] Further, the light-emitting layer 130 emits light by recombination of electrons and holes according to the current flowing between the pixel electrode and the common electrode 292.

[0082] With reference to Fig. 2 to 4, the display panel 10 of the embodiment of the disclosure may include the drive circuit 220 formed on the display substrate 210, the first insulating layer 224 disposed on the drive circuit 220, the lower conductive patterns 230 disposed on the first insulating layer 224, the second insulating layer 234 disposed on the lower conductive patterns 230, the bank patterns 240 disposed on the second insulating layer 234, the first electrode patterns 250 disposed on the bank patterns 240, and the light-emitting elements 100 disposed on the first electrode patterns 250, adhered thereto, and connected to the first electrode patterns 250 through the solder patterns 260.

[0083] The passivation layer 150 is formed on an outer surface of the light-emitting element 100 to protect an internal element. The passivation layer 150 may include at least one layer selected from insulating layers containing aluminum oxide (AlOx), Al2O3, aluminum, or other metal materials. However, the disclosure is not necessarily limited thereto.

[0084] The inorganic insulating layer 270 covers an outer surface of the passivation layer 150 and the bank pattern 240. The inorganic insulating layer 270 may cover and / or contact the passivation layer 150, the pad pattern 160, the solder pattern 260, and the bank pattern 240 between the cathode electrode 290 and the second insulating layer 234.

[0085] A portion of the lower end of the inorganic insulating layer 270 may cover the upper surface of the second insulating layer 234 near the bank pattern 240. The inorganic insulating layer 270 is formed with a thickness of 10 Å to 500 Å.

[0086] When the inorganic insulating layer 270 is formed using an inorganic material other than a silicon nitride film (SiN), it is preferable that the inorganic insulating layer 270 be formed with an appropriate thickness such as 10 Å to 500 Å, because the inorganic insulating layer 270 may not be uniformly deposited if a film thickness is formed too thin.

[0087] The inorganic insulating layer 270 can be formed by selecting at least one of the inorganic insulating materials including a silicon nitride (SiN) film and a silicon oxide (SiOx) film. In the embodiment, an example using a silicon nitride (SiN) film is described, but the disclosure is not necessarily limited thereto. Since the inorganic insulating layer 270 enhances the adhesion between the passivation layer 150 formed of AlOx and the diffusion layer 280 (a sidewall diffuser, SWD), interfacial separation between the light-emitting element 100 and the diffusion layer 280 can be suppressed.

[0088] The diffusion layer 280 (the sidewall diffuser, SWD) is formed on the inorganic insulating layer 270 and the second insulating layer 234.

[0089] The diffusion layer 280 (the sidewall diffuser, SWD) can be used by selecting an organic compound in which TiOx is added to Si-HO, a material containing a photoactive compound (PAC) and polyimide (PI), a sidewall diffuser (SWD) from which TiOx is removed, and / or insulating materials containing SiOx and SiN.

[0090] Since the interface separation between the light-emitting element 100 and the diffusion layer 280 can be suppressed by the inorganic insulating layer 270, a defect in which the cathode electrode 290 is separated when the cathode electrode 290 is formed on the light-emitting element 100 can be avoided.

[0091] Since the inorganic insulating layer 270 is formed outside the light-emitting element 100 and thus the adhesion between the passivation layer 150 formed of AlOx on the outer surface of the light-emitting element 100 and the diffusion layer 280 is improved, a missingness, a rotation defect, or the like of the light-emitting element 100, which occur during a cleaning process when the light-emitting element 100 is opened, are avoided and thus the yield can be improved.

[0092] A second electrode pattern 290 is arranged on the light-emitting element 100, the inorganic insulating layer 270 and the diffusion layer 280 and is connected to the second electrode (120 in Fig. 4) of the light-emitting element 100. The second electrode pattern 290 can be used as a cathode electrode.

[0093] Furthermore, in the diffusion layer 280, a contact hole 282h ( Fig. 2). The common electrode 292 is formed on the diffusion layer 280 including the contact hole 282h and is electrically connected to the conductive pattern 252 provided under the diffusion layer 280 and the second electrode pattern 290.

[0094] The conductive pattern 252 may be electrically connected to the lower drive circuit 220 and transmit a signal of the drive circuit 220 to the light-emitting element 100.

[0095] The black matrix BM is arranged on the common electrode 292. The black matrix BM can be formed from an organic insulating material to which a black pigment is added. The common electrode 292 is in contact with the conductive pattern 252 beneath the black matrix BM.

[0096] The third insulating layer 294 is formed on the black matrix BM and the common electrode 292.

[0097] Thus, the light-emitting element 100 emits light by recombination of electrons and holes according to the current flowing between the first p-type semiconductor layer 136 and the second n-type semiconductor layer 132.

[0098] The first electrode of each of the light-emitting elements 100 may be electrically connected to an anode voltage output terminal of the pixel drive circuit 220 via the solder pattern 260, the first electrode pattern 250, and at least one wiring pattern through the pad pattern 160 formed on a lower surface of the first electrode.

[0099] The second electrode of each of the light-emitting elements 100 may be electrically connected to a cathode voltage output terminal of the pixel drive circuit 220 via the common electrode 292, the wiring pattern 252, and at least one wiring pattern.

[0100] The passivation layers 150 are formed on the outer surfaces of the light-emitting elements 100. The passivation layer 150 may be formed from at least one of the following materials: aluminum oxide (AlOx) and / or aluminum oxide-based insulating materials. However, the disclosure is not necessarily limited thereto. The passivation layer 150 serves to protect the light-emitting element 100.

[0101] The inorganic insulating layer 270 covers the passivation layer 150 surrounding the light-emitting element 100 and the bank pattern 240. The inorganic insulating layer 270 covers the pad pattern 160, the first electrode pattern 250, and the solder pattern 260, which are arranged on the lower surface of the light-emitting element 100. The inorganic insulating layer 270 is also formed on the second insulating layer 234.

[0102] The inorganic insulating layer 270 serves to improve the weak adhesion between the AlOx passivation layer 150 and the diffusion layer 280 (SWD).

[0103] The inorganic insulating layer 270 may use at least one layer selected from inorganic insulating materials, including a silicon nitride (SiN) film and a silicon oxide (SiOx) film with excellent adhesion. In the embodiment, an example using a silicon nitride (SiN) film is described, but the disclosure is not necessarily limited thereto.

[0104] The inorganic insulating layer 270 may be formed with a thickness of about 10 Å to 500 Å to improve the adhesion between the passivation layer 150 formed of AlOx and the diffusion layer 280.

[0105] The diffusion layer 280 is disposed on the inorganic insulating layer 270 and disposed between adjacent light-emitting elements 100 to planarize the light-emitting elements 100.

[0106] The diffusion layer 280 can be formed by selecting an organic compound in which TiOx is added to Si-HO in which a plurality of fine metal particles are dispersed and diffused, a material containing a photoactive compound (PAC) and polyimide (PI), a sidewall diffuser from which TiOx is removed, and / or insulating materials containing SiOx and SiN.

[0107] The second electrode pattern 290 is arranged on the light-emitting element 100 and the diffusion layer 280. The second electrode pattern 290 is electrically connected to the second electrode 120 of the light-emitting element 100. The second electrode pattern 290 can be used as a cathode electrode.

[0108] The common electrode 292 may be disposed on the second electrode pattern 290 and the diffusion layer 280 and connected in common to all pixels PXL. The common electrode 292 may be a thin metal electrode that transmits light. The conductive pattern 252, the common electrode 292, and the black matrix BM may be stacked in a non-light-emitting region of a pixel region. The common electrode 292 may be formed of a transparent electrode material such as, but is not limited to, indium tin oxide (ITO).

[0109] The diffusion layer 280 may include the contact hole 282h that exposes the conductive pattern 252. Since a portion of the common electrode 292 is formed in the contact hole 282h of the diffusion layer 280, the common electrode 292 may be in contact with an upper surface of the conductive pattern 252. The contact hole 282h may be formed in an outer region of the pixel in a shape that surrounds the bank patterns 240.

[0110] The third insulating layer 294 may be formed of an organic insulating material covering the black matrix BM and the common electrode 292. An insulating layer (not shown) corresponding to the diffusion layer 280 may be uniformly formed between the third insulating layer 294 and the common electrode 292. In this case, a layer of organic insulating material in which fine metal molecules are dispersed may cover the common electrode 292 with a thickness thinner than that of the diffusion layer 280.

[0111] A method of manufacturing the display panel of an embodiment of the disclosure will be described below.

[0112] Fig. 5A to 5M are cross-sectional views of the method of manufacturing the display panel of one embodiment of the disclosure.

[0113] With reference to Fig. 5A, a growth substrate 110 is prepared for forming a red, green, or blue type epi structure constituting a light-emitting element.

[0114] The growth substrate 110 may be formed from a conductive substrate or an insulating substrate. For example, the growth substrate 110 may be formed from sapphire, SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and / or Ga2O3. However, the disclosure is not limited thereto.

[0115] Next, a light-emitting element (100 in Fig. 5F) by forming a first p-type semiconductor layer 136, an active layer 134, and a second n-type semiconductor layer 132, which form a light-emitting layer 130, on the growth substrate 110, and by forming a first electrode 140 and a second electrode 120 on and below the light-emitting layer 130. The first p-type semiconductor layer 136 is described as a first semiconductor layer, and the second n-type semiconductor layer 132 is described as a second semiconductor layer.

[0116] In this case, the first semiconductor layer 136, the active layer 134, and the second semiconductor layer 132 may be formed using a method such as an organic chemical vapor deposition (MOCVD) method, a chemical vapor deposition (CVD) method, a plasma enhanced chemical vapor deposition (PECVD) method, a molecular beam epitaxy (MBE) method, a hydride vapor phase epitaxy (HVPE) method, or an epitaxial method.

[0117] The first semiconductor layer 136 is a semiconductor layer in which holes with positive charges move as carriers and thus current is generated.

[0118] The first semiconductor layer 136 may be selected from semiconductor materials having the composition formula InxAlyGal-xyN (0≤x≤1, 0≤xy≤1, 0≤x+y≤1) such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN and the like, and may be doped with a p-type dopant such as Mg, Zn, Ca, Sr, Ba or the like.

[0119] Alternatively, the first semiconductor layer 136 may be formed of a p-GaN-based material. The p-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, or the like, and Mg, Zn, Be, or the like may be used as impurities for doping the first semiconductor layer.

[0120] The second semiconductor layer 132 is a semiconductor layer in which free electrons with negative charges move as carriers, thus generating electricity.

[0121] The second semiconductor layer 132 may be formed, for example, with a second semiconductor layer. The second semiconductor layer 132 may be selected from semiconductor materials having a composition formula InxAlyGal-xyN (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like, and may be doped with an n-type dopant such as Si, Ge, Sn, or the like.

[0122] Alternatively, the second semiconductor layer 132 may be formed of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, or the like, and Si, Ge, Se, Te, C, or the like may be used as impurities for doping the second semiconductor layer 132.

[0123] Furthermore, the embodiment is not limited thereto, and the first semiconductor layer 136 may include a second semiconductor layer and the second semiconductor layer 132 may include a first semiconductor layer.

[0124] The active layer 134 is a region where electrons and holes recombine. As the electrons and holes recombine, the active layer 134 can transition to a lower energy level and generate light of the corresponding wavelength.

[0125] The active layer 134 may be formed of a semiconductor material having a composition formula such as InxAlyGal-x-yN (0≤x≤1, 0≤yx≤1, 0≤x+y≤1) and may be formed in a single quantum well structure or a multiple quantum well (MQW) structure.

[0126] Furthermore, the active layer 134 may also have a quantum wire structure or a quantum dot structure.

[0127] The active layer 134 may be disposed on the first semiconductor layer 136 and may have a multiple quantum well (MQW) structure with a well layer and a barrier layer with a larger band gap than that of the well layer. For example, the active layer 134 may have a multiple quantum well structure such as InGaN / GaN or the like.

[0128] Subsequently, electrode material layers made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) are deposited as first electrode 140 and second electrode 120 on and below the light-emitting layer 130.

[0129] The first and second electrodes 140 and 120 may be formed from, but are not necessarily limited to, a transparent electrode material or a translucent electrode material. The transparent electrode layer or translucent electrode layer may contain at least one or more materials selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

[0130] Next, a passivation layer 150 is deposited on the growth substrate 110 comprising the light-emitting element 100 and then patterned to expose a portion of the first electrode 140 of each of the light-emitting elements 100.

[0131] The passivation layer 150 is a layer formed to protect the light-emitting element 100 from the outside and may include at least one layer selected from insulating layers containing aluminum oxide (AlOx), Al2O3, aluminum, or other metal materials. The disclosure is not necessarily limited thereto.

[0132] Subsequently, a layer of metal material is deposited on the entire surface of the growth substrate 110, including the exposed portion of the first electrode 140 and the passivation layer 150, and selectively patterned to form a pad pattern 160 in contact with the first electrode 140.

[0133] Although not shown in the drawings, the pad pattern 160 may be formed in a stacked structure of a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer, or in a single-layer structure of a single metal layer of any of these metal layers, but is not necessarily limited thereto.

[0134] When the pad pattern 160 has the stacked structure, the second and third metal layers may be disposed between the first metal layer and the fourth metal layer. Each of the first to fourth metal layers may be formed of gold (Au), aluminum (Al), and nickel (Ni), or an alloy thereof, and the first and fourth metal layers may be formed of different metals than the second and third metal layers, but are not limited thereto. The second metal layer may be formed of a different metal than the first, third, and fourth metal layers. For example, the first and fourth metal layers may contain gold (Au), the second metal layer may contain aluminum (Al), and the third metal layer may contain nickel (Ni).

[0135] Next, with reference to Fig. 5B, a sacrificial layer 170 is formed on the entire structure of the entire growth substrate 110, including the pad pattern 160. Any of the insulating materials, including a silicon oxide (SiOx) film, a silane-based material, and the like, can be selected and used as the sacrificial layer 170.

[0136] Subsequently, with reference to Fig. 5C, when a dummy insulating layer 180 is formed on the sacrificial layer 170 to planarize the growth substrate 110, the fabrication process of the light-emitting element on the growth substrate 110 is completed. The dummy insulating layer 180 may be formed from, but is not limited to, benzocyclobutene (BCB) or an organic insulating material such as photosensitive acrylic or photosensitive polyimide.

[0137] Next, with reference to Fig. 5D, a support substrate 190 is prepared and, in order to transfer the light-emitting element onto the support substrate 190, a substrate separation process is performed in which the light-emitting element is separated from the growth substrate 110.

[0138] The carrier substrate 190 may be formed of a polymer resin, glass, quartz, a synthetic resin film, a transparent substrate, or a transparent flexible polymer substrate. Subsequently, as shown in Fig. 5C, the support substrate 190 is arranged on and bonded to a structure including the light-emitting element formed on the growth substrate 110.

[0139] Next, as it is in Fig. 5D, in a state where the growth substrate 110 is turned over, a portion of the dummy insulating layer 180 is disposed on and bonded to the support substrate 190, and the growth substrate 110 is exposed to the outside.

[0140] Subsequently, a laser is irradiated onto a boundary portion between the growth substrate 110 and the dummy insulating layer 180, and the laser irradiated from a laser source through the growth substrate 110 can separate a light-emitting element portion from the growth substrate 110. In this case, the light-emitting element portion maintains a state of contact with the sacrificial layer 170 of the support substrate 190.

[0141] Then, as described in Fig. 5E and Fig. As shown in Fig. 5F, after the growth substrate 110 is removed by laser irradiation, the sacrificial layer 170 is removed by etching with a hydrofluoric acid-based solution, so that the light-emitting element 100 is separated from the support substrate 190.

[0142] Methods for separating the light-emitting element 100 from the support substrate 190 may include laser lift-off (LLO), chemical lift-off (CLO), stamping, and the like. However, the disclosure is not necessarily limited thereto.

[0143] By performing this substrate separation process, the light-emitting element 100 can be separated from the support substrate 190.

[0144] Next, with reference to Fig. 5G, the display substrate 210 on which a drive circuit 220 is formed is prepared to transfer the separated light-emitting element 100 onto a display substrate 210.

[0145] Subsequently, the drive circuit 220 is formed on the display substrate 210, and a first insulating layer 224 is formed on the display substrate 210 including the drive circuit 220.

[0146] The display substrate 210 may be formed from a flexible plastic. For example, the display substrate 210 may be made as a single-layer or multi-layer substrate made of a material selected from, but not limited to, polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, and a cyclic olefin copolymer. For example, the display substrate 210 may be a glass substrate.

[0147] The first insulating layer 224 may be formed of an organic insulating material such as, but not limited to, photosensitive acrylic or photosensitive polyimide.

[0148] Next, a lower conductive pattern 230 is formed on the first insulating layer 224 and a second insulating layer 234 is formed on the lower conductive pattern 230.

[0149] Lines connecting the drive circuit 220 and the light-emitting elements may be composed of lines to which line patterns divided into multiple layers are connected.

[0150] In this case, an insulating layer may be disposed between conductive patterns arranged on different layers in the display panel, and the conductive patterns may be connected by vias passing through the insulating layer.

[0151] The lower conductive pattern 230 may be a single-layer metal line or a multi-layer metal line selected from aluminum (Al), titanium (Ti), copper (Cu), molybdenum (Mo), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), and the like. For example, the lower conductive pattern 230 may be a metal line stacked in a three-layer structure such as Ti / Al / Ti or Mo / Al / Mo.

[0152] The second insulating layer 234 may be formed from an organic insulating material such as, but is not limited to, photosensitive acrylic or photosensitive polyimide. For example, the second insulating layer 234 may comprise a single-layer insulating layer or a multi-layer insulating layer made of an inorganic insulating material such as, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide.

[0153] Subsequently, a bank pattern 240 may be formed on the second insulating layer 234 and a first electrode pattern 250 and the line pattern (252 in Fig. 2) may be formed on the bank pattern 240 and the second insulating layer 234.

[0154] Each of the bank patterns 240 may be arranged under one light-emitting element 100 or two or more light-emitting elements.

[0155] The bank pattern 240 may be formed from an organic insulating material such as, but is not limited to, photosensitive acrylic or photosensitive polyimide. The bank pattern 240 may direct a position where the light-emitting element is mounted during the light-emitting element transfer process. The bank pattern 240 may be omitted.

[0156] At least a first electrode pattern 250 may be arranged on the bank pattern 240.

[0157] The first electrode pattern 250 may be a single metal layer or a multilayer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al). However, the disclosure is not necessarily limited thereto.

[0158] A transparent electrode material layer selected from indium tin oxide (ITO) and indium zinc oxide (IZO) can be stacked on this metal layer.

[0159] Furthermore, the conductive pattern 252 is formed on the second insulating layer 234 in a region excluding the bank pattern 240. In this case, the conductive pattern 252 can be formed simultaneously with the above-described first electrode pattern 250 using the same material.

[0160] Subsequently, a solder pattern 260 may be disposed on the first electrode pattern 250. The solder pattern 260 may be formed of, but is not limited to, indium (In), tin (Sn), or an alloy thereof. In the light-emitting region, the pad pattern 160 formed on the lower surface of the first electrode 140 of the light-emitting element 100 may be in contact with the upper surface of the solder pattern 260, and the first electrode pattern 250 may be in contact with the lower surface of the solder pattern 260.

[0161] Next, as it is in Fig. 5H, the light-emitting element 100 separated from the support substrate 190 is arranged on the display substrate 210 and connected thereto.

[0162] The pad pattern 160 formed on the lower surface of the light-emitting element 100 is arranged in contact with the solder pattern 260 arranged on the bank pattern 240 on the display substrate 210. The pad pattern 160 may be in contact not only with the solder pattern 260 but also with the first electrode pattern 250. However, the disclosure is not necessarily limited thereto.

[0163] The contact pad pattern 160 may have the same or greater surface area than the solder pattern 260. When the surface area of ​​the contact pad pattern 160 is greater than the surface area of ​​the solder pattern 260, the contact pad pattern 160 contacts the solder pattern 260 and the first electrode pattern 250 below the solder pattern 260, and can thus be more stably disposed on and connected to the solder pattern 260.

[0164] In the light-emitting element 100, the pad pattern 160 is arranged in contact with the solder pattern 260 and connected to the solder pattern 260, and a separate adhesive layer (not shown) may be used as a connecting means, but is not limited thereto.

[0165] The first electrode 140 of each of the light-emitting elements 100 can be electrically connected to an anode voltage output terminal of the drive circuit 220 via the pad pattern 160 formed on the lower surface thereof via the solder pattern 260, the first electrode pattern 250, and at least one wiring pattern.

[0166] The second electrode 120 of each of the light-emitting elements 100 can be electrically connected to a cathode voltage output terminal of the drive circuit 220 via the common electrode 292, the conductive pattern 252, and at least one conductive pattern.

[0167] Next, with reference to Fig. 5I, the passivation layer 150 surrounding the light-emitting element 100 and an inorganic insulating layer 270 covering the bank pattern 240 are disposed. The inorganic insulating layer 270 covers the pad pattern 160, the first electrode pattern 250, and the solder pattern 260, which are arranged on the lower surface of the light-emitting element 100. The inorganic insulating layer 270 is also formed on the second insulating layer 234.

[0168] The inorganic insulating layer 270 may use at least one material selected from inorganic insulating materials including a silicon nitride (SiN) film and a silicon oxide (SiO2) film with excellent adhesion. In the embodiment, an example using a silicon nitride (SiN) film with even more excellent adhesion than a silicon oxide film is described, but the disclosure is not limited thereto.

[0169] The inorganic insulating layer 270 can be formed with a thickness of approximately 10 Å to 500 Å to provide excellent adhesion. However, the disclosure is not necessarily limited thereto, and any insulating material that can improve the adhesion between the passivation layer 150 formed of AlOx and the diffusion layer (the sidewall diffuser, SWD), described below, may be used.

[0170] When the inorganic insulating layer 270 is formed using an inorganic material other than silicon nitride (SiN), it is preferable that the inorganic insulating layer 270 be formed with an appropriate thickness such as 10 Å to 500 Å, because the inorganic insulating layer 270 may not be uniformly deposited if a layer thickness is formed too thin.

[0171] As a deposition method for the inorganic insulating layer 270, an atomic layer deposition (ALD) method, which allows fine adjustment of the film thickness, can be used. The ALD method is preferable to a method for forming a thin film, such as a chemical vapor deposition (CVD) method, which is a chemical method, or a physical vapor deposition (PVD) method, which is a physical method, where fine adjustment of the film thickness is difficult. However, the disclosure is not necessarily limited thereto.

[0172] Next, with reference to Fig. 5J, a diffusion layer 280 is disposed on the inorganic insulating layer 270 and arranged between adjacent light-emitting elements 100 to planarize the light-emitting elements 100.

[0173] The diffusion layer 280 can be formed by selecting at least one material from an organic compound in which TiOx is added to Si-HO in which a plurality of fine metal particles are dispersed and diffused, a material containing a photoactive compound (PAC) and polyimide (PI), a sidewall diffuser from which TiOx is removed, and insulating materials containing SiOx and SiN.

[0174] Since the inorganic insulating layer 270 enhances the adhesion between the passivation layer 150 formed of AlOx on an outer surface of the light-emitting element 100 and the diffusion layer 280 (the sidewall diffuser, SWD), thus improving the adhesion between the light-emitting element 100 and the diffusion layer 280 and suppressing interfacial separation, a separation defect of a cathode electrode 290 disposed on the light-emitting element 100 can be avoided.

[0175] Then, before the diffusion layer 280 is formed on the light-emitting element 100 after the light-emitting element 100 is transferred, the inorganic insulating layer 270 formed of a silicon nitride (SiN) film among the inorganic insulating materials is formed on the light-emitting element 100, and thus the adhesion between the passivation layer 150 and the diffusion layer 280 on the outer surface of the light-emitting element 100 is strengthened, thereby improving a lack, a rotation defect, or the like of the light-emitting element 100 that occur during a cleaning process when the light-emitting element 100 is opened, and thus the yield can be improved.

[0176] Next, with reference to Fig. 5K, the diffusion layer 280 and the inorganic insulating layer 270 are planarized to expose the second electrode 120 of the light-emitting element 100.

[0177] As it is in C in Fig. 5K, since the inorganic insulating layer 270 strengthens the adhesion between the passivation layer 150 formed of AlOx on the outer surface of the light-emitting element 100 and the diffusion layer 280, interface separation by the stretching or compression of the diffusion layer 280 does not occur as in the past due to the generation of a gap by the weakened adhesion between the passivation layer 150 formed of AlOx on the light-emitting element and the diffusion layer 280.

[0178] Subsequently, with reference to Fig. 5L, a conductive metal layer 290a is formed on the diffusion layer 280 including the exposed second electrode 120.

[0179] The conductive metal layer 290a may be formed from, but is not necessarily limited to, a transparent electrode material or a translucent electrode material. The transparent electrode layer or translucent electrode layer may contain at least one or more materials selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

[0180] Next, as it is in Fig. 5M, the conductive metal layer 290a is selectively patterned through a mask process using a photolithography process to form a second electrode pattern 290 connected to the second electrode 120 of the light-emitting element 100. The second electrode pattern 290 may be used as a cathode electrode.

[0181] Subsequently, although not shown in the drawings, the diffusion layer 280 is selectively etched through a mask process using a photolithography process to form contact holes (282h in Fig. 2) that expose the conductive pattern 252 of the light-emitting element 100.

[0182] Subsequently, a common electrode 292 is formed on the diffusion layer 280, which connects the first electrode pattern 250 and the cathode electrode 290 through the contact hole 282h.

[0183] The common electrode 292 can be arranged on the diffusion layer 280 and connected to all pixels PXL. The common electrode 292 can be a thin metal electrode that transmits light. The conductive pattern 252, the common electrode 292, and a black matrix BM can be stacked in the non-light-emitting region of the pixel area. The common electrode 292 can be a transparent electrode material such as, but is not limited to, indium tin oxide (ITO).

[0184] Next, although not shown in the drawings, the black matrix BM is formed in a region of the common electrode 292 on the conductive pattern 252. The black matrix BM may be formed from an organic insulating material to which black pigment is added.

[0185] Subsequently, although not shown in the drawings, a third insulating layer 294 is formed on the black matrix BM and the common electrode 292. The third insulating layer 294 may be an organic insulating material covering the black matrix BM and the common electrode 292. An insulating layer corresponding to the diffusion layer 280 may be uniformly formed between the third insulating layer 294 and the common electrode 292. In this case, a layer of organic insulating material in which fine metal molecules are dispersed may cover the common electrode 292 with a thickness thinner than that of the diffusion layer 280.

[0186] As described above, when the light-emitting element 100 is transferred onto the display substrate 210, because the first electrode 140 is connected to the pixel electrode (not shown) via the pad pattern 160, current flows between the pixel electrode (not shown) and the common electrode 292 due to the movement of electrons in the second n-type semiconductor layer and the flow of holes in the first p-type semiconductor layer, and thus a positive voltage is applied to the first electrode 140 via the pixel electrode and a negative voltage is applied to the second electrode 120 via the common electrode 292.

[0187] In the disclosure, due to the strong adhesion of an inorganic insulating layer formed on an outer surface of the light-emitting element, the occurrence of interface separation between a light-emitting element and the diffusion layer (SWD) can be avoided even when compression or stretching of a diffusion layer (a sidewall diffuser, SWD) occurs.

[0188] Since an inorganic insulating layer is formed on a light-emitting element and can improve the adhesion between a passivation layer on an outer surface of the light-emitting element and a diffusion layer (the sidewall diffuser, SWD), a cathode separation defect due to the interface separation between the light-emitting element and the diffusion layer can be improved.

[0189] Furthermore, in the disclosure, since the adhesion between a light-emitting element and a solder pattern of a display substrate during transfer of the light-emitting element can be improved by forming an inorganic insulating layer on an outer surface of the light-emitting element and enhancing the adhesion between the light-emitting element and a display panel, a lack, rotation defect, or the like of the light-emitting element occurring during a cleaning process can be improved, and thus the yield can be improved. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] KR 2023-0094593

[0001]

Claims

[1] Scoreboard, which includes: a bank pattern (240) arranged on a substrate (210); a first electrode pattern (250) arranged on the bank pattern (240); a light-emitting element (100) arranged on the first electrode pattern (250) and electrically connected to the first electrode pattern (250); a second electrode pattern (290) configured to cover the light-emitting element (100); an inorganic insulating layer (270) configured to cover the bank pattern (240), the first electrode pattern (250), and the light-emitting element (100) between the first electrode pattern (250) and the second electrode pattern (290); and a diffusion layer (280) comprising a plurality of diffusion particles and in contact with the inorganic insulating layer (270). [2] The display panel according to claim 1, wherein the inorganic insulating layer (270) is at least one layer selected from inorganic insulating materials including a silicon nitride (SiN) film and a silicon oxide (SiO2) film, and / or the inorganic insulating layer (270) is formed to have a thickness of 10 Å to 500 Å. [3] The display panel according to claim 1 or 2, wherein the diffusion layer (280) is formed by selecting an organic compound in which TiOx is added to Si-HO, a material containing a photoactive compound (PAC) and polyimide (PI), a sidewall diffuser (SWD) from which TiOx is removed, and / or an insulating material containing SiOx and SiN. [4] The display panel according to claim 1, 2 or 3, wherein the light-emitting element (100) comprises a first p-type semiconductor layer (136), a second n-type semiconductor layer (132) and an active layer (134) disposed between the first p-type semiconductor layer (136) and the second n-type semiconductor layer (132), preferably the light-emitting element (100) further comprises a first electrode (140) in contact with the first p-type semiconductor layer (136) and a second electrode (120) in contact with the second n-type semiconductor layer (132). [5] A display panel according to any preceding claim, wherein a pad pattern (160) connected to the first electrode pattern (250) is arranged on a lower surface of the light-emitting element (100). [6] A display panel according to claim 5, wherein a solder pattern (260) in contact with the contact pad pattern (160) is arranged on the first electrode pattern (250), wherein the contact pad pattern (160) preferably has an area that is greater than or equal to the area of the solder pattern (260). [7] A display panel according to any one of the preceding claims, further comprising a passivation layer (150) disposed on an outer surface of the light-emitting element (100) and in contact with the inorganic insulating layer (270), wherein the passivation layer (150) is preferably formed of at least one insulating material selected from insulating materials comprising aluminum oxide (AlOx), Al2O3 and aluminum. [8] A display panel according to any one of the preceding claims 5-7, wherein the first electrode pattern (250) comprises an anode electrode and the second electrode pattern (290) comprises a cathode electrode. [9] A display panel according to any one of the preceding claims, wherein a drive circuit (220) and an insulating layer (224, 234) are arranged between the bank pattern (240), the inorganic insulating layer (270) and the diffusion layer (280) and the substrate (210). [10] A method of manufacturing a display panel, comprising: Forming a bank pattern (240) on a substrate (210); Forming a first electrode pattern (250) on the bank pattern (240); Arranging a light-emitting element (100) on the first electrode pattern (250) so as to be electrically connected to the first electrode pattern (250); Disposing an inorganic insulating layer (270) configured to cover the bank pattern (240), the first electrode pattern (250) and the light-emitting element (100); Arranging a diffusion layer (280) comprising a plurality of diffusion particles and in contact with the inorganic insulating layer (270); Planarizing the diffusion layer (280) and the inorganic insulating layer (270) to expose an upper portion of the light-emitting element (100); and Arranging a second electrode pattern (290) designed to cover the light-emitting element (100), the inorganic insulating layer (270) and the diffusion layer (280).

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