Kalman filter-based phase control loop with recoding-based phase detector

Abstract

A wireless communication device includes a receiver with a phase detector configured to extract a frequency shift and provide a corresponding error signal based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver has a phase-locked loop configured to generate an error correction signal based on the phase of the error signal and a predicted instantaneous phase of the error signal. The receiver has a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.The receiver may have a recoding-based processing circuit configured to provide the expected transmitted data symbol based on a preliminary decoded symbol.

Description

BACKGROUNDField of the InventionThe present disclosure relates to communication systems in general, and more particularly to radio frequency (RF) communication systems with frequency and phase shift estimation and compensation.Description of the Prior ArtIn a typical wireless connection system, coherent reception requires that the frequency and phase of a local oscillator at a receiving wireless connection device be identical to the frequency and phase of the carrier wave generated at the transmitting wireless connection device. That is, the difference in phase (i.e., phase shift) and the difference in frequency (i.e., frequency shift) between the receiver local oscillator and the carrier wave generated using a remote oscillator at a transmitter should be zero. Noise or any frequency offset or deviation between the local oscillator of the receiving wireless connector and a remote oscillator frequency of a transmitting wireless connector may introduce an error into recovered data or measurements (e.g., high precision distance measurements) based on the received signal. Accordingly, techniques are desired that reduce or eliminate the effects of frequency or phase shift at a receiving wireless connection device.SUMMARY OF EMBODIMENTS OF THE INVENTIONA method for tracking frequency and phase shift in a receiver includes calculating an error signal based on a baseband version of a received radio frequency signal and a reference signal. The method includes generating an error correction signal based on a phase of the error signal and a predicted instantaneous phase signal. The method includes providing a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The method may include generating the reference signal. In a training mode of operation of the receiver, the reference signal may be generated based on predetermined samples. In a tracking mode of operation of the receiver, the reference signal may be generated using a decoded symbol based on the corrected baseband version of the received radio frequency signal. The method may comprise processing the corrected baseband version of the received radio frequency signal using a modified Viterbi decoder and generating the reference signal based on a preliminarily decoded symbol provided by the modified Viterbi decoder. The method may further comprise providing a decoded symbol based on soft decision symbols of the corrected baseband version of the received radio frequency signal and on first path metrics for a sequence of states having a traceback length TL. The method may further comprise providing, by the modified Viterbi decoder, the preliminarily decoded symbol based on at least one soft-decision symbol of the corrected baseband version of the received radio frequency signal and second-path metrics for a preliminary set of states. The modified Viterbi decoder has a tentative traceback length PTL, where PTL and TL are integers and 0≤ P<TL. The method may comprise providing, by the modified Viterbi decoder, the provisionally decoded symbol at the time index k based on a soft-decision symbol of the corrected baseband version of the received radio frequency signal at the time index k. The modified Viterbi decoder may have a plurality of states, each of the plurality of states may have a corresponding cumulative path metric, and the provisionally decoded symbol may correspond to a state of the plurality of states having a minimum cumulative path metric at the time index k.In at least one embodiment, a wireless connection device includes a receiver having a phase detector configured to extract a frequency shift and provide a corresponding error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver includes a phase locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal. The receiver includes a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The receiver may include a transcoding-based processing circuit configured to provide the expected transmitted data symbol based on a provisionally decoded symbol. The receiver may comprise a modified Viterbi decoder having a preliminary traceback length of PTL and a traceback length TL. The modified Viterbi decoder may be configured to provide the preliminarily decoded symbol based at least on soft decision symbols of the corrected baseband version of the received radio frequency signal and on a path metric for a preliminary set of states, wherein PTL and TL are integers and 0≤ P<TL. The receiver may include a modified Viterbi decoder configured to provide the preliminarily decoded symbol at time index k based on a soft decision symbol of the corrected baseband version of the received radio frequency signal at time index k. The modified Viterbi decoder may have a plurality of states. Each of the plurality of states may have a corresponding cumulative path metric. The provisionally decoded symbol may correspond to a state of the plurality of states with a minimum cumulative path metric at the time index k.In at least one embodiment, a method for recovering data transmitted using a radio frequency signal comprises generating a recovered signal based on an error between a reference signal and a baseband version of a received radio frequency signal. The method comprises generating the reference signal using a preliminarily decoded symbol provided by a modified Viterbi decoder. The method may include providing a plurality of decoded symbols based on soft decision symbols of the recovered signal and first path metrics for a sequence of states having a traceback length TL. The method may include providing, by the modified Viterbi decoder, at least one preliminarily decoded symbol based on at least one soft-decision symbol of the recovered signal and second-path metrics for a preliminary set of states. The modified Viterbi decoder has a tentative traceback length PTL, where PTL and TL are integers and 0≤ P<TL. The method may include providing, by the modified Viterbi decoder, the preliminarily decoded symbol at the time index k based on a soft-decision symbol of the recovered signal at the time index k. The modified Viterbi decoder may have a plurality of states. Each of the plurality of states may have a corresponding cumulative path metric. The provisionally decoded symbol may correspond to a state of the plurality of states with a minimum cumulative path metric at the time index k.BRIEF DESCRIPTION OF THE DRAWINGSBy reference to the accompanying drawings, the present invention will be better understood and its numerous objects, features and advantages will become apparent to those skilled in the art. FIG. 1 illustrates a functional block diagram of an example wireless connection system. FIG. 2 illustrates a functional block diagram of the example wireless link transmitter of FIG. 1. FIG. 3 illustrates a functional block diagram of the example wireless connection receiver of FIG. 1. FIG. 4 illustrates a functional block diagram of a protocol stack executing on the example wireless connection device of FIG. 1. FIG. 5 illustrates a functional block diagram of a demodulator including a Kalman filter-based phase locked loop for phase shift keying or quadrature amplitude modulated signals according to at least one embodiment of the invention.FIGS. 6A and 6B illustrate functional block diagrams of a Kalman filter-based phase locked loop for receiving phase shift keying or quadrature amplitude modulated signals using a slice-based phase detector in accordance with embodiments of the invention. FIG. 7 illustrates a waveform of a predicted frequency as a function of the sampling index at the proportional integral controller output of FIGS. 6A and 6B, in accordance with at least one embodiment of the invention. FIG. 8 illustrates a waveform of a predicted instantaneous phase as a function of the sampling index of FIGS. 6A and 6B, in accordance with at least one embodiment of the invention. FIG. 9 illustrates a quadrature amplitude modulated constellation of data in a received signal prior to filtering by a Kalman filter based phase locked loop, in accordance with at least one embodiment of the invention. FIG. 10 illustrates a quadrature amplitude modulated constellation of data in the received signal after filtering by a Kalman filter based phase locked loop according to at least one embodiment of the invention. FIG. 11 illustrates a functional block diagram of a demodulator including a Kalman filter-based phase locked loop for phase shift keying or quadrature amplitude modulated signals using a Kalman filter-based phase locked loop with a re-encoding-based phase detector, in accordance with at least one embodiment of the invention. FIG. 12 illustrates a functional block diagram of a Kalman filter-based phase locked loop with a re-encoding-based phase detector according to at least one embodiment of the invention. FIGS. 13A and 13B illustrate a functional block diagram of a Kalman filter-based phase locked loop with a re-encoding-based phase detector coupled to a modified Viterbi decoder, in accordance with various embodiments of the invention. Figure 13C illustrates pseudo code for a conventional Viterbi decoder. FIG. 13D illustrates pseudo code for a modified Viterbi decoder according to various embodiments of the invention. FIG. 14 illustrates a trellis diagram for an example Viterbi decoder or an example modified Viterbi decoder, in accordance with at least one embodiment of the invention. FIG. 15 illustrates example timing diagrams for an example modified Viterbi decoder having a traceback length of four and a modified Viterbi decoder having a preliminary traceback length of zero, in accordance with at least one embodiment of the invention.The use of the same reference numerals in different drawings indicates similar or identical elements.DETAILED DESCRIPTIONReferring to FIG. 1, in at least one embodiment, wireless connection system 100 includes a wireless connection device 102 and a wireless connection device 116, which are devices conforming to Bluetooth® Low Energy (BLE) or BLE HDT (BLE High Data Throughput) communication protocols designed for low power, low latency applications. The wireless connection device 102 includes a transmitter 104, a receiver 106, control and data processing circuitry 108, and memory 110. The wireless connection device 116 includes a transmitter 118, a receiver 120, control and data processing circuitry 126, and memory 124. Although the wireless connection device 102 and the wireless connection device 116 are illustrated as including only one transmitter, one receiver, and two antennas, respectively, in other embodiments of the wireless connection system 100, the wireless connection device 102 or the wireless connection device 116 includes multiple transmitters, multiple receivers, additional antennas, or a single antenna with an internal circuitry selection or radio frequency switches. The wireless connection system 100 may communicate information using a predetermined wireless communication protocol, e.g., data using the BLE communication protocol or the BLE HDT communication protocol. However, in other embodiments, the wireless connection system 100 may transmit and receive data according to other wireless connection protocols.FIG. 2 illustrates an example embodiment of transmitter 104, which may be included in a physical radio of wireless connection device 102 or wireless connection device 116 of FIG. 1. The control and data processing circuitry 108 of FIG. 2 may perform a variety of functions (e.g., logic, arithmetic, etc.). For example, the data processing circuitry 108 executes a program, routine, or algorithm (either in software, firmware, hardware, or a combination thereof) that performs / performs desired control or data processing tasks according to a physical layer of a communication protocol and provides data to the modulator 228. Modulator 228 applies a predetermined modulation scheme (e.g., phase shift keying or quadrature amplitude modulation) to data for transmission and provides modulated data to transmission baseband circuitry 232, which in one embodiment includes a digital-to-analog converter and analog programmable gain filters. The transmission baseband circuit 232 provides the baseband signal (or intermediate frequency (IF) signal) to the frequency mixer 234, which performs frequency translation or shifting of the baseband signal using a reference signal or local oscillator (LO) signal provided by the local oscillator 236. In at least one operating mode of transmitter 104, frequency mixer 234 translates the baseband signal centered on DC to a 2.4 GHz frequency band. Pre-driver 238 amplifies the signal generated by frequency mixer 234 to a level sufficient for power amplifier 240. The power amplifier 240 further amplifies the signal to provide a high power signal sufficient to drive the passive network 242 and the antenna 202. The passive network 242 provides impedance matching, filtering, and protection from electrostatic discharge.FIG. 3 illustrates an example embodiment of the receiver 106 that may be included in a radio of the wireless connection devices described above. Antenna 202 provides a radio frequency (RF) signal to passive network 204 that provides impedance matching, filtering, and electrostatic discharge protection. The passive network 204 is coupled to the low noise amplifier 206 which amplifies the RF signal without substantial degradation in signal to noise ratio and provides the amplified RF signal to the frequency mixer 208. The frequency mixer 208 frequency-translates or shifts the RF signal using a reference signal or local oscillator signal provided by the local oscillator 210. For example, in at least one operating mode of the receiver 106, the frequency mixer 208 translates the RF signal from a 2.4 GHz frequency band to baseband frequencies centered on DC (i.e., zero intermediate frequency (ZIF) in a ZIF operating mode). In another mode of operation, the receiver 106 is configured as a low intermediate frequency (LIF) receiver (i.e., in an LIF mode of operation) and the frequency mixer 208 translates the RF signal to a low intermediate frequency (e.g., 100-200 kHz) to reduce or eliminate DC shift and 1 / f noise issues of ZIF receivers.The frequency mixer 208 provides the translated output signal as a set of two signals, an in-phase (I) signal and a quadrature (Q) signal. The I and Q signals are analog time domain signals. In at least one embodiment of receiver 106, analog programmable amplifier and filter 212 provides amplified and filtered versions of I and Q signals to analog-to-digital converter (ADC) 214, which converts these versions of I and Q signals to digital I and digital Q signals (i.e., an I and a Q sample). Example embodiments of the ADC 214 utilize a variety of signal conversion techniques (e.g., delta-sigma analog-to-digital conversion (i.e., sigma-delta analog-to-digital conversion). The ADC 214 provides the digital I and digital Q signals to the signal processing circuitry 218. Generally, signal processing circuitry 218 performs digital signal processing (e.g., frequency translation (e.g., using digital mixer 216), filtering (e.g., using digital filters 220), demodulating, or signal correction) of the digital I and digital Q signals. In at least one embodiment, signal processing circuitry 218 includes a demodulator 224 that extracts or restores information from digital I signal and digital Q signal (e.g., data signals modulated using phase shift keying or quadrature amplitude modulation by modulator 228 of transmitter 104 of FIG. 2 and provided to antenna 202 as RF signals).Referring again to FIG. 3, the control and data processing circuitry 108 may perform a variety of functions (e.g., logic, arithmetic, etc.). For example, the control and data processing circuitry 108 may use the demodulated data in a program, routine, or algorithm (either in software, firmware, hardware, or a combination thereof) to perform desired control or data processing tasks. In at least one embodiment, control and data processing circuitry 108 including memory 110 controls other circuitry, subsystem, or systems (not shown). In one embodiment, control and data processing circuitry 108 implements a data link layer including a state machine, defines state transitions, defines packet formats, performs scheduling, performs radio control, and provides link layer decoding according to at least one wireless link protocol. The transmitter 104 of FIG. 2 and the receiver 106 of FIG. 3 are illustrative only and may vary with the communication protocol implemented by the wireless connection system 100 of FIG. 1.Referring to FIGS. 1 and 4, in one embodiment, the wireless connection device 102 includes separate integrated circuits for implementing functions of the control and data processing circuitry 108, e.g., the controller 302 and the host 304. In some embodiments, in the wireless connection device 102, the functionality of the controller 302 and the host 304 is incorporated into a single integrated circuit device. The controller 302 and the host 304 execute instructions to implement portions of a wireless link network protocol stack. For example, the controller 302 implements a physical layer 306 that includes software that interacts with the RF transceiver (e.g., including the transmitter and receiver described above). Link layer 314 is directly connected to physical layer 306 to handle transmission and reception of associated signals. In at least one embodiment, link layer 314 of controller 302 communicates with host 304 via host interface 316. The host 304 implements upper layers of the connection protocol stack (e.g., the network layer 318, the transport layer 320, and the application layer 322). In other embodiments, the layers of the software protocol stack have different distributions between the controller 302 and the host 304, or are fully implemented using the controller 302.Referring to FIGS. 3 and 5, in at least one embodiment, demodulator 224 receives an intermediate digital frequency signal and digital mixer 502 shifts frequency of signal to baseband (e.g., ZIF) using a reference signal. Under ideal conditions, the baseband signal provided by the mixer 502 is perfectly centered around DC current. However, a mismatch between the remote oscillator of the transmitting wireless connection device and the local oscillator of the receiving wireless connection device causes a frequency or phase shift in the baseband signal. Matched filter 504 increases the signal-to-noise ratio of the received signal, but introduces a delay. During a first phase of receiver processing (e.g., during a short training sequence of a preamble sequence, i.e., n<n STS) the coarse timing detection and frequency estimation 514 generates a coarse frequency correction to reduce the frequency shift. During a second phase of receiver processing (e.g., during a long training sequence of the preamble sequence, i.e., n STS< n≤n LTS) fine timing detection and frequency and phase estimation 516 generates a fine frequency error correction and an initial phase estimation θξyto further reduce frequency or phase shift. Fine timing detection and frequency and phase estimation 516 also generates and provides a channel estimate (h) to equalizer 507, which in one embodiment includes a linear minimum mean squared error equalizer (LMMSE).In one embodiment of demodulator 224, multiplier 502 digitally mixes the received signal with a reference signal (e.g., a tone having a programmable frequency) generated by signal generator 512. Prior to detecting the short training sequence (i.e., n<n STS) the signal generator 512 is programmed to generate an intermediate frequency tone of frequency f if which is used to downconvert the received signal to baseband or DC using the multiplier 502. After the short training sequence is detected but before the long training sequence is detected (i.e., n STS< n ≤ n LTS), the signal generator 512 is programmed to a roughly corrected value with the frequency to further downconvert the received signal and compensate for a frequency shift. After detecting the long training sequence (i.e., n > n LTS) the signal generator 512 is programmed to a fine corrected value with frequency. The signal generator 512 adjusts the reference signal by initial phase estimation θξ, coarse frequency correction, or fine frequency correction, and thus the multiplier 502 applies error correction to the received signal. The downsampler 506 generates the received signal y[k], which is a version of the received signal downsampled from a sample space to a symbol space, and supplies the received signal y[k] to the equalizer 507. The Kalman filter-based phase locked loop 508, described in detail below, applies an initial phase estimate θ≅ to the received signal and corrects any residual phase error in the corrected received signal y c[ k], which is a phase corrected version of the received signal y[k]. Demapper / decoder / verifier 510 recovers the transmitted data from the corrected received signal y c[ k] using demapping, decoding and error correction techniques.Referring to FIG. 6A, in at least one embodiment, Kalman filter-based phase locked loop 508 includes phase detector 620 and Kalman filter 622. In at least one embodiment, phase detector 620 multiplies received signal y[k] by a complex conjugate number of a reference signal, i.e., an expected received signal, to extract a frequency shift and generate an error signal err[k]. In at least one embodiment, phase detector 620 includes switch 616, which selectively provides a predetermined signal, e.g., a signal based on access address field of a BLE packet, as expected signal x p[ k] to multiplier 602 according to sampling index k. For example, if k≤n AAEND, switch 616 provides a corresponding output of memory 608, e.g., samples of the predetermined access address (in Cartesian coordinates, i.e., real and imaginary values corresponding to the in-phase and quadrature values), as expected signal x p[ k]. If k > n AAEND, switch 616 provides the output of decision circuit 606 as expected signal x p[ k]. In general, all BLE packets include the access address to identify communications on one physical channel and exclude or ignore packets on different physical channels that use the same physical interface channels in physical proximity. The access address determines whether the packet is directed to an advertising physical channel (and thus an advertising physical connection) used for non-periodic advertising, to the periodic physical channel used for periodic advertising, or to a Piconet physical channel (and thus an active physical connection to a device). The advertising BLE physical channel used for non-periodic advertising uses a fixed access address. The periodic BLE physical channel used for periodic advertising and the BLE Piconet physical channels use an arbitrarily generated 32-bit value as their access address.In at least one embodiment, decision circuit 606 generates an expected signal x p[ k] used as a reference signal by comparing a corrected version of received signal with predetermined modulated values and provides next predetermined modulated value (in Cartesian coordinates, i.e., real and imaginary values corresponding to in-phase and quadrature values) as expected signal x p[ k]. In general, the decision circuit 606 performs a slicing operation that maps the corrected version of the received signal that includes noise to the next noise-free constellation point of the applicable modulation scheme (e.g., the constellation point of the applicable modulation scheme having the minimum Euclidean distance to the corrected received signal y c[ k]).In at least one embodiment, CORDIC 604 converts error signal err[k] from Cartesian coordinates to polar coordinates using a CO2 rotation digital computer (CORDIC), which may be dedicated to a phase measurement implementation or shared with other receiver operations. In general, a CORDIC implements known techniques for performing calculations including trigonometric functions (e.g., an arctangent function) and complex multiplications without using a multiplier. The only operations used by the CORDIC are addition, subtraction, bit-shifting, and table lookup operations to implement the arctangent function. In other embodiments, a digital signal processor executing firmware or arctangent circuitry is used to convert the error signal err[k] from Cartesian coordinates to polar coordinates.The CORDIC 604 provides the phase y k as the input to the Kalman filter 622. The Kalman filter 622 determines the residual phase error signal r k by calculating the difference between the phase y k and the predicted current phase x k|k-1. Phase difference circuit 624 provides residual phase error signal r k to a proportional integral time-invariant controller including a proportional path (represented by gain circuit 626) and an integral path (through gain circuit 628, accumulator 630, and register 614). The summing circuit 632 combines the outputs of the proportional path and the integral path and provides a predicted frequency signal to an integrator represented by the accumulator 634 and the register 612. The integrator provides the predicted instantaneous phase signal, the phase difference circuit 624 and the CORDIC 610, which converts the predicted instantaneous phase signal from polar coordinates to Cartesian coordinates for use as an error correction signal to be corrected with the received signal y[k] by the correction circuit 618 to generate the corrected received signal y c[ k].In one embodiment, the Kalman filter-based phase locked loop 508 can be modeled by defining a state where Xk is the current phase and ẋ k is the frequency. The state transition model isThe observation model isThe prediction model is where the state transition matrix is the observation matrix, v k is the phase variance, the loop gain vector, r k is the error driving or controlling the prediction, and register 612 is initialized with the initial phase estimate θξyprovided by fine timing detection and frequency and phase estimate 516.For an example received signal where θ m is the modulated phase for phase shift keying, f OS is the frequency shift between the transmitter's remote oscillator and the receiver's local oscillator, and θ u is an arbitrary phase shift, the following table illustrates example values in FIG. 6 where the two first symbols (k=1 and k=2) correspond to predetermined access address values and the following three symbols (k=3, 4, 5) correspond to data symbols.NA (AA)NA (AA)Referring to FIG. 6B, in other embodiments of the Kalman filter-based phase locked loop 508, the transformations between Cartesian coordinates and polar coordinates are performed outside the loop, thereby reducing the computational complexity of the Kalman filter-based phase locked loop 508. The decision circuit 607 and the memory 609 provide outputs (e.g., binary quantization of a demodulated signal and predetermined access address symbols, respectively) in polar coordinates. The CORDIC 604 and the CORDIC 610 perform the conversions between the Cartesian coordinates and the polar coordinates outside the loop, and the phase detector 621 uses the adder 603 to generate the error signal err[k] based on the reference signal provided from the decision circuit 607 or the storage circuit 609, and the loop performs addition using the adder 619 to determine the phase error, respectively, and perform correction, rather than performing complex multiplications as required by the embodiment of FIG. 6A. Referring to FIG. 6B, the CORDIC 604 converts the received signal y[k] from Cartesian coordinates to polar coordinates and the CORDIC 610 converts the corrected signal from polar coordinates to Cartesian coordinates to generate the corrected received signal y c[ k].FIG. 7 illustrates an example of the predicted frequency signal at the output of the summing circuit 632 of FIGS. 6A and 6B where the Kalman filter-based phase locked loop 508 maintains the predicted frequency of the residual signal at a negligible value after training the Kalman filter-based phase locked loop 508 to convert the predicted frequency of the residual signal to a negligible value as the sampling time increases. FIG. 8 illustrates an example of the predicted instantaneous phase signal x k|k-1 at the output of the integrator represented by the accumulator 634 and the register 612 of FIGS. 6A and 6B, where the predicted instantaneous phase signal has a linear behavior as a function of the sampling time. FIG. 9 illustrates an example of the received signal y[k] prior to the Kalman filter-based phase locked loop 508 of FIGS. 5 and 6. FIG. 10 illustrates an example of corrected received samples y c[ k] output from the Kalman filter-based phase locked loop 508 of FIGS. 5, 6A, and 6B where the Kalman filter-based phase locked loop 508 reduces or removes rotation of the constellation generated by the frequency and phase shift in the received signal. Therefore, the Kalman filter-based phase locked loop 508, which is a variable gain phase locked loop according to Kalman filter theory and has a faster convergence than a conventional fixed gain phase locked loop, improves performance of a receiver in a wireless connection system (e.g., improves the signal-to-noise ratio of the received signal and thus enables communications with increased information rates) in applications with data transmitted in bursts or packets, e.g., BLE.In other embodiments of a Kalman filter-based phase locked loop, performance is further improved by using a re-encoding-based decision circuit, which may provide an improved reference signal in the tracking mode of operation, instead of the decision circuit 606. In at least one embodiment, a transmitter of wireless connection system encodes data using a convolutional forward correction code and a corresponding receiver of wireless connection system uses soft-decision decoding techniques to restore data. In one embodiment, the transmitter 104 of FIG. 2 encodes data for transmission using a forward error correction convolutional encoder that implements a non-systematic 1⁄2 rate non-recursive code with the constraint length K=4. In an exemplary embodiment, the initial state of the forward error correction convolution encoder is set to all zeros. generator polynomials of the forward error correction convolutional encoder are: andThe bit produced by the generator polynomial G 0( a0) is transmitted before transmitting the bit produced by the generator polynomial G1 (al). An input sequence of three successive zeroes will restore the forward error correction convolution encoder to its original state again and again. This sequence is known as a termination sequence. A pattern mapper maps P bits output from the forward error correction convolution encoder to a symbol where the value of P depends on the encoding scheme used. However, other coding and mapping schemes may be used. Accordingly, the receiver 106 of FIG. 3 includes a soft decision decoder in the demodulator 224 and uses reliability information to estimate transmitted symbols based on the received high frequency signal.Referring to FIGS. 11 and 12, in one embodiment of demodulator 224, demapper / decoder / verification circuit 510 includes a Log-Likelihood Ratio (LLR) soft-decision demapper and a conventional decoder implementing conventional maximum likelihood decoding techniques and Viterbi decoding techniques. In one embodiment, demapper / decoder / verifier circuit 510 provides the remapped and decoded received symbols provided from the Viterbi decoder to Kalman filter-based phase locked loop 508 to be used in generating the expected signal x p[ k] used by the phase detector as a reference signal for generating phase y k. In the tracking mode of operation, the phase detector 1119 extracts the frequency shift using the decision circuit 1121. In one embodiment, demapper / decoder / verifier circuit 510 includes the Log-Likelihood Ratio (LLR) soft-decision demapper, which maps back constellation points of a phase-shift-keying or quadrature-amplitude modulated signal according to a conventional technique. For example, the LLR soft decision demapper 1129 generates soft decision outputs from the corrected received signal y c[ k]. In one embodiment, each corrected received symbol y c[ k] includes an in-phase component and a quadrature component, and the LLR soft decision demapper 1129 generates a corresponding soft decision output (e.g., [d1, d2] for QPSK, [d1, d2, d3] for 8BPSK, or [d1, d2, d3, d4] for 16 QAM, where d1, d2, d3, and d4 are real values that indicate both a hard decision and a reliability of the decision).In one embodiment, demapper / decoder / verifier circuit 510 includes Viterbi decoder 1131, which implements a conventional Viterbi algorithm for decoding soft-decision signal vi[k] where the bitstream has been encoded using a convolutional code or trellis code. Viterbi decoder 1131 uses branch metrics (e.g., the log likelihood measure of the probability of a corresponding state transition of a state diagram) and path metrics (e.g., the sum of the branch metrics of the branches traversing a path) to find the most likely received data symbols (e.g., by identifying a minimum distance path through a trellis diagram according to conventional maximum likelihood decoding techniques and Viterbi decoding techniques). Each path metric corresponds to a number of errors on a maximum likelihood path to an associated state, and each branch metric corresponds to a Hamming state between received parity and expected parity or a reliability metric for each received symbol. Viterbi decoder 1131 provides a Viterbi decoded signal vo[k] to decision circuit 1121. The encoder 1125 re-encodes the Viterbi decoded signal vo[k], and the mapper / CORDIC circuit 1123 maps the re-encoded signal to phase shift keying or quadrature amplitude modulation symbols and converts these modulated symbols to polar coordinates to produce the expected signal x p[ k]. In other embodiments of the Kalman filter-based phase locked loop 508 where the CORDIC is within the loop (e.g., using a topology as shown in FIG. 6A ), the mapper / CORDIC circuit 1123 is configured to omit the CORDIC operation that converts the modulated symbols to polar coordinates. Viterbi decoder 1131 introduces a substantial delay prior to providing a sample of a Viterbi decoded signal vo[k] corresponding to a sample of the received signal y[k].The traceback length (TL) (i.e., traceback depth or traceback value) of the Viterbi decoder refers to the delay of the Viterbi decoder. Generally, the traceback length of a Viterbi decoder is an integer that indicates the number of trellis branches used to construct each traceback path. In an embodiment of a conventional Viterbi decoder, TL is an integer five times the constraint length of the error correction code. An exemplary forward error correction code has a constraint length of K=4, and a typical traceback length of a corresponding Viterbi decoder is 20, although larger traceback lengths (e.g., 30 or 40) may be used. A conventional Viterbi decoder selects the path having the smallest cumulative path metric at time t i. If two paths are the same, the Viterbi decoder arbitrarily selects one path. The conventional Viterbi collects branch metrics from one state to another to generate the path metrics and outputs symbols corresponding to a decision on the minimum path after the full traceback length TL. Accordingly, a symbol of the Viterbi decoded signal vo[k] corresponding to a symbol of the received signal y[k] is not available until at least TL symbol periods (e.g., 20 symbol periods) later. To accommodate this latency, the complexity of the Kalman filter phase locked loop 508 increases significantly to take into account the prediction of TL symbols in front.Referring to FIGS. 13A-13D, 14 and 15, a technique for simplifying a Kalman filter-based phase locked loop for use with a re-encoding-based phase detector includes using a modified Viterbi decoder that provides a preliminarily decoded symbol as an output based on at least one soft decision signal vi[k] of a corrected received signal that is corrected based on the error between a reference signal and a baseband version of a received radio frequency signal. The preliminary decoded signal voi[k] is further based on a minimum path metric decision for a preliminary set of decoder states (i.e., a set of decoder states corresponding to less than a full traceback length TL). The path metrics have a temporary traceback length (PTL), where PTL is an integer and 0≤ P<TL. An embodiment of a modified Viterbi decoder collects branch metrics from one state to another over the traceback length TL to produce path metrics, but unlike a conventional Viterbi decoder, the modified Viterbi decoder outputs a preliminarily decoded signal voi[k] corresponding to a minimum path decision at the same symbol time as the received signal y[k]. For example, when PTL=0, the modified Viterbi decoder outputs a decision on a minimum path in the same symbol time as a corresponding symbol of the received signal y[k]. When PTL=1, the modified Viterbi decoder outputs symbols corresponding to a decision on a minimum path after latency of a symbol time from a corresponding symbol of the received signal y[k].Pseudo code for one embodiment of the Viterbi decoder 1131 and pseudo code for one embodiment of the modified Viterbi decoder 1133 are illustrated in Figs. 13C and 13D, respectively. The Viterbi decoder 1131 and the modified Viterbi decoder 1133 each receive the soft decision signal vi[k] as inputs. For each time index k, vi[k] corresponds to vi kn, which includes N soft bits per decode bit indexed by n (e.g., N=2 and n ∈ [1,2] for decoding a rate 1⁄2 convolutional code. The Viterbi decoder 1131 and the modified Viterbi decoder 1133 respectively output decoded bits as the Viterbi decoded signal vo[k]. However, the modified Viterbi decoder 1133 also outputs a preliminarily decoded signal voi[k] which is re-encoded by the decision circuit 1121. In example embodiments, the parameters used by the Viterbi decoder 1131 and the modified Viterbi decoder 1133 each include states s k having different probabilities, where a total number of states of the decoder is S, where s 0 ≤ s k ≤ s s_1, and each state has two branches in the trellis diagram according to conventional maximum likelihood decoding techniques and Viterbi decoding techniques. For decoding an exemplary convolutional code with a constraint length of 3, S=2 3-1= 4. The Viterbi decoder 1131 and the modified Viterbi decoder 1133 each use the parameter corresponding to expected soft bits in the nth position for branch m of the trellis diagram. Additional parameters include what is a state to time index k- 1 transitioning to the current state s k with the lowest branch metric, k), being the decoded bit for state s k, being the state having the minimum path metric (e.g., cumulative path metrics) to time index k, the packet length L, and being the decoded bits associated with the state to time index k- TL on the traceback path. The modified Viterbi decoder 1133 also generates preliminary decoded bits voi[k] based on the decoded bit corresponding to the state having the minimum path metric at the index k (i.e., ). The modified Viterbi decoder 1133 and the associated pseudo code can be adapted for different preliminary traceback lengths and coding schemes.In the illustrated embodiments, the modified Viterbi decoder 1133 generates an output vo[k] of the conventional Viterbi decoder corresponding to y c[ k] after TL symbol times, and generates a preliminarily decoded symbol voi[k] corresponding to y c[ k] after PTL symbol times (e.g., in the same symbol time where PTL=0). However, in other embodiments, PTL is greater than zero but less than TL, and the latency of a reference signal generated by the decision circuit 1121 and the complexity of the corresponding Kalman filter-based phase locked loop increases with increases in PTL to take into account prediction of PTL samples in front. In one embodiment, a modified Viterbi decoder provides both a conventional Viterbi decoder output signal vo[k] and a preliminarily decoded signal voi[k] in parallel for re-use of the circuitry and for reduction of circuit area and power consumption. In other embodiments, the modified Viterbi decoder 1133 is separate from the Viterbi decoder 1131, which is a conventional Viterbi decoder. In these embodiments, the modified Viterbi decoder 1133 only generates a preliminarily decoded symbol voi[k], or generates both a preliminarily decoded signal voi[k] and a redundant version of the Viterbi decoder output signal vo[k], which is discarded or used for diagnostic purposes. The use of a preliminarily decoded signal voi[k] in the embodiments of FIGS. 13A and 13B introduces some loss compared to the ideal transcoding-based approach of FIG. 12. In at least some embodiments, the performance of the simplified decision reference signal calculation of FIGS. 13A-13D using preliminarily decoded symbols approximates the ideal re-encoding-based reference signal calculation of FIG. 12 and improves the receiver performance of a Kalman filter-based phase locked loop compared to its performance using the slicer-based reference signal of FIGS. 6A and 6B.While the receiver trains using predetermined received symbols (e.g., sixteen predetermined access address symbols), the Kalman filter-based phase locked loop 508 uses the predetermined received symbols as the reference signal and ignores the corresponding outputs of the decision circuit 1121, which are the least reliable outputs of the decision circuit 1121. Shortly after the receiver completes training based on the predetermined received symbols, the Kalman filter-based phase locked loop 508 begins using preliminarily decoded symbols to generate the reference signal and will have negligible or slight performance improvement compared to performance when using a slicer-based reference signal. However, when the Kalman filter-based phase locked loop 508 continues to use the preliminarily decoded symbols to generate the reference signal, the path metrics of the Viterbi algorithm accumulate, the reliability of the preliminarily decoded symbols approximates the reliability of the outputs of the conventional Viterbi decoder, and the performance of the receiver approximates the performance of the receiver using the preliminarily decoded symbols to generate the reference signal to the performance of the receiver using the output of a conventional Viterbi decoder to generate the reference signal.Figures 14 and 15 illustrate an exemplary trellis diagram for Viterbi decoding of data convolutionally encoded using 1⁄2 non-recursive rate code with constraint length K = 4. For illustrative purposes, TL=4. If any two paths in the lattice join to a single state, the Viterbi decoder or the modified Viterbi decoder removes one of them in searching for an optimum path. In the exemplary embodiment, the Viterbi decoder selects the path at time t i with the minimum Euclidean distance between an expected decision value and a received decision value. In other embodiments (e.g., where the Viterbi decoder receives hard decision outputs), the Viterbi decoder selects the path using different path metrics, e.g., selects the lowest cumulative path metric at time t i. If two paths are the same, the Viterbi decoder arbitrarily selects one path. At each time t i there are 2 K-1 states in the grid, where K is the constraint length. The tree structure of the trellis diagram repeats after K branches. The state of a rate of the 1 / p convolutional encoder that generated the transmitted signal is defined as the content of the rightmost K-1 stages, and there are p encoded bits for each input group of k message bits. In a typical convolutional encoder, k=1.From the time 0≤t≤15 onward, the receiver trains on the predetermined received sequence of symbols (e.g. sixteen predetermined access address symbols), but the provisionally decoded signal voi[k] is ignored by the phase detector of the Kalman filter-based phase locked loop. At time t= 16, the receiver has completed training based on the predetermined received sequence of symbols and receives the first unknown symbol. In the state s 0 the Viterbi decoder or the modified Viterbi decoder calculates branch metrics and cumulative path metrics based on the soft decision signal vi[k]. The Viterbi decoder output symbols vo

[16] , vo

[17] , vo

[18] , and vo

[19] are determined by calculating the minimum path metric generated by accumulating branch metrics for each state transition from the initial state of s 0. In this example, the path is bold with a minimum path metric and is the sum of bm a1, bm b2, bm e3 and bm d4. Solid lines indicate a state transition in response to a received bit of vi[k]='0', and broken lines indicate a state transition in response to a received bit of vi[k]='1'. At symbol time t=20, where t corresponds to a symbol time, the Viterbi decoder identifies this minimum path which identifies the decoded outputs vo

[16] =0, vo

[17] =1, vo

[18] =0 and vo

[19] =1.The modified Viterbi decoder provides the preliminarily decoded symbol voi[0] for PTL=0 based on the minimum path metric determined by comparing the branch metrics bm a1 and bm b1 for a decoder with an initial state of s 0 at time t=16 and transitioning to a next state at time t=17. The preliminarily decoded symbol output symbol voi

[16] is available at symbol time t=16 because the processing delay is negligible compared to the symbol delay. The next provisionally decoded symbol voi

[17] corresponds to the minimum path metric at symbol time t=17. the modified Viterbi decoder continues to gather path metrics until TLis reached, but provides a provisionally decoded symbol corresponding to a provisional decision based on a state transition for each symbol time. If a modified Viterbi decoder has PTL=1, then the output of the modified Viterbi decoder would be available voi

[16] at time t=17, and based on path metrics from the initial state to a final state (state at t=17) and the associated path metrics. The preliminarily decoded symbols are used by a simplified decision circuit 1121 of FIGS. 13A and 13B to approximate the ideal re-coding-based reference signal of the phase detector in the Kalman filter-based phase locked loop, and improves receiver performance as compared to the slicer-based reference signal of FIGS. 6A and 6B.Thus, techniques are disclosed for improving the performance of a receiver in a wireless connection system by reducing the effects of frequency or phase shift in a demodulator. A variable gain phase locked loop according to Kalman filter theory and with more rapid convergence than a conventional fixed gain phase locked loop improves performance of a receiver in a wireless connection system (e.g., reduces frequency or phase shift in the receiver, improves the signal-to-noise ratio of the received signal, and thus enables communication at increased information rates) in applications with data transmitted in bursts or packets (e.g., BLE). The Kalman filter-based phase locked loop may use a phase detector that generates a slicer-based reference signal or a re-coding-based reference signal. The use of a modified Viterbi decoder circuit for generating the reference signal approximates results obtained by re-encoding a signal decoded using a conventional Viterbi decoder to generate the reference signal of the Kalman filter-based phase locked loop, and improves receiver performance as compared to a Kalman filter-based phase locked loop using a slicer-based reference signal.The description of the invention set forth herein is illustrative and is not intended to limit the scope of the invention as set forth in the following claims. For example, although the invention has been described in an embodiment in which phase shift keying is used, one skilled in the art will recognize that the teachings herein may be used with other modulation schemes. Although the invention has been described in an embodiment in which an access address field of a BLE packet is used, in another example, any predetermined symbols of a communication packet (e.g., training symbols) may be used.The terms "first / first / first," "second / second / second," "third / third / third," and so forth, as used in the claims, unless clearly understood from the context, are intended to distinguish between different elements in the claims and do not otherwise imply any order of time, location, or quality. For example, "a first received signal," "a second received signal" does not indicate that the first received signal occurs earlier in time than the second received signal. Variations and modifications of the embodiments disclosed herein may be made based on the description set forth herein without departing from the scope of the invention as set forth in the following claims.

Claims

A method for tracking frequency and phase shift in a receiver, the method comprising: calculating an error signal based on a baseband version of a received radio frequency signal and a reference signal; generating an error correction signal based on a phase of the error signal and a predicted instantaneous phase signal; and providing a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.The method of claim 1, further comprising: generating the reference signal, wherein in a training mode of operation of the receiver, the reference signal is generated based on predetermined samples, and wherein in a tracking mode of operation of the receiver, the reference signal is generated using a decoded symbol based on the corrected baseband version of the received radio frequency signal.The method of claim 1 or 2, further comprising: processing the corrected baseband version of the received radio frequency signal using a modified Viterbi decoder; and generating the reference signal based on a preliminarily decoded symbol provided by the modified Viterbi decoder.The method of claim 3, further comprising: providing a decoded symbol based on soft decision symbols of the corrected baseband version of the received radio frequency signal and on first path metrics for a sequence of states having a traceback length TL; and providing the provisionally decoded symbol by the modified Viterbi decoder based on at least one soft decision symbol of the corrected baseband version of the received radio frequency signal and on second path metrics for a provisional set of states having a provisional traceback length PTL, wherein PTL and TL are integers, and 0 ≤ PTL < TL.The method of claim 3, further comprising: providing, by the modified Viterbi decoder, the provisionally decoded symbol at the time index k based on a soft-decision symbol of the corrected baseband version of the received radio frequency signal at the time index k, the modified Viterbi decoder having a plurality of states, each of the plurality of states having a corresponding cumulative path metric, and the provisionally decoded symbol corresponding to a state of the plurality of states having a minimum cumulative path metric at the time index k.The method of claim 3, 4 or 5, wherein processing the corrected baseband version of the received radio frequency signal comprises: demapping the corrected baseband version of the received radio frequency signal to generate a soft decision signal; decoding the soft decision signal using the modified Viterbi decoder to generate the provisionally decoded symbol; and generating the reference signal comprising: convolutionally coding the provisionally decoded symbol to generate an encoded symbol; and mapping the encoded symbol using a predetermined modulation scheme.The method of claim 1, 2, 3, 4, 5 or 6, wherein generating the error correction signal comprises: generating a phase difference signal based on the phase of the error signal and a previous value of the predicted instantaneous phase signal; and combining a proportional version of the phase difference signal with an integrated version of the phase difference signal to generate a predicted frequency signal.The method of claim 7, wherein generating the error correction signal further comprises: integrating the predicted frequency signal to generate the predicted current phase signal.A wireless connection device comprising: a receiver comprising: a phase detector configured to provide an error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal; a phase locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted current phase of the error signal; and a correction circuit configured to generate a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.The wireless connection apparatus of claim 9, wherein the receiver further comprises: a transcoding-based processing circuit configured to provide the expected transmitted data signal based on a preliminarily decoded symbol; and a modified Viterbi decoder having a preliminary traceback length of PTL and a traceback length TL, wherein the modified Viterbi decoder is configured to provide the preliminarily decoded symbol based at least on soft-decision symbols of the corrected baseband version of the received radio frequency signal and on path metrics for a preliminary group of states, wherein PTL and TL are integers, and wherein 0 ≤ PTL < TL.The wireless connection device of claim 10, wherein the re-encoding-based processing circuit comprises: a convolutional encoder configured to generate an encoded symbol based on the preliminarily decoded symbol; and a mapping circuit configured to map the encoded symbol to the expected transmitted data symbol using a predetermined modulation scheme.The wireless connection apparatus of claim 9, wherein the receiver further comprises: a re-encoding-based processing circuit configured to provide the expected transmitted data signal based on a provisionally decoded symbol; and a modified Viterbi decoder configured to provide the provisionally decoded symbol at the time index k based on a soft-decision symbol of the corrected baseband version of the received radio frequency signal at the time index k, wherein the modified Viterbi decoder has a plurality of states, each of the plurality of states having a corresponding cumulative path metric, and the provisionally decoded symbol corresponds to a state of the plurality of states having a minimum cumulative path metric at the time index k.The wireless connection device of claim 9, 10, 11 or 12, wherein the phase locked loop comprises: a phase difference circuit configured to generate a phase error signal based on a phase of the error signal and the predicted instantaneous phase of the error signal; a proportional integral time-invariant controller responsive to the phase error signal; and an integrator configured to generate the predicted instantaneous phase of the error signal based on an output of the proportional integral time-invariant controller.A method of recovering data following frequency and phase shift in a receiver, the method comprising: generating a recovered signal based on an error between a reference signal and a baseband version of a received radio frequency signal; and generating the reference signal using a preliminarily decoded symbol provided by a modified Viterbi decoder.The method of claim 14, further comprising: providing a plurality of decoded symbols based on soft decision symbols of the recovered signal and on first path metrics for a sequence of states having a traceback length TL; and providing at least one provisionally decoded symbol by the modified Viterbi decoder based on at least one soft decision symbol of the recovered signal and on second path metrics for a provisional set of states, wherein the modified Viterbi decoder has a provisional traceback length PTL, wherein PTL and TL are integers, and wherein 0 ≤ PTL < TL.The method of claim 14, further comprising: providing, by the modified Viterbi decoder, the provisionally decoded symbol at the time index k based on a soft-decision symbol of the recovered signal at the time index k, the modified Viterbi decoder having a plurality of states, each of the plurality of states having a corresponding cumulative path metric, and the provisionally decoded symbol corresponding to a state of the plurality of states having a minimum cumulative path metric at the time index k.The method of claim 14, 15 or 16, wherein generating the recovered signal comprises: generating an error signal based on the reference signal and the baseband version of the received radio frequency signal; and correcting the baseband version of the received radio frequency signal using an estimate of the frequency and phase shift generated by a Kalman filter-based phase locked loop.The method of claim 17, wherein generating the recovered signal further comprises: training the Kalman filter-based phase locked loop using a predetermined code as the reference signal in a first operating mode of the receiver; and tracking the frequency and phase shift using the Kalman filter-based phase locked loop in a second operating mode of the receiver.The method of claim 18, wherein the tracking comprises: calculating the estimate of the frequency and phase shift based on the baseband version of the received radio frequency signal and a corrected baseband version of the received radio frequency signal based on a previous estimate of the frequency and phase shift.The method of claim 17, 18 or 19, wherein generating the reference signal using the preliminarily decoded symbol provided by the modified Viterbi decoder comprises: encoding the preliminarily decoded symbol using convolutional encoding to generate an encoded preliminarily decoded symbol; and mapping the encoded preliminarily decoded symbol using a predetermined modulation scheme to generate the reference signal.

Images