Semiconductor module that has a package

Abstract

A semiconductor module comprises a substrate with a dielectric insulating layer and at least one first metallization layer arranged on the dielectric insulating layer, and a housing with side walls, wherein the side walls define an internal volume of the housing, wherein the housing is arranged such that the substrate is located within the internal volume defined by the side walls, wherein the metallization layer faces the internal volume of the housing, the housing has at least one fastening element for securely attaching the housing to a heat sink, and the side walls of the housing are made of an electrically conductive material.

Description

TECHNICAL AREA

[0001] The present disclosure relates to a semiconductor module having a housing. BACKGROUND

[0002] Semiconductor modules often contain at least one substrate enclosed in a package. Each of these substrates supports a semiconductor array with multiple controllable semiconductor devices (e.g., two or more IGBTs) or non-controllable semiconductor devices (e.g., arrays of diodes). Each substrate typically has a substrate layer (e.g., a ceramic layer), a first metallization layer applied to one side of the substrate layer, and a second metallization layer applied to the other side of the substrate layer. The controllable semiconductor devices are, for example, attached to the first metallization layer. The second metallization layer may be attached to a base plate that forms part of the module or may be pressed against a heat sink.

[0003] In modules without base plates, the housing is typically attached to the heat sink using a suitable fixing device. Fixing the housing to the heat sink also serves to press the substrate against the heat sink to ensure homogeneous contact between them, thereby increasing heat dissipation towards the heat sink. The housing must therefore be sufficiently robust to reliably exert a certain degree of pressure on the substrate.

[0004] There is a need for a semiconductor module with a housing that is stable enough to reliably exert a certain degree of pressure on the substrate in order to establish satisfactory contact between the substrate and a heat sink. OVERVIEW

[0005] A semiconductor module comprises a substrate with a dielectric insulating layer and at least one first metallization layer arranged on the dielectric insulating layer, and a housing with side walls, wherein the side walls define an interior volume of the housing, wherein the housing is arranged such that the substrate is located within the interior volume defined by the side walls, wherein the metallization layer faces the interior volume of the housing, the housing includes at least one fastening element for securely attaching the housing to a heat sink, and the side walls of the housing are made of an electrically conductive material.

[0006] The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale; rather, the focus is on illustrating the principles of the invention. Furthermore, the same reference numerals in the figures denote corresponding parts in the different views. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a cross-sectional view of a semiconductor module. Fig. Figure 2 is a three-dimensional view of a housing for a semiconductor module according to embodiments of the disclosure. Fig. Figure 3 is a three-dimensional cross-sectional view of a semiconductor module according to embodiments of the disclosure. Fig. Figure 4 is a cross-sectional view of a section of a semiconductor module according to embodiments of the disclosure. Fig. Figure 5 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. Fig. Figure 6 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. Fig. Figure 7 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. Fig. Figure 8 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. Fig. Figure 9 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. Fig. Figure 10 is a cross-sectional view of a section of a semiconductor module according to further embodiments of the disclosure. DETAILED DESCRIPTION

[0007] The following detailed description refers to the accompanying drawings. The drawings show specific examples in which the invention can be implemented. It is understood that the features and principles described in relation to the various examples can be combined with one another, unless expressly stated otherwise. In the description and in the claims, designations of certain elements as "first element," "second element," "third element," etc., are not to be understood as enumerative. Rather, such designations merely serve to name different "elements." That is to say, for example, that the presence of a "third element" does not require the presence of a "first element" and a "second element."An electrical conductor or electrical connection, as described here, can be a single electrically conductive element or contain at least two single electrically conductive elements connected in series and / or parallel. Electrical conductors and electrical connections can contain metal and / or semiconductor material and can be permanently electrically conductive (i.e., non-switchable). A semiconductor body, as described here, can be made of (doped) semiconductor material and can be a semiconductor chip or be contained within a semiconductor chip. A semiconductor body has electrically connecting pads and contains at least one semiconductor element with electrodes.

[0008] Referring to Fig. Figure 1 shows a cross-sectional view of a semiconductor module 100. The semiconductor module 100 comprises a package 7 and a substrate 10. The substrate 10 includes a dielectric insulating layer 11, a (structured) first metallization layer 111 attached to the dielectric insulating layer 11, and a (structured) second metallization layer 112 attached to the dielectric insulating layer 11. The dielectric insulating layer 11 is located between the first and second metallization layers 111 and 112.

[0009] Each of the first and second metallization layers 111, 112 can consist of or contain one of the following materials: copper; a copper alloy; aluminum; an aluminum alloy; any other metal or alloy that remains solid during operation of the power semiconductor module assembly. The substrate 10 can be a ceramic substrate, that is, a substrate in which the dielectric insulating layer 11 is a ceramic, e.g., a thin ceramic layer. The ceramic can contain or consist of one of the following materials: aluminum oxide, aluminum nitride, zirconium oxide, silicon nitride, boron nitride, or any other dielectric ceramic. The dielectric insulating layer 11 can, for example, consist of or contain one of the following materials: Al₂O₃, AlN, SiC, BeO, or Si₃N₄. The substrate 10 can, for example,The substrate 10 can be a Direct Copper Bonding (DCB) substrate, a Direct Aluminum Bonding (DAB) substrate, or an Active Metal Brazing (AMB) substrate. Furthermore, the substrate 10 can be an insulated metal substrate (IMS). An insulated metal substrate generally has a dielectric insulating layer 11 containing (filled) materials such as epoxy resin or polyimide. The material of the dielectric insulating layer 11 can, for example, be filled with ceramic particles. Such particles can be, for example, SiO2, Al2O3, AlN, or BN and can have a diameter between approximately 1 µm and approximately 50 µm. The substrate 10 can also be a conventional printed circuit board (PCB) with a non-ceramic dielectric insulating layer 11. For example, a non-ceramic dielectric insulating layer 11 can consist of or contain a cured resin.

[0010] The substrate 10 is arranged in a housing 7. The housing 7 has side walls 72 and a top surface or cover 74 (hereinafter referred to simply as the cover). The substrate 10 is mounted on a heat sink 80. In some semiconductor modules 100, more than one substrate 10 is arranged on a single heat sink 80. The heat sink 80 forms a mounting surface for the module 100. The cover 74 of the housing 7 can either be a separate cover (or lid) that can be removed from the side walls, or it can be formed integrally with the side walls 72 of the housing 7. In the latter case, the cover 74 and the side walls 72 of the housing 7 can be formed as a single part, so that the cover 74 cannot be removed from the side walls 72 without damaging or destroying the housing 7. However, the cover 74 is generally optional and can also be omitted.

[0011] One or more semiconductor bodies 20 can be arranged on the substrate 10. Each of the semiconductor bodies 20 arranged on the substrate 10 can contain a diode, an IGBT (insulated-gate bipolar transistor), a MOSFET (metal-oxide-semiconductor field-effect transistor), a JFET (junction field-effect transistor), a HEMT (high-electron-mobility transistor), or any other suitable controllable or non-controllable semiconductor element.

[0012] One or more semiconductor bodies 20 can form a semiconductor array on the substrate 10. In Fig. Figure 1 shows only two semiconductor bodies 20 as examples. The second metallization layer 112 of the substrate 10 in Fig. 1 is a continuous layer. The first metallization layer 111 is in the Fig. In the example shown, a structured layer is present. "Structured layer" means that the first metallization layer 111 is not a continuous layer, but contains voids between different sections of the layer. Such voids are in Fig. Figure 1 is shown schematically. The first metallization layer 111 in this example contains four different sections. Different semiconductor bodies 20 can be mounted on the same or different sections of the first metallization layer 111. Different sections of the first metallization layer may not have an electrical connection or may be electrically connected to one or more other sections, e.g., using bond wires 3. Electrical connections 3 may also include, for example, connection plates or busbars, to name just a few examples. The one or more semiconductor bodies 20 may be electrically and mechanically connected to the substrate 10 by an electrically conductive bonding layer 30. Such an electrically conductive bonding layer may be a solder layer, a layer of an electrically conductive adhesive, or a layer of sintered metal powder, e.g.,a sintered silver powder.

[0013] The in Fig. The semiconductor module 100 shown in Figure 1 further includes terminal elements 4. The terminal elements 4 are electrically connected to the first metallization layer 111 and establish an electrical connection between the inside and outside of the housing 7. The terminal elements 4 can be electrically connected to the first metallization layer 111 at a first end 41, while a second end 42 of the terminal elements 4 protrudes from the housing 7. The terminal elements 4 can be electrically contacted from the outside at their second ends 42. The terminal elements 4 are shown in Figure 1. Fig. The connection elements 4 shown in Figure 1 are only examples. Connection elements 4 can be implemented in any other way and can be arranged in any other position. For example, one or more connection elements 4 can be arranged close to or adjacent to the side walls of the housing 7. Any other suitable design is possible. The connection elements 4 can, for example, be made of or contain a metal such as copper, aluminum, gold, silver, or any alloys thereof. The connection elements 4 can be connected by an electrically conductive layer (for the connection elements 4 in Fig. (1 not specifically shown) be electrically and mechanically connected to the substrate 10. Such an electrically conductive connecting layer can generally be a solder layer, a layer of an electrically conductive adhesive, or a layer of a sintered metal powder, e.g., a sintered silver powder.

[0014] Conventional semiconductor modules 100 generally contain a potting compound 5. The potting compound 5 can, for example, consist of or contain a silicone gel, or it can be a rigid molding compound. The potting compound 5 can at least partially fill the interior of the housing 7, thereby covering the components and electrical connections arranged on the substrate 10. In the illustrated embodiment, the terminal elements 4 can be partially embedded in the potting compound 5. However, at least their second ends 42 are not covered by the potting compound 5 and protrude through the housing 7 from the potting compound 5 to the outside of the housing 7. The potting compound 5 is designed to protect the components and electrical connections within the semiconductor module 100, particularly within the housing 7, from certain environmental conditions and mechanical damage.

[0015] The housing 7 is typically attached to the heat sink 80 by means of suitable mechanical fasteners, e.g., rivets, screws, or bolts 92. The housing 7 may, for example, have one or more fastening elements 90 for securely attaching the housing 7 to the heat sink 80. As shown in Fig. As shown schematically in Figure 1, each fastening element 90 of the at least one fastening element 90 can have at least one hole 94. Each hole aligns with a corresponding hole 82 in the heat sink 80. By way of example, at least the holes 82 in the heat sink 80 can be threaded holes. Each screw or bolt 92 extends through another hole 94 of the at least one hole 94 in the at least one fastening element 90 and into a corresponding hole 82 in the heat sink 80. By tightening the screws 92 or by firmly pressing down the bolts 92, the housing 7 is securely attached to the heat sink 80. The housing 7 can simultaneously be used to press the at least one substrate 10 against the heat sink 80. For example, the side walls 72 can have one or more projections, and the at least one substrate 10 (i.e.,An edge region of the at least one substrate 10 can be arranged between one or more projections and the heat sink 80. That is, the side walls 72 contact the substrate 10 from above on an upper surface of the dielectric insulating layer 11, where an upper surface of the dielectric insulating layer 11 is a surface facing away from the heat sink 80. In this way, homogeneous contact between the substrate 10 and the heat sink 80 can be provided, and thus satisfactory heat dissipation from the substrate 10 towards the heat sink 80 can be ensured. The housing 7 must therefore be sufficiently stable to be able to exert a certain degree of pressure on the substrate 10.

[0016] Packages 7 for semiconductor modules are often made of plastic materials. However, most plastic materials are elastic to some degree and therefore exhibit insufficient material properties (i.e., they are too soft) and are unable to exert high forces on the substrate 10. Incorporating somewhat harder materials, such as glass fibers, into the plastic material of a package 7 helps to increase the overall hardness of the package 7, but at the same time also increases the brittleness of the material.

[0017] A semiconductor module 100 according to embodiments of the disclosure comprises a substrate 10 with a dielectric insulating layer 11 and at least one first metallization layer 111 arranged on the dielectric insulating layer 11, as well as a housing 7 with side walls 72, wherein the side walls 72 define an interior volume of the housing 7, wherein the housing 7 is arranged such that the substrate 10 is arranged within the interior volume defined by the side walls 72, wherein the metallization layer 111 faces the interior volume of the housing 7, the housing 7 has at least one fastening element 90 for securely fastening the housing 7 to a heat sink 80, and the side walls 72 of the housing 7 are made of an electrically conductive material.

[0018] A semiconductor module 100 according to further embodiments of the disclosure comprises a substrate 10 with a dielectric insulating layer 11 and at least one first metallization layer 111 arranged on the dielectric insulating layer 11, a heat sink 80, and a housing 7 with side walls 72, wherein the side walls 72 define an internal volume of the housing 7. The substrate 10 is arranged on the heat sink 80 such that the first metallization layer 111 faces away from the heat sink 80. Furthermore, the housing 7 is arranged on the heat sink 80 such that the substrate 10 is located within the internal volume defined by the side walls 72. The housing 7 is in direct contact with the dielectric insulating layer 11 of the substrate 10 and with the heat sink 80.Furthermore, the housing 7 has at least one fastening element 90 for securely attaching the housing 7 to the heat sink 80, and the side walls 72 of the housing 7 are made of an electrically conductive material.

[0019] For example, the side walls 72 can be made of a metallic material. The metallic material can consist of or comprise one of the following materials: aluminum, copper, brass, tin, steel, and combinations thereof. Such electrically conductive materials, e.g., metals, are generally much harder and can be less elastic than plastic materials commonly used to form housings 7 for semiconductor modules. Electrically conductive materials such as metals can be shaped and formed using relatively simple processes such as bending, cutting, casting, or deep drawing. A semiconductor module 100 according to embodiments of the disclosure can therefore be manufactured at a comparatively low cost.

[0020] As in Fig. As shown schematically in Figure 2, the side walls 72 and the one or more fastening elements 90 can be formed as a single, integral part. However, it is also generally possible for the one or more fastening elements 90 to be separate elements attached to the side walls 72 of the housing 7. The fastening elements 90 can be attached to the side walls 72 in any suitable manner, for example, by gluing, screwing, or by means of a suitable plug connection. However, if the fastening elements 90 are formed integrally with the side walls 72 of the housing 7, the housing 7 can be manufactured in a very simple and cost-effective manner.

[0021] Each fastening element 90 of the at least one fastening element 90 can have at least one first hole 94. When the housing 7 is arranged on the heat sink 80, each first hole 94 can align with another hole 82 of one or more second holes 82 in the heat sink 80. The semiconductor module 100 can further have at least one screw or bolt 92, each of which extends through another first hole 94 of the at least one first hole 94 in the at least one fastening element 90 and into a corresponding second hole 82 in the heat sink 80. In this way, the fastening elements 90 can be securely attached to the heat sink 80.Since one or more fastening elements 90 are integrally formed with the side walls 72 of the housing 7 or are suitably attached to them, the housing 7 is also securely attached to the heat sink 80 by means of the screws or bolts 92. Since the substrate 10 (i.e., an edge region of the substrate 10) is positioned between the side walls and the heat sink 80, the substrate 10 is pressed against the heat sink 80 by means of the side walls 72 when the screws or bolts 92 are inserted into the first and respective second holes 94, 82.

[0022] The housing 7 can be designed such that the forces pressing the substrate 10 onto the heat sink 80 are distributed (uniformly) along the edges of the substrate 10. That is, a projection or other contact element of the housing 7, which is in direct contact with the substrate 10, can extend continuously along one circumference of the substrate 10. In this way, the pressure exerted on the substrate 10 by means of the housing 7 is distributed uniformly along the entire circumference of the substrate 10.

[0023] According to some embodiments of the disclosure, the housing 7 has two fastening elements 90 arranged on opposite sides of the housing 7, as exemplified in Fig. Figure 2 illustrates this. In this way, forces pressing the substrate 10 onto the heat sink 80 can be distributed evenly along the edges of the substrate 10. According to other examples, a housing 7 can have four mounting elements 90, each mounting element 90 being attached to or integrally formed with a different side wall 72 of the housing 7. Most housings 7 have a square or rectangular shape. That is to say, most housings 7 have four side walls 72. In general, however, any number of three or more side walls is possible. Even housings with a circular shape and therefore only a single circular side wall 72 are generally possible.

[0024] Since the side walls 72 of the housing 7 are made of an electrically conductive material (e.g., a metal), there is a risk of electrical arcing or short circuits occurring between the first metallization layer 111 and the side walls 72. As described above, the semiconductor module 100 may also have a potting compound 5 that at least partially fills the internal volume defined by the side walls 72. The potting compound 5 may cover the substrate 10 and may at least partially cover components and electrical connections arranged on the substrate 10. For example, semiconductor bodies 20 and electrical connections 3 may be completely covered by the potting compound 5. However, other elements, such as terminal elements 4, may only be partially covered by the potting compound 5.A section of the potting compound 5 can be arranged between the side walls 72 and the first metallization layer 111 of the substrate 10 and thereby electrically insulate the side walls 72 from the first metallization layer 111 (see e.g. . Fig. 1) That is, the first metallization layer 111 does not directly contact the side walls 72. Instead, a gap is provided between the first metallization layer 111 and the side walls 72. This gap can be filled with the potting compound 5 to create electrical insulation between the side walls 72 and the first metallization layer 111.

[0025] As mentioned above, the semiconductor module 100 can further comprise one or more terminal elements 4, each terminal element 4 having a first end 41 that is electrically connected to the first metallization layer 111 and a second end 42 that protrudes from the potting compound 5 and the housing 7. Since the terminal elements 4 generally also conduct electricity and since their second ends 42 protrude from the potting compound 5, there is also a risk of flashovers or short circuits occurring between one or more terminal elements 4 and the electrically conductive side walls 72 of the housing 7. This can depend, for example, on the distance between the respective terminal element 4 and the respective side wall 72. For terminal elements 4 that are located centrally on the substrate 10, the risk of flashovers or short circuits can be low or even zero.However, if a connecting element 4 is located relatively close to one or more of the side walls 72, there may be an increased risk of flashovers or short circuits.

[0026] Fig. Figure 3 schematically shows a three-dimensional cross-sectional view of an exemplary semiconductor module 100. In this example, some of several connection elements 4 are arranged relatively close to one or more of the side walls 72 of the housing 7. This is also shown by way of example in the cross-sectional view of Fig. Figure 4 shows that one of the terminal elements 4 is arranged relatively close to one of the side walls 72. To electrically isolate the terminal elements 4 from the side walls 72, the semiconductor module 100 may further comprise at least one first electrically insulating element 54 extending from an upper surface of the potting compound 5 away from the substrate 10. The upper surface of the potting compound 5 is a (usually substantially flat) surface facing away from the substrate 10. Each first electrically insulating element 54 of the at least one first electrically insulating element 54 may at least partially surround another terminal element 4 of the one or more terminal elements 4. According to some examples, each first electrically insulating element 54 may completely surround one of the terminal elements 4.This means that a first electrically insulating element 54 can form a continuous loop around a terminal element 4 on the top surface of the potting compound 5. However, it may also be sufficient if a first electrically insulating element 54 is arranged only along one side of the respective terminal element 4. In particular, it can be arranged between the terminal element 4 and at least one of the side walls 72, i.e., the side walls that are closest to the respective terminal element 4 (see, for example, the continuous left part of the first electrically insulating element 54 in Figure 1). Fig. 4 - the right section shown with dashed lines can be omitted).

[0027] At least one of the first electrically insulating elements 54 can be made of a material different from the material of the potting compound 5. That is, the first or more electrically insulating elements 54 can be elements that are separate and distinguishable from the potting compound 5. However, the first or more electrically insulating elements 54 can adhere to the potting compound 5 to remain in their desired positions on it. For example, one or more electrically insulating elements 54 can be manufactured using suitable (two-component) injection molding processes. That is, the first electrically insulating elements 54 can be formed directly on a top surface of the potting compound 5.However, it is also possible to form first electrically insulating elements 54 separately and insert the finished first electrically insulating elements 54 into the semiconductor module 100 by placing them on the potting compound 5. First electrically insulating elements 54 can also generally be provided when two directly adjacent terminal elements 4 are arranged relatively close to each other. In this way, flashovers or short circuits between different adjacent terminal elements 4 can be prevented.

[0028] Some semiconductor modules 100 further include a printed circuit board 16 arranged remotely from and parallel to the substrate 10, the printed circuit board 16 being mechanically and electrically coupled to the second ends 42 of one or more terminal elements 4. A printed circuit board 16 generally has conductive traces that carry electrical currents. As in Fig. As shown schematically in Figure 5, each first electrically insulating element 54 of the at least one first electrically insulating element 54 can directly contact both the potting compound 5 and the printed circuit board 90. In this way, electrical insulation can be provided between the connection elements 4 and the printed circuit board 16 (i.e., the conductor tracks on a bottom side of the printed circuit board 16).

[0029] However, the first electrically insulating elements 54, which consist of a different material than the potting compound 5, are only one example. As in Fig. As shown schematically in Figure 6, first electrically insulating elements 54 can also be formed integrally with the potting compound 5. That is, according to some embodiments, at least one first electrically insulating element 54 can consist of the same material as the potting compound 5. Such first electrically insulating elements 54 can be formed, for example, by suitable injection molding processes. Another exemplary possibility for forming first electrically insulating elements integrally with the potting compound 5 is by means of so-called liquid silicone rubber (LSR) processes. Materials typically used in LSR processes have similar electrical properties to standard potting materials used in semiconductor modules 100.However, materials used in LSR processes often crosslink (cure) significantly faster compared to standard potting materials. In this way, it is possible to form an essentially homogeneous potting compound (encapsulation 5) within the housing with a 3D-structured surface (one or more electrically insulating elements 54 on a top surface of the potting compound).

[0030] First electrically insulating elements 54, as in the Fig. 4 and Fig. 5 shown, can generally also be combined with the one-piece formed first electrically insulating elements 54 of Fig. 6 can be combined. The specific shapes of the first electrically insulating elements 54, as shown in the figures, are generally only examples. In general, any other shapes are possible.

[0031] When a printed circuit board 16 is attached to the semiconductor module 100, the first one or more electrically insulating elements 54 contact the potting compound 5 and the printed circuit board 16 directly. In particular, the printed circuit board 16 can be pressed against the first one or more electrically insulating elements 54 with a certain degree of force. In this way, each first electrically insulating element 54 can be compressed to a certain extent by the first one or more electrically insulating elements 54. This provides dielectric insulation between different terminal elements 4, between terminal elements 4 and the side walls 72 of the housing 7, and between terminal elements 4 and conductor tracks on a bottom surface of the printed circuit board 16 (the side surface facing the substrate 10). Furthermore, potential creepage paths on a bottom surface of the printed circuit board 16 can be effectively interrupted.

[0032] Fig. Figure 6 schematically shows a first dielectric insulating element 54 in an uncompressed state (no circuit board 16 mounted on the semiconductor module). Fig. Figure 7 schematically shows a first dielectric insulating element 54 in a compressed state (pressed between potting compound 5 and circuit board 16).

[0033] Instead of or in addition to the one or more first dielectric insulating elements 54, a semiconductor module 100 according to embodiments of the disclosure may further comprise one or more second electrically insulating elements 56 extending from an upper surface of the potting compound 5 away from the substrate 10. The upper surface of the potting compound 5 is a substantially flat surface facing away from the substrate 10. A second electrically insulating element 56 may, for example, extend along the side walls 72 of the housing 7. This is described in the Fig. 8, Fig. 9 and Fig. 10 schematically illustrated. In this way, dielectric insulation can be provided between conductor tracks on a printed circuit board 16 and the side walls 72 of the housing 7.

[0034] As in Fig. As shown schematically in Figure 8, and similarly to what was described above with regard to the first electrically insulating elements 54, a second electrically insulating element 56 can be made of a material different from the material of the potting compound 5. The second electrically insulating element 56 can directly contact the potting compound 5, the side walls 72, and the printed circuit board 16 (i.e., a bottom surface of the printed circuit board 16). In the Fig. In the example shown in Figure 8, the second electrically insulating element 56 contacts the side walls 72 only in a horizontal direction x and only within the internal volume defined by the side walls 72. However, this is only one example.

[0035] As in the Fig. 9 and Fig. As shown schematically in Figure 10, the second electrically insulating element 56 can also directly contact the side walls 72 in a vertical direction 72. In the case of the Fig. In the example shown in 10, it also directly contacts the side walls 72 horizontally from outside the housing 7.

[0036] In the Fig. 9 and Fig. In the 10 illustrated examples, the second electrically insulating element 56 consists of the same material as the potting compound 5 and is formed integrally with it. A section of the second electrically insulating element 56 is arranged (vertically) between the side walls 72 and the circuit board 16. In these examples, the second electrically insulating element 56 covers at least part of the side walls 72 to dielectrically insulate them from the circuit board 16. A second electrically insulating element 56 can extend continuously along the entire circumference of the side walls 72. It is also conceivable that all or parts of the side walls 72, in particular the upper sections of the side walls 72, could be coated with an insulating coating material before assembly and the application of the potting compound 5.In this embodiment, the coating material could consist of a different material than that of the potting material 5.

[0037] In the examples shown in the figures, the housing 7 has only side walls 72, but no cover 74. However, it is also generally possible that the housing 7 is similar to what is shown in Fig.As shown in Figure 1, a cover 74 is present. A cover 74 can be a separate component that is suitably attached to the side walls 72. However, it is also possible for a cover 74 to be formed integrally with the side walls 72. A cover 74 can be made of an electrically insulating material, as in conventional semiconductor modules. However, it is also generally possible for a cover 74, like the side walls 72, to be made of an electrically conductive material. In this case, additional measures can be taken to, for example, electrically insulate the terminal elements 4 from the cover 74. The terminal elements 4 can protrude through corresponding openings formed in the cover 74.To dielectrically insulate the connection elements 4 from an electrically conductive cover 74, corresponding first electrically insulating elements 54 can extend from an upper surface of the potting compound 5 away from the substrate 10 and into the corresponding openings formed in the cover 74. That is, a section of a first electrically insulating element 54 can be arranged between the respective connection element 4 and the cover 74 (i.e., horizontally surrounding the connection element 4).

Claims

[1] A semiconductor module (100) has: a substrate (10) with a dielectric insulating layer (11) and at least one first metallization layer (111) arranged on the dielectric insulating layer (11); and a housing (7) with side walls (72), wherein the side walls (72) define an internal volume of the housing (7), wherein the housing (7) is arranged such that the substrate (10) is arranged within the internal volume defined by the side walls (72), with the metallization layer (111) facing the internal volume of the housing (7), the housing (7) has at least one fastening element (90) for securely attaching the housing (7) to a heat sink (80), and the side walls (72) of the housing (7) are made of an electrically conductive material. [2] Semiconductor module (100) according to claim 1, wherein each fastening element (90) of the at least one fastening element (90) has at least one first hole (94) configured to receive a fastening means to securely fasten the housing (7) to a heat sink. [3] Semiconductor module (100) according to claim 1 or 2, wherein the electrically conductive material is a metallic material. [4] Semiconductor module (100) according to claim 3, wherein the metal material comprises or consists of aluminium, copper, brass, tin, steel or combinations thereof. [5] Semiconductor module (100) according to one of the preceding claims, further comprising a potting compound (5), wherein the potting compound (5) at least partially fills the internal volume defined by the side walls (72), covers the substrate (10) and at least partially covers components and electrical connections arranged on the substrate (10). [6] Semiconductor module (100) according to claim 5, wherein a section of the potting compound (5) is arranged between the side walls (72) and the first metallization layer (111) of the substrate, thereby electrically isolating the side walls (72) from the first metallization layer (111). [7] Semiconductor module (100) according to claim 5 or 6, further comprising one or more terminal elements (4), each terminal element (4) of the one or more terminal elements (4) having a first end (41) which is electrically connected to the first metallization layer (111) and a second end (42) which protrudes from the potting compound (5) and from the housing (7). [8] Semiconductor module (100) according to claim 7, wherein the second ends (42) of one or more connection elements (4) are configured to be mechanically and electrically coupled to a printed circuit board (16) which is arranged remotely from and parallel to the substrate (10). [9] Semiconductor module (100) according to claim 7 or 8, further comprising at least one first electrically insulating element (54) extending from an upper surface of the potting compound (5) away from the substrate (10), wherein the upper surface of the potting compound (5) is a surface facing away from the substrate (10) and wherein each first electrically insulating element (54) of the at least one first electrically insulating element (54) at least partially surrounds another terminal element (4) of the one or more terminal elements (4). [10] Semiconductor module (100) according to claim 9, wherein at least one first electrically insulating element (54) of the at least one first electrically insulating element (54) consists of a material that differs from the material of the potting compound (5). [11] Semiconductor module (100) according to claim 10, wherein the at least one first electrically insulating element (54) directly contacts the potting compound (5) and the circuit board (16). [12] Semiconductor module (100) according to one of claims 9 to 11, wherein at least one first electrically insulating element (54) of the at least one first electrically insulating element (54) is made of the same material as the potting compound (5) and is formed integrally with the potting compound (5). [13] Semiconductor module (100) according to any one of claims 8 to 12, further comprising a second electrically insulating element (56) extending from an upper surface of the potting compound (5) away from the substrate (10), wherein the upper surface of the potting compound (5) is a substantially flat surface facing away from the substrate (10), and wherein the second electrically insulating element (56) extends along the side walls (72) of the housing (7). [14] Semiconductor module (100) according to claim 13, wherein the second electrically insulating element (56) is made of a material different from the material of the potting compound (5), and wherein the second electrically insulating element (56) directly contacts the potting compound (5), the side walls (72) and the circuit board (16). [15] Semiconductor module (100) according to claim 13, wherein the second electrically insulating element (56) is made of the same material as the potting compound (5) and is integrally formed with the potting compound (5), and wherein a section of the second electrically insulating element (56) is arranged between the side walls (72) and the circuit board (16).

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