Cascaded high-frequency system in a single multi-chip package

Abstract

A radio frequency (RF) device includes a primary RF chip and at least one secondary RF chip, wherein the primary RF chip and the at least one secondary RF chip form a cascaded RF system. The primary RF chip and the at least one secondary RF chip are mounted together in a single multi-chip package.

Description

Technical area

[0001] The present disclosure relates generally to radio frequency (RF) devices and methods of fabricating them. More particularly, the present disclosure relates to a cascaded RF system assembled in a single multi-chip package. background

[0002] Individual RF transceiver chips can only contain a limited number of virtual array elements. To meet the requirements of certain applications, such as autonomous driving, it may be necessary to cascade multiple such RF transceiver chips and synchronize them as a single unit. Cascading multiple RF transceiver chips is typically performed on printed circuit boards.

[0003] Manufacturers and developers of RF devices are constantly striving to improve their products. In this context, it may be desirable to provide RF devices with improved performance, smaller size, and reduced cost. Additionally, it may be desirable to provide suitable processes for manufacturing such RF devices.

[0004] Document DE 10 2019 115 307 A1 relates to semiconductor devices with planar waveguide transmission lines. Document US 2020 / 0 227 470 A1 relates to filter-centric III-N layers that enable the integration of high-frequency filters with III-N transistors. Document US 2014 / 0 154 999 A1 relates to a waveguide for data transmission within a package. Document US 2023 / 0 420 396 A1 relates to a device-to-device communication system, packages, and package systems. Summary

[0005] One aspect of the present disclosure relates to a radio frequency (RF) device. The RF device comprises a primary RF chip and at least one secondary RF chip, wherein the primary RF chip and the at least one secondary RF chip form a cascaded RF system. The primary RF chip and the at least one secondary RF chip are mounted together in a single multi-chip package. The RF device further comprises an RF transmission link configured to transmit a local oscillator signal generated by the primary RF chip from the primary RF chip to the at least one secondary RF chip, wherein the RF transmission link is arranged in the multi-chip package, and wherein the RF transmission link comprises a first self-feeding link arranged externally to the primary RF chip, wherein the first self-feeding link is configured toto transmit the local oscillator signal from an RF output of the primary RF chip to an RF input of the primary RF chip, and / or a clock connection configured to transmit a clock signal between the primary RF chip and the at least one secondary RF chip, wherein the clock connection is arranged in the multi-chip package, and wherein the clock connection comprises a second self-feeding connection arranged externally to the primary RF chip, wherein the second self-feeding connection is configured to transmit the clock signal from a clock output of the primary RF chip to a clock input of the primary RF chip.

[0006] Another aspect of the present disclosure relates to a method for manufacturing an RF device. The method comprises an act of jointly mounting a primary RF chip and at least one secondary RF chip in a single multi-chip package. The primary RF chip and the at least one secondary RF chip form a cascaded RF system. The method further comprises an act of arranging an RF transmission link in the multi-chip package, which is configured to transmit a local oscillator signal generated by the primary RF chip from the primary RF chip to the at least one secondary RF chip, wherein the RF transmission link comprises a first self-feeding link arranged externally to the primary RF chip, wherein the first self-feeding link is configured totransmitting the local oscillator signal from an RF output of the primary RF chip to an RF input of the primary RF chip (2), and / or an act of arranging a clock connection in the multi-chip package that is configured to transmit a clock signal between the primary RF chip and the at least one secondary RF chip, wherein the clock connection comprises a second self-feeding connection arranged externally to the primary RF chip, wherein the second self-feeding connection is configured to transmit the clock signal from a clock output of the primary RF chip to a clock input of the primary RF chip. Brief description of the drawings

[0007] Devices and methods according to the disclosure are described in more detail below based on the drawings. The elements in the drawings are not necessarily to scale. Similar reference numerals may designate corresponding similar parts. The technical features of the various illustrated examples may be combined, provided they are not mutually exclusive, and / or they may be selectively omitted if they are not described as necessarily required. Fig. 1 schematically illustrates a top view of an RF device 100 according to the disclosure. Fig. 2 schematically illustrates a top view of an RF device 200 according to the disclosure. Fig. 3 schematically illustrates a cross-sectional side view of an RF device 300 according to the disclosure. Fig. 4 schematically illustrates a cross-sectional side view of an RF device 400 according to the disclosure. Fig. 5 schematically illustrates a top view of an RF device 500 according to the disclosure. Fig. 6 schematically illustrates a top view of an RF device 600 according to the disclosure. Fig. 7 schematically illustrates a top view of an RF device 700 according to the disclosure. Fig. 8 illustrates a flow diagram for a method of manufacturing an RF device according to the disclosure. Detailed description

[0008] In the following detailed description, reference is made to the accompanying drawings, which show, by way of illustration, certain aspects in which the disclosure may be practiced. In this context, directional terms such as "top," "bottom," "front," "back," or the like may be used with reference to the orientation of the described figures. Since the components of the described devices may be arranged in various orientations, the directional terminology is for illustrative purposes only and is not limiting in any way.

[0009] As in Fig. 1, a radio frequency (RF) device 100 may include a primary RF chip 2 and at least one secondary RF chip 4. In the illustrated example, the RF device 100 may include an exemplary and non-limiting number of three secondary RF chips 4A through 4C. In other examples, the number of secondary RF chips may vary and depend on the particular application. In some applications, the RF device 100 may include a primary RF chip 2 and a secondary RF chip 4. Accordingly, while the examples discussed below may show three secondary RF chips 4A through 4C, other examples may include one, two, or more than three secondary RF chips 4A through 4C with the same benefits.While the examples may refer to secondary RF chips 4A to 4C, examples are also disclosed in which, instead of three secondary RF chips 4A to 4A, at least one secondary RF chip 4 is provided in the multi-chip package. Accordingly, throughout the disclosure, the secondary RF chips 4A to 4C may be replaced by the term at least one secondary RF chip 4. The primary RF chip 2 and the at least one secondary RF chip 4 may form a cascaded RF system. The primary RF chip 2 and the at least one secondary RF chip 4 may be mounted together in a single multi-chip package. In the example of FIG. Fig. 1, a joint mounting of the RF chips is indicated by a rectangle surrounding the RF chips.

[0010] A multi-chip package can be considered as a joint assembly of multiple separate chips (semiconductor dies) and other optional electronic components. In examples, the multiple RF chips 2 and 4 are not individually packaged, but are packaged together by the multi-chip package to form a single semiconductor package for the multiple chips. In some examples, molding the multiple chips together and forming redistributions may be part of forming a multi-chip package. In some examples, the multiple chips may include multiple MMIC (monolithic microwave integrated circuit) semiconductor chips. Package types may be defined by international, national, or industry standards, but may also be manufacturer-specific. A package may provide means to connect the package to its external environment (e.g.,a printed circuit board (PCB). Accordingly, the multi-chip package of the . Fig. 1 at least one external connection element (not illustrated) configured to mechanically and electrically connect the multi-chip package, e.g., to a PCB (not illustrated). Exemplary external connection elements are in conjunction with Fig. 2. In addition, a package may optionally provide means to protect its components against threats such as mechanical shock, chemical contamination, moisture, light exposure, or the like. In this respect, the multi-chip package of the Fig. 1 may include a chip package housing, wherein the primary RF chip 2 and the secondary RF chips 4A to 4C may be encapsulated in the chip package housing. An exemplary chip package housing is described in connection with Fig. 2 shown and discussed.

[0011] As shown in the exemplary top view of the Fig. 1, a main surface of the primary RF chip 2 and main surfaces of the secondary RF chips 4A to 4C may be arranged in the xy plane. Accordingly, the primary RF chip 2 and the secondary RF chips 4A to 4C may be separated in a lateral direction, the lateral direction being parallel to the main surfaces of the RF chips 2 and 4. That is, viewed in the z-direction, the base surfaces of the RF chips 2 and 4 may be laterally shifted and / or may not overlap. The RF chips 2 and 4 may be arranged at substantially a similar height with respect to the z-direction. In examples, the plurality of RF chips 2 and 4 are not stacked on top of each other in the z-direction.

[0012] In the top view of Fig. 1, the footprint of the RF device 100 (or in particular the multi-chip package) may be less than about 10 cm 2 or about 9cm 2or about 8cm 2 or about 7cm 2 or about 6cm 2 or about 5cm 2 In an exemplary but non-limiting case, the side lengths of the RF device 100 (or in particular the multi-chip package) in the x-direction and in the y-direction may each be in a range between about 10 mm and about 15 mm.

[0013] Features of the primary RF chip 2 are described below. It should be noted that each of the secondary RF chips 4A to 4C may include some or all of the features of the RF chip 2. The primary RF chip 2 may be made of or include any semiconductor material, such as silicon. The primary RF chip 2 (or its electronic circuitry) may be configured to operate in a frequency range greater than about 1 GHz, in some examples greater than about 10 GHz. Thus, the primary RF chip 2 may also be referred to as an RF (radio frequency) chip, radio frequency chip, or microwave frequency chip. In particular, the primary RF chip 2 may be configured to operate in a frequency range that may range from about 1 GHz to about 1 THz, in particular from about 10 GHz to about 300 GHz.Microwave circuits may include, for example, microwave transmitters, microwave receivers, microwave transceivers, microwave sensors, microwave detectors, or the like. RF devices according to the disclosure may be used for radar applications in which the frequency of the RF signals can be modulated. The primary RF chip 2 may thus also be referred to as a radar chip. In particular, the primary RF chip 2 may include or correspond to an MMIC (monolithic microwave integrated circuit).

[0014] Microwave radar devices can be used, for example, in motor vehicles, industry, the military, and / or defense for systems that measure range and speed. For example, automotive applications may include advanced driver assistance systems, automatic vehicle cruise control systems, vehicle anti-collision systems, or similar. Such systems may operate in the microwave frequency range and utilize FMCW (Frequency Modulation Continuous Wave) signals, for example, in the 24 GHz, 76 GHz, or 79 GHz frequency bands. The use of microwave radar systems can provide consistent and efficient vehicle operation. Efficient driving, for example, can reduce fuel consumption, thus reducing CO2 emissions and enabling energy savings.Additionally, wear on vehicle tires, brake discs, and brake pads can be reduced, thereby lowering particulate matter pollution. Improved RF or radar systems, as described herein, can thus contribute to environmentally friendly solutions, i.e., climate-friendly solutions that provide lower energy consumption.

[0015] The primary RF chip 2 can, for example, contain four transmit channels (TX) TX1 to TX4, which are designed to transmit RF signals to an antenna. In addition, the primary RF chip 2 can, for example, contain four receive channels RX1 to RX4, which are designed to receive RF signals. Thus, the primary RF chip 2 can also be referred to as a transceiver TRX chip. The respective antennas for transmitting and receiving the RF signals can be integrated into the multi-chip package or arranged outside the multi-chip package and coupled to the RF ports housed in the multi-chip package. In further examples, the number of TX antennas and RX antennas of the primary RF chip 2 can be different, such as three TX antennas and four RX antennas.

[0016] The primary RF chip 2 and the secondary RF chips 4A to 4C can be interconnected and cascaded to form a cascaded RF system. Cascading multiple RF transceiver chips can increase the number of transmit and receive channels and thus the number of virtual antenna array elements, thereby improving target detection and resolution, which may be required for certain applications, such as autonomous driving L4 and L5. The RF chips 2 and 4 can be synchronized to operate the cascaded RF system as a single RF system in which each of the RF channels has a predefined phase relationship to each other. To achieve appropriate synchronization between different RF chips, specific signals can be exchanged between the primary RF chip 2 and the secondary RF chips 4A to 4C.In this context, the primary RF chip 2 may be configured to generate a local oscillator (LO) signal that can be shared by all RF chips in the entire cascaded RF system. In other words, the secondary RF chips 4A to 4C use the LO signal generated by the primary RF chip for operations such as transmitting signals or mixing with received signals, rather than generating and using an unsynchronized LO signal themselves. The LO signal may be a mmWave LO signal. In some applications, the LO signal may be an FMCW signal containing a plurality of frequency ramps. Additionally, the primary RF chip 2 may be configured to generate a clock signal (e.g., generated by a crystal contained in the primary RF chip 2) and share it with the secondary RF chips 4A to 4C.Sharing the clock signal can eliminate the need for additional crystals in the secondary RF chips 4A through 4C and ensure that the cascaded system operates from a single clock source. The clock signal can also be referred to as the system clock.

[0017] Cascading RF chips 2 and 4 in a multi-chip package can reduce the impact on the distribution of the synchronized LO signal from the primary RF chip 2 to each secondary RF chip 4A to 4C, as the length of the RF link between the two RF chips in a multi-chip package can be kept very short. As temperature changes, the length of the link can also change, which can lead to phase fluctuations in the LO signal transmitted for synchronization from the primary RF chip 2 to each secondary RF chip 4A to 4C. For high-resolution radar applications, such phase fluctuations are undesirable because they can alter the phase relationship between the respective RF channels.By arranging the primary RF chip 2 and the secondary RF chips 4A to 4C in a multi-chip package, temperature-induced phase fluctuations can be significantly reduced, thereby achieving improved phase stability over temperature compared to conventional cascaded systems. In addition, RF losses can be minimized. In conventional systems, the LO signal can be frequency-divided before distribution. In contrast, the examples disclosed herein can distribute the LO signal for synchronization without frequency division. Furthermore, the lateral separation of the RF chips can make the design of the RF interconnect less effort and complexity than, for example, with vertically stacked RF chips, since RF signals in the mmWave range or higher may require waveguides, striplines, or other wave elements that are much easier to implement in the lateral direction.

[0018] The primary RF chip 2 may include multiple RF inputs and multiple RF outputs. In particular, the primary RF chip 2 may include at least one RF output LOOUT configured to output the LO signal and at least one RF input LOIN configured to input the LO signal. In addition, the primary RF chip 2 may include at least one RF output CLKOUT configured to output the clock signal and at least one RF input CLKIN configured to input the clock signal. Each of the secondary RF chips 4A to 4C may include similar RF inputs and RF outputs, but may not necessarily use all of them during operation. In the illustrated example, the inputs and outputs required for operation of the cascaded RF system are shown in bold. For example, each of the secondary chips 4A to 4C may require the LOIN and CLKIN inputs, while the LOOUT and CLKOUT outputs are optional.

[0019] The RF device 100 may include an RF transmission link 6 that connects the primary RF chip 2 and the secondary RF chips 4A to 4C. The RF transmission link 6 may be configured to transmit the LO signal generated by the primary RF chip 2 from the primary RF chip 2 to the secondary RF chips 4A to 4C. In particular, the RF transmission link 6 may be arranged in the multi-chip package. As can be seen from the top view of the Fig. 1, the RF transmission connection 6 can be arranged between the RF chips 2 and 4.

[0020] The RF transmission connection 6 may include a first self-feeding connection arranged externally to the primary RF chip 2. The first self-feeding connection may be configured to transmit the LO signal from the RF output LOOUT of the primary RF chip 2 to the RF input LOIN of the primary RF chip 2. The RF transmission connection 6 may include a first star point 8A. A star point may include one input and at least two outputs. The first star point 8A may be configured to provide the LO signal from the first star point 8A to the primary RF chip 2 (in particular, to its LOIN input) and to the secondary RF chips 4A to 4C (in particular, to their respective LOIN inputs). A distance between the first star point 8A and the primary RF chip 2 and distances between the first star point 8A and each of the secondary RF chips 4A and 4B may be substantially equal. It should be noted that these distances in Fig. 1 may differ due to the qualitative nature of the illustration.

[0021] Due to the equivalent spacing, each of the RF chips 2 and 4 can receive an identical LO signal from the first star point 8A, so that the operation of all RF chips 2 and 4 can be based on the same LO signal. In particular, the same LO signal can be received at the RF inputs LOIN of the RF chips 2 and 4 with the same phase, so that coherence can be provided between all RF chips 2 and 4. For example, it may thus be possible for all RX channels to convert received signals from RF to baseband with the same phase. To ensure coherence between the primary RF chip 2 and the secondary RF chips 4A to 4C, the primary RF chip 2 can inject the LO signal into itself via an external loop containing the first star point 8A (instead of via an internal loop).In addition, since the length of the LO signal distribution is the same for each RF chip (including the primary RF chip 2, which uses the self-injecting signal for operation), temperature effects affect each RF chip in the same way, reducing temperature-induced phase variations.

[0022] The RF device 100 may include a clock connection 10 that interconnects the primary RF chip 2 and the secondary RF chips 4A to 4C. The clock connection 10 may be configured to transmit or share the clock signal between the primary RF chip 2 and the secondary RF chips 4A to 4C. In particular, the clock connection 10 may be arranged in the multi-chip package. As can be seen from the top view of the Fig. 1, the clock connection 10 can be arranged between the RF chips 2 and 4.

[0023] The clock connection 10 may include a second self-feeding connection arranged externally to the primary RF chip 2. The second self-feeding connection may be configured to transmit the clock signal from the clock output CLKOUT of the primary RF chip 2 to the clock input CLKIN of the primary RF chip 2. The clock connection 10 may include a second star point 8B configured to provide the clock signal from the second star point 8B to the primary RF chip 2 (in particular to its input CLKIN) and to the secondary RF chips 4A to 4C (in particular to the respective input CLKIN). The distance between the second star point 8B and the primary RF chip 2 and the distances between the second star point 8B and each of the secondary RF chips 4A to 4C may be the same. It should be noted that these distances in Fig. 1 may differ due to the qualitative nature of the illustration. Due to the second self-feeding connection and the second star point 8B, the operation of all RF chips 2 and 4 can be based on the same clock signal or system clock.

[0024] It should be noted that the RF device 100 and each of the RF chips 2 and 4 may contain additional electronic circuitry, e.g., for processing transmit and / or receive RF signals in an analog and / or digital domain. For simplicity, such additional electronic circuitry will be described in connection with the example of Fig. 1 is not explicitly shown and discussed.

[0025] The RF device 200 of the Fig. 2 may include some or all of the features of the RF device 100 of the Fig. 1. The RF device 200 (or in particular the multi-chip package) may include a plurality of external interconnect elements 12 and a chip package housing 14. The external interconnect elements 12 may be configured to mechanically and electrically connect the multi-chip package to a PCB 16. The PCB 16 may or may not be considered part of the RF device 200. Since the RF transmission link 6 and the clock link 10 may be arranged in the multi-chip package, the PCB 16 may be free of signal transmission structures for transmitting RF signals. In the illustrated example, the external interconnect elements 12 may include or correspond to solder balls, copper pillars, or the like. It should be noted that the external interconnect elements 12 may be arranged on a main surface of the multi-chip package facing the PCB 16 and thus in the top view of Fig. 2 may not be visible in practice.

[0026] The primary RF chip 2 and the secondary RF chips 4A to 4C may be at least partially encapsulated in the chip package housing 14. The chip package housing 14 may contain or be made of at least one of an epoxy, a filled epoxy, a glass fiber-filled epoxy, an imide, a thermoplastic, a thermosetting polymer, a polymer blend, a laminate, a mold compound, glass, or the like. Various techniques may be used to encapsulate components of the RF device 200 in the chip package housing 14, for example, at least one of compression molding, injection molding, powder molding, liquid molding, map molding, lamination, or the like.

[0027] The RF device 300 of the Fig. 3 may include some or all of the features of the previously described RF devices according to the disclosure. The RF device 300 (or in particular, the multi-chip package) may include an electrical redistribution layer (or electrical redistribution structure) 18. The electrical redistribution layer 18 may include one or more metal layers (or metal traces) 20 that may extend substantially parallel to the main surfaces of the RF chips 2, 4 and the chip package housing 14. In the illustrated example, the main surfaces of the RF chips 2, 4 and the main surface of the chip package housing 14 may be coplanar, forming a common planar surface. The metal layers 20 may be made of copper or a copper alloy, for example. One or more dielectric layers 22 may be disposed between the metal layers 20 to isolate the metal layers 20 from each other.For example, the dielectric layers 22 may be composed of at least one of an oxide or a nitride. Furthermore, the metal layers 20 arranged at different vertical levels may be electrically connected to one another by one or more via connections 24. It should be noted that the number of metal layers 20 and dielectric layers 22 illustrated is exemplary and may vary in other examples.

[0028] The electrical redistribution layer 18 may be configured to provide an electrical connection between at least one of the RF chips 2, 4 and the external interconnect elements 12. The electrical redistribution layer 18 may extend at least partially over the upper main surface of the chip package housing 14. Accordingly, at least one of the external interconnect elements 12 may be displaced laterally relative to the RF chips 2 and 4. Viewed in the z-direction, at least one of the external interconnect elements 12 may be arranged outside the footprints of the RF chips 2 and 4. In this case, the RF device 300 may be referred to as a fan-out device or a fan-out package. The area located outside the chip footprints may be referred to as the fan-out region. In the example of Fig. 3, the RF device 300 (or in particular the multi-chip package) may correspond to or include an eWLB (embedded wafer-level ball-grid array) package, i.e., a wafer-level package fabricated based on an eWLB (embedded wafer-level ball-grid array) process. In the case shown, the multi-chip package may correspond to a flip-chip package.

[0029] Returning to the example of Fig. 1, at least one of the RF transmission link 6 or the clock link 10 may be formed in the electrical redistribution layer 18. In the example of Fig. In Figure 3, only the RF transmission link 6 is illustrated, while a clock link is not shown for simplicity. At least one of the RF transmission link 6 or the clock link may include at least one of a microstrip line (e.g., a microstrip-based single-ended or differential line), a coplanar waveguide, a slot line, or the like. Said lines may be formed, for example, by the metal layers 20 and the dielectric layers 22 of the electrical redistribution layer 18.

[0030] Returning to the example of Fig. 1, one or more of the TX antennas and RX antennas may be arranged or formed in the electrical redistribution layer 18. The antennas may be electrically coupled to a respective RF chip in the multi-chip package. One or more of the antennas may include at least one of a planar antenna (such as a dipole antenna, a bowtie antenna, a rhombus antenna, or the like) or a slot antenna (e.g., fed via a coplanar waveguide). The antennas may, in particular, be formed by the metal layers 20 of the electrical redistribution layer 18. One or more of the antennas may be arranged in a fan-out region of the electrical redistribution layer 18. The antennas may, in particular, be configured to receive and / or transmit RF signals in the z-direction.

[0031] The RF device 400 of the Fig. 4 may include some or all of the features of the previously described RF devices according to the disclosure. In the illustrated example, the RF device 400 may correspond to or include a flip-chip package, but is not limited thereto. The RF device 400 may include multiple metal layers (see L1 to L4) 26 disposed above (or below) the RF chips 2, 4 and the chip package housing 14. The primary RF chip 2 may be electrically connected to at least one of the secondary RF chips 4 via the metal layer L1. In the example of Fig. 4, the RF transmission link 6 may be at least partially disposed within the metal layer L1. Furthermore, the RF device 400 may include a plurality of dielectric layers 28 disposed between the plurality of metal layers 26. The metal layers 26 and the dielectric layers 28 may extend substantially in a direction parallel to the main surfaces of the RF chips 2 and 4. The metal layers L2 and L3 may be electrically connected in the vertical direction via a plurality of via connections 30. Optionally, similar via connections may provide electrical connection in the vertical direction between the layers L1 and L2 and between the layers L3 and L4.

[0032] The RF device 400 may include at least one substrate-integrated waveguide (SIW) 32, which may be particularly designed for the transmission of mm-wave signals. Returning to the example of the Fig. 1, at least one of the RF transmission link 6 or the clock link 10 may include such an SIW. The SIW 32 may include the metal layers L2 and L3 and the dielectric layer 28 disposed between the metal layers L2 and L3. In addition, the SIW 32 may include the plurality of via connections 30 extending between the metal layers L2 and L3. The via connections 30 may be arranged to form a via fence. The SIW 32 may be formed by the dielectric layer 28 covered on both sides by the metal layers L2 and L3. Embedded in the dielectric layer 28 may be the via connections 30, which may form two parallel rows of metallic via holes that delimit a propagation area for RF signals (i.e., electromagnetic waves) to be transmitted via the SIW 32.The propagating electromagnetic waves can be confined within the dielectric layer 28 by the metal layers L2 and L3 on each of the two surfaces of the dielectric layer 28, as well as between the two rows of metallic vias 30 connecting the metal layers L2 and L3. In the illustrated example, the SIW 32 can be configured to transmit electromagnetic waves in the lateral direction, i.e., in the xy plane.

[0033] The RF device 400 (or in particular, the multi-chip package) may include an AFIP (Antenna Feed In Package). The AFIP may include a first launcher structure coupled to a first RF port of the primary RF chip 2 for transmitting an RF signal between the first RF port and a waveguide antenna. Additionally, the AFIP may include a second launcher structure coupled to a second RF port of the secondary RF chip 4 for transmitting an RF signal between the second RF port and the waveguide antenna.

[0034] A launcher structure of the RF device 400 may be configured to couple a signal from the SIW 32 into a waveguide (such as an air-filled waveguide) external to the multi-chip package and / or from the external waveguide into the SIW 32. The launcher structure may include at least one coupling element, which may be formed, for example, in the metal layer L3. The coupling element may include or correspond to one or more antennas, such as patch antennas. In the illustrated example, a launcher structure may be arranged substantially at the right end of the SIW 32. Coupling of RF signals from the SIW 32 into an external waveguide and vice versa is exemplified by a bidirectional arrow.

[0035] The RF device 500 of the Fig. 5 may include some or all of the features of the previously described RF devices according to the disclosure. The RF device 500 may include, for example, a primary RF chip 2 and four secondary RF chips 4A to 4D. Compared to the examples of Fig. 1 and Fig. 2, the RF chips 2 and 4 may be arranged in a different manner. The primary RF chip 2 may be configured to generate an LO signal and share the generated LO signal with the secondary RF chips 4A to 4D. As shown in the top view of Fig. 5, the selected arrangement of the RF chips 2 and 4 may provide fan-out regions 34 located to the left and right of the primary RF chip 2 (see dashed rectangles). The RF device 500 may include one or more antennas, which may be located in one or both of the fan-out regions 34, as previously described in connection with the example of Fig. 3 described.

[0036] The RF device 600 of the Fig. 6 may include some or all of the features of the previously described RF devices according to the disclosure. Returning to the example of Fig. 1, each of the secondary RF chips 4A to 4D may contain a plurality of TX antennas 36A to 36D or a plurality of RX antennas 38A to 38D. In the illustrated example, the primary RF chip 2 is not necessarily used to transmit and receive RF signals, but may in particular serve to generate at least one of an LO signal or a clock signal and to share the signal(s) with the secondary RF chips 4A to 4D. Returning to the example of the Fig. 5, the RX antennas 38A to 38B can be arranged in particular in the fan-out areas 34.

[0037] The RF device 700 of the Fig. 7 may include some or all of the features of the previously described RF devices according to the disclosure. The RF device 700 may include a microcontroller chip 40 configured to process signals transmitted to and / or received from at least one of the primary RF chip 2 and the secondary RF chips 4A to 4D. The microcontroller chip 40 may be arranged in the multi-chip package. Returning to the examples of Fig. 3 and Fig. 4, the microcontroller chip 40 can be embedded in the chip package housing 14, for example, laterally offset from the RF chips 2 and 4. In the example of Fig. 7, the electrical connections between the microcontroller chip 40 and the RF chips 2 and 4 are not shown for simplicity.

[0038] Fig. Figure 8 illustrates a flow diagram of a method for fabricating an RF device according to the disclosure. The method can be used to fabricate RF devices as previously discussed and thus can be read in conjunction with any of the preceding figures. The method of Fig. 8 is described in general terms to qualitatively specify aspects of the disclosure. It is understood that the method may further include other aspects. For example, the method may be extended to include any of the aspects described in connection with other examples according to the disclosure.

[0039] At 42, a primary RF chip and at least one secondary RF chip can be mounted in a single multi-chip package. The primary RF chip and the at least one secondary RF chip can form a cascaded RF system.

[0040] RF devices according to the disclosure can provide the following technical effects and surpass conventional devices in various aspects.

[0041] In conventional RF systems, RF chips can be cascaded on printed circuit boards. In contrast, RF devices as described herein can be cascaded within a package (e.g., in a backend process) and provide significantly smaller dimensions. For example, the footprint of the described multi-chip packages can be less than about 10 cm. 2 be.

[0042] Because the RF transmission link and / or the clock connection of a respective RF device can be located within the multi-chip package, a PCB for mounting the package can be free of signal transmission structures for transmitting RF signals. Such boards can be more cost-effective than boards that include RF transmission structures.

[0043] Due to the in-package arrangement of the RF transmission link and / or the clock connection, chip-to-package losses for each LO signal input / output interface can be avoided. In-package LO signal distribution can exhibit lower losses compared to conventional PCB solutions, which require the LO signals to be distributed over a larger area of the PCB.

[0044] RF devices according to the disclosure may include fan-out regions configured to provide suitable space for antennas of the multi-chip package. Examples

[0045] In the following, RF devices and methods for manufacturing such RF devices are explained using examples.

[0046] Example 1 is an RF device comprising: a primary RF chip; and at least one secondary RF chip, wherein the primary RF chip and the at least one secondary RF chip form a cascaded RF system, and wherein the primary RF chip and the at least one secondary RF chip are mounted together in a single multi-chip package.

[0047] Example 2 is an RF device according to Example 1, wherein the multi-chip package includes at least one external interconnect element configured to mechanically and electrically couple the multi-chip package to a circuit board.

[0048] Example 3 is an RF device according to example 1 or 2, wherein the multi-chip package comprises a chip package housing, wherein the primary RF chip and the at least one secondary RF chip are encapsulated in the chip package housing.

[0049] Example 4 is an RF device according to Example 3, wherein the chip package housing includes a molded connection.

[0050] Example 5 is an RF device according to any one of the preceding examples, wherein the primary RF chip and the at least one secondary RF chip are separated in a lateral direction, the lateral direction being parallel to a main surface of the primary RF chip and a main surface of the at least one secondary RF chip.

[0051] Example 6 is an RF device according to any one of the preceding examples, further comprising: an RF transmission link configured to transmit a local oscillator signal generated by the primary RF chip from the primary RF chip to the at least one secondary RF chip, wherein the RF transmission link is arranged in the multi-chip package.

[0052] Example 7 is an RF device according to any of the preceding examples, further comprising: a clock connection configured to transmit a clock signal between the primary RF chip and the at least one secondary RF chip, wherein the clock connection is arranged in the multi-chip package.

[0053] Example 8 is an RF device according to Example 2 and Example 6 and / or 7, wherein the multi-chip package comprises an electrical redistribution layer configured to provide an electrical connection between at least one of the RF chips and the at least one external interconnect element, wherein at least one of the RF transmission connection or the clock connection is formed in the electrical redistribution layer.

[0054] Example 9 is an RF device according to one or more of Examples 6 to 8, wherein at least one of the RF transmission link or the clock link comprises at least one of a microstrip line, a coplanar waveguide, or a slot line.

[0055] Example 10 is an RF device according to one or more of Examples 6 to 9, wherein at least one of the RF transmission link or the clock link comprises a substrate-integrated waveguide.

[0056] Example 11 is an RF device according to one or more of Examples 6 to 10, wherein: the RF transmission connection comprises a first self-feeding connection arranged externally to the primary RF chip, the first self-feeding connection configured to transmit the local oscillator signal from an RF output of the primary RF chip to an RF input of the primary RF chip, and / or the clock connection comprises a second self-feeding connection arranged externally to the primary RF chip, the second self-feeding connection configured to transmit the clock signal from a clock output of the primary RF chip to a clock input of the primary RF chip.

[0057] Example 12 is an RF device according to one or more of Examples 6 to 11, wherein: the RF transmission connection comprises a first star point configured to provide the local oscillator signal from the first star point to the primary RF chip and to the at least one secondary RF chip, and / or the clock connection comprises a second star point configured to provide the clock signal from the second star point to the primary RF chip and to the at least one secondary RF chip.

[0058] Example 13 is an RF device according to Example 12, wherein: a distance between the first star point and the primary RF chip and distances between the first star point and each of the at least one secondary RF chips are equivalent, and / or a distance between the second star point and the primary RF chip and distances between the second star point and each of the at least one secondary RF chips are equivalent.

[0059] Example 14 is an RF device according to any one of Examples 8 to 13, wherein the multi-chip package comprises at least one antenna electrically coupled to at least one of the RF chips, wherein the at least one antenna is disposed in the electrical redistribution layer.

[0060] Example 15 is an RF device according to Example 14, wherein the at least one antenna is arranged in a fan-out region of the electrical redistribution layer.

[0061] Example 16 is an RF device according to example 14 or 15, wherein the at least one antenna comprises at least one of a planar antenna or a slot antenna.

[0062] Example 17 is an RF device according to any of the preceding examples, further comprising: a circuit board, wherein the multi-chip package is mounted on the circuit board, wherein the circuit board is free of any signal transmission structures for transmitting RF signals.

[0063] Example 18 is an RF device according to any of the preceding examples, further comprising: a microcontroller chip configured to process signals sent to and / or received from the primary RF chip and the at least one secondary RF chip, wherein the microcontroller chip is arranged in the multi-chip package.

[0064] Example 19 is an RF device according to any one of the preceding examples, wherein a footprint of the multi-chip package is less than 10cm 2 is.

[0065] Example 20 is an RF device according to any of the preceding examples, wherein the primary RF chip and the at least one secondary RF chip each comprise a transceiver MMIC (monolithic microwave integrated circuit).

[0066] Example 21 is an RF device according to any of the preceding examples, wherein the multi-chip package comprises an eWLB (embedded wafer level ball grid array) package.

[0067] Example 22 is an RF device according to any of the preceding examples, wherein the multi-chip package includes an AFIP (Antenna Feed In Package).

[0068] Example 23 is an RF device according to Example 22, wherein: the AFIP comprises a first launcher structure coupled to a first RF port of the primary RF chip to transmit an RF signal between the first RF port and a waveguide antenna, and the AFIP comprises a second launcher structure coupled to a second RF port of the secondary RF chip to transmit an RF signal between the second RF port and the waveguide antenna.

[0069] Example 24 is a method of manufacturing an RF device, the method comprising: co-mounting a primary RF chip and at least one secondary RF chip in a single multi-chip package, wherein the primary RF chip and the at least one secondary RF chip form a cascaded RF system.

[0070] The terms "connected," "coupled," "electrically connected," and / or "electrically coupled" used in this description do not necessarily imply that the elements must be directly connected or coupled to each other. Intermediate elements may be provided between the "connected," "coupled," "electrically connected," and / or "electrically coupled" elements, respectively.

[0071] Furthermore, the words "over" and "on", which are used, for example, in relation to a material layer formed or arranged "over" or "on" a surface of an article, can be used herein to mean that the material layer can be arranged "directly on", i.e. in direct contact with the implied surface (e.g., formed, deposited, or the like). The words "over" and "on", which are used, for example, in relation to a material layer formed or arranged "over" or "on" a surface, can also be used herein to mean that the material layer can be arranged "indirectly on" the implied surface (e.g., formed, deposited, or the like), for example with one or more additional layers arranged between the implied surface and the material layer.

[0072] To the extent the terms "having," "containing," "including," "with," or variations thereof are used in the detailed description or claims, these terms are intended to be similarly inclusive as the term "comprising." That is, as used herein, the terms "having," "containing," "including," "with," "comprising," or the like are open-ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles "a," "an," and "the" are intended to include both the plural and the singular unless the context clearly indicates otherwise.

[0073] Furthermore, the words "exemplary" and "example" are used herein to serve as an example, instance, or illustration. Any aspect or design described herein as "exemplary" or "example" is not necessarily to be construed as advantageous over other aspects or designs. Rather, the use of the terms "exemplary" and "example" is intended to concretely illustrate concepts. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise stated or apparent from the context, "X substitutes A or B" means any of the natural, inclusive permutations. That is, if X substitutes A, X substitutes B, or X substitutes both A and B, then "X substitutes A or B" is satisfied in each of the foregoing instances.Additionally, the articles "a" and "an" as used in this application and the appended claims can generally be interpreted to mean "one or more" unless otherwise specified or the context clearly indicates that they refer to a singular form. Furthermore, at least one of A and B, or the like, generally means A or B, or both A and B.

[0074] Devices and methods for manufacturing devices are described herein. Remarks made in connection with a described device may also apply to a corresponding method, and vice versa. For example, if a particular component of a device is described, a corresponding method for manufacturing the device may include an act of providing the component in a suitable manner, even if such an act is not explicitly described or illustrated in the figures.

[0075] In particular, with regard to the various functions performed by the components described above (e.g., elements, resources, or the like), unless otherwise stated, the terms used to describe such components are intended to correspond to any component that performs the stated function of the described component (e.g., that is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the example embodiments of the disclosure illustrated herein. In addition, while a particular feature of the disclosure may have been disclosed with respect to only one of several embodiments, such feature may be combined with one or more other features of the other embodiments as desired and advantageous for a particular or particular application.

Claims

[1] A radio frequency (RF) device comprising: a primary RF chip (2); at least one secondary RF chip (4), wherein the primary RF chip (2) and the at least one secondary RF chip (4) form a cascaded RF system, and wherein the primary RF chip (2) and the at least one secondary RF chip (4) are mounted together in a single multi-chip package, wherein the RF device further comprises: an RF transmission link (6) configured to transmit a local oscillator signal generated by the primary RF chip (2) from the primary RF chip (2) to the at least one secondary RF chip (4), wherein the RF transmission link (6) is arranged in the multi-chip package, and wherein the RF transmission connection (6) comprises a first self-feeding connection arranged externally to the primary RF chip (2), the first self-feeding connection being configured to transmit the local oscillator signal from an RF output of the primary RF chip (2) to an RF input of the primary RF chip (2); and / or a clock connection (10) designed to transmit a clock signal between the primary RF chip (2) and the at least one secondary RF chip (4), wherein the clock connection (10) is arranged in the multi-chip package, and wherein the clock connection (10) comprises a second self-feeding connection arranged externally to the primary RF chip (2), the second self-feeding connection being configured to transmit the clock signal from a clock output of the primary RF chip (2) to a clock input of the primary RF chip (2). [2] The RF device of claim 1, wherein the multi-chip package comprises at least one external interconnect element (12) configured to mechanically and electrically couple the multi-chip package to a circuit board (16). [3] The RF device of claim 1 or 2, wherein the multi-chip package comprises a chip package housing (14), wherein the primary RF chip (2) and the at least one secondary RF chip (4) are encapsulated in the chip package housing (14). [4] The RF device of claim 3, wherein the chip package housing (14) comprises a molded connection. [5] RF device according to one of the preceding claims, wherein the primary RF chip (2) and the at least one secondary RF chip (4) are separated in a lateral direction, the lateral direction being parallel to a main surface of the primary RF chip (2) and a main surface of the at least one secondary RF chip (4). [6] RF device according to one of the preceding claims, wherein the multi-chip package comprises an electrical redistribution layer (18) configured to provide an electrical connection between at least one of the RF chips (2, 4) and the at least one external connection element (12), wherein at least one of the RF transmission connection (6) or the clock connection (10) is formed in the electrical redistribution layer (18). [7] RF device according to one of the preceding claims, wherein at least one of the RF transmission link (6) or the clock link (10) comprises at least one of a microstrip line, a coplanar waveguide or a slot line. [8] RF device according to one of the preceding claims, wherein at least one of the RF transmission link (6) or the clock link (10) comprises a substrate-integrated waveguide (32). [9] RF device according to one of the preceding claims, wherein: the RF transmission connection (6) comprises a first star point (8A) which is designed to provide the local oscillator signal from the first star point (8A) to the primary RF chip (2) and to the at least one secondary RF chip (4), and / or the clock connection (10) comprises a second star point (8B) which is designed to provide the clock signal from the second star point (8B) to the primary RF chip (2) and to the at least one secondary RF chip (4). [10] RF device according to claim 9, wherein: a distance between the first star point (8A) and the primary RF chip (2) and distances between the first star point (8A) and each of the at least one secondary RF chip (4) are the same, and / or a distance between the second star point (8B) and the primary RF chip (2) and distances between the second star point (8B) and each of the at least one secondary RF chip (4) are the same. [11] RF device according to one of claims 6 to 10, wherein the multi-chip package comprises at least one antenna electrically coupled to at least one of the RF chips (2, 4), the at least one antenna being arranged in the electrical redistribution layer (18). [12] The RF device of claim 11, wherein the at least one antenna is disposed in a fan-out region (34) of the electrical redistribution layer (18). [13] The RF device of claim 11 or 12, wherein the at least one antenna comprises at least one of a planar antenna or a slot antenna. [14] RF device according to one of the preceding claims, further comprising: a circuit board (16), wherein the multi-chip package is mounted on the circuit board (16), wherein the circuit board (16) is free of any signal transmission structures for transmitting RF signals. [15] RF device according to one of the preceding claims, further comprising: a microcontroller chip (40) configured to process signals sent to and / or received from the primary RF chip (2) and the at least one secondary RF chip (4), wherein the microcontroller chip (40) is arranged in the multi-chip package. [16] RF device according to one of the preceding claims, wherein a footprint of the multi-chip package is less than 10 cm 2 is. [17] RF device according to one of the preceding claims, wherein the primary RF chip (2) and the at least one secondary RF chip (4) each comprise a transceiver MMIC (monolithic microwave integrated circuit). [18] The RF device of any preceding claim, wherein the multi-chip package comprises an eWLB (embedded wafer level ball grid array) package. [19] RF device according to one of the preceding claims, wherein the multi-chip package comprises an AFIP (Antenna Feed In Package). [20] RF device according to claim 19, wherein: the AFIP comprises a first launcher structure coupled to a first RF port of the primary RF chip (2) to transmit an RF signal between the first RF port and a waveguide antenna, and the AFIP comprises a second launcher structure coupled to a second RF port of the secondary RF chip (4) to transmit an RF signal between the second RF port and the waveguide antenna. [21] A method of manufacturing an RF device, the method comprising: jointly mounting a primary RF chip (2) and at least one secondary RF chip (4) in a single multi-chip package, wherein the primary RF chip (2) and the at least one secondary RF chip (4) form a cascaded RF system, the method further comprising: Arranging an RF transmission link (6) in the multi-chip package, which is designed to transmit a local oscillator signal generated by the primary RF chip (2) from the primary RF chip (2) to the at least one secondary RF chip (4), wherein the RF transmission connection (6) comprises a first self-feeding connection arranged externally to the primary RF chip (2), the first self-feeding connection being configured to transmit the local oscillator signal from an RF output of the primary RF chip (2) to an RF input of the primary RF chip (2); and / or Arranging a clock connection (10) in the multi-chip package, which is designed to transmit a clock signal between the primary RF chip (2) and the at least one secondary RF chip (4), wherein the clock connection (10) comprises a second self-feeding connection arranged externally to the primary RF chip (2), the second self-feeding connection being configured to transmit the clock signal from a clock output of the primary RF chip (2) to a clock input of the primary RF chip (2).

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