DISPLAY DEVICE

Abstract

A display device (10) is disclosed which has a crack prevention structure in an outer region of a pad unit that mitigates crack defects without reducing the reliability of the panel. The display device (10) has a flexible printed circuit board (FPCB) and a data driver (D-IC) spaced apart from each other in a non-active region (NA) of a display panel (10'), a first pad unit (FOP_PAD) located beneath the flexible printed circuit board (FPCB), a second pad unit (COP_PAD) located beneath the data driver (D-IC), a dummy bump line (DBL1, ..., DBL6) surrounding the outside of the input pad (In_PAD) and one or more output pads (Out_PAD1, Out_PAD2) of the second pad unit (COP_PAD), and the branch lines of the dummy bump line (DBL1, ..., DBL6) can be arranged so that they run between the COP wiring, the first scan line (Scan1), the second and third scan lines (Scan2, Scan3) and the data line (Data).

Description

TECHNICAL AREA

[0001] This description refers to a display device, and in particular to a display device that prevents or at least reduces the occurrence of cracking in a chip-on-plastic (COP) process. BACKGROUND

[0002] Organic light-emitting display devices use a structure that allows the control of the electric current flowing through an organic light-emitting diode, using a number of thin-film transistors (or TFTs) to display an image, and touch operation using touch electrodes formed on a panel.

[0003] Such organic light-emitting displays can be folded or bent to form various shapes using flexible substrates. To increase the active area of ​​the display and reduce the surrounding area, the pad portion to which the printed circuit board is connected can be positioned behind the active area. For this purpose, a bending area can be provided where the flexible substrate bends.

[0004] This bending area can expose the flexible substrate, the wiring, and the insulating layers arranged on the substrate to bending simultaneously. To bend the panel, a minimal amount of insulating layers and wiring can be arranged within the bending section.

[0005] In an organic light-emitting display device, the driver can be manufactured in the form of a chip and mounted in the non-active area (NA) of the display panel. Examples of mounting methods include chip-on-glass (COG) / chip-on-plastic (COP), tape carrier package (TCP), chip-on-film (COF), and the like.

[0006] The PO (Plastic OLED) model, which uses the COP process, has the driver chip (D-IC) compressed by bonding it to the FOP (Film-on-Panel) pad (PAD) located in the inactive area.

[0007] Recently, to provide differentiated display devices, the thickness of the inorganic layer in the bent section was reduced to improve the strain structure. However, a disadvantage arises: cracks occur in the pad area due to the increased step height caused by pressure on the substrate, which has a low modulus of elasticity, during the bonding process of the driver chip (D-IC) on the upper side of the soft substrate. EXPLANATION

[0008] To eliminate the aforementioned disadvantage, the inventors of the present invention have invented a display device in which a crack prevention structure is arranged in an outer area of ​​a pad part, making it able to mitigate crack defects without reducing the reliability of the panel.

[0009] Furthermore, an objective to be achieved in the present description is to provide an indicator device in which non-use dummy bump leads are arranged in the outer region of a pad part where metal wires are sparsely arranged (low wiring arrangement density), as if the metal wires were evenly spaced in the middle region of the pad part (high wiring arrangement density), thereby enabling them to withstand the pressure generated during a bonding process and prevent the occurrence of cracks.

[0010] The objectives of this disclosure are not limited to what is described above, and other objectives and advantages of this disclosure not mentioned here can be understood from the following description and will be more clearly understood from the embodiments of the present invention. Furthermore, it is readily apparent that the objectives and advantages of this disclosure can be achieved by the means and combinations thereof described in the technical features of the invention. Various embodiments of this disclosure provide display devices according to the independent claims. Further embodiments are described in the dependent claims.

[0011] A display device according to an embodiment of the present disclosure can comprise a flexible printed circuit board (FPCB) and a data driver (D-IC) arranged such that they are spaced apart from each other in a non-active area of ​​a display panel, a first pad unit (FOP_PAD) can be arranged under the flexible printed circuit board (FPCB), and a second pad unit (COP_PAD) can be arranged under the data driver (D-IC), a dummy bump line (DBL) can be arranged to surround the outside of the input pad and one or more output pads of the second pad unit (COP_PAD), and the branch lines of the dummy bump line can be arranged to run between the COP wiring, the first scan line (Scan 1), the second and third scan lines (Scan 2, 3), and the data line (Data).

[0012] Additionally, a display device according to one embodiment of the present description may comprise: a plurality of light-emitting elements, each connected to one or more transistors in an active region of a display panel; a gate driver (GIP) that supplies a gate signal to the display panel; a data driver (D-IC) that is arranged in a non-active region of the display panel such that it is spaced apart from a flexible printed circuit board (FPCB); an insulating layer arranged on a plurality of light-emitting elements; a plurality of contact electrodes arranged on the insulating layer in the non-active region; a plurality of adhesive layers, each arranged on the plurality of contact electrodes; a first pad unit (FOP_PAD) arranged on an adhesive layer on one side of the plurality of adhesive layers beneath the flexible printed circuit board (FPCB);a second pad unit (COP_PAD) arranged on an adhesive layer on the other side of the plurality of adhesive layers under the data driver (D-IC); a dummy bump line (DBL) may be arranged to surround the outside of the input pad and one or more output pads of the second pad unit (COP_PAD), and the branch lines of the dummy bump line may be arranged to run between the COP wiring, the first scan line (Scan 1), the second and third scan lines (Scan 2, 3), and the data line (Data).

[0013] Specific details of other embodiments are included in the detailed description and drawings.

[0014] The present disclosure may include other means of achieving the objectives besides those mentioned above, which are clearly recognizable to a person skilled in the art from the following description.

[0015] A display device according to an embodiment of the present description has the effect of absorbing the pressure generated during the bonding of the pad part by arranging the dummy bump lines on the pad part in the non-active area of ​​the display panel.

[0016] Additionally, a display device according to an embodiment of the present description has an effect of preventing the occurrence of cracks in the pad part by arranging the dummy bump lines in the outer area of ​​the pad part, so that the metal wiring arrangement density therein is similar to that in the middle area of ​​the pad part in the non-active area of ​​the display panel.

[0017] Additionally, a display device according to an embodiment of the present description enables the prevention of a crack occurring in the contact part by buffering interference caused by a bump, using an insulating layer.

[0018] Additionally, according to the embodiment of the present description, it is possible to create an effect, to realize a display device having the display panel with improved yield, by preventing cracks from occurring in the pad part during the COP process.

[0019] Furthermore, according to one embodiment of the present description, it is possible to improve the quality of the display device by preventing the occurrence of cracks in the pad part in the non-active area of ​​the display panel and thus the occurrence of defects.

[0020] And according to one embodiment of the present description, it is possible to create an effect, to realize a narrow bezel, since the quality of the display device can be improved, thereby ensuring reliability.

[0021] The present disclosure may have other effects besides those mentioned above, which are clearly recognizable to a person skilled in the art from the description below.

[0022] In addition to the effects described above, specific effects of the present invention are described below, along with specific details for carrying out the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a top view showing a display device according to one embodiment of the present description; Fig. 2 is a top view of a display device according to one embodiment of the present description; Fig. 3 is a cross-sectional view showing a cross-section along a line AA' in Fig. 2 taken, according to one embodiment of the present description; Fig. Figure 4 is a view showing the configuration example of a second pad unit according to an embodiment of the present description; Fig. Figure 5 is a top view in which a first dummy bump line is arranged in a second pad unit according to an embodiment of the present description; Fig. 6 is a cross-sectional view, which is drawn along a line BB' in Fig. 5 is taken and in which the first dummy bump line is arranged in the second pad unit according to an embodiment of the present description; Fig. 7A and Fig. Figure 7B shows top views in which a second dummy bump line is arranged in a second pad unit according to another embodiment of the present description; Fig. Figure 8 is a top view in which a third dummy bump line is arranged on a second pad unit according to another embodiment of the present description; Fig. Figure 9 is a top view in which a fourth dummy bump line is arranged on a second pad unit according to another embodiment of the present description; Fig. Figure 10 is a top view showing a fifth dummy bump line arranged on a second pad unit according to another embodiment of the present description; and Fig. Figure 11 is a top view in which a sixth dummy bump line is arranged on a second pad unit according to another embodiment of the present description. DETAILED DESCRIPTION

[0023] The advantages and features of the present disclosure and a method for achieving these advantages and features will become apparent when reference is made to the following embodiments, which are described in detail later together with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, but may be embodied in various different forms. Therefore, these embodiments are presented only to complete the present disclosure and to fully inform a person skilled in the technical field to which the present disclosure belongs about the scope of the present disclosure.

[0024] A shape, size, ratio, angle, number, etc., disclosed in the drawings to illustrate embodiments of the present disclosure are illustrative, and the present disclosure is not limited to them. Throughout the entire detailed description, the same reference numerals refer to the same components. Furthermore, in describing the present disclosure, if it is determined that a detailed description of a related known technology may unnecessarily obscure the core of the present disclosure, its detailed description will be omitted. When the terms "comprise," "include," "have," "configure," and the like are used in this disclosure, the presence or addition of another element may be permissible unless the term "only" is used.When a term is used in a singular form to describe a component, it may have a meaning of a plural form unless explicitly stated otherwise.

[0025] It should be noted that each component is designed to have a tolerance or error range, even if there is no explicit description of it.

[0026] When describing a positional relationship between two elements, for example, when the positional relationship is described using "on", "above", "below", "below" and "next to", one or more other elements may be positioned between the two elements unless the term "only", "directly" or "near" is used.

[0027] When describing a temporal relationship, for example, when the temporal sequence is described as "after", "subsequent", "next", "before", or the like, the case that is not continuous may also be included unless the term "only" or "direct" is used.

[0028] It is understood that, although the terms "first," "second," etc., may be used herein to describe different elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, a first element referred to in the following description may represent a second element without deviating from the scope of the technical idea of ​​the present disclosure.

[0029] In describing components herein, terms such as A, B, (a), or (b) may be used. These terms are intended only to distinguish one component from another and do not restrict the nature, sequence, order, or number of components. When a component is described as being "connected to," "coupled with," "accessible to," "attached to," "involved," or "sticky" to another component, such component may be directly connected, coupled, in contact with, or attached to the other component, but it should be understood that they may also be indirectly connected to, coupled with, accessible to, attached to, involved, or sticky to yet another component interposed, unless expressly stated otherwise.

[0030] The phrase "at least one" should be understood to encompass any combination of one or more of the associated components. For example, the meaning of "at least one of the first, second, and third components" can include not only the first, second, or third component, but also any combination of two or more of the first, second, and third components.

[0031] In this disclosure, a “device” may include a display device, such as a liquid crystal module (LCM), an organic light-emitting diode (OLED) module, or the like, comprising a display panel and a driver for controlling the display panel. It may also include an electronic set device or set assembly (or set device), such as a notebook computer, a television set, a computer monitor, a vehicle or automotive device, or a mobile electronic device, such as a smartphone or an electronic tablet, which is a complete product or end product comprising an LCM, an OLED module, or the like.

[0032] Accordingly, the device in the present disclosure may itself comprise a display device, such as an LCM, an OLED module or the like, and even a set device, which is an applied product or an end-user device comprising an LCM, an OLED module or the like.

[0033] In some embodiments, an LCM or OLED module configured with a display panel, a driver, and the like may be referred to as a "display device," and an electronic device that is a complete product and includes an LCM or OLED module may be variously referred to as a "set device." For example, the display device may include a display panel of a liquid crystal display (LCD) or an organic light-emitting display (OLED) and a source PCB, which is a control device for driving the display panel. The set device may further include a set PCB, which is a set control device that is electrically connected to the source PCB and drives the entire set device.

[0034] The display panel used in one embodiment of the present disclosure can be any type of display panel, such as a liquid crystal display panel, an organic light-emitting diode (OLED) display panel, an electroluminescent display panel, or the like. This is not, however, an exhaustive list. For example, the display panel according to one embodiment of the present disclosure can be a display panel capable of generating sound by being vibrated by a vibration device. The display panel applied to the display device according to one embodiment of the present disclosure is not limited in terms of shape or size.

[0035] The individual features of the various embodiments of the present disclosure may be partially or wholly coupled or combined with one another in order to be connected and operated in a variety of technical ways, and each embodiment may be implemented independently or together in an associative relationship.

[0036] Embodiments of the present disclosure are described below with reference to the accompanying drawings and examples. The scale of the components shown in the drawings differs from the actual scale for the sake of simplicity of explanation and is not limited to the scale at which the drawings were produced.

[0037] A display device according to one embodiment of the present description is described below with reference to the drawings.

[0038] Fig. Figure 1 is a top view showing a display device according to one embodiment of the present description.

[0039] With reference to Fig. 1. A display device 10 according to an embodiment of the present description may comprise a flexible printed circuit board FPCB attached to a first pad unit FOP_PAD, a data driver D-IC attached to a second pad unit COP_PAD, and a display panel 10'.

[0040] The first pad unit, FOP_PAD, can have an FOP bump for bonding to the flexible printed circuit board (FPCB). In another example, the first pad unit, FOP_PAD, can be a standard FOP bump. The second pad unit, COP_PAD, can have a COP bump for bonding to the data driver, D-IC. In another example, the second pad unit, COP_PAD, can be a standard COP bump. The embodiments described herein are not limited to these.

[0041] The 10' display panel can have multiple areas. For example, the 10' display panel can have at least one active area AA, which is an area in which an image is displayed, and one inactive area NA, which is distinct from the active area AA. The active area AA has a pixel arrangement PXL formed within it. At least one inactive area NA, in which an image is not displayed, can have a driver circuit section and a dam section and can be provided on one side of the active area AA. For example, the inactive area NA can be adjacent to one or more sides of the active area AA.

[0042] The non-active area NA can be positioned outside the rectangular active area AA to surround it. However, it should be understood that the shapes of the active area AA and the adjacent arrangement of the non-active area NA and the active area AA are not specifically tailored to the requirements of the diagram. Fig. The illustrative display device 10 shown in Figure 1 is limited. The active area AA and the non-active area NA can also form any shape of the display device 10. Non-limiting examples of such shapes include pentagons, hexagons, circular shapes, oval shapes, and the like. However, this is not an exhaustive list.

[0043] Each pixel PX in the active area AA can contain multiple sub-pixels that can display colors such as red R, green G, blue B, and white W. These multiple sub-pixels are arranged in the active area AA, and each can contain one or more transistors. At least one transistor and one light-emitting element can be connected together.

[0044] Additionally, the pixel PX and the sub-pixel can each be associated with a pixel circuit comprising one or more TFTs manufactured on a substrate of the display device 10. Each pixel circuit can be electrically connected to a gate line GL and a data line DL to communicate with one or more driver circuits, for example, the gate driver GIP and the data driver D-IC, located in the non-active area NA of the display device 10.

[0045] The gate driver GIP supplies a gate signal SCAN to the display panel 10'.

[0046] One or more driver circuits can be implemented with TFTs configured within a non-active area NA, as shown in Fig. Figure 1 shows that, for example, the gate driver GIP can be implemented using a plurality of TFTs on the substrate of the display device 10. Non-limiting examples of circuits that can be implemented using TFTs on the substrate may include inverter circuits, multiplexers, and electrostatic discharge (ESD) circuits, but the embodiments of the present disclosure are not limited thereto.

[0047] Some of the driver circuits may be provided as integrated circuit (IC) chips and mounted within the non-active area NA of the display device 10 using chip-on-glass (COG) or a similar method. Alternatively, some of the driver circuits may be mounted on a different substrate and coupled to interconnection interface pads / bumps and pins located in the non-active area NA using flexible printed circuit board (FPCB), chip-on-film (COF), tape carrier package (TCP), or other suitable technologies.

[0048] In embodiments of the present disclosure, at least two different types of TFTs are used in a TFT substrate for a display. The types of TFTs used in some pixel circuits and some driver circuits can vary depending on the requirements of the display.

[0049] For example, a pixel circuit can be implemented with a TFT that has an oxide active layer (oxide TFT), and a driver circuit can be implemented with a TFT that has a low-temperature polycrystalline silicon active layer (LTPS TFT) and a TFT that has an oxide active layer. Unlike LTPS TFTs, oxide TFTs are not subject to pixel-to-pixel threshold voltage (Vth) variation problems. A uniform threshold voltage (Vth) can also be maintained in an array of pixel circuits for a display. The problem of threshold voltage (Vth) uniformity between TFTs implementing the driver circuit will have less of a direct impact on pixel brightness uniformity.

[0050] By using driver circuits on a substrate implemented with LTPS-TFTs, signals and data can be delivered to pixels at a higher clock rate than if all TFTs in a TFT panel were oxide TFTs. Therefore, it is possible to provide a display capable of high-speed operation without artifacts such as mura. For example, it is possible to select between oxide TFTs and LTPS-TFTs and utilize the advantages of each, combined with the design of the TFT panel.

[0051] With reference to Fig. 1. A low-potential driver voltage EVSS, a touch signal Touch and a gate control signal GCS, output by the flexible printed circuit board FPCB, are applied to the display panel 10', and a high-potential driver voltage EVDD is applied to the display panel 10' by the data driver D-IC.

[0052] The flexible printed circuit board FPCB can be electrically connected to the display panel 10' and can be located in the non-active area NA.

[0053] The data driver D-IC can be electrically connected to the display panel 10' and can be positioned in the non-active area NA at a distance from the flexible printed circuit board FPCB. The data driver D-IC can apply the high-potential driver voltage EVDD and a data voltage Vdata to the display panel 10'.

[0054] The first pad unit FOP_PAD can be arranged under the flexible printed circuit board FPCB in the non-active area NA such that it is electrically connected to the flexible printed circuit board FPCB.

[0055] The second pad unit COP_PAD can be positioned under the data driver D-IC in the non-active area NA in such a way that it is electrically connected to the data driver D-IC.

[0056] The gate driver GIP can be provided with a SCAN circuit connected to a switching transistor of a pixel PX to transmit a gate signal SCAN to it, which turns the switching transistor on / off, and an EM circuit connected to an emission signal line EM of a pixel PX.

[0057] Fig. Figure 2 is a panel top view of a display device according to an embodiment of the present description.

[0058] Referring to Fig. 2 The display panel 10' has the active area AA and the non-active area NA on a substrate which implements a display in the display device 10.

[0059] The non-active area NA of the display panel 10' can include an area surrounding the active area AA, a pad wiring part PADA, an FPCB connection part FC and a D-IC connection part DC.

[0060] The FPCB interconnect FC can have the first pad unit FOP_PAD, and the D-IC interconnect DC can have the second pad unit COP_PAD. The first pad unit FOP_PAD can be connected to the second pad unit COP_PAD via a variety of pad wiring configurations PDL.

[0061] Additionally, the active area AA can have a camera hole CA in it, in which a camera can be / be placed.

[0062] The pad wiring part PADA, the FPCB connection part FC and the D-IC connection part DC of the display panel 10' can have a structure that allows them to be bent towards the back of the display panel 10' so that they are located on the bottom side of the display panel 10'.

[0063] Fig. 3 is a cross-sectional view of a panel which has a cross-section extending along a line AA' in Fig. 2 is taken, according to one embodiment of the present description.

[0064] Referring to Fig. 3. A display device 10 according to an embodiment of the present description may have a buffer layer 111 arranged on a substrate 100 in the non-active region NA, a first insulating layer 110 arranged on the buffer layer 111, and a first gate insulating layer 120 arranged on the first insulating layer 110.

[0065] Here, substrate 100 can have a first polyimide layer PL-1, an intermediate layer IL on the previous layer, and a second polyimide layer PL-2 on the previous layer. Buffer layer 111 can have a first buffer layer M-BUF and a second buffer layer A-BUF on the previous layer.

[0066] Additionally, in the non-active area NA of the display device 10 there can be a third buffer layer O-BUF arranged on the first gate isolation layer 120, a second gate isolation layer 150 arranged on the third buffer layer O-BUF, and a fourth insulating layer 160 arranged on the second gate isolation layer 150.

[0067] Additionally, in the non-active area NA of the display device 10, a pad wiring PDL can be arranged on the fourth insulating layer 160; a second planarization layer 180 can be arranged on the pad wiring PDL; an insulating layer 800, 820 can be arranged on the second planarization layer 180; and a group consisting of a first contact electrode TE1, a sealing layer SPAC and a second contact electrode TE2 can be arranged on the pad wiring PDL and the insulating layer 800, 820.

[0068] In this, the insulating layer 800, 820 can have a contact buffer layer 800 and a contact insulation layer 820 and can be arranged to completely cover the second planarization layer 180 on the pad wiring PDL.

[0069] Additionally, in a non-active area NA, a first adhesive layer ACF1 can be arranged on the first contact electrode TE1 and the sealing layer SPAC, the first pad unit FOP_PAD can be arranged on the first adhesive layer ACF1, and the flexible printed circuit board FPCB can be arranged on the first pad unit FOP_PAD.

[0070] Additionally, in the non-active area NA, a second adhesive layer ACF2 can be arranged on the second contact electrode TE2, the second pad unit COP_PAD can be arranged on the second adhesive layer ACF2, and the data driver D-IC can be arranged on the second pad unit COP_PAD.

[0071] Although in Fig. Not shown in Figure 3, in the active region AA the insulating layer 800, 820 can be arranged on a light-emitting element, which will be described later. In the non-active region NA, the plurality of contact electrodes TE1, TE2 can be arranged on the insulating layer 800, 820, and the plurality of adhesive layers ACF1, ACF2 can be arranged in an associated manner on the plurality of contact electrodes TE1, TE2. Although not shown in the drawings, each of the plurality of adhesive layers ACF1, ACF2 can have an adhesive resin and a plurality of conductive particles arranged in the adhesive resin.

[0072] In the non-active area NA, the first pad unit FOP_PAD can be arranged on the first adhesive layer ACF1 of the plurality of adhesive layers, which is located on one side under the flexible printed circuit board FPCB, and the second pad unit COP_PAD can be arranged on the second adhesive layer ACF2 of the plurality of adhesive layers, which is located on the other side under the data driver D-IC.

[0073] The sealing layer SPAC, which is arranged between the first adhesive layer ACF1 on one side and the insulating layer 800, 820, can be positioned on the insulating layer 800, 820 such that it is in contact with the first contact electrode TE1 of the plurality of contact electrodes located on one side. The sealing layer SPAC can be configured to have a height greater than that of the first contact electrode TE1. However, the embodiments of the present disclosure are not limited to this. For example, the thickness of the sealing layer SPAC and the thickness of the first contact electrode TE1 can be equal to each other, so that the sealing layer SPAC and the first contact electrode TE1 can be configured to have the same height.

[0074] The SPAC sealing layer may contain an insulating organic material. This insulating organic material may consist of one or more materials, including benzocyclobutene (BCB), an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0075] The first pad unit FOP_PAD can be arranged under the flexible printed circuit board FPCB in the non-active area NA such that it is electrically connected to the flexible printed circuit board FPCB.

[0076] The second pad unit COP_PAD can be positioned under the data driver D-IC in the non-active area NA in such a way that it is electrically connected to the data driver D-IC.

[0077] The majority of contact electrodes TE1, TE2 can have the first contact electrode TE1, which is arranged on the insulating layer 800, 820 on one side under the first pad unit FOP_PAD in the non-active area NA, and a second contact electrode TE2, which is arranged on the insulating layer 800, 820 on the other side under the second pad unit COP_PAD in the non-active area NA.

[0078] The first adhesive layer ACF1 on one side can be arranged on the first contact electrode TE1 and the sealing layer SPAC on one side under the first pad unit FOP_PAD. The second adhesive layer ACF2 on the other side can be arranged on the insulating layer 800, 820 and the second contact electrode TE2 on the other side such that it covers the second contact electrode TE2 of the majority of contact electrodes located on the other side under the second pad unit COP_PAD.

[0079] Fig. Figure 4 is a view showing the configuration example of a second pad unit according to an embodiment of the present description.

[0080] With reference to Fig. 4. According to one embodiment of the present description, the second pad unit COP_PAD can have an input pad In_PAD and one or more output pads Out_PAD1, Out_PAD2.

[0081] The input pad In_PAD and the one or more output pads Out_PAD1, Out_PAD2 can each have a COP wiring, a first scan line Scan 1, a second and a third scan line Scan 2, 3 and a data line Data.

[0082] According to one embodiment of the present description, the second pad unit COP_PAD may have a dummy bump line DBL arranged to surround the outside of the input pad In_PAD and one or more output pads Out_PAD1, Out_PAD2.

[0083] The branch lines of the dummy bump line DBL can be arranged so that they run between the COP wiring, the first scan line Scan 1, the second and third scan lines Scan 2, 3 and the data line Data.

[0084] Fig. Figure 5 is a top view in which a first dummy bump line is arranged in a second pad unit according to an embodiment of the present description.

[0085] With reference to Fig. 5 in the second pad unit COP_PAD according to the embodiment of the present description, the dummy bump line DBL can have a first branch line ①, which is arranged at the left end in the first direction from top to bottom, a second branch line ②, which is arranged at the upper end in the second direction from left to right, a third branch line ③, which is arranged at the right end in the first direction from top to bottom, and a fourth branch line ④, which is arranged at the lower end in the second direction from left to right.

[0086] In the second pad unit COP_PAD, the dummy bump line DBL can have a fifth branch line ⑤, which is arranged to extend from the second branch line ② in the first direction.

[0087] In the second pad unit COP_PAD, the dummy bump line DBL can have a sixth branch line ⑥, which is arranged to extend from the second branch line ② in the first direction.

[0088] One side of the dummy bump line DBL can be arranged to run between the data line Data and the first scan line Scan 1. For example, in the dummy bump line DBL, the third branch line ③ can be arranged to run between the data line Data and the first scan line Scan 1 in the first direction from top to bottom.

[0089] At least one of the branch lines of the dummy bump line DBL, arranged in the first direction, can be positioned such that it runs between the first scan line Scan 1 and both the second and third scan lines Scan 2, 3. For example, in the dummy bump line DBL, the sixth branch line ⑥ can be positioned such that it runs between the first scan line Scan 1 and both the second and third scan lines Scan 2, 3 in the first direction from the second branch line ②.

[0090] At least one other branch of the dummy bump line DBL, arranged in the first direction, can be positioned such that it runs between the COP wiring and both the second and third scan lines Scan 2, 3. For example, in the dummy bump line DBL, the fifth branch ⑤ can be positioned such that it runs between the COP wiring and both the second and third scan lines Scan 2, 3 in the first direction from the second branch ②.

[0091] In the first dummy bump line DBL1, the wiring arranged to surround the outside of the input pad In_PAD and one or more output pads Out_PAD1, Out_PAD2 can have a width greater than the width of the branch line of the first dummy bump line DBL1. For example, in the first dummy bump line DBL1, the first through fourth branch lines ① to ④ and the sixth branch line ⑥ can have widths greater than the width of the fifth branch line ⑤.

[0092] Fig. 6 is a cross-sectional view, which is drawn along a line BB' in Fig. 5 is taken and in which the first dummy bump line is arranged in the second pad unit according to an embodiment of the present description.

[0093] With reference to Fig. 6. According to one embodiment of the present description, the second pad unit COP_PAD can have the buffer layer 111 on the substrate 100, the first insulating layer 110 on the buffer layer 111 and a gate wiring gate on the first insulating layer 110.

[0094] Substrate 100 can have a first polyimide layer PL-1, an intermediate layer IL on the previous layer, and a second polyimide layer PL-2 on the previous layer. Buffer layer 111 can have a first buffer layer M-BUF and a second buffer layer A-BUF on the previous layer.

[0095] The second pad unit COP_PAD can have the first gate isolation layer 120 on the first insulating layer 110 and the gate wiring Gate, the third buffer layer O-BUF on the first gate isolation layer 120 and the second gate isolation layer 150 on the third buffer layer O-BUF.

[0096] In the second pad unit COP_PAD, the fourth insulating layer 160 can be arranged on the second gate insulating layer 150, and the first lines SD1 of the COP wiring and the branch lines SD1' (⑤) of the first dummy bump line DBL1 can be arranged on the fourth insulating layer 160.

[0097] In the second pad unit COP_PAD, second wiring SD2 can be arranged on the first wiring SD1 of the COP wiring and the branch wires SD1' (⑤) of the first dummy bump line DBL1, and the second planarization layer 180 can be arranged on the fourth insulating layer 160, the second wiring SD2 of the COP wiring and the second wiring SD2 of the first dummy bump line DBL1.

[0098] In this case, the first wiring connections SD1 of the COP wiring can be electrically connected to the gate wiring GATE through respective contact holes.

[0099] Fig. 7A and Fig. Figure 7B shows top views in which a second dummy bump line is arranged in a second pad unit according to another embodiment of the present description.

[0100] With reference to Fig. 7A and Fig. 7B, in the second pad unit COP_PAD according to another embodiment of the present description, one or more output pads may have a first output pad Out_PAD1 and a second output pad Out_PAD2.

[0101] The input pad In_PAD, the first output pad Out_PAD1 and the second output pad Out_PAD2 can be arranged in the first direction, which is the vertical direction.

[0102] At least one of the branch lines of the second dummy bump line DBL2, which is arranged in the second direction, i.e., the horizontal direction, can be located between the input pad In_PAD and the first output pad Out_PAD1. For example, in the second dummy bump line DBL2, the seventh branch line (⑦) can be arranged such that it extends in the second direction, which is the horizontal direction, between the input pad In_PAD and the first output pad Out_PAD1.

[0103] At least one other branch of the second dummy bump line DBL2, arranged in the second direction, can be located between the first output pad Out_PAD1 and the second output pad Out_PAD2. For example, in the second dummy bump line DBL2, the eighth branch ⑧ can be arranged to extend in the second direction between the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0104] The difference between the in Fig. 7A and Fig. 7B shown second dummy bump line DBL2 and the one in Fig. The first dummy bump line shown in section 5, DBL1, is that, as in Fig. Figure 7B shows that the seventh branch line ⑦ is located between the input pad In_PAD and the first output pad Out_PAD1, and the eighth branch line ⑧ is located between the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0105] In the second dummy bump line DBL2, the wiring arranged to surround the outside of the input pad In_PAD and one or more output pads Out_PAD1, Out_PAD2 can have a width greater than the widths of the branch lines of the second dummy bump line DBL2. For example, in the second dummy bump line DBL2, the first through fourth branch lines ① through ④ and the sixth branch line ⑥ can have widths greater than the respective widths of the fifth branch line ⑤, the seventh branch line ⑦, and the eighth branch line ⑧.

[0106] A second dummy bump line DBL2 according to another embodiment of the present description may have a first branch line ① to an eighth branch line ⑧ with respect to the input pad In_PAD, the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0107] The second dummy bump line DBL2 can have a first branch line ① located at the left end, a second branch line ② located at the top end, a fourth branch line ④ located at the bottom end, a third branch line ③ located between the first scan line Scan 1 and the data line Data, a fifth branch line ⑤ located between the COP wiring and both the second and third scan lines Scan 2, 3, a sixth branch line ⑥ located between the first scan line Scan 1 and both the second and third scan lines Scan 2, 3, a seventh branch line ⑦ located between the input pad In_PAD and the first output pad Out_PAD1, and an eighth branch line ⑧ located between the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0108] Fig. Figure 8 is a top view in which a third dummy bump line is arranged on a second pad unit according to another embodiment of the present description. Fig. 9 is a plan view in which a fourth dummy bump line is disposed on a second pad unit according to another embodiment of the present specification.

[0109] With reference to Fig. 8 The third dummy bump line DBL3 can, according to another embodiment of the present description, have at least one or more branch lines ① to ⑧.

[0110] The at least one or more branch lines ① to ⑧ can connect the COP wiring, the first scan line Scan 1, the second and third scan lines Scan 2, 3 and the data line Data of the first output pad Out_PAD1 with the COP wiring, the first scan line Scan 1, the second and third scan lines Scan 2, 3 and the data line Data of the input pad In_PAD in the first direction between the input pad In_PAD and the first output pad Out_PAD1 as well as the COP wiring, the first scan line Scan 1, the second and third scan lines Scan 2, 3 and the data line Data of the second output pad Out_PAD2 with the COP wiring, the first scan line Scan 1, the second and third scan lines Scan 2, 3 and the data line Data of the first output pad Out_PAD1 in the first direction between the first Connect output pad Out_PAD1 and the second output pad Out_PAD2.

[0111] With reference to Fig. 9 In a fourth dummy bump line DBL4 according to another embodiment of the present description, a branch line ⑨ of at least one or more branch lines can be arranged in the second direction between the input pad In_PAD and the first output pad Out_PAD1, and another branch line ⑩ of it can be arranged such that it extends in the second direction between the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0112] Fig. Figure 10 is a top view in which a fifth dummy bump line is arranged on a second pad unit according to another embodiment of the present description. Fig. Figure 11 is a top view in which a sixth dummy bump line is arranged on a second pad unit according to another embodiment of the present description.

[0113] With reference to Fig. 10. According to another embodiment of the present description, the fifth dummy bump line DBL5 may have at least one or more branch lines ① to ⑧.

[0114] With respect to the input pad In_PAD, the first output pad Out_PAD1 and the second output pad Out_PAD2, at least one or more of the branch lines ① to ⑧ can be a first branch line ①, which is arranged on the left side, a second branch line ②, which is arranged on the upper side, a fourth branch line ④, which is arranged on the lower side, a third branch line ③, which is arranged on the right side, a fifth branch line ⑤ and a sixth branch line ⑥, which extend from the second branch line ② in the first direction such that they are arranged between the first branch line ① and the third branch line ③;a seventh branch line ⑦ extending in the second direction such that it is located between the input pad In_PAD and the first output pad Out_PAD1, and an eighth branch line ⑧ extending in the second direction such that it is located between the first output pad Out_PAD1 and the second output pad Out_PAD2.;

[0115] In this, each of the third branch line ③, the fifth branch line ⑤ and the sixth branch line ⑥ can be arranged such that it overlaps each of the input pad In_PAD, the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0116] With reference to Fig. 11. According to another embodiment of the present description, the sixth dummy bump line DBL6 can be plate-shaped and arranged to cover the input pad In_PAD, the first output pad Out_PAD1 and the second output pad Out_PAD2.

[0117] As described above, according to the embodiments of the present description, it is possible to provide a display device in which a crack prevention structure is arranged in an outer area of ​​a pad part, making it able to mitigate crack defects without reducing the reliability of the panel.

[0118] And according to the embodiments of the present description, it is possible to realize an indicator device in which non-use dummy bump (DBL) lines are arranged in the outer area of ​​a pad part where metal wires are arranged sparsely (low wiring arrangement density), as if the metal wires were arranged uniformly in the middle area of ​​the pad part (high wiring arrangement density), thereby enabling them to absorb the pressure generated during a bonding process and prevent the occurrence of cracks.

[0119] The display device according to the embodiments of the present disclosure can be described as follows.

[0120] A display device according to an embodiment of the present disclosure may comprise: a display panel having an active area and a non-active area; a flexible printed circuit board (FPCB) electrically connected to the display panel and located in the non-active area; a data driver (D-IC) electrically connected to the display panel and located in the non-active area at a distance from the flexible printed circuit board; a first pad unit (FOP_PAD) located below the flexible printed circuit board in the non-active area and electrically connected to the flexible printed circuit board;and a second pad unit (COP_PAD) located below the data driver in the inactive area, electrically connected to the data driver, comprising an input pad and one or more output pads, each of the input pad and the one or more output pads being able to have COP wiring, a first scan line, a second and a third scan line, and a data line, and wherein a dummy bump line (DBL) is able to be arranged to surround an outside of the input pad and the one or more output pads, and branch lines of the dummy bump line are able to be arranged to run between the COP wiring, the first scan line, the second and third scan lines, and the data line.

[0121] According to some embodiments of the present disclosure, one side of the dummy bump line may be arranged to run between the data line and the first scan line; a portion of a first direction of the branch lines of the dummy bump line may be arranged to run between the first scan line and both the second and the third scan lines; and another portion of the first direction of the branch lines of the dummy bump line may be arranged to run between both the second and the third scan lines and the COP wiring.

[0122] According to some embodiments of the present disclosure, the one or more output pads may have a first output pad and a second output pad; the input pad, the first output pad, and the second output pad may be arranged in a first direction; a portion of a second direction of the branch lines of the dummy bump line may be arranged between the input pad and the first output pad; and another portion of the second direction of the branch lines of the dummy bump line may be arranged between the first output pad and the second output pad.

[0123] According to some embodiments of the present disclosure, in the dummy bump line, wiring arranged to surround the outside of the input pad and the one or more output pads may have a width greater than the widths of the branch lines of the dummy bump line.

[0124] According to some embodiments of the present disclosure, the one or more output pads may comprise a first output pad and a second output pad;With respect to the input pad, the first output pad, and the second output pad, the dummy bump line may have a first branch line located at a left end, a second branch line located at an upper end, a fourth branch line located at a lower end, a third branch line located between the first scan line and the data line, a fifth branch line located between the COP wiring and both the second and third scan lines, a sixth branch line located between the first scan line and both the second and third scan lines, a seventh branch line located between the input pad and the first output pad, and an eighth branch line located between the first output pad and the second output pad.

[0125] According to some embodiments of the present disclosure, the one or more output pads may comprise a first output pad and a second output pad; and the dummy bump line may comprise at least one or more branch lines;The at least one or more branch lines can connect a COP wiring, a first scan line, a second and a third scan line, and a data line of the first output pad to a COP wiring, a first scan line, a second and a third scan line, and a data line of the input pad in a first direction between the input pad and the first output pad, wherein the at least one or more branch lines connect a COP wiring, a first scan line, a second and a third scan line, and a data line of the second output pad to the COP wiring, the first scan line, the second and the third scan lines, and the data line of the first output pad in a first direction between the first output pad and the second output pad.

[0126] According to some embodiments of the present disclosure, a branch line of the at least one or of the several branch lines can be arranged in a second direction between the input pad and the first output pad, and another branch line of it can be arranged such that it extends in a second direction between the first output pad and the second output pad.

[0127] According to some embodiments of the present disclosure, with respect to the input pad, the first output pad, and the second output pad, the at least one or more of the branch lines may be a first branch line arranged on a left side, a second branch line arranged on an upper side, a fourth branch line arranged on a lower side, a third branch line arranged on a right side, a fifth branch line, and a sixth branch line extending from the second branch line in a first direction such that they are arranged between the first branch line and the third branch line; a seventh branch line extending in a second direction such that it is arranged between the input pad and the first output pad;and an eighth branch line extending in the second direction such that it is positioned between the first output pad and the second output pad, each of which can be arranged from the third branch line, the fifth branch line and the sixth branch line to overlap with each of the input pad, the first output pad and the second output pad.

[0128] According to some embodiments of the present disclosure, the one or more output pads may have a first output pad and a second output pad, and the dummy bump line may be plate-shaped and arranged to cover the input pad, the first output pad and the second output pad.

[0129] According to some embodiments of the present disclosure, the second pad unit may comprise: a buffer layer 111 on a substrate 100; a first insulating layer 110 on the buffer layer; a gate line on the first insulating layer; a first gate insulating layer 120 on the first insulating layer and the gate line; a second buffer layer 0-BUF on the first gate insulating layer; a second gate insulating layer 150 on the second buffer layer; a fourth insulating layer 160 on the second gate insulating layer; first wires SD1 of the COP wiring and the branch lines SD1' (⑤) of the dummy bump lines on the third insulating layer; second wires SD2 on the first wires of the COP wiring and the branch lines of the dummy bump lines;and a second planarization layer 180 on the third insulating layer, the second wiring of the COP wiring and the second wiring of the dummy bump lines.;

[0130] Meanwhile, a display device according to another embodiment of the present description may comprise: a display panel having an active area and a non-active area; a plurality of sub-pixels arranged in the active area, each of the plurality of sub-pixels having one or more transistors; a plurality of light-emitting elements, each connected to the one or more transistors; a flexible printed circuit board electrically connected to the display panel and arranged in the non-active area; a data driver electrically connected to the display panel and arranged in the non-active area at a distance from the flexible printed circuit board; a gate driver supplying a gate signal to the display panel; and an insulating layer arranged on the plurality of light-emitting elements.a plurality of contact electrodes arranged on the insulating layer in the non-active area; a plurality of adhesive layers arranged in an associated manner on the plurality of contact electrodes; a first pad unit arranged on one side of an adhesive layer of the plurality of adhesive layers under the flexible printed circuit board in the non-active area and electrically connected to the flexible printed circuit board;and a second pad unit, which is arranged on a different side of the adhesive layer from the plurality of adhesive layers under the data driver in the inactive area and which is electrically connected to the data driver and which has an input pad and one or more output pads, wherein each of the input pad and the one or more output pads may have COP wiring, a first scan line, a second and a third scan line and a data line, and wherein a dummy bump line (DBL) may be arranged to surround an outside of the input pad and the one or more output pads, and branch lines of the dummy bump line may be arranged to run between the COP wiring, the first scan line, the second and third scan lines and the data line.

[0131] According to some embodiments of the present disclosure, each of the plurality of adhesive layers may comprise an adhesive resin and a plurality of conductive particles arranged in the adhesive resin.

[0132] According to some embodiments of the present disclosure, the plurality of contact electrodes in the non-active area may comprise: a contact electrode of one side, which is arranged on the insulating layer under the first pad unit in the non-active area; and a contact electrode of another side, which is arranged on the insulating layer under the second pad unit in the non-active area.

[0133] According to some embodiments of the present disclosure, a sealing layer can be arranged between the adhesive layer of one side and the insulating layer, and the sealing layer can be arranged on the insulating layer such that it is in contact with the contact electrode of one side of the plurality of contact electrodes.

[0134] According to some embodiments of the present disclosure, the adhesive layer of one side is arranged on the contact electrode of one side and the sealing layer under the first pad unit, the adhesive layer of the other side can be arranged on the insulating layer and the contact electrode of the other side such that it covers the contact electrode of another side of the plurality of contact electrodes under the second pad unit.

[0135] According to some embodiments of the present disclosure, a plurality of contact electrodes are arranged on the insulating layer in the active area, the plurality of contact electrodes may comprise: a first contact electrode arranged on a contact buffer layer which is arranged on the insulating layer, a contact insulation layer which is arranged on the contact buffer layer and the first contact electrode, and a second contact electrode which is arranged on the contact insulation layer.

[0136] According to some embodiments of the present disclosure, a touch line that transmits a touch signal may be arranged on the touch insulation layer, and the touch line may be made of the same material as the touch electrode (such as the first or the second touch electrode).

[0137] According to some embodiments of the present disclosure, the display device may further comprise: a dam arranged in the non-active area; and a connecting line extending from the non-active area and overlapping at least partially with a lower section of the dam.

[0138] According to some embodiments of the present disclosure, the non-active area may comprise: a bending section where the display panel is bent, a first bending wiring and a second bending wiring arranged in the bending section, wherein the first bending wiring may be connected to the connecting line and the second bending wiring may be connected to the touch line.

[0139] According to some embodiments of the present disclosure, the display device may further comprise: a third planarization layer on the second contact electrode; a protective layer arranged on the third planarization layer; and a cover glass arranged on the protective layer. [Explanation of reference symbols] 10 Display device 100 substrate 110 first insulating layer 150 second gate insulation layer 180 second leveling layer AA active area FPCB flexible printed circuit board D-IC data driver PX pixels EVDD, EVSS driver voltage DBL1, ..., DBL6 Dummy bump line Out_PAD1, Out_PAD2 Output Pad COP_PAD Second pad unit 10' Display panel 111 Buffer layer 120 first gate insulation layer 160 fourth insulating layer NA non-active area GCS Gate control signal GIP gate circuit component Touch signal PADA pad wiring part In_PAD Input Pad FOP_PAD First Pad Unit GATE Gate wiring

Claims

[1] Display device (10) which includes: a display panel (10') which has an active area (AA) and a non-active area (NA); a flexible printed circuit board (FPCB) electrically connected to the display panel (10'), wherein the flexible printed circuit board (FPCB) is located in the non-active area (NA); a data driver (D-IC) electrically connected to the display panel (10'), wherein the data driver (D-IC) is located in the non-active area (NA) and is spaced apart from the flexible printed circuit board (FPCB); a first pad unit (FOP_PAD) located under the flexible printed circuit board (FPCB) in the non-active area (NA), wherein the first pad unit (FOP_PAD) is electrically connected to the flexible printed circuit board (FPCB); and a second pad unit (COP_PAD) located below the data driver (D-IC) in the non-active area (NA), wherein the second pad unit (COP_PAD) is electrically connected to the data driver (D-IC) and has an input pad (In_PAD) and one or more output pads (Out_PAD1, Out_PAD2), wherein each of the input pad (In_PAD) and the one or more output pads (Out_PAD1, Out_PAD2) has chip-on-plastic (COP) wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data), and wherein a dummy bump line (DBL1, ..., DBL6) surrounds an outside of the input pad (In_PAD) and of one or more output pads (Out_PAD1, Out_PAD2) and branch lines of the dummy bump line (DBL1, ..., DBL6) run between the COP wiring, the first scan line (Scan1), the second scan line (Scan2), the third scan line (Scan3) and the data line (Data). [2] Display device (10) according to claim 1, wherein one side of the dummy bump line (DBL1, ..., DBL6) runs between the data line (Data) and the first scan line (Scan1), wherein part of a first direction of the branch lines of the dummy bump line (DBL1, ..., DBL6) runs between the first scan line (Scan1), the second scan line (Scan2) and the third scan line (Scan3), and wherein another part of the first direction of the branch lines of the dummy bump line (DBL1, ..., DBL6) is arranged such that it runs between the second scan line (Scan2), the third scan line (Scan3) and the COP wiring. [3] Display device (10) according to claim 2, wherein: that one or more output pads (Out_PAD1, Out_PAD2) have a first output pad (Out_PAD1) and a second output pad (Out_PAD2); the input pad (In_PAD), the first output pad (Out_PAD1) and the second output pad (Out_PAD2) are arranged in the first direction; a portion of a second direction of the branch lines of the dummy bump line (DBL1, ..., DBL6) is located between the input pad (In_PAD) and the first output pad (Out_PAD1); and another part of the second direction of the branch lines of the dummy bump line (DBL1, ..., DBL6) is located between the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [4] Display device (10) according to any one of claims 1 to 3, wherein in the dummy bump line (DBL1, ..., DBL6) a wiring which surrounds an outside of the input pad (In_PAD) and of one or more output pads (Out_PAD1, Out_PAD2) has a width which is greater than the widths of the branch lines of the dummy bump line (DBL1, ..., DBL6). [5] Display device (10) according to claim 1, wherein the one or more output pads (Out_PAD1, Out_PAD2) comprise a first output pad (Out_PAD1) and a second output pad (Out_PAD2), and wherein, with respect to the input pad (In_PAD), the first output pad (Out_PAD1) and the second output pad (Out_PAD2) comprise the dummy bump line (DBL1, ..., DBL6): a first branch line located at a left end; a second branch line located at an upper end; a fourth branch line located at a lower end; a third branch line between the first scan line (Scan1) and the data line (Data); a fifth branch line located between the COP wiring and both the second scan line (Scan2) and the third scan line (Scan3); a sixth branch line, which is arranged between the first scan line (Scan1) and both the second scan line (Scan2) and the third scan line (Scan3); a seventh branch line, arranged between the input pad (In_PAD) and the first output pad (Out_PAD1); and an eighth branch line located between the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [6] Display device (10) according to claim 1, wherein the one or more output pads (Out_PAD1, Out_PAD2) comprise a first output pad (Out_PAD1) and a second output pad (Out_PAD2), and the dummy bump line (DBL1, ..., DBL6) comprises at least one or more branch lines, wherein the at least one or more branch lines connect a COP wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data) of the first output pad (Out_PAD1) with a COP wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data) of the input pad (In_PAD) in a first direction between the input pad (In_PAD) and the first output pad (Out_PAD1), and wherein the at least one or the several branch lines connect a COP wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data) of the second output pad (Out_PAD2) with a COP wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data) of the first output pad (Out_PAD1) in the first direction between the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [7] Display device (10) according to claim 6, wherein a branch line from the at least one or the several branch lines is arranged in a second direction between the input pad (In_PAD) and the first output pad (Out_PAD1), and another branch line from the at least one or the several branch lines is arranged such that it extends in the second direction between the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [8] Display device (10) according to claim 7, wherein with respect to the input pad (In_PAD), the first output pad (Out_PAD1) and the second output pad (Out_PAD2) have at least one or more branch lines: a first branch line located on the left side; a second branch line located on an upper side; a fourth branch line, which is located on a lower side; a third branch line, located on the right side; a fifth branch line and a sixth branch line, extending from the second branch line in the first direction in such a way that they are arranged between the first branch line and the third branch line; a seventh branch line extending in the second direction such that it is positioned between the input pad (In_PAD) and the first output pad (Out_PAD1); and an eighth branch line extending in the second direction such that it is positioned between the first output pad (Out_PAD1) and the second output pad (Out_PAD2), where each of the third branch line, the fifth branch line and the sixth branch line overlaps with each of the input pad (In_PAD), the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [9] Display device (10) according to claim 1, wherein the one or more output pads (Out_PAD1, Out_PAD2) comprise a first output pad (Out_PAD1) and a second output pad (Out_PAD2), and wherein the dummy bump line (DBL1, ..., DBL6) is plate-shaped and covers the input pad (In_PAD), the first output pad (Out_PAD1) and the second output pad (Out_PAD2). [10] Display device (10) according to claim 1, wherein the second pad unit (COP_PAD) comprises: a buffer layer (111) on a substrate (100); a first insulating layer (110) on the buffer layer (111); a gate line (Gate) on the first insulating layer (110); a first gate insulation layer (120) on the first insulating layer (110) and the gate line (Gate); a second buffer layer (O-BUF) on the first gate isolation layer (120); a second gate isolation layer (150) on the second buffer layer (O-BUF); a third insulating layer (160) on the second gate insulating layer (150); first wiring of the COP wiring and the branch lines of dummy bump lines (DBL1, ..., DBL6) on the third insulating layer (160); second wiring on the first wiring of the COP wiring and the branch lines of the dummy bump lines (DBL1, ..., DBL6); and a second planarization layer (180) on the third insulating layer (160), the second wirings of the COP wiring and the second wirings of the dummy bump lines (DBL1, ..., DBL6). [11] Display device (10) which includes: a display panel (10') which has an active area (AA) and a non-active area (NA); a plurality of sub-pixels in the active area (AA), each of which has one or more transistors; a plurality of light-emitting elements, each connected to one or more transistors; a flexible printed circuit board (FPCB) electrically connected to the display panel (10'), wherein the flexible printed circuit board (FPCB) is located in the non-active area (NA); a data driver (D-IC) electrically connected to the display panel (10'), wherein the data driver (D-IC) is located in the non-active area (NA) and is spaced apart from the flexible printed circuit board (FPCB); a gate driver (GIP) that supplies a gate signal to the display panel (10'); an insulating layer that is arranged on the majority of light-emitting elements; a plurality of contact electrodes (TE1, TE2) arranged on the insulating layer in the non-active area (NA); a plurality of adhesive layers (ACF1, ACF2) arranged in an associated manner on the plurality of contact electrodes (TE1, TE2); a first pad unit (FOP_PAD) arranged on one side of an adhesive layer of the plurality of adhesive layers (ACF1, ACF2) under the flexible printed circuit board (FPCB) in the non-active area (NA), wherein the first pad unit (FOP_PAD) is electrically connected to the flexible printed circuit board (FPCB); and a second pad unit (COP_PAD) located on a different side of the adhesive layer from the plurality of adhesive layers (ACF1, ACF2) under the data driver (D-IC) in the non-active area (NA), wherein the second pad unit (COP_PAD) is electrically connected to the data driver (D-IC) and has an input pad (In_PAD) and one or more output pads (Out_PAD1, Out_PAD2), wherein each of the input pad (In_PAD) and the one or more output pads (Out_PAD1, Out_PAD2) has chip-on-plastic (COP) wiring, a first scan line (Scan1), a second scan line (Scan2), a third scan line (Scan3) and a data line (Data), and wherein a dummy bump line (DBL1, ..., DBL6) surrounds an outside of the input pad (In_PAD) and of one or more output pads (Out_PAD1, Out_PAD2) and branch lines of the dummy bump line (DBL1, ..., DBL6) are arranged to run between the COP wiring, the first scan line (Scan1), the second scan line (Scan2), the third scan line (Scan3) and the data line (Data). [12] Display device (10) according to claim 11, wherein each of the plurality of adhesive layers (ACF1, ACF2) comprises an adhesive resin and a plurality of conductive particles arranged in the adhesive resin. [13] Display device (10) according to claim 11 or 12, wherein the non-active area (NA) comprises the plurality of contact electrodes (TE1, TE2): a contact electrode (TE1) of one side, which is arranged on the insulating layer under the first pad unit (FOP_PAD) in the non-active area (NA); and a contact electrode (TE2) on the other side, which is located on the insulating layer under the second pad unit (COP_PAD) in the non-active area (NA). [14] Display device (10) according to claim 13, wherein a sealing layer (SPAC) is arranged between the adhesive layer (ACF1) of one side and the insulating layer, and the sealing layer (SPAC) is arranged on the insulating layer and is in contact with the contact electrode (TE1) of one side of the plurality of contact electrodes (TE1, TE2), wherein the adhesive layer (ACF1) of one side is arranged on the contact electrode (TE1) of one side and the sealing layer (SPAC) under the first pad unit (FOP_PAD), and wherein the adhesive layer (ACF2) of the other side is arranged on the insulating layer and the contact electrode (TE2) of the other side and the contact electrode (TE2) of the other side is covered by the plurality of contact electrodes (TE1, TE2) under the second pad unit (COP_PAD). [15] Display device (10) according to claim 14, wherein a plurality of touch electrodes are arranged on the insulating layer in the active area (AA), and wherein the plurality of touch electrodes comprise a first touch electrode arranged on a touch buffer layer arranged on the insulating layer, a touch insulation layer arranged on the touch buffer layer and the first touch electrode, and a second touch electrode arranged on the touch insulation layer. [16] Display device according to claim 15, which further comprises: a touch conductor that transmits a touch signal and is located on the touch insulation layer, wherein the touch conductor is made of the same material as the touch electrode. [17] Display device (10) according to claim 16, which further comprises: a dam located in the non-active area (NA); and a connecting line extending from the non-active area (NA) and overlapping at least partially with a lower section of the dam. [18] Display device (10) according to claim 17, wherein the non-active area (NA) has a bending section where the display panel (10') is bent, a first bending wiring and a second bending wiring arranged in the bending section, and wherein the first bending wiring is connected to the connecting line and the second bending wiring is connected to the touch line. [19] Display device (10) according to any one of claims 15 to 18, which further comprises: a third planarization layer on the second contact electrode; a protective layer arranged on top of the third planarization layer; and a cover glass that is placed on the protective layer.

Images