Circuits for distributing bitmaps for multiple pixelated light sources

Abstract

A lighting circuit may comprise: a receiver circuit configured to receive information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements, and a driver circuit connected to the receiver circuit via a first communication interface, wherein the driver circuit is configured to receive the information from the receiver circuit via the first communication interface.The driver circuit can be configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap via a second communication interface to another circuit for controlling the second set of lighting elements.

Description

TECHNICAL AREA

[0001] This disclosure relates to circuits for driving and controlling pixelated light sources, such as matrices of light-emitting diodes (LEDs) or other light sources comprising a plurality of lighting elements that are individually controllable. BACKGROUND

[0002] Driver circuits are commonly used to control voltage, current, or power at a load. For example, a light-emitting diode (LED) driver can control the power delivered to one or more LEDs. LED drivers can include voltage regulators, linear regulators, or DC-DC (direct current) power converters, such as buck-boost, buck-boost, or other DC-DC converters. DC-DC power converters can be particularly useful for LED drivers to regulate current through LED strings.

[0003] Some LED circuits incorporate a large number of individually controllable LEDs arranged in a two-dimensional matrix. These individually controllable LEDs can be directed to provide different lighting conditions (e.g., high beam or low beam) or to create advanced lighting effects. For example, advanced automotive headlight systems are a prime application of such LED circuits, where vehicle-related lighting effects can be used to enhance the driving experience and improve vehicle safety. SUMMARY

[0004] In general, this disclosure relates to circuits and communication techniques for handling the communication of information (e.g., pixel intensity values) to more than one pixelated light source. Some advanced lighting systems may include two or more pixelated light sources, such as two or more different arrays of light-emitting diodes (LEDs). Controlling the two or more pixelated light sources in a synchronized or complementary manner can present communication challenges. To address such challenges cost-effectively, the techniques and circuits of this disclosure can implement a type of bridging function within a driver circuit of a lighting module.Various communication interfaces can be used to supply information to the driver circuit and to supply information from the driver circuit to another driver circuit in a different lighting module.

[0005] In some examples, a lighting circuit may include: a receiver circuit configured to receive information from a processor, wherein the information includes a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements, and a driver circuit connected to the receiver circuit via a first communication interface, wherein the driver circuit is configured to receive the information from the receiver circuit via the first communication interface.The driver circuit can be configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap via a second communication interface to another circuit for controlling the second set of lighting elements.

[0006] In some examples, a lighting system may comprise a first lighting module and a second lighting module. The first lighting module may include: a receiver circuit configured to receive information from a processor, wherein the information includes a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements; and a first driver circuit connected to the receiver circuit via a first communication interface, wherein the driver circuit is configured to receive the information from the receiver circuit via the first communication interface. The second lighting module may include a second driver circuit and a second set of lighting elements.The first driver circuit can be configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap to the second lighting module via a second communication interface.

[0007] In some examples, a procedure includes receiving, by a receiver of a first lighting module, information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements within the first lighting module and a second bitmap associated with a second set of lighting elements within a second lighting module; receiving, by a driver circuit of the first lighting module, information from the receiver circuit via a first communication interface; extracting the first bitmap and the second bitmap from the information; storing the first bitmap within the first lighting module to control the first set of lighting elements;and outputting the second bitmap from the first lighting module to the second lighting module via a second communication interface to control the second set of lighting elements.

[0008] Details of these and other examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, the drawings, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a block diagram illustrating a system that includes a lighting system and a processor, in accordance with this revelation. Fig. Figure 2 is a block diagram illustrating a system that includes a vehicle headlight and an electronic control unit (ECU) in accordance with this disclosure. Fig. Figure 3 is a block diagram illustrating an example of logic that can be used in a driver circuit to enable bitmap data extraction and bitmap data distribution in accordance with this revelation. Fig. Figure 4 is a graph illustrating one possible technique for encoding two bitmaps in a data frame. Fig. Figure 5 is a conceptual diagram of a data structure that shows an encoding of two bitmaps in a data frame in accordance with Fig. 4 shows. Fig. Figure 6 is a conceptual diagram of another data structure showing an encoding of two bitmaps in a data frame. Fig. Figure 7 is a flowchart in accordance with techniques as described in this revelation. DETAILED DESCRIPTION

[0009] This disclosure relates to circuits and circuit communication techniques for handling the communication of information (e.g., pixel intensity values) to more than one pixelated light source. Pixelated light sources can comprise a large number of individually controllable light sources, such as individually controllable light-emitting diodes (LEDs) or individually controllable micromirrors. Individual pixel control of pixels within a large matrix of pixels can enable a wide variety of lighting effects and desirable lighting characteristics. Advanced automotive headlights are one application of pixelated light sources; however, pixelated light sources can be used in a wide variety of other lighting applications.

[0010] Some advanced lighting systems may incorporate two or more pixelated light sources, such as two or more different arrays of LEDs. Controlling these two or more pixelated light sources in a synchronized or complementary manner can present communication challenges. To address such challenges cost-effectively, the techniques and circuits described in this disclosure can implement a type of bridging function within a driver circuit of a lighting module. Various communication interfaces can be used to supply information to the driver circuit and to transmit information from the driver circuit to another driver circuit in a different lighting module.The bridge function enables the translation of pixel information into different formats for communication via various types of interfaces within the circuit, which can be very useful and cost-effective for various applications and situations.

[0011] Fig. Figure 1 is a block diagram illustrating a system comprising a lighting system 10 and a processor 12, in accordance with this disclosure. The lighting system 10 can include two different pixelated light sources, which may include so-called matrix light sources. In this example, the two different pixelated light sources are a first set of lighting elements 108 and a second set of lighting elements 118. Each of the first set of lighting elements 108 and the second set of lighting elements 108 can include a so-called matrix light source, which contains a large number (e.g., greater than 2000) of individually controllable lighting elements. In some examples, the controllable lighting elements may include LEDs, e.g., so-called micro-LEDs, arranged in a two-dimensional matrix.Micro-LEDs can, for example, generally refer to LEDs with lateral dimensions smaller than 100 micrometers, and in some cases smaller than 50 micrometers. The techniques described in this disclosure are not limited to micro-LED control but may also apply to other types of matrix light sources, such as those using micromirrors or other illumination elements instead of micro-LEDs. Furthermore, the communication techniques described here could also be used to control two different types of matrix light sources.

[0012] The techniques and circuitry described here can help to efficiently and cost-effectively control a first set of lighting elements 108 and a second set of lighting elements 108 in a coordinated manner. A processor 12 can be configured to communicate lighting information to the lighting system 10 via a high-speed link 126. In some examples, the high-speed link 126 can include an input interface that is effective for communicating video data, such as a Gigabit Multimedia Serial Link (GMSL). GMSL is a serial link technology that is particularly useful for video distribution in vehicles. In other examples, a different type of input interface can be used, such as Ethernet, Flat Panel Display (FPD) Link, OpenLDI, or MIPI Camera Serial Interface CSI-2.

[0013] GMSL is desirable as an input interface when the information for controlling the first set of lighting elements 108 and the second set of lighting elements 108 is encoded as bitmaps in data structures that are the same as or similar to video frames used to communicate video data. In this case, the information for controlling the first set of lighting elements 108 and the second set of lighting elements 108 can include bitmaps of intensity values ​​that specify the desired intensity of each of the LEDs in the first set of lighting elements 108 and the second set of lighting elements 108.A video frame can be generated to contain the information for controlling the first set of lighting elements 108 and the second set of lighting elements 108, and this disclosure describes useful ways of unpacking and communicating the information within a circuit system. In some examples, the circuits and techniques described here can simplify frame updates, synchronization, and error handling when two or more pixelated light sources are controlled in a coordinated manner.

[0014] A first lighting module 16 is an example of a lighting circuit in accordance with this disclosure. The first lighting module 16 includes a receiver circuit 102 configured to receive information from the processor 12, the information comprising a first bitmap associated with the first set of lighting elements 108 and a second bitmap associated with a second set of lighting elements 118. A first driver circuit 104 is connected to the receiver circuit 102 via a first communication interface 122. The first driver circuit 104 is configured to receive the information (e.g., a video frame containing the first and second bitmaps) from the receiver circuit 102 via the first communication interface 122. The first driver circuit 104 may include a first memory 106, e.g.,to store or buffer information in accordance with this disclosure.

[0015] The first driver circuit 104 can be configured to extract the first and second bitmaps from the information received by the receiver circuit 102 and to store the first bitmap in the first memory 106 for controlling the first set of lighting elements 108. Furthermore, the first driver circuit 104 can also be configured to output the second bitmap via a second communication interface 124 to another circuit (i.e., the second driver circuit 114 of the second lighting module 18) for controlling the second set of lighting elements 118. The second driver circuit 114 can include a second memory 116 for storing and using the second bitmap.By using the first driver circuit 104 as a bridge function to extract and communicate the second bitmap, the first communication interface 122 and the second communication interface 124 can be selected for a desirable and cost-effective design. In some cases, the first communication interface 122 can include a parallel video interface, which involves multiple wire connections, and the second communication interface 124 can include a serial interface, which involves a single connection. This is particularly desirable and effective when the number of lighting elements in the second set of lighting elements 118 is significantly smaller than the number of lighting elements in the first set of lighting elements.In other examples, however, other types of translation to different interfaces could be used, such as parallel-to-parallel (i.e., a parallel interface to another type of parallel interface), serial-to-parallel, or serial-to-serial (i.e., a serial interface to another type of serial interface). A driver circuit of this disclosure (e.g., the first driver circuit 104) can be configured to receive information comprising a first bitmap and a second bitmap via a first interface, store the first bitmap, buffer the second bitmap, and output the second bitmap via a second interface.

[0016] In some examples, the first communication interface 122 comprises a parallel interface containing a plurality of parallel connectors, and the second communication interface 124 comprises a serial interface containing a single connector. In this example, the first driver circuit 104 can be configured to receive the information, unpack and store the first bitmap, and repack the second bitmap and send it to another driver circuit in a different lighting module. A parallel-to-serial conversion of the second bitmap can be a useful design feature, especially in cases where the first bitmap is much larger than the second bitmap, which can be a typical design for an automotive headlight. In other examples, a serial-to-parallel, serial-to-serial conversion (e.g.,This can be achieved through conversion from one type of serial connection to another type of serial connection, or parallel-to-parallel (e.g., conversion from one type of parallel connection to another type of parallel connection). These other types of conversion via a driver circuit can be useful for spotlights or other lighting scenarios.

[0017] In a vehicle headlight example, the first bitmap can contain more than 20,000 intensity values ​​(e.g., approximately 100,000 values), and the first set of lighting elements can comprise more than 20,000 light-emitting diodes (e.g., approximately 100,000 LEDs). Additionally, the second bitmap can contain fewer than 20,000 intensity values ​​(e.g., approximately 16,000 values), and the second set of lighting elements can comprise fewer than 20,000 light-emitting diodes (e.g., approximately 16,000 LEDs). The first driver circuit 104 can be configured to drive the first set of lighting elements within a vehicle headlight module, with the information comprising a frame of headlight information, where the headlight information frame includes the first bitmap and the second bitmap. Various types of frame encoding are discussed below, and video formats can be used to encode information (e.g.,intensity values) can be useful for lighting elements.

[0018] In some examples, the first driver circuit 104 can be configured to synchronize updates of the first bitmap and the second bitmap based on a subsequent frame of the headlight information. In other words, using a common frame for both sets of bitmaps, along with unpacking and repacking, can provide a simple mechanism to ensure synchronization of headlight information when controlling both the first set of lighting elements 108 and the second set of lighting elements 118.

[0019] In some examples, the first driver circuit 104 can be configured to output the second bitmap after extracting the first and second bitmaps and in response to a valid cyclic redundancy check (CRC), which can help ensure data integrity and avoid unnecessary transmission of invalid information via the second communication interface 124.

[0020] In some examples, the first driver circuit 104 can be configured to start outputting the second bitmap while the first and second bitmaps are being extracted, which can improve the speed of sending information from the first driver circuit 104 to the second driver circuit 114 via the second communication interface 124.

[0021] In some examples, the first driver circuit 104 can be configured to drive the first set of lighting elements 108 based on the first bitmap in response to determining the end of previous pulse modulation (PM) cycles of the first set of lighting elements 108. In other words, the first driver circuit 104 can use the previous PM cycle associated with the first set of lighting elements 108 to define, based on the first bitmap with new PM signals in a new PM cycle, when lighting elements 108 are driven. In various examples, the first driver circuit 104 can be configured, using the various techniques described previously and here, to drive the first set of lighting elements 108 based on the first bitmap at a time when another circuit (i.e.,The second driver circuit (114) controls the second set of lighting elements (118) based on the second bitmap. The techniques of this disclosure can greatly simplify synchronized lighting between several different sets of lighting elements (e.g., several different LED matrix light sources operating in a jointly controlled manner).

[0022] To store the appropriate information for controlling the first set of lighting elements 108 and to translate and transmit the appropriate information for controlling the second set of lighting elements 118, in some examples the first driver circuit 104 can be configured to receive a frame containing the first bitmap and the second bitmap via the first communication interface 122, store the first bitmap (e.g., in the first memory 106), buffer the second bitmap (e.g., in a buffer within the first memory 106), and output the second bitmap via the second communication interface 124. In some examples, the first driver circuit 104 can further be configured to extract lines from the frame associated with the second bitmap and output these lines via the second interface.Line-by-line communication via the second communication interface 124, which includes a serial interface, may be sufficient and desirable to help reduce circuit costs compared to using another parallel interface.

[0023] Fig. Figure 2 is a block diagram illustrating a system that includes a vehicle headlight 20 and an electronic control unit (ECU 22) in accordance with this disclosure. Fig. 2 is consistent with Fig. 1, that the vehicle headlight 20 is an example of a lighting circuit 10 and the ECU 22 is an example of a processor 12. This in Fig. The second example shown is specifically for vehicle headlight lighting.

[0024] A complex system for the vehicle headlight 20 may be configured to support more than one pixelated light source through a local microcontroller, such as the ECU 22. To support multiple matrix LEDs, the ECU 22 might use several output interfaces or local deserializers, which could result in too many links from the ECU 22 to the vehicle headlight 20 (e.g., GMSL, FPD-Link, or others). Some new high-resolution vehicle lighting systems may include a 100k matrix (e.g., approximately 100,000 pixels) and a 16k matrix (e.g., approximately 16,000 pixels).Two different GMSL links could be used to support this type of high-resolution lighting system, but two high-resolution lighting systems using two different GMSL links cause undesirable costs and can create complexities for synchronization and frame updates in both the 100k and 16k matrices.

[0025] In some examples, the circuits of this revelation can address these problems and complexities by incorporating a "bridge" function within the 100k matrix driver 204. In the case of the Fig. In the example shown, the ECU 22 includes a transmitter circuit 212, and the vehicle headlight 20 includes a receiver circuit 202. The transmitter circuit 212 sends information to the receiver circuit 202 via the GMSL interface 226 or possibly another type of high-speed input interface.

[0026] The receiver circuit is configured to receive information comprising a first bitmap associated with a first set of lighting elements (e.g., 100K matrix 208) and a second bitmap associated with a second set of lighting elements (e.g., 16K matrix 218). The 100K driver circuit 204 is connected to the receiver circuit 202 via a first communication interface (e.g., a parallel interface 222). Accordingly, the 100K driver circuit 204 is configured to receive information from the receiver circuit 202 via the parallel interface 222. The 100K driver circuit 204 and the 16K driver circuit 214 may include application-specific integrated circuits (ASICs) that are directly connected to the 100K matrix 208 and the 16K matrix, respectively.Each pixel of the 100K matrix 208 can be directly connected to the 100K driver 204 and each pixel of the 16K matrix 218 can be directly connected to the 16K driver.

[0027] The 100K driver circuit 204 can be configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements (i.e. the 100K matrix 208) and to output the second bitmap via a second communication interface 224 (e.g. a serial interface) to the 16K driver circuit 214 for controlling the second set of lighting elements (i.e. the 16K matrix 218).

[0028] The 100k driver circuit 204 can be configured to extract only the information pertaining to the 16k matrix from an incoming large video frame containing both 100k and 16k information and send it via a serial VUART output. In this case, the 100k driver 204 can update the two frames in a "quasi"-synchronous manner by knowing the end of a transmission and having an XTAL to define the internal PWM synchronously with the 16k driver 204. This system offers the advantages of cost reduction and simplification and improvement of frame update synchronization for both the 100k matrix 208 and the 16k matrix 218. By including the information for controlling both the 100k matrix 208 and the 16k matrix 218 in a common video data frame, synchronized control can be improved and simplified.

[0029] Fig. Figure 3 is a block diagram illustrating an example of logic that can be used in a driver circuit to enable the bridging functions of a bitmap data extraction and a bitmap data distribution in accordance with this disclosure. Fig. The logic shown in 3 can, for example, be used in the first driver circuit 104. Fig. 1 or in the 100K driver circuit 204 from Fig. 2 to carry out techniques of this revelation.

[0030] As shown, a first-in-first-out (FIFO) buffer 302 can include a random-access memory (322) configured to buffer a 16K frame based on 8-bit inputs 312 arriving via a parallel interface. The finite-state machine (FSM) 304 performs read operations 332 to extract data in 32-bit increments 314. The FSM 304 then performs a write operation 334 to extract 8-bit outputs 316, which are stored in the second FIFO buffer 324 of a physical interface 306 that includes an output pin 318 connected to another driver circuit. In this way, the Fig. The logic shown in step 3 performs data extraction, translation into a different interface format, and output to another driver.

[0031] In some examples, the FIFO buffer 302 comprises 16k RAM 322, protected by a 32+7 error correction code (ECC), enabling the FIFO buffer 302 to buffer an entire 16k frame. 8-bit data can be buffered before being written (8-bit to 32-bit data). A RAM read / write arbiter (not shown) can be configured to write from an RGB interface (highest priority) and read from an internal protocol FSM (e.g., FSM 304).

[0032] The FSM 304 can be configured to pack the data into lines (256 bytes per line) and generate the line index (64 lines in total). In some examples, a 16-bit CRC can be calculated for each line and appended to the end. The physical interface 306 includes an asynchronous FIFO buffer that buffers the incoming 8-bit data. An FSM 330, associated with the physical interface 306, converts the 8-bit data frame from the protocol FSM into a serial output. A start and stop bit can be inserted for each 8-bit data frame. Inter-frame delay (bus idle) information can be generated at the end of each line.

[0033] In some examples, 8-bit inputs can be sent using UART functionality. An RGB interface sends the 8-bit data inputs directly to the VUART master. Data can be stored within a RAM (e.g., a 16k buffer, the entire frame) in a 32-bit format. Whenever data is available within the RAM, the VUART FSM 304 reads the data, unpacks it, calculates the CRC, and then sends everything to the physical interface 306, which generates the serial data output (VTX). An RGB interface sends a CRC available / OK message at the end of the 100k frame, and the VUART FSM 316 can wait for this information before sending the last 16k row (i.e., index 63). If the incoming 100k CRC check fails, the 16k CRC of the last line can be considered corrupted. If the data read from RAM returns a double-bit ECC error, the CRC can also be considered corrupted.The driver circuitry can invalidate the 16k frame at any time. In this case, the VUART master controlling the FSM 304 can send an intermediate frame delay and then jump to the last line (63), essentially resetting the 16k slave.

[0034] The circuits and techniques described can help support the trend toward centralized automotive processing by simplifying communication within a vehicle headlight when more than one pixelated light source could be used. This can be achieved by integrating an intelligent function into a main light source driver (i.e., a master) to decapsulate the video data from a single frame and distribute it to one or more other light source drivers (i.e., slaves).

[0035] Fig. Figure 4 is a graph illustrating a possible technique for encoding two bitmaps in a data frame in accordance with a so-called red-green-blue (RGB) video encoding. The first driver circuit 104 from Fig. 1 (or 100K driver circuit 204 from Fig. 2) can be configured to extract a first Bitmap 404 and a second Bitmap 402 from the information which, as in Fig. Figure 4 shows that the data is encoded based on horizontal black shoulder elements and vertical black shoulder elements, where the horizontal and vertical black shoulder elements define the sizes of the first and second bitmaps within the frame. The horizontal black shoulder elements correspond to the information referred to as HBP (Horizontal Back Porch) and HFP (Horizontal Front Porch). The vertical black shoulder elements correspond to the information referred to as VBP (Vertical Back Porch) and VFP (Vertical Front Porch). As shown in Figure 4, the data is encoded based on horizontal black shoulder elements and vertical black shoulder elements, where the horizontal black shoulder elements and vertical black shoulder elements define the sizes of the first and second bitmaps within the frame. The horizontal black shoulder elements correspond to the information referred to as VBP (Vertical Back Porch) and VFP (Vertical Front Porch). Fig. As can be seen in section 4, the horizontal and vertical black-shoulder elements define the sizes of the first and second bitmaps within the frame, and these data structures can be used by the driver circuit 104. Fig. 1 (or 100K driver circuit 204 from Fig. 2) Inform how to extract a first 404 bitmap and a second 402 bitmap from the information. A 32-bit CRC can always be sent during the period of the horizontal front black shoulder of the last transmitted line. In this case, the 32-bit CRC can be calculated over the data, including both the first 404 bitmap and the second 402 bitmap. Therefore, if the 32-bit CRC is incorrect, the entire frame of information can be discarded. Fig. Figure 5 is a conceptual diagram of a 502 data structure, which represents an encoding of two bitmaps in a data frame in accordance with Fig. 4 and the description above shows.

[0036] Fig. Figure 6 is a conceptual diagram of another data structure, showing the encoding of two bitmaps in a data frame 602. In this type of example, the data structure of the driver circuit that performs the decoding and translation may be known. In this type of example, the first driver circuit 104 may consist of Fig. 1 or the 100K driver circuit 204 from Fig. 2 be configured to extract the first bitmap and the second bitmap from the received information based on known and predefined sets of data associated with the first bitmap and the second bitmap within the frame.

[0037] For example, the first driver circuit can consist of 104 Fig. 1 or the 100K driver circuit 204 be configured to know the locations of a 16K bitmap 604 (i.e., an example of a first bitmap) and a 100K bitmap 606 (i.e., an example of a second bitmap) within a data structure 602, e.g., relative to an input signal (VCSN) or relative to clock signals VSCLK. Fig. Figure 6 illustrates a six-pin example with different pins for signals VCSN, VSCLK, and VS1[0], VS1[1], VS1[2], and VS1[3]. VS1[0], VS1[1], VS1[2], and VS1[3] can comprise four data channels containing the 16K bitmap 604 and 100K bitmap 606 at predefined locations within the data structure. The first driver circuit 104 from Fig. The 100K driver circuit 204 can decode overhead information 610 at predefined locations of the data structure 602 and can extract the 16K bitmap 604 and 100K bitmap 606 from known locations within the data structure 602. Translation or bridging functions, e.g., on the 16K bitmap 604, can then be performed on the data to improve communication between the 16K bitmap 604 and another circuit.

[0038] In some examples, frame updates can be handled by the first driver circuit 104. Fig. 1 or by the 100K driver circuit 204. The driver circuit 104, 204 can receive an entire frame containing a 16k bitmap and a 100k bitmap. The driver circuit 104, 204 can extract the 16k bitmap using configurable front and rear black-shoulder elements. The driver circuit 104, 204 can begin sending the data via V-UART to another driver circuit; for example, the 100K driver circuit 204 can send the 16k bitmap to the 16k driver circuit 214. The driver circuit 104, 204 appends the CRC to the end of each line and parity bit, as required by the 16k ASIC. The driver circuit 104, 204 also stores the 100K bitmap in an internal buffer while sending the 16K bitmap to another circuit.

[0039] Two scenarios are now described. In the first scenario, the 100K bitmap can be stored within local memory associated with driver circuit 104, 204 before the 16K bitmap is transmitted. In this case, driver circuit 104, 204 can be configured to update its 100K bitmap only when the full 16K bitmap is transmitted to the 16K driver circuit, and only if a CRC bit is valid. In the second scenario, the 16K bitmap can be sent before the complete 100K bitmap data has been stored locally by driver circuit 104, 204. In this case, the driver circuit 104, 204 can wait to send the last line of the 16K bitmap until the complete 100K bitmap has been extracted and stored in the driver circuit 104, 204 and the CRC bit has been validated.This second scenario can improve the speed of data communication with the 16K driver circuitry relative to the first scenario. A system integrator may need to ensure that the clock frequencies (RGB, VUART) are chosen in such a way that the 16K driver's watchdog timer does not expire.

[0040] In these or other cases, both 100K and 16K updates in a new data frame might only be applied after the previously executed PWM cycle has finished. In some examples, the system can use an external system clock reference, such as a crystal or a precise clock source from an external source, to define the PWM period for both the 16K and 100K driver circuits. This allows for better synchronization of frame updates by both driver circuits. Otherwise, in a worst-case scenario, frames might be updated with a PWM period difference between updates applied by the 16K and 100K driver circuits.

[0041] Some possible error correction (e.g., CRC behavior) is now described. In the event of problems sending data from the 100K driver to the 16K driver for any reason, the 16K driver may be configured to discard the received 16K bitmap and retain the previous 16K bitmap. In this case, the 100K driver may lack visibility into the problem, and it may be the function of processor 12 or ECU 22 to monitor the status and react accordingly. This is also the case if the 16K driver enters a safe state or a state that restricts the ability to receive frame updates. Again, it may be the task of processor 12 or ECU 22 to monitor the status and react accordingly.Nevertheless, this error correction behavior and monitoring by the processor 12 or the ECU 22 may not be strictly correlated with the bridge functions and may be a situation that needs to be considered for any data communication between drivers.

[0042] Fig. 7 is a flowchart in accordance with techniques according to this disclosure. A procedure in accordance with Fig. 7 can be obtained from the first driver circuit 104. Fig. 1 or by the 100K driver circuit 204, e.g., within a lighting module. The driver circuit 104, 204 can receive information from a receiver circuit 102, 202 from a processor 12, 22, comprising two or more bitmaps encoded in an encoded frame (701). In particular, the driver circuit 104, 204 can receive information from a receiver circuit 102, 202 from a processor 12, 22, the information comprising a first bitmap associated with a first set of lighting elements 108, 208 within a first lighting module, and a second bitmap associated with a second set of lighting elements 118, 218 within a second lighting module. The driver circuit 104, 204 receives the information via a first communication interface 122, 222 with the receiver circuit 102, 202 (702).The driver circuit 104, 204 extracts the first bitmap and the second bitmap from the information (703). The driver circuit 104, 204 stores the first bitmap (e.g., in a memory such as the one in ). Fig. 1 memory 106) shown for controlling the first set of lighting elements 108, 208 (704). The driver circuit 104, 204 also outputs the second bitmap via a second communication interface 124, 224 to a second lighting module (e.g. to the second driver circuit 114 or the 16K driver circuit 214) for controlling the second set of lighting elements 118, 218 (705).

[0043] In some examples, a lighting module may include a driver circuit 104, 204 configured to receive information comprising a first bitmap and a second bitmap via a first interface, store the first bitmap, buffer the second bitmap, extract lines associated with the second bitmap, and output the lines associated with the second bitmap via a second interface.

[0044] In some examples, the information comprises a frame and the procedure includes the following: Receiving, by the driver circuit 104, 204, the frame containing the first bitmap and the second bitmap, via the first communication interface 122, 222; storing the first bitmap in the driver circuit 104, 204; buffering the second bitmap in the driver circuit 104, 204; extracting lines from the frame associated with the second bitmap; and outputting, by the driver circuit 104, 204, the lines associated with the second bitmap, via the second communication interface 124, 224.

[0045] The techniques described in this disclosure can be implemented in a circuit arrangement. In various examples, the techniques can be implemented, at least partially, in a circuit arrangement, hardware, software, firmware, or any combination thereof. For example, various aspects of the described techniques can be implemented within one or more logic elements, processors (including one or more microcontrollers, microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs, field-programmable gate arrays (FPGAs)), or any other equivalent integrated or discrete logic circuit arrangement, as well as any combination of such components.The term “processor” or “processing circuit arrangement” can generally refer to any of the preceding logic circuit arrangements, alone or in combination with another logic circuit arrangement, or to any other equivalent circuit arrangement. A control unit comprising hardware can also perform one or more of the techniques of this disclosure.

[0046] Such a circuit arrangement, hardware, software, and firmware can be implemented within the same device or integrated circuit, or within separate devices, to support the various operations and functions described in this disclosure. Furthermore, any of the described units, modules, or components can be implemented together or separately as discrete but cooperating logic devices. The representation of different features as modules or units is intended to emphasize different functional aspects and does not necessarily imply that such modules or units must be implemented by separate hardware or software components.Rather, functionality associated with one or more modules or units can be performed by separate hardware or software components, or it can be integrated within common or separate hardware or software components.

[0047] It may also be possible for one or more aspects of this disclosure to be implemented in software, for example, particularly for logic or decision-making. In this case, the techniques described in this disclosure may also be implemented or encoded in a computer-readable medium, such as a computer-readable storage medium containing instructions. Instructions embedded or encoded in a computer-readable storage medium can cause a processor to perform the procedure, for example, when executing the instructions. In this example, the instructions may be stored in memory that may include random-access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electronically erasable programmable read-only memory (EEPROM), flash memory, or other computer-readable media.

[0048] The following clauses may illustrate one or more aspects of the revelation. Clause 1: A lighting circuit comprising: a receiver circuit configured to receive information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements;and a driver circuit connected to the receiver circuit via a first communication interface, wherein the driver circuit is configured to receive the information from the receiver circuit via the first communication interface, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap via a second communication interface to another circuit for controlling the second set of lighting elements. Clause 2: The lighting circuit according to Clause 1, wherein the first communication interface comprises a parallel interface including a plurality of parallel connectors, and wherein the second communication interface comprises a serial interface including a single connector, and wherein the receiver circuit is configured to receive the information from the processor via an input interface. Clause 3: The lighting circuit according to Clause 1 or 2, wherein the first bitmap contains more than 20,000 intensity values ​​and the first set of lighting elements contains more than 20,000 LEDs, and wherein the second bitmap contains less than 20,000 intensity values ​​and the second set of lighting elements contains less than 20,000 LEDs. Clause 4: The lighting circuit according to any of Clauses 1 - 3, wherein the driver circuit is configured to drive the first set of lighting elements within a vehicle headlight module, wherein the information comprises a frame of headlight information, the frame of headlight information containing the first bitmap and the second bitmap. Clause 5: The lighting circuit according to Clause 4, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the spotlight information based on horizontal black shoulder elements and vertical black shoulder elements, wherein the horizontal black shoulder elements and vertical black shoulder elements define sizes of the first bitmap and the second bitmap within the frame. Clause 6: The lighting circuit according to Clause 4, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the frame of spotlight information based on known and predefined sets of data associated with the first bitmap and the second bitmap within the frame. Clause 7: The lighting circuit according to one of clauses 4 - 6, wherein the driver circuit is configured to synchronize updates of the first bitmap and the second bitmap based on a subsequent frame of the headlight information. Clause 8: The lighting circuit according to any of clauses 1 - 7, wherein the driver circuit is configured to output the second bitmap after extracting the first bitmap and the second bitmap and in response to a valid cyclic redundancy check (CRC). Clause 9: The lighting circuit according to any of clauses 1 - 8, wherein the driver circuit is configured to begin outputting the second bitmap while the first and second bitmaps are extracted. Clause 9: The lighting circuit according to any of Clauses 1 - 9, wherein the driver circuit is configured to drive the first set of lighting elements based on the first bitmap in response to determining an end of previous pulse modulation (PM) cycles of the first set of lighting elements. Clause 11: The lighting circuit according to any of Clauses 1 - 10, wherein the driver circuit is configured to drive the first set of lighting elements based on the first bitmap at a time when the other circuit drives the second set of lighting elements based on the second bitmap. Clause 12: The lighting circuit according to any of Clauses 1-11, wherein the information comprises a frame and the driver circuit is configured to: receive the frame comprising the first bitmap and the second bitmap via the first communication interface; store the first bitmap; buffer the second bitmap; extract lines from the frame associated with the second bitmap; and output the lines associated with the second bitmap via the second communication interface. Clause 13: A lighting system comprising: a first lighting module comprising: a receiver circuit configured to receive information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements; and a first driver circuit connected to the receiver circuit via a first communication interface, wherein the first driver circuit is configured to receive the information from the receiver circuit via the first communication interface;and a second lighting module comprising a second driver circuit and a second set of lighting elements, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap to the second lighting module via a second communication interface. Clause 14: The lighting system according to Clause 13, wherein the first bitmap contains more than 20,000 intensity values ​​and the first set of lighting elements contains more than 20,000 LEDs, and wherein the second bitmap contains less than 20,000 intensity values ​​and the second set of lighting elements contains less than 20,000 LEDs. Clause 15: The lighting system according to Clause 13 or 14, wherein the first lighting module comprises a first vehicle headlight module and the first driver circuit is configured to drive the first set of lighting elements within the first vehicle headlight module, wherein the information comprises a frame of headlight information, the frame of headlight information including the first bitmap and the second bitmap. Clause 16: The lighting system according to Clause 15, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the spotlight information based on horizontal black shoulder elements and vertical black shoulder elements, wherein the horizontal black shoulder elements and vertical black shoulder elements define sizes of the first bitmap and the second bitmap within the frame. Clause 17: The lighting system according to Clause 15, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the frame of spotlight information based on known and predefined sets of data associated with the first bitmap and the second bitmap within the frame. Clause 18: The lighting system according to one of Clauses 15 - 17, wherein the first driver circuit is configured to synchronize updates of the first bitmap and the second bitmap based on a subsequent frame of the spotlight information. Clause 19: The lighting system according to any of Clauses 13 - 18, wherein the first driver circuit is configured to output the second bitmap to the second lighting module after the first driver has extracted the first bitmap and the second bitmap, and in response to a valid cyclic redundancy check (CRC). Clause 20: The lighting system according to any of clauses 13 - 19, wherein the first driver circuit of the first lighting module is configured to begin outputting the second bitmap to the second lighting module while the first and second bitmaps are being extracted. Clause 21: The lighting system according to any of Clauses 13 - 20, wherein the first driver circuit is configured to drive the first set of lighting elements based on the first bitmap in response to determining an end of previous pulse modulation (PM) cycles of the first set of lighting elements. Clause 22: The lighting system according to any of Clauses 13 - 21, wherein the first driver circuit is configured to drive the first set of lighting elements based on the first bitmap at a time when the second driver circuit is configured to drive the second set of lighting elements based on the second bitmap. Clause 23: A method comprising: receiving, through a receiver circuit of a first lighting module, information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements within the first lighting module and a second bitmap associated with a second set of lighting elements within a second lighting module; receiving, through a driver circuit of the first lighting module, the information from the receiver circuit via a first communication interface; extracting the first bitmap and the second bitmap from the information; storing the first bitmap within the first lighting module for controlling the first set of lighting elements;and outputting the second bitmap from the first lighting module to the second lighting module via a second communication interface to control the second set of lighting elements. Clause 24: The procedure according to Clause 23, wherein the information comprises a frame and the procedure includes: receiving, by the driver circuit, the frame comprising the first bitmap and the second bitmap, via the first communication interface; storing the first bitmap in the driver circuit; buffering the second bitmap in the driver circuit; extracting lines from the frame associated with the second bitmap; and outputting, by the driver circuit, the lines associated with the second bitmap via the second communication interface. Clause 25: The method according to Clause 23, wherein the first lighting module includes the lighting circuit according to any one of claims 1 - 12.

[0049] Various aspects have been described in this disclosure. These and other aspects fall within the scope of protection of the following claims.

Claims

[1] Lighting circuit comprising the following: a receiver circuit configured to receive information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements; and a driver circuit which is connected to the receiver circuit via a first communication interface, wherein the driver circuit is configured to receive the information from the receiver circuit via the first communication interface, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the information, to store the first bitmap for controlling the first set of lighting elements, and to output the second bitmap via a second communication interface to another circuit for controlling the second set of lighting elements. [2] Lighting circuit according to claim 1, wherein the first communication interface comprises a parallel interface including a plurality of parallel connectors, and wherein the second communication interface comprises a serial interface including a single connector, and wherein the receiver circuit is configured to receive the information from the processor via an input interface. [3] Lighting circuit according to claim 1 or 2, wherein the first bitmap contains more than 20,000 intensity values ​​and the first set of lighting elements contains more than 20,000 light-emitting diodes, and wherein the second bitmap contains less than 20,000 intensity values ​​and the second set of lighting elements contains less than 20,000 light-emitting diodes. [4] Lighting circuit according to one of claims 1 to 3, wherein the driver circuit is configured to control the first set of lighting elements within a vehicle headlight module, wherein the information comprises a frame of headlight information, the frame of headlight information including the first bitmap and the second bitmap. [5] Lighting circuit according to claim 4, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the headlight information based on horizontal black shoulder elements and vertical black shoulder elements, wherein the horizontal black shoulder elements and vertical black shoulder elements define sizes of the first bitmap and the second bitmap within the frame. [6] Lighting circuit according to claim 4, wherein the driver circuit is configured to extract the first bitmap and the second bitmap from the frame of headlight information based on known and predefined sets of data associated with the first bitmap and the second bitmap within the frame. [7] Lighting circuit according to any one of claims 4 to 6, wherein the driver circuit is configured to synchronize updates of the first bitmap and the second bitmap based on a subsequent frame of the headlight information. [8] Lighting circuit according to any one of claims 1 to 7, wherein the driver circuit is configured to output the second bitmap after extracting the first bitmap and the second bitmap and in response to a valid cyclic redundancy check (CRC). [9] Lighting circuit according to any one of claims 1 to 8, wherein the driver circuit is configured to start outputting the second bitmap while the first and second bitmaps are being extracted. [10] Lighting circuit according to any one of claims 1 to 9, wherein the driver circuit is configured to drive the first set of lighting elements based on the first bitmap in response to determining an end of previous pulse modulation (PM) cycles of the first set of lighting elements. [11] Lighting circuit according to any one of claims 1 to 10, wherein the driver circuit is configured to control the first set of lighting elements based on the first bitmap at a time when the further circuit controls the second set of lighting elements based on the second bitmap. [12] Lighting circuit according to any one of claims 1 to 11, wherein the information comprises a frame and the driver circuit is configured as follows: Receiving the frame containing the first bitmap and the second bitmap via the first communication interface; Saving the first bitmap; Buffering the second bitmap; Extracting lines from the frame that are associated with the second bitmap; and Outputting the lines associated with the second bitmap via the second communication interface. [13] Lighting system comprising the following: a first lighting module, which includes the following: a receiver circuit configured to receive information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements and a second bitmap associated with a second set of lighting elements; and a first driver circuit connected to the receiver circuit via a first communication interface, wherein the first driver circuit is configured to receive information from the receiver circuit via the first communication interface; and a second lighting module comprising a second driver circuit and a second set of lighting elements, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the information, store the first bitmap to control the first set of lighting elements, and output the second bitmap to the second lighting module via a second communication interface. [14] Lighting system according to claim 13, wherein the first bitmap includes more than 20,000 intensity values ​​and the first set of lighting elements includes more than 20,000 light-emitting diodes, and wherein the second bitmap includes less than 20,000 intensity values ​​and the second set of lighting elements includes less than 20,000 light-emitting diodes. [15] Lighting system according to claim 13 or 14, wherein the first lighting module comprises a first vehicle headlight module and the first driver circuit is configured to control the first set of lighting elements within the first vehicle headlight module, wherein the information comprises a frame of headlight information, the frame of headlight information including the first bitmap and the second bitmap. [16] Lighting system according to claim 15, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the headlight information based on horizontal black shoulder elements and vertical black shoulder elements, wherein the horizontal black shoulder elements and vertical black shoulder elements define sizes of the first bitmap and the second bitmap within the frame. [17] Lighting system according to claim 15, wherein the first driver circuit is configured to extract the first bitmap and the second bitmap from the frame of headlight information based on known and predefined sets of data associated with the first bitmap and the second bitmap within the frame. [18] Lighting system according to one of claims 15 to 17, wherein the first driver circuit is configured to synchronize updates of the first bitmap and the second bitmap based on a subsequent frame of the headlight information. [19] Lighting system according to any one of claims 13 to 18, wherein the first driver circuit is configured to output the second bitmap to the second lighting module after the first driver has extracted the first bitmap and the second bitmap, and in response to a valid cyclic redundancy check (CRC). [20] Lighting system according to any one of claims 13 to 19, wherein the first driver circuit of the first lighting module is configured to start outputting the second bitmap to the second lighting module while the first and second bitmaps are being extracted. [21] Lighting system according to any one of claims 13 to 20, wherein the first driver circuit is configured to drive the first set of lighting elements based on the first bitmap in response to determining an end of previous pulse modulation (PM) cycles of the first set of lighting elements. [22] Lighting system according to any one of claims 13 to 21, wherein the first driver circuit is configured to drive the first set of lighting elements based on the first bitmap at a time when the second driver circuit is configured to drive the second set of lighting elements based on the second bitmap. [23] Method comprising the following: Receiving, through a receiver circuit of a first lighting module, information from a processor, wherein the information comprises a first bitmap associated with a first set of lighting elements within the first lighting module and a second bitmap associated with a second set of lighting elements within a second lighting module; Received, by a driver circuit of the first lighting module, information from the receiver circuit via a first communication interface; Extracting the first bitmap and the second bitmap from the information; Storing the first bitmap within the first lighting module to control the first set of lighting elements; and Outputting the second bitmap from the first lighting module to the second lighting module via a second communication interface to control the second set of lighting elements. [24] The method of claim 23, wherein the information comprises a frame and the method includes the following: Received, by the driver circuit, the frame comprising the first bitmap and the second bitmap, via the first communication interface; Storing the first bitmap in the driver circuit; Buffering the second bitmap in the driver circuit; Extracting lines from the frame that are associated with the second bitmap; and Output, from the driver circuit, of the lines associated with the second bitmap via the second communication interface.

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