BUILDING ELEMENT AND METHOD FOR MANUFACTURING A BUILDING ELEMENT

Abstract

component (100) comprising a semiconductor body (2), a first metal layer (3) and a second metal layer (4), wherein - the first metal layer is positioned between the semiconductor body and the second metal layer, - the semiconductor body has a first semiconductor layer (21) on a side facing away from the first metal layer, a second semiconductor layer (22) on a side facing the first metal layer and an active layer (23) arranged between the first semiconductor layer and the second semiconductor layer, - the component has a via (24) which extends through the second semiconductor layer and the active layer to electrically contact the first semiconductor layer, - the second metal layer has a first sub-area (41) and a second sub-area (42) laterally separated from the first sub-area by a space (40), wherein the first sub-area is electrically connected to the via via the first metal layer, and - in top view, the first metal layer completely covers the lateral gap, - wherein the second metal layer (4) is laterally bounded by a shaped body (10) made of electrically insulating potting compound, the shaped body (10) being formed as a continuous unit, - the first sub-area (41) and the second sub-area (42) border the shaped body (10) in lateral directions, and - the space (40) is filled with the electrically insulating potting compound of the molded body, wherein the molded body (10) and the second metal layer (4) together with the first sub-area (41) and the second sub-area (42) form a support (1) of the component, and the laterally spaced sub-areas (41) and (42) are held together by the molded body (10).

Description

[0001] A component and a method for manufacturing a component are specified.

[0002] DE 10 2010 025320 A1 discloses an optoelectronic component comprising a semiconductor chip having a sequence of semiconductor layers with an active layer, and a carrier connected to the semiconductor chip by means of a metallic interconnect layer, wherein the semiconductor chip has a first electrical connection area and a second electrical connection area, the first electrical connection area and the second electrical connection area facing the carrier, the carrier having a first electrical back contact and a second electrical back contact on a rear side facing away from the semiconductor chip, the first electrical back contact being electrically connected to the first electrical connection area by means of at least one via passing through the carrier, the second electrical back contact having at least one via passing through the carrier,is electrically connected to the second electrical connection area, and wherein the first and / or the second electrical back contact is connected to the first and / or the second electrical connection area by at least one further via passing through the carrier.

[0003] DE 10 2007 022947 A1 discloses an optoelectronic semiconductor body with a sequence of semiconductor layers comprising an active layer suitable for generating electromagnetic radiation and a first and a second electrical connection layer, wherein the semiconductor body is designed to emit electromagnetic radiation from a front side, the first and the second electrical connection layer are arranged on a rear side opposite the front side and are electrically insulated from each other by means of a separating layer, the first electrical connection layer, the second electrical connection layer and the separating layer overlap laterally, and wherein a portion of the second electrical connection layer extends from the rear side through a breakthrough in the active layer towards the front side.

[0004] DE 10 2012 217533 A1 discloses a method for manufacturing an optoelectronic component, wherein a layer structure with a first semiconductor layer and a second semiconductor layer with an active zone for generating light is grown on a growth substrate, a mirror layer is applied to the first semiconductor layer facing away from the growth substrate, the layer structure is attached to a first side of a support via a bonding layer, and electrical contacts for the layer structure are introduced via a second side of the support, and wherein the growth substrate is removed.

[0005] US Patent 2009 / 0283787 A1 discloses a light-emitting diode with a diode region comprising an n-doped layer and a p-doped layer, having opposing first and second surfaces, an ohmic anode contact that contacts the p-doped layer and is located on the first surface, a transparent insulating layer located outside the anode contact on the first surface, and a reflective cathode contact that contacts the n-doped layer and extends through the transparent insulating layer and is located on the transparent insulating layer, such that it almost completely covers the first surface outside the anode contact.

[0006] US Patent 2011 / 0297987 A1 discloses an optical semiconductor device comprising a light-emitting layer, a first main surface, a second main surface, a first electrode and a second electrode, wherein the second main surface is opposite the first main surface and the first and second electrodes are arranged on the second main surface, a transparent layer arranged on the first main surface, a first metal post arranged on the first electrode, a second metal post arranged on the second electrode, and a sealing layer arranged on the second main surface that covers a side face of the light-emitting layer and seals the metal posts, leaving an end section of the metal posts exposed.

[0007] One task is to specify a component with high mechanical stability. Furthermore, a cost-effective method for manufacturing such a component is specified.

[0008] According to at least one embodiment of a component, it comprises a semiconductor body with an active layer. In particular, the active layer is a pn junction region. The active layer can be configured as a single layer or as a sequence of multiple layers. During operation of the component, the active layer emits, for example, electromagnetic radiation, such as in the visible, ultraviolet, or infrared spectral range. Alternatively, during operation of the component, the active layer can absorb electromagnetic radiation and convert it into electrical signals or electrical energy.

[0009] Furthermore, the semiconductor body comprises, for example, a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type, wherein the active layer is arranged, in particular, between the first semiconductor layer and the second semiconductor layer. For example, the semiconductor body may consist exclusively of semiconductor layers. The layers of the semiconductor body can be deposited layer by layer onto a growth substrate using an epitaxial process. The growth substrate can then be removed from the semiconductor body, so that the device is, in particular, free of a growth substrate.

[0010] The semiconductor body has a first principal surface, which is specifically configured as a radiation transmission surface of the device. The radiation transmission surface can be structured, thereby increasing the radiation coupling efficiency. In particular, the first principal surface of the semiconductor body is formed by a surface of the first semiconductor layer. The semiconductor body has a second principal surface facing away from the first principal surface, which is, for example, formed by a surface of the second semiconductor layer. Specifically, the first principal surface and the second principal surface bound the semiconductor body in the vertical direction.

[0011] A vertical direction is understood to be a direction that is perpendicular, and in particular perpendicular, to a principal plane of extension of the active layer. For example, the vertical direction is perpendicular to the first and / or the second principal face of the semiconductor body. A lateral direction, on the other hand, is understood to be a direction that runs along, and in particular parallel, to the principal plane of extension of the active layer. The vertical and lateral directions are preferably perpendicular to each other.

[0012] According to at least one embodiment of the component, the semiconductor body has at least one recess. The recess extends, in particular, from the second main surface through the second semiconductor layer and the active layer into the first semiconductor layer. A recess is understood to be an opening in the semiconductor body that, in particular, does not extend completely through the semiconductor body. In other words, the recess forms a blind hole in the semiconductor body that is, in particular, completely surrounded by the semiconductor body in the lateral direction. The semiconductor body can have a plurality of such recesses.

[0013] To form a through-hole for electrical contacting of the first semiconductor layer from the side of the second main surface, the recess can be filled with an electrically conductive material.

[0014] According to at least one embodiment of the component, it has a first metal layer. The first metal layer is arranged, for example, on a side of the semiconductor body facing the second main surface. In a top view of the semiconductor body, the first metal layer covers the via or the recess, in particular completely. The first metal layer may, for example, only cover parts of the semiconductor body. For instance, the first metal layer is an electroplated metal layer.

[0015] According to at least one embodiment of the component, it has a second metal layer. The first metal layer is arranged at least partially between the semiconductor body and the second metal layer. Preferably, the second metal layer has a first sub-region and a second sub-region laterally spaced from the first sub-region, wherein the first sub-region is electrically connected to the via via the first metal layer. The first sub-region may partially abut directly onto the first metal layer. The second sub-region is, in particular, electrically insulated from the first sub-region. In a top view of the semiconductor body, the first metal layer and the second sub-region together cover, for example, at least 90%, preferably at least 95%, of the total area of ​​the active layer. For example, the second sub-region overlaps with the first metal layer.The first metal layer and the second sub-area can also together completely cover the entire active layer or the entire semiconductor body.

[0016] According to at least one embodiment of the component, it has a gap in the lateral direction between the first and second sub-regions of the second metal layer. This gap is partially, and preferably completely, covered by the first metal layer when viewed from above. In particular, the gap and the sub-regions of the second metal layer are extensively covered by the first metal layer. In the lateral direction, the first metal layer projects beyond the second metal layer. For example, the active layer or the entire semiconductor body has no area that is not covered by the first metal layer or by the second metal layer, especially by the second sub-region.

[0017] In at least one embodiment of a component, the component comprises a semiconductor body, a first metal layer, and a second metal layer, the first metal layer being arranged between the semiconductor body and the second metal layer. The semiconductor body has a first semiconductor layer on a side facing away from the first metal layer, a second semiconductor layer on a side facing the first metal layer, and an active layer arranged between the first and second semiconductor layers. The component has a via that extends, in particular in a vertical direction, through the second semiconductor layer and the active layer to electrically connect the first semiconductor layer.The second metal layer comprises a first sub-region and a second sub-region laterally separated from the first sub-region by a gap, the first sub-region being electrically connected to the via via via the first metal layer. In a top view, the first metal layer completely covers the gap laterally.

[0018] Lateral complete coverage of the gap means, in particular, that the first and second sub-areas are completely bridged by the first metal layer at least along one lateral direction. Preferably, the entire gap has no area not covered by the first metal layer. The lateral complete coverage of the gap by the first metal layer has a mechanically stabilizing effect on the component, thus largely preventing the formation of a mechanical weak point, especially at the location of the gap. The first metal layer can be designed as a mechanically stabilizing, preferably as a self-supporting layer of the component. In other words, the first metal layer can be designed as an independent layer that is mechanically stable against the effects of gravity even without the mechanical support of further layers.

[0019] The first metal layer is particularly continuous. For example, the first metal layer has a thickness between 5 µm and 50 µm inclusive in the vertical direction. Preferably, the thickness of the first metal layer is between 10 µm and 50 µm inclusive, for example, between 10 µm and 30 µm inclusive. With such a configuration of the first metal layer, sufficient mechanical stability of the component is ensured even at the location of the gap, or particularly at the locations of the gaps between different sub-regions of the second metal layer. The first metal layer can completely cover the via or the recess of the semiconductor body.

[0020] According to at least one embodiment of the component, the first metal layer has at least one opening or a plurality of laterally spaced openings. For electrical contacting of the second semiconductor layer, the second sub-region of the second metal layer extends, for example, through the opening or openings. In a top view of the semiconductor body, the second sub-region overlaps, in particular, with the first metal layer, so that the first metal layer and the second sub-region together completely cover, for example, the active layer, and in particular the entire semiconductor body.

[0021] The second metal layer can be designed as a mechanically stabilizing layer of the component. In particular, the second metal layer has a greater thickness than the first metal layer. For example, the thickness of the second metal layer is between 10 µm and 200 µm inclusive, approximately between 10 µm and 100 µm, and especially between 50 µm and 100 µm inclusive. In particular, the thickness of the second metal layer is at least 2 times, approximately 4 times, or 10 times the thickness of the first metal layer. For example, the ratio of the thickness of the second metal layer to the thickness of the first metal layer is between 2 and 10 inclusive, and approximately between 5 and 10 inclusive.

[0022] Due to the complete lateral coverage of the active layer or the entire semiconductor body by the first metal layer and the second part of the second metal layer, no area of ​​the active layer or semiconductor body remains without mechanical support from the first or second metal layer. This results in a higher manufacturing yield. In particular, damage to the components caused by mechanical stress during component singulation is avoided. Furthermore, the component is significantly more resistant to subsequent processing steps, such as removing the growth substrate (especially by etching or laser removal), soldering, structuring, transport, or placement.

[0023] According to the invention, the second metal layer is laterally bounded by a molded body, for example, an electrically insulating potting compound. The first and second sub-regions are preferably embedded in the molded body. For example, the first and second sub-regions each border the molded body on all sides in the lateral direction. The molded body can be formed in one piece, i.e., as a single, continuous piece. The space between the two sub-regions is at least partially, and in particular completely, filled with a material from the molded body. The laterally spaced sub-regions of the second metal layer can thus be held together by the molded body and, together with the molded body, form a mechanically particularly stable support for the component.

[0024] According to at least one embodiment of the component, the first and second metal layers are each electroplated metal layers. In particular, the metal layers comprise a metal such as nickel, copper, or other metals. The first and / or second metal layer may comprise a first metal and at least one other material. The proportion of the first metal is, in particular, at least 90 atomic percent, for example, at least 95 or 98 atomic percent of the first and / or second metal layer. For example, the metal layers are designed with respect to their materials such that the first metal layer has a higher modulus of elasticity than the second metal layer and / or the second metal layer has a higher thermal conductivity than the first metal layer. For example, the first metal layer comprises nickel and the second metal layer comprises copper.Such a design of the metal layers reduces the overall height of the component while maintaining sufficient mechanical stability of the component and high efficiency of heat dissipation through the second metal layer.

[0025] According to at least one embodiment of the component, it has a reflective layer. The reflective layer is arranged, for example, between the semiconductor body and the first metal layer. The reflective layer is, in particular, electrically conductive. When the first metal layer is applied by means of an electroplating process, the reflective layer can thus serve as a seed layer for the first metal layer to be applied. The first metal layer is, in particular, directly adjacent to the reflective layer. It is also possible that the first metal layer is applied indirectly to the reflective layer. The first metal layer and the reflective layer can have a common opening or a plurality of common openings through which the second part extends.The reflective layer completely covers the active layer or the entire semiconductor body, particularly up to the common aperture(s). The reflective layer reflects, for example, the radiation generated during the operation of the device towards the radiation transmission surface of the device, thereby increasing the efficiency of the device.

[0026] According to at least one embodiment of the component, a current distribution layer is arranged between the semiconductor body and the first metal layer. The current distribution layer covers the common opening completely. It can also completely cover the gap between the two layers. The current distribution layer is electrically conductive and borders, for example, the second part of the second metal layer.

[0027] According to at least one embodiment of the component, an electrically conductive connection layer is arranged between the semiconductor body and the reflective layer. In particular, the connection layer is radiation-reflecting. Together with the reflective layer, the connection layer can completely cover the active layer or the entire semiconductor body in a top view. The connection layer is adjacent to the semiconductor body, for example, to the second semiconductor layer, and is electrically connected to the second part of the second metal layer.

[0028] According to at least one embodiment of the component, it has a diffusion barrier layer, which is arranged, for example, between the semiconductor body and the current distribution layer. The diffusion barrier layer prevents metal atoms or metal ions from migrating from the current distribution layer, the mirror layer, or the metal layers into the terminal layer and the active layer, and thus prevents damage to these components.

[0029] According to at least one embodiment of the component, it has a first insulating layer that, in particular, encloses the connection layer, the diffusion barrier layer, and the current distribution layer in a lateral direction. The first insulating layer extends vertically, for example, only as far as the semiconductor body and is designed as a passivation layer.

[0030] The component can have a second insulating layer, which is arranged, in particular, between the semiconductor body and the reflective layer. This prevents direct electrical contact between the lateral flanks of the semiconductor body and the reflective layer. For example, the second insulating layer completely surrounds the first insulating layer, the via, and especially the semiconductor body in lateral directions at least along one vertical height.

[0031] According to at least one embodiment of the component, the reflective layer has at least one groove. The groove extends, for example, vertically through the reflective layer. In particular, the groove runs laterally along the edge, for example, along at least one edge of the component. It is also possible that the reflective layer is divided by the groove into two or more separate regions. For example, the groove extends from a first edge to a second edge of the reflective layer, in particular an edge opposite the first. The groove can enhance the mechanical bond to subsequently applied layers.

[0032] For example, the reflective layer can have multiple grooves—such as two spaced-apart grooves—each located at the edge of the component. These edge regions are, in particular, areas along the laterally extending edges of the component. The grooves can thus encircle the component along its edge. For example, the spaced-apart grooves form a frame that encloses, in particular, the common opening(s) or the via. Specifically, the grooves define the reflective layer laterally. That is, the entire reflective layer can be surrounded by the grooves. For example, the reflective layer may be continuous. The groove(s) are, in particular, bridged or filled by the first metal layer. For example, the grooves are partially or completely filled with a material from the first metal layer.

[0033] According to at least one embodiment of the component, it has an intermediate insulating layer. The intermediate insulating layer is arranged between the first and the second metal layer. The second portion of the metal layer is electrically insulated from the first metal layer, for example, by the intermediate insulating layer. In particular, the intermediate insulating layer and the first metal layer have a common opening or a plurality of common openings through which the second portion extends. Furthermore, the intermediate insulating layer can have another opening through which the first portion extends, for example, to the first metal layer. The first portion of the second metal layer is, in particular, in direct electrical contact with the first metal layer.

[0034] According to at least one embodiment of the component, it is designed to be electrically contactable on the back side via the first and second sub-regions of the second metal layer. In other words, the component can be electrically connected to an external voltage source via a back side of the component facing away from the radiation transmission surface. The radiation transmission surface is thus, in particular, free of electrical contacts or conductor tracks.

[0035] In one embodiment of a method for manufacturing one or more of the components described above, the first metal layer and the second metal layer are each deposited by an electroplating process. The first metal layer is deposited, in particular, onto an electrically conductive reflective layer formed on the semiconductor body. To form the via, the reflective layer can at least partially or completely fill the recess in the semiconductor body. The reflective layer is structured, or applied in a structured manner, such that it has at least one opening or a plurality of openings. The reflective layer serves, in particular, as a starter layer for the deposition of the first metal layer. It is also possible to deposit an electrically conductive layer onto the reflective layer and then deposit the first metal layer directly onto this electrically conductive layer.

[0036] After the first metal layer is applied, the intermediate insulating layer is applied, for example, onto the first metal layer. Before applying the second metal layer, an electrically conductive layer can be applied directly onto the intermediate insulating layer. The electrically conductive layer is then, in particular, structured or partially covered with an electrically insulating lacquer layer, so that the second metal layer can be applied directly onto the structured or partially covered electrically conductive layer, for example, using an electroplating process.

[0037] In particular, the second metal layer, with its first and second sub-regions on the intermediate insulating layer, is configured such that the second sub-region extends through the opening or multiple openings of the reflective layer to electrically contact the second semiconductor layer. The first sub-region borders the first metal layer, particularly in the area of ​​another opening in the intermediate insulating layer, and is electrically connected to the first semiconductor layer via the first metal layer, the reflective layer, and the via.

[0038] The process is particularly suitable for manufacturing the component described above. The features described in connection with the component can therefore also be applied to the process, and vice versa.

[0039] Further advantages, preferred embodiments and further developments of the component result from the following in conjunction with the Fig. 1, Fig. 2, Fig. 3 to Fig. 4 illustrated examples.

[0040] They show: Fig. 1 a schematic representation of an exemplary embodiment of a component, Fig. 2 a schematic representation of a lateral section of the embodiment of a component, Fig. 3 a schematic representation of a further embodiment of a component, and Fig. 4 A schematic representation of a lateral section of a further embodiment of a component.

[0041] Identical, similar, or similarly functioning elements are marked with the same reference symbols in the figures. The figures are schematic representations and therefore not necessarily to scale. Rather, comparatively small elements, and especially layer thicknesses, may be exaggerated for clarity.

[0042] A first embodiment of a component is shown in Fig. Figure 1 is shown schematically. The device 100 comprises a support 1 and a semiconductor body 2 arranged on the support. The semiconductor body 2 has a first semiconductor layer 21, a second semiconductor layer 22, and an active layer 23 arranged between the first and second semiconductor layers. The first semiconductor layer 21, the second semiconductor layer 22, and the active layer 23 can each have one or more doped or undoped layers. The active layer 23 is, in particular, a pn junction region of the semiconductor body. In particular, the semiconductor body has or consists of a III-V or a II-VI semiconductor material. For example, the first semiconductor layer and / or the second semiconductor layer have a GaN, GaP, or GaAs layer. These layers can additionally have aluminum and / or indium and are configured, for example, as an AlGaN, InAlGaN, or InAlGaP layer.The first semiconductor layer 21 and the second semiconductor layer 22 can, for example, be n-type and p-type, respectively, or vice versa. For example, the second semiconductor layer 22 is p-type.

[0043] The component has a radiation transmittance surface 101 and a rear surface 102 facing away from the radiation transmittance surface. The radiation transmittance surface 101 is structured. In particular, the radiation transmittance surface 101 is formed by a first principal surface 201 of the semiconductor body 2, for example, by a surface of the first semiconductor layer 21. It is also possible that the radiation transmittance surface 101 is formed by a surface of a radiation-transmitting layer arranged on the first semiconductor layer 21. In particular, the component 100 can be externally electrically contacted via the rear surface 102. Thus, the component 100 can be designed as a surface-mountable component.

[0044] In the Fig. 1 are a connection layer 8, a diffusion barrier layer 7, a current distribution layer 5, a first insulating layer 91, a second insulating layer 92, a mirror layer 6, a first metal layer 3 and an intermediate insulating layer 93 arranged at least partially in the specified order between the semiconductor body 2 and the support 1.

[0045] The carrier 1 has a second metal layer 4. The second metal layer contains a first sub-area 41 and a second sub-area 42 spatially separated laterally from the first sub-area 41. A gap 40 is formed between the first sub-area 41 and the second sub-area 42, such that the first sub-area 41 is electrically insulated from the second sub-area 42.

[0046] The carrier 1 also has a molded body 10. The molded body 10 is designed to be electrically insulating. For example, the molded body 10 is designed as a potting compound. The second metal layer 4, comprising the first sub-region 41 and the second sub-region 42, is fully enclosed by the molded body 10, particularly laterally. The first sub-region 41 and the second sub-region 42 abut the molded body 10, particularly in lateral directions. The space 40 is completely filled with an electrically insulating material of the molded body, for example. The sub-regions 41 and 42 of the second metal layer 4 are mechanically held together by the molded body 10. In the lateral direction, the second metal layer 4 does not extend to the edge of the component 100 and is fully embedded in the molded body 10 in lateral directions.In the lateral direction, the shaped body 10 terminates, for example, with the first semiconductor layer 21 of the semiconductor body 2. Such a design of the shaped body 10 increases the mechanical cohesion of the second metal layer 4.

[0047] The first metal layer 3 is arranged between the semiconductor body 2 and the second metal layer 4. In a top view, the first metal layer 3 completely covers the gap 40. In particular, the first metal layer 3 is designed as a mechanically stabilizing layer of the device. The first metal layer 3 has a vertical thickness of at least 5 µm, and in particular at least 10 µm. For example, the thickness of the first metal layer 3 is between 5 µm and 30 µm, for example between 5 µm and 15 µm, or between 10 µm and 20 µm. Due to the complete coverage of the gap 40 by the first metal layer 3, the device is free of mechanical weak points in the areas of the gap. The first metal layer 3 is in particular continuous. In the lateral direction, the first metal layer 3 extends in particular to the edge of the device. Fig. 1 closes off the first metal layer 3 in a lateral direction flush with the shaped body 10 and with the first semiconductor layer 21.

[0048] The first metal layer 3 has an opening 12 through which the second sub-area 42 extends for electrical contacting the second semiconductor layer 22. It is also possible for the first metal layer 3 to have a plurality of such openings 12. Together with the first metal layer 3, the second sub-area 42 of the second metal layer 4 completely covers the active layer 23 and, in particular, the entire semiconductor body 2 in plan view. The second metal layer 4 is also designed, in particular, as a mechanically stabilizing layer of the device. Specifically, the second metal layer 4, approximately in the region of the first sub-area 41, has a vertical thickness that is, for example, at least as large, preferably at least twice, approximately four times, or ten times as large as the thickness of the first metal layer 3.With the complete covering of the active layer 23 or the entire semiconductor body 1, in particular no area of ​​the active layer 23 or of the semiconductor body 2 remains without mechanical support by the mechanically stabilizing metal layers 3 and 4, so that the component is designed to be particularly mechanically stable.

[0049] The first metal layer 3 and the second metal layer 4 can each be electroplated metal layers. They can consist of the same metal, such as nickel or copper. In particular, they can also consist of different materials. For example, the first metal layer 3 has a higher modulus of elasticity than the second metal layer 4, while the second metal layer 4 has a higher thermal conductivity than the first metal layer 3. For example, the first metal layer 3 consists of nickel and the second metal layer 4 of copper.

[0050] An intermediate insulating layer 93 is arranged between the first metal layer 3 and the second metal layer 4. The intermediate insulating layer 93 electrically insulates the first metal layer 3 from the second sub-region 42 of the second metal layer 4. The intermediate insulating layer 93 can be continuous. It is possible that an adhesive layer (not shown) is arranged between the first metal layer 3 and the intermediate insulating layer 93. This adhesive layer can be applied to the first metal layer 3 by means of a coating process, such as vapor deposition. In particular, the adhesive layer contains titanium or chromium. The adhesive layer provides high mechanical stability between the adhesive layer and the intermediate insulating layer 93.

[0051] The intermediate insulating layer 93 and the first metal layer 3 have a common opening 12 through which the second sub-area 42 extends. Furthermore, the intermediate insulating layer 93 has at least one further opening 11 through which the first sub-area 41 of the second metal layer 4 extends to the first metal layer 3. In the region of the further opening 11, the first metal layer 3 and the first sub-area 41 of the second metal layer 4 are, for example, in direct electrical contact.

[0052] In particular, the second metal layer 4 is a metal layer electroplated onto the intermediate insulating layer 93. Before the application of the second metal layer 4, an electrically conductive layer (in the Fig. (1 not shown) is applied directly to the intermediate insulating layer 93. This electrically conductive layer can then be structured and serves in particular as a seed layer for the second metal layer 4, which is applied, for example, by means of an electroplating process.

[0053] In the Fig. In Figure 1, the reflective layer 6 is arranged between the semiconductor body 2 and the first metal layer 3. In a top view of the semiconductor body 2, the metal layer 3 covers the reflective layer 6, in particular completely. The first metal layer 3 is directly adjacent to the reflective layer 6. The reflective layer 6 is, for example, electrically conductive. The reflective layer 6 can serve as a starting layer when depositing the first metal layer 3 by means of an electroplating process.

[0054] The reflective layer 6 comprises, for example, a metal. For instance, the reflective layer 6 contains aluminum, rhodium, palladium, silver, or gold. During operation of the device 100, the reflective layer 6 reflects electromagnetic radiation in the direction of the radiation transmission surface 101. In particular, the reflective layer 6 reflects at least 60%, preferably at least 80%, and most preferably at least 90% of a portion of the spectrum of the radiation generated by the active layer 23 during operation of the device. Fig. 1. The mirror layer 6 extends laterally to the edge of the component. Alternatively, it is also possible that the entire mirror layer 6 is completely surrounded laterally, particularly by the intermediate insulating layer 93. Thus, the mirror layer 6 can be protected from environmental influences such as moisture or oxygen.

[0055] The mirror layer 6, the first metal layer 3, and the intermediate insulating layer 93 have a common opening 12 through which the second sub-area 42 of the second metal layer 4 extends. In the Fig. The second sub-area 42 borders the current distribution layer 5, which is located between the semiconductor body 2 and the mirror layer 6. The current distribution layer 5 completely covers the common opening 12. In particular, the current distribution layer 5 is an additional metal layer that, alongside the first and second metal layers 3 and 4, further stabilizes the component 100. However, it is also conceivable that the current distribution layer 5 can be omitted.

[0056] The diffusion barrier layer 7 is arranged between the semiconductor body 2 and the current distribution layer 5. This layer prevents, in particular, the migration of metal atoms or metal ions from the current distribution layer 5, the mirror layer 6, the first metal layer 3, or the second metal layer 4 into the terminal layer 8 or into the active layer 23 of the semiconductor body, and thus prevents their possible damage.

[0057] The connection layer 8 is arranged between the semiconductor body 2 and the diffusion barrier layer 7. The connection layer 8 is, for example, electrically conductive and, in particular, radiation-reflecting. In a top view of the semiconductor body 2, the reflective layer 6 and the connection layer 8 together completely cover the active layer 23. Such a configuration of the reflective layer 6 and the connection layer 8 increases the radiation extraction efficiency of the device.

[0058] The component has a first insulating layer 91 and a second insulating layer 92 adjacent to the first insulating layer 91. The first insulating layer 91 completely surrounds the terminal layer 8, the diffusion barrier layer 7, and the current distribution layer 5 in the lateral directions. In the vertical direction, the first insulating layer 91 extends only between the mirror layer 6 and the semiconductor body 2. The second insulating layer 92 extends vertically from the mirror layer 6 at least to the first semiconductor layer 21. The mirror layer 6 and the second insulating layer 92 have a step at the edge of the component and are configured such that the semiconductor body 2 is partially surrounded laterally by the mirror layer 6 and the second insulating layer 92.Radiation exiting laterally towards the rear side 102 of the component can thus be reflected back by the mirror layer 6 towards the radiation transmission surface 101. The second insulating layer 92 is designed to be particularly transparent to radiation.

[0059] The semiconductor body 2 has a recess 25. The recess 25 extends from the second main surface 202 of the semiconductor body 2 through the second semiconductor layer 22 and the active layer 23 into the first semiconductor layer 21. A via 24 is formed in the recess 25. The via 24 is fully surrounded laterally by the second insulating layer 92. The via 24 is made of a metal. In particular, the via 24 and the mirror layer 6 have the same electrically conductive material. The via 24 is in direct electrical contact with the mirror layer 6. Via the mirror layer 6 and the first metal layer 3, the via 24 is electrically connected to the first sub-region 41 of the second metal layer 4.The via 24 is directly or indirectly adjacent to the first semiconductor layer 21 and is, in particular, completely surrounded by the semiconductor body 2 in the lateral direction. In a top view of the semiconductor body 2, the first metal layer 3 completely covers the recess 25 and the via 24. It is also possible for the component to have a plurality of vias 24 for electrical contacting the first semiconductor layer 21, thereby achieving a particularly uniform current distribution within the first semiconductor layer 21.

[0060] The component 100 is electrically contactable via its back side 102, i.e., its rear side. The component 100 can thus be electrically connected to an external voltage source via the first sub-area 41 and the second sub-area 42. The semiconductor body 2 completely covers the first and second sub-areas 41 and 42 of the second metal layer 4. Fig. In the back side 102, the component 100 has a first contact layer 410, which is in direct electrical contact with the first sub-region 41, and a second contact layer 420, which is in direct electrical contact with the second sub-region 42 of the second metal layer 4. In a top view of the substrate 1, the semiconductor body 2 completely covers the first and second contact layers 410 and 420. In a top view of the semiconductor body 2, the contact layers 410 and 420 completely cover the first sub-region 41 and the second sub-region 42, respectively, or, in particular, extend beyond these sub-regions 41 and 42. The first contact layer 410 is configured, in particular, as an n-type contact layer, and the second contact layer 420 as a p-type contact layer.

[0061] In Fig. Figure 2 is a lateral section of component 100 along a line in the Fig. 1 marked line AA' shown.

[0062] The component 100 has two openings 12 through which the second sub-area 42 of the second metal layer 4 extends for electrical contact with the second semiconductor layer 22. Alternatively, the component may have several such openings 12. In the openings 12, the second sub-area 42 is completely surrounded laterally by the intermediate insulating layer 93 and the reflective layer 6. The reflective layer 6, the first metal layer 3, and the intermediate insulating layer 93 are each continuous and share the openings 12. The reflective layer 6, the first metal layer 3, and the intermediate insulating layer 93, as shown in the Fig. 2 shown, are at least at the vertical height AA' fully enclosed by the shaped body 10 in lateral directions.

[0063] In Fig. 3 is another embodiment of a component 100 shown schematically in sectional view. This embodiment essentially corresponds to the embodiment of a component in the Fig. 1. In contrast, the mirror layer 6 has at least one trench 61 next to the opening 12. The trench 61 extends vertically through the mirror layer 6. In particular, the trench 61 runs laterally along at least one edge of the component 100.

[0064] The trench 61 is partially, and in particular completely, filled with a material from the first metal layer 3. The trench 61 has a width that is, in particular, between 3 µm and 15 µm, or approximately between 5 µm and 10 µm. When the first metal layer 3 is applied to the mirror layer 6, the trench 61 can be bridged or completely filled by the first metal layer 3. The trench 61 can also be only partially filled with a material from the first metal layer 3. It is also possible that the mirror layer has a plurality of spaced-apart trenches 61, each of which is bridged or filled by the first metal layer 3.

[0065] Fig. Figure 4 shows a schematic representation of a lateral section of the [body part] in the Fig. 3 further embodiment of a component shown. This embodiment essentially corresponds to the one shown in the Fig.2 illustrated embodiment of a component.

[0066] In contrast, the mirror layer 6 has a plurality of spaced-apart grooves 61. The grooves 61 are each arranged at the edge regions of the component 100. The grooves 61 form a frame with connection points 62, the frame enclosing the common opening 12 and the via 24, or the common openings 12 and the vias 24. The connection points 62 ensure that the mirror layer 6 remains a single, continuous piece. The entire mirror layer 6 can also serve as a starter layer for the application of the first metal layer 3, for example, by means of an electroplating process, even in the presence of the grooves 61. The grooves 61 are bridged by the first metal layer 3 and are partially or completely filled with a material from the metal layer 3.

[0067] It is also possible that the mirror layer 6 is divided into two or more separate areas by one or more grooves 61. In such cases, the mirror layer 6 can be coated with an electrically conductive layer that electrically connects different areas of the mirror layer 6. Furthermore, it is also possible that the grooves 61 form a frame that delimits the mirror layer 6, particularly in the lateral direction. That is, the entire mirror layer can be surrounded by the grooves 61. The electrically conductive layer can be applied to the mirror layer 6, covering, for example, areas outside the frame formed by the grooves 61. If the conductive layer does not cover areas outside the mirror layer 6, the mirror layer 6 and the first metal layer 3 can be completely surrounded laterally by the intermediate insulating layer 93.The first metal layer 3 can therefore be electroplated onto the mirror layer 6, in particular directly onto the electrically conductive layer.

[0068] By using the second metal layer, comprising the first sub-area and the second sub-area laterally spaced from the first sub-area on the back side of the component, the component can be mechanically stabilized and simultaneously electrically contacted externally via these sub-areas. The application of the first metal layer, which acts as a mechanically stabilizing layer and completely covers the gap between the first and second sub-areas, ensures that the component is free of mechanical weak points even in this gap. Thus, no area of ​​the component remains without mechanical support from the metal layer and the subsequent metal layer, resulting in a particularly robust mechanically stable component.

[0069] Priority is claimed for German patent application 10 2014 116 935.2, the disclosure content of which is hereby incorporated by reference.

Claims

[1] Component (100) comprising a semiconductor body (2), a first metal layer (3) and a second metal layer (4), wherein - the first metal layer is positioned between the semiconductor body and the second metal layer, - the semiconductor body has a first semiconductor layer (21) on a side facing away from the first metal layer, a second semiconductor layer (22) on a side facing the first metal layer and an active layer (23) arranged between the first semiconductor layer and the second semiconductor layer, - the component has a via (24) which extends through the second semiconductor layer and the active layer to electrically contact the first semiconductor layer, - the second metal layer has a first sub-area (41) and a second sub-area (42) laterally separated from the first sub-area by a space (40), wherein the first sub-area is electrically connected to the via via the first metal layer, and - in top view, the first metal layer completely covers the lateral gap, - wherein the second metal layer (4) is laterally bounded by a shaped body (10) made of electrically insulating potting compound, the shaped body (10) being formed as a continuous unit, - the first sub-area (41) and the second sub-area (42) border the shaped body (10) in lateral directions, and - the space (40) is filled with the electrically insulating potting compound of the molded body, wherein the molded body (10) and the second metal layer (4) together with the first sub-area (41) and the second sub-area (42) form a support (1) of the component, and the laterally spaced sub-areas (41) and (42) are held together by the molded body (10). [2] Component according to claim 1, wherein the first metal layer (3) forms a mechanically stabilizing layer of the component. [3] Component according to one of the preceding claims, wherein the first metal layer (3) is continuous and has a thickness between 5 µm and 50 µm inclusive. [4] Component according to one of the preceding claims, wherein the first metal layer (3) and the second sub-area (42) together cover at least 90% of a total area of ​​the active layer (23). [5] Component according to one of the preceding claims, wherein the first metal layer (3) and / or the second metal layer (4) comprises a first metal and at least one further material, wherein a proportion of the first metal is at least 90 atomic percent of the first or the second metal layer. [6] Component according to one of the preceding claims, wherein the first metal layer (3) has a higher modulus of elasticity than the second metal layer (4) and / or the second metal layer has a higher thermal conductivity than the first metal layer. [7] Component according to one of the preceding claims, wherein the first metal layer (3) has at least one opening (12) through which the second sub-area (42) extends for electrical contacting the second semiconductor layer (22). [8] Component according to one of the preceding claims, wherein a mirror layer (6) is arranged between the semiconductor body (2) and the first metal layer (3), the first metal layer and the mirror layer having a common opening (12). [9] Component according to claim 8, wherein the mirror layer (6) has a groove (61) which extends vertically through the mirror layer and runs laterally along the edge of the component. [10] Component according to one of claims 8 to 9, wherein the mirror layer (6) has at least two spaced-apart grooves (61) which surround the edge of the component and at least partially enclose the common opening (12) and the via (24), wherein the mirror layer is continuous and the grooves are bridged or filled by the first metal layer (3). [11] Component according to one of the preceding claims, in which an intermediate insulating layer (93) with an opening (12) and a further opening (11) is arranged between the first metal layer (3) and the second metal layer (4), wherein the first sub-area (41) extends through the further opening and the second sub-area (42) extends through the opening. [12] Component according to one of the preceding claims, wherein the component is electrically contactable via the first sub-area (41) and the second sub-area (42) on a side of the second metal layer (4) facing away from the first metal layer (3). [13] Component according to one of the preceding claims, wherein the active layer (23) emits electromagnetic radiation in the visible, ultraviolet or infrared spectral range during operation of the component. [14] Component according to any of the preceding claims, which is free of a growth substrate. [15] Method for manufacturing a component according to claim 1, wherein the semiconductor body (2) is provided and the first metal layer (3) and the second metal layer (4) are each applied by an electroplating process, wherein - an electrically conductive mirror layer (6) is formed on the semiconductor body (2), wherein the mirror layer has at least one opening (12) or a plurality of openings (12), - the first metal layer is electroplated onto the mirror layer (6), - an intermediate insulating layer (93) is applied to the first metal layer (3), and - the second metal layer (4) is formed with the first and second sub-area (41, 42) on the intermediate insulating layer, wherein the second sub-area (42) extends through the opening (12) or the plurality of openings (12) to electrically contact the second semiconductor layer (22). [16] Method according to the preceding claim, wherein an electrically conductive layer is applied to the intermediate insulating layer (93) prior to the application of the second metal layer (4) and subsequently structured, and the second metal layer is directly electroplated onto the electrically conductive layer.

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