Multiphase self-capacitance sampling of sensor arrays

Abstract

A device (110) comprising the following: a sensor logic (101) configured to couple and simultaneously acquire a plurality of sensor elements (121(1) - 121(N)) from a sensor array (121) in each of a plurality of self-capacitance sampling operations to obtain a plurality of measurements, each measurement representing a collective charge of the plurality of sensor elements accumulated during a corresponding self-capacitance sampling operation of the plurality of self-capacitance sampling operations; and a processing logic (102) configured to determine data values ​​based on the multitude of measurements, each representing intrinsic capacities for each of the multitude of sensor elements (121(1) - 121(N)).

Description

PRIORITY

[0001] This application is an international application of U.S. Patent Application No. 15 / 475,412, filed March 31, 2017, which claims priority to and the benefit of U.S. Provisional Patent Application No. 62 / 434,319, filed December 14, 2016, all of which are incorporated herein by reference in their entirety. TECHNICAL FIELD

[0002] This disclosure relates generally to the field of touch sensor devices and more specifically to processing touch sensor data. BACKGROUND

[0003] Computing devices, such as laptop / notebook computers, mobile communication devices, portable entertainment devices (e.g., handheld video games, multimedia players, etc.), and the like, may include user interface devices that facilitate interaction between a user and the computing device. One type of user interface device that has become common is a touch-sensing device or touch input device that operates using capacitance sensing. A touch-sensing device may be implemented as a touch screen, touch-sensing pad, touch-sensing slider, or touch-sensing buttons, and may include a touch sensor that includes an array of capacitive sensing elements.Capacitive sensing typically involves sampling operations that periodically measure changes in the capacitance associated with the capacitive sensor elements to determine the presence, position, type, and / or movement of a conductive object (e.g., a stylus, a user's finger, etc.) relative to the touch sensor.

[0004] Various capacitive sensing applications (such as automotive applications) require capacitive sensing that limits the impact of electromagnetic (EM) emissions and supports high sensitivity and waterproof sensing capabilities. However, a drawback of currently available sensing technology (such as self-capacitance sensing with active shielding) is that it does not provide protection against EM emissions while supporting high sensitivity and waterproof sensing.

[0005] Furthermore, the disclosure of US 8 860 682 B1, US 2016 / 0 148 034 A1, US 2011 / 0 279 407 A1 and US 2012 / 0 043 971 A1 may be helpful for understanding the present invention.

[0006] US 8,860,682 B1 discloses devices and methods for hardware deconvolution for multi-phase scanning of a touch matrix. One of the devices includes a memory device configured to store a capacitance map with convolved capacitance data. The convolved data is the result of a multi-phase transmit (TX) scan of a sensor array with multiple TX patterns. The device further comprises a deconvolution circuit block connected to the memory device. The deconvolution circuit block is configured to deconvolve the convolved capacitance data with the inverses of the multiple TX patterns to obtain capacitance data for a deconvolved capacitance map.

[0007] US 2016 / 0 148 034 A1 describes techniques for fully differential multiphase sensing in capacitive fingerprint applications. In one embodiment, a system comprises a capacitive fingerprint sensor array and a processing device coupled to the capacitive fingerprint sensor array. The processing device is at least configured to sample the capacitive fingerprint sensor array in a fully differential multiphase mode, receive a plurality of measurements representing a portion of the finger on the capacitive fingerprint sensor array, and generate a fingerprint image for the portion of the finger based on the plurality of measurements.In some embodiments, a capacitive fingerprint sensor array may include receive (RX) electrodes and one or more reference electrodes configured to detect noise, wherein the one or more reference electrodes have a width substantially equal to the width of the RX electrodes, but the one or more reference electrodes are spaced at a smaller pitch than the RX electrodes.

[0008] US 2011 / 279 407 A1 describes a circuit for processing a touch line signal of a touch screen, comprising a plurality of sensor reading circuits and a switching unit. The plurality of sensor reading circuits includes sensor reading units or integrators. The sensor reading units are configured to precharge a first sensor capacitor and a second sensor capacitor formed on a touchscreen panel with a ground voltage and a supply voltage, enable charges stored in the first sensor capacitor and the second sensor capacitor to be shared, and read out a charge sharing result obtained by allowing the charges of the first sensor capacitor and the second sensor capacitor to be shared. The integrators are configured to integrate the output voltages of the reading units.The switching unit is configured to sequentially connect the output terminals of the plurality of sensor readout circuits to an input terminal of an analog-to-digital converter.

[0009] US 2012 / 0 043 971 A1 discloses a capacitance measuring circuit for measuring self and mutual capacitances, comprising a first electrode capacitively coupled to a second electrode, a first plurality of switches coupled to the first electrode, and a second plurality of switches coupled to the second electrode. During a first stage of operation, the first plurality of switches is configured to apply a first initial voltage to the first electrode, and the second plurality of switches is configured to apply a second initial voltage to the second electrode. During a second stage of operation, the first plurality of switches is configured to connect the first electrode to a measuring circuit, and the second plurality of switches is configured to connect the second electrode to a constant voltage. BRIEF DESCRIPTION OF THE CHARACTERS Fig. 1 is a block diagram illustrating one embodiment of an exemplary electronic system in accordance with the multi-phase self-capacitance (MPSC) sensing techniques described herein. Fig. 2 is a block diagram illustrating various phases (cycles) for MPSC sampling operations using a capacitance sigma-delta (CSD) modulator circuit, according to an example embodiment. Fig. 3A-3D are block diagrams illustrating MPSC scanning operation patterns according to an exemplary embodiment. Fig. 4 is a timing diagram illustrating exemplary voltage waveforms for MPSC sampling patterns, e.g., according to the exemplary embodiment of Fig. 3A-D. Fig.5A-5B are block diagrams illustrating various phases of the MPSC sampling operations in a four-phase architecture according to an exemplary embodiment. Fig. 6 is a timing diagram illustrating exemplary voltage waveforms for MPSC sampling patterns, e.g., according to the exemplary embodiment of Fig. 5A-5B. Fig. 7A-7B are block diagrams illustrating a capacitance sensor array including self-capacitance sensor elements and schematics thereof, respectively, according to an exemplary embodiment. Fig. 8A-8C are block diagrams illustrating example schemes of various phases of the MPSC sensing operations for a self-capacitance sensor array, e.g., according to the example embodiment of Fig. 7A-B. DETAILED DESCRIPTION

[0010] The following description sets forth numerous specific details, such as examples of specific systems, components, methods, and so forth, in order to provide a thorough understanding of various embodiments of the techniques described herein for multiphase self-capacitance (MPSC) sensing of sensor arrays. However, it will be apparent to one of ordinary skill in the art that at least some embodiments may be practiced without these specific details. In other instances, well-known components or methods are not described in detail or are presented in a simple block diagram format so as not to unnecessarily obscure the understanding of the techniques described herein. The specific details set forth below are therefore merely exemplary. Specific implementations may vary from these exemplary details and still be within the spirit and scope of the present invention.

[0011] References in the specification to "one embodiment," "a single embodiment," "an exemplary embodiment," "some embodiments," and "various embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiment(s) is included in at least one embodiment of the invention. Furthermore, the appearances of the phrases "one embodiment," "a single embodiment," "an exemplary embodiment," "some embodiments," and "various embodiments" in various places in the specification are not necessarily all referring to the same embodiment(s).

[0012] The description includes references to the accompanying figures, which form part of the detailed description and in which like reference numerals may refer to like components or operations. The figures show illustrations in accordance with exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice the embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter.It is to be understood that the embodiments described herein are not intended to limit the scope of the claimed subject matter, but rather to enable one skilled in the art to practice, make, and / or use the claimed subject matter.

[0013] Some conventional sensing techniques use single-phase methods to sample a self-capacitance sensor array. For example, a self-capacitance sensing channel connects to one sensor element at a time to detect the charge accumulated on it, while all other (unused) sensor elements of the sensor array can be connected to an active-shield signal. The active-shield signal can essentially replicate the sensor excitation signal and is typically used to eliminate the effects of the mutual capacitances of the unused sensor elements on the measurement, which represents the self-capacitance of the sensed sensor element.In other words, all sensor elements of the sensor array can be energized (charged) at the same time, but only one sensor element is sensed at a time and the obtained measurement is converted into a data value representing the self-capacitance of the sensor element (this method is therefore called the single-phase sampling method).

[0014] A disadvantage of such single-phase sensing methods is that an active-shield signal does not accurately reproduce the shape of the excitation signal, and as a result, mutual capacitances between the sensor elements of the array can significantly affect the measurement, which represents the self-capacitance of the sensed sensor element. Furthermore, such single-phase sensing methods produce high electromagnetic (EM) emissions, since all but one of the sensor elements of the sensor array are excited by the active-shield signal. One way to reduce such high EM emissions is to reduce the excitation voltage used to charge the sensor elements. However, reducing the excitation voltage results in a weakening of the sensitivity of the self-capacitance sensor array.Furthermore, for touch sensor devices that use a self-capacitance sensing channel, it is not possible to increase the sampling rate while maintaining the same signal-to-noise ratio (SNR).

[0015] To address these and other issues related to self-capacitance sensing (e.g., hover, proximity, and thick overlay), various embodiments of techniques for MPSC sensing of sensor arrays are described herein. Unless explicitly stated otherwise, "sensor arrays" are also described herein as "touch sensor," "touch sensor arrays," and the like. Examples of self-capacitance sensor arrays include, without limitation, capacitive touch screens, touch sensor pads, touch sliders, touch sensor buttons, and various other ITO-based panels that can be configured to operate as interfaces in response to user-initiated contact. A user-initiated contact may involve a physical touch by a conductive object (e.g.,A conductive object (e.g., a stylus, a user's finger, and the like) on the touch surface of the sensor array, or a hover, where the conductive object is sufficiently close to affect the sensor elements of the sensor array without physical contact with the touch surface thereof. As used herein, "sensor element" refers to a discrete set of one or more electrodes that is separate and distinct from other sets of electrodes in the sensor array.

[0016] In an exemplary embodiment, a device includes sensor logic coupled to processing logic. The sensor logic is configured to simultaneously (e.g., simultaneously or substantially simultaneously) sense multiple sensor elements from a sensor array in each of multiple sampling operations to obtain multiple measurements, each measurement representing a collective charge of the multiple sensor elements accumulated during a corresponding sampling operation. The processing logic is configured to determine data values, each representing self-capacitances of the multiple sensor elements, based on the multiple measurements.During the operation, the plurality of measurements may be representative of a conductive object in contact with or proximate to the sensor array, and the processing logic may be further configured to determine a position of the conductive object on the sensor array based on the data values. In example aspects of this embodiment, during a particular sensing operation, the sensor logic is configured to excite a particular group of one or more sensor elements with a signal having an opposite polarity to signals coupled to the remaining sensor elements. In example aspects, the apparatus further includes multiplexer logic configured to couple the sensor logic to the sensor elements according to excitation patterns corresponding to the sensing operations.In exemplary aspects, in each of the sampling operations, the sensor logic is configured to energize the sensor elements during a precharge phase and to measure the collective charge of the sensor elements during a charge sharing phase. In exemplary aspects, the processing logic is configured to determine the data values ​​based on a matrix of deconvolution coefficients corresponding to the sampling operations.

[0017] In another exemplary embodiment, a method for MPSC scanning of a sensor array includes the following acts: simultaneously sensing multiple sensor elements of the sensor array in each of multiple scanning acts to obtain multiple measurements, each measurement representing a collective charge of the multiple sensor elements accumulated during a corresponding scanning act; and determining, based on the multiple measurements, data values ​​each representing self-capacitances of the multiple sensor elements. During the act, the multiple measurements may be representative of a conductive object in contact with the sensor array, and the method may further include the act of determining a position of the conductive object on the sensor array based on the data values.In example aspects of this embodiment, the method further includes exciting a particular group of one or more sensor elements during a particular sampling operation with a signal having an opposite polarity to signals coupled to the remaining sensor elements. In example aspects, the method further includes exciting the sensor elements according to an excitation matrix representing excitation patterns corresponding to the sampling operations. In example aspects, the method further includes exciting the sensor elements during a pre-charge phase in each of the sampling operations and measuring the collective charge of the sensor elements during a charge-sharing phase. In example aspects, determining the data values ​​includes converting the plurality of measurements based on a matrix of deconvolution coefficients corresponding to the plurality of sampling operations.

[0018] In another exemplary embodiment, a system includes a capacitive sensor array, sensor logic, and processing logic. The sensor array includes a plurality of sensor elements, such as row electrodes and / or column electrodes. The sensor logic is configured to simultaneously sense the plurality of sensor elements in each of a plurality of sampling operations to obtain a plurality of measurements, each measurement representing a collective charge of the plurality of sensor elements accumulated during a corresponding sampling operation. The processing logic is configured to determine data values, each representing intrinsic capacitances of the plurality of sensor elements, based on the plurality of measurements.In example aspects of this embodiment, during a particular sensing operation, the sensor logic is configured to excite a particular group of one or more sensor elements with a signal having an opposite polarity to signals coupled to the remaining sensor elements. In example aspects, the system may further include multiplexer logic configured to couple the sensor logic to the sensor elements according to excitation patterns corresponding to the sensing operations. In example aspects, the plurality of measurements may be representative of a conductive object in contact with or proximate to the sensor array, and the processing logic is further configured to determine a position of the conductive object on the sensor array based on the data values.

[0019] Fig.1 illustrates a block diagram of an exemplary electronic system 100 configured in accordance with the MPSC sensing techniques described herein. The electronic system 100 includes a sensor array 121 coupled to a processing device 110 that can be coupled to a host 150. The electronic system 100 can be embodied as an electronic system that includes the sensor array as a user interface. Examples of such electronic devices include, without limitation, smartphones, cellular phones, tablets, notebook computers, personal computers, personal data assistants (PDAs), kiosk systems, keyboards, televisions, remote controls, monitors, handheld multimedia devices, handheld video players, gaming devices, control panels of household or industrial appliances, and other computer peripheral, input, and / or handheld devices.Alternatively, the electronic system 100 may be embodied as other types of devices that can be configured with touch-sensor user interfaces. It should be noted that the components of the electronic system 100 are all described in . Fig. 1 illustrated components. Alternatively, the electronic system 100 may include only some of the illustrated components or may include additional components shown in Fig. 1 are not illustrated. The electronic system 100 of Fig. 1 should therefore be considered illustrative and not restrictive.

[0020] The sensor array 121 may be arranged in a touch panel (such as a touch screen, a touch pad, a touch panel with capacitive buttons, etc., on which a touch sensing surface is present) that can be configured as a user interface to detect a conductive object (e.g., a stylus, a user's finger, etc.) that is in contact with or near the sensor array. The sensor array 121 includes sensor elements 121(1)-121(N). Fig. For illustrative purposes, each sensor element 121(1)-121(N) is schematically represented as a capacitor in Figure 1. In various embodiments, sensor elements 121(1)-121(N) may be row electrodes, column electrodes, and / or shaped row and column electrodes that are electrically isolated from each other on the touch panel, but may be subject to capacitive coupling during operation.

[0021] Processing device 110 includes sensor logic 101 coupled to processing logic 102, which may also be coupled to non-sensing logic 103. (As used herein, "logic" refers to a set of hardware circuits, blocks, and / or components that can be controlled by various analog / digital signals and configured to perform certain operations.) Processing device 110 may reside on a common carrier substrate, such as, for example, an integrated circuit ("IC") die substrate or a multi-chip module substrate. In one embodiment, processing device 110 may be a programmable system on a chip fabricated on a single IC die, such as, for example, a PSoC™ processing device (PSoC™ = Programmable System on a Chip) developed by Cypress Semiconductor Corporation, San Jose, California.Alternatively, the processing device 110 may be one or more other processing devices, such as a microprocessor or central processing unit, a controller, a special-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable device. In some embodiments, the processing device 110 may, for example, be a network processor having multiple processors including a core unit and multiple microengines. Additionally, the processing device 110 may include any combination of general-purpose processing device(s) and special-purpose processing device(s). During operation, the processing device 110 is configured to periodically (e.g.,at a certain frequency) to perform sampling operations on the sensor array 121 according to the MPSC sampling techniques described herein to measure changes reflected in the self-capacitances of its sensor elements to determine the presence, position, and / or movement of a conductive object relative to the sensor array.

[0022] The processing device 110 is coupled to the sensor array 121 via the multiplexer 113, which may include one or more analog buses, switches, and / or other circuits to transport signals. The processing device 110 (and / or a component thereof, such as the sensor logic 101) includes various hardware circuits and / or firmware (such as, for example, a sample sequence controller) to operate the multiplexer 113 in accordance with the MPSC sampling techniques described herein. For example, during a precharge phase of a sampling operation, the processing device 110 (and / or a component thereof) configures the multiplexer 113 to couple one or more sensor elements of the sensor array 121 to an excitation signal with a given polarity (e.g., phase shift), while at the same time supplying the remaining sensor elements of the sensor array with a signal with a different or opposite polarity (e.g.,B. Phase shift). During a charge sharing phase of the sensing operation, the processing device 110 (and / or a component thereof) configures the multiplexer 113 to couple the sensor elements of the sensor array 121 to a self-capacitance sensing channel of the processing device 110, providing simultaneous sensing (sensing) of all the sensor elements.

[0023] In the embodiment of Fig.1, the sensor logic 101 is configured to include a self-capacitance sensing channel (not shown) of the processing device 110. The self-capacitance sensing channel includes hardware circuitry operating to receive and process signals from the sensor array 121 via the multiplexer 113. Such a sensing channel may include a relaxation oscillator, a capacitance sigma-delta (CSD) modulator, a full-wave CSD, a slope converter ADC (analog-to-digital converter), or other means to process and / or convert a signal received from the sensor array into a measurement (e.g., also referred to as "raw data" or "raw data count") representing a self-capacitance charge.According to the MPSC sensing techniques described herein, a measurement received by sensor array 121 represents a collective charge of multiple sensor elements 121(1)-121(N) accumulated during the precharge phase of a sensing operation. In some embodiments, the measurement obtained by sensor logic 101 may be a signal value representing one or more characteristics of a signal; furthermore, or instead, in some embodiments, a signal value may be a value derived from the measurement based on a signal characteristic, such as, for example, voltage and / or current magnitude, raw capacitance, and the like.It should be noted that there are various known methods for measuring signal characteristics representing capacitance, such as current-voltage phase-shift measurement, resistor-capacitor charge timing, capacitive bridge divider, charge transfer, successive approximation, sigma-delta modulators, charge accumulation circuits, field effect, mutual capacitance, frequency shift, or other capacitance measurement algorithms. It should also be noted that instead of evaluating measurements (e.g., raw data counts) relative to a threshold, the sensor logic can be configured to evaluate other measured values ​​to determine user interaction with the sensor array.For example, in a sensor logic that includes a CSD modulator, the sensor logic may be configured to evaluate the ratio of the pulse widths of the modulator output, rather than the raw data counts exceeding or falling below a certain threshold.

[0024] The processing device 110 further includes processing logic 102. The processing logic 102 is configured to perform various operations of the MPSC sensing techniques described herein, where such operations may be implemented in firmware or, alternatively, in hardware and / or software. For example, the processing logic 102 is configured to receive and store a measurement from the sensor logic 101 for each of a plurality of sensing operations performed on the sensor array 121 and then deconvolute the received / stored measurements to obtain data values ​​(such as, for example, digital counts) that each represent the self-capacitances of the sensor elements of the sensor array at a given time. The processing logic 102 can then apply the data values ​​to determine whether a conductive object is detected at or near the sensor array 121 (e.g.,Determining the presence of the object), determining the object on the sensor array (e.g., determining the position of the object), tracking the movement of the object, or determining other information related to the detected object.

[0025] In some embodiments, instead of using processing logic 102 to perform the above operations, processing device 110 may be configured to send measurements (e.g., raw data counts) or partially processed data to a host, such as host 150. As in Fig.1, the host 150 may include decision logic 151 configured to perform some or all of the above-described operations for the processing logic 102. Operations of the decision logic 151 may be implemented in firmware, hardware, software, or a combination thereof. The host 150 may include a high-level application programming interface (API) for applications 152 that may be configured to perform routines on the received data for various operations that may be used to implement the MPSC sampling techniques described herein. Therefore, in various embodiments, the operations of the processing logic 102 may be implemented in decision logic 151, applications 152, or in other hardware, software, and / or firmware external to the processing device 110.In some embodiments, the processing device 110 may be the host 150. In these and other embodiments, the processing device 110 may also include non-sensing logic 103. The non-sensing logic 103 may be configured to process / receive / transmit data to and from the host 150. The non-sensing logic 103 may, for example, include components that can be used to operate with the processing device 110 and / or the sensor array 121 (e.g., keyboard, keypad, mouse, trackball, LEDs, displays, or other peripheral devices).

[0026] The MPSC sampling techniques described herein provide the use of multiphase excitation methods, N n self-capacitance sensing operations can be performed on sensor arrays with multiple sensor elements. Such multi-phase excitation methods affect two sensing parameters (among others) - sampling time and signal-to-noise ratio (SNR). In various embodiments, these methods can, with respect to conventional self-capacitance sensing techniques, reduce the sampling time with a constant SNR, or alternatively, increase the SNR if the sampling time is kept the same (e.g., constant). As a result, the MPSC sensing techniques described herein have higher sensitivity than conventional self-capacitance sensing techniques, but generate lower EM emissions. For example, in the best case, if the number of sensor elements of the sensor array is N, the sampling time can be reduced by N times, or the SNR can be increased by times. Furthermore, according to the MPSC scanning techniques described herein, during a specific scanning operation, all sensor elements are acquired simultaneously (e.g., simultaneously or substantially simultaneously), but the polarity (e.g., phase shift) of the excitation signal for each sensor element depends on a specific multiphase excitation pattern, and the number of such patterns is equal to the number of sensor elements in the sensor array.

[0027] Table 1 below provides an example set of multiphase excitation patterns and capacitance value calculations for a sensor array with four sensor elements. Table 1. Multiphase excitation patterns and capacitance value calculations thereof Sampling sequence (excitation pattern) Capacity value calculation 1. Scanning process (pattern 1) a1*C1 + a2*C2 + a3*C3 - a4*C4 = A 2. Scanning process (pattern 2) a1*C1 + a2*C2 - a3*C3 + a4*C4 = B 3. Scanning process (pattern 3) a1*C1 - a2*C2 + a3*C3 + a4*C4 = C 4. Scanning process (pattern 4) -a1*C1 + a2*C2 + a3*C3 + a4*C4 = D

[0028] In Table 1 above, patterns 1-4 are used for the 1st to 4th sampling operations, respectively; C1, C2, C3, and C4 are the capacitances of the sensor elements; a1, a2, a3, and a4 are constants defined by the excitation voltages and the acquisition channel transfer function of the sensor logic; and A, B, C, and D are the measurement results obtained by the processing device. The minus polarity (the "-" sign in front of a constant in Table 1) indicates that the excitation signal for the corresponding sensor element has an opposite polarity / phase shift (e.g., a 180° phase shift) from the excitation signals for other sensor elements.

[0029] According to the multiphase excitation patterns in Table 1, the following system of equations (1) can be formed and used by a processing device when scanning the sensor array: [a1a2a3−a4a1a2−a3a4a1−a2a3a4−a1a2a3a4]×[C1C2C3C3]=[ABCD]

[0030] In practice, for most embodiments, the excitation voltages and the sense channel transfer function are the same, so equation (2) below is valid: a1=a2=a3=a4=a

[0031] The system of equations (1) can therefore be rewritten as the system of equations (3) below: [111−111−111−111−1111]×[C1C2C3C1]=[A'B'C3C1]=[A'B'C'D'] where A' = A / a, B' = B / a, C' = C / a, and D' = D / a. The left-hand matrix in the system of equations (3) is referred to as the "excitation matrix" because it stores information representing the excitation patterns that can be used by the processing device to drive the excitation signals to the sensor elements of the sensor array. In some embodiments, a processing device implements the excitation matrix as a data structure with data stored in volatile and / or non-volatile memory accessible by the various components of the processing device.

[0032] After the processing device performs the sampling operations to obtain corresponding measurements, the processing device can use the system of equations (4) below to calculate the data values ​​representing the self-capacitances of the sensor elements of the sensor array: [C1C2C3C4]=[0.250.250.25−0.250.250.25−0.250.250.25−0.250.250.25−0.250.250.250.25]×[A'B'C'D']

[0033] The middle matrix in the system of equations (4) is referred to as the "deconvolution matrix" because it stores deconvolution coefficients that can be used by the processing device to calculate data values ​​representing the measured self-capacitances for each of the sensor elements of the sensor array. In some embodiments, a processing device implements the deconvolution matrix as a data structure with deconvolution coefficient data stored in volatile and / or non-volatile memory accessible by the various components of the processing device.

[0034] Each row in the system of equations (4) represents a finite impulse response (FIR) filter, and the deconvolution coefficients can be considered as the coefficients of the FIR filters. The noise suppression ratio K ns of the FIR filter is represented by equation (5) below: Kns=1Σi=1Nsli2 where sl i are the deconvolution coefficients of a row and N is the number of elements in that row.

[0035] To provide the MPSC sensing techniques described herein, the measurement and sampling components of various embodiments must measure values ​​directly proportional to the sum and subtraction (difference) of the sensor element capacitances. For example, in some embodiments, the MPSC sensing techniques can be used with a passive integrator and an active integrator. An embodiment with a passive integrator uses the charge transfer method, in which the charge is shared between the sensor element capacitance and the integrator or modulator capacitance. In such embodiments, therefore, the integrator and modulator capacitances must have a much higher value than the sensor element capacitance.

[0036] Fig.Figure 2 illustrates the phases (cycles) for a sampling process implemented with a capacitance sigma-delta (CSD) modulator circuit in an exemplary embodiment according to the MPSC sampling techniques described herein. Two charge transfer types can be implemented in this exemplary embodiment—negative and positive. Fig.Figure 2 illustrates these two schematic types in the operational context of the sensor logic 201 coupled to the sensor array 221. The sensor logic 201 includes the CSD modulator circuit and a sensor sampling sequence controller (not shown) configured to control a sampling operation in two phases: a precharge phase 202 (Ph0) and a charge transfer phase 204 (Ph1). In the precharge phase 202 of the sampling operation, the sensor logic 201 (e.g., with its sampling sequence controller) is configured to couple the sensor elements of the sensor array 221 via a positive bus 205 and a negative bus 207, wherein the excitation signals provided on the positive bus 205 have a different or opposite polarity (e.g., 180° phase shift) than the excitation signals provided on the negative bus 207.During the precharge phase 202, one of the sensor elements is coupled to the positive bus, and the remaining sensor elements are coupled to the negative bus. In the negative charge transfer circuit (e.g., via bus 207), one sensor element (e.g., each of "Cs2," "Cs3," and "Cs4") is coupled to system ground, resulting in zero capacitance ("Csn"). In the positive charge transfer circuit (e.g., via bus 205), one sensor element (e.g., "Cs1") is coupled to a power supply (e.g., "VDDA"), resulting in C. sp* VDDA. According to the MPSC sensing techniques described herein, in the charge sharing phase 204 of the sensing process, all sensor elements (e.g., "Cs1," "Cs2," "Cs3," and "Cs4") are coupled together (e.g., by using a suitable multiplexer) to the same node 213, which is coupled to the CSD modulator circuit with its capacitance ("Cmod"). Each sensor element of the sensor array 221 thus shares its capacitance charge (e.g., the sensor element with capacitance "Cs1" shares its charge "Csp * VDDA," and each of the sensor elements with capacitances "Cs2," "Cs3," and "Cs4" shares a charge of "Csn") with the capacitance of the CSD modulator circuit ("Cmod"), per equations (6) and (7) below: ΔCCmod≈VDDA⋅CspCmod ΔCCmod≈−Vref⋅CsnCmod

[0037] The total collective charge accumulated by all sensor elements during the sensing process is thus proportional to the subtraction of the capacitances of the sensor elements, per equation (8) below: ΔVCmod≈VDDA⋅Csp−CsnCmod

[0038] Equation (8) indicates that the above excitation method with the two charge transfer types can be easily used for multiphase self-capacitance sensing operations. In some embodiments, such an excitation method can be implemented by sensor logic configured with a two-phase sequence control. For example, during the excitation / precharge phase, the sensor logic can be configured to couple a group of one or more sensor elements to the positive charge transfer bus and the remaining sensor elements to the negative charge transfer bus. Then, during the sampling / charge transfer phase, the sensor logic is configured to couple all sensor elements together and simultaneously sample them to measure a sum current (or voltage) representing the collective charge of all sensor elements accumulated during the excitation phase.This total current (or voltage) is equal to (or proportional to) the difference between the sum of the currents of the negatively excited sensor elements and the sum of the current(s) of the positively excited sensor elements. (While this technique is described in . Fig. 2 and the other figures above for four sensor elements, it is noted that the MPSC techniques described herein are not limited to four sensor elements and that various embodiments can be used with sensor arrays having different numbers of sensor elements - such as, for example, sensor arrays with up to 71 sensor elements.) For example, in the embodiment of Fig.2 During the precharge phase 202, a group of one "positive" sensor element is coupled to the power supply "VDDA" via a positive bus 205, and a group of three "negative" sensor elements is coupled to ground via a negative bus 207. During the charge sharing phase 204, all sensor elements are coupled together via a common node 213 to the CSD modulator circuit with its capacitance ("Cmod"). The converter of the CSD modulator circuit maintains the voltage "Vcmod" at node 213 approximately at (e.g., very close to) the reference voltage "Vref." In a preferred configuration, the reference voltage is set approximately to "Vref" in the range of one-half of the supply voltage VDDA, i.e., V ref≈ ½ VDDA. In other embodiments, different values ​​for VDDA may be used, provided that the deconvolution coefficients are adjusted accordingly, where these coefficients depend on the relationship between "VDDA" and "Vref" (as described previously).

[0039] Fig. 3A-3D are block diagrams illustrating multiphase excitation patterns for a sampling operation in accordance with the MPSC sampling techniques described herein. In Fig.3A illustrates the excitation pattern 300(1) for a precharge phase of a sensing operation in the context of the sensor array 321, wherein one of the sensor elements ("Cs1") is coupled to the positive bus 305 (e.g., to receive an excitation signal with a positive polarity) and the remaining sensor elements ("Cs2," "Cs3," and "Cs4") are coupled to the negative bus 307, which is coupled to ground (e.g., to receive an excitation signal with a different polarity). According to the MPSC sensing techniques described herein, in the charge-transfer phase of the sensing operation, all sensor elements (e.g., "Cs1," "Cs2," "Cs3," and "Cs4") are coupled together, and sensor logic (not shown) is configured to measure the collective charge Q sum1 to measure the collective charge Q accumulated by all sensor elements during the pre-charge phase. sum1 is represented by equation (9) below: Qsum1=Cs1⋅(VDDA−Vref)−Vref⋅(Cs2+Cs3+Cs4)

[0040] In Fig. 3B illustrates the excitation pattern 300(2) for the precharge phase of a sensing operation in the context of the sensor array 321, wherein one sensor element ("Cs2") is coupled to the positive bus 305 (e.g., to receive an excitation signal with a positive polarity) and the remaining sensor elements ("Cs1," "Cs3," and "Cs4") are coupled to the negative bus 307, which is coupled to ground (e.g., to receive an excitation signal with a different polarity). According to the MPSC sensing techniques described herein, in the charge-transfer phase of the sensing operation, all sensor elements (e.g., "Cs1," "Cs2," "Cs3," and "Cs4") are coupled to each other, and sensor logic (not shown) is configured to measure the collective charge Q sum2 to measure the collective charge Q accumulated by all sensor elements during the pre-charge phase. sum2 is represented by equation (10) below: Qsum2=Cs2⋅(VDDA−Vref)−Vref⋅(Cs1+Cs3+Cs4)

[0041] In Fig. 3C illustrates the excitation pattern 300(3) for the precharge phase of a sensing operation in the context of the sensor array 321, wherein one sensor element ("Cs3") is coupled to the positive bus 305 (e.g., to receive an excitation signal with a positive polarity) and the remaining sensor elements ("Cs1," "Cs2," and "Cs4") are coupled to the negative bus 307, which is coupled to ground (e.g., to receive an excitation signal with a different polarity). According to the MPSC sensing techniques described herein, in the charge-transfer phase of the sensing operation, all sensor elements (e.g., "Cs1," "Cs2," "Cs3," "Cs4") are coupled together, and sensor logic (not shown) is configured to measure the collective charge Q sum3 to measure the collective charge Q accumulated by all sensor elements during the pre-charge phase. sum3is represented by equation (11) below: Qsum3=Cs3⋅(VDDA−Vref)−Vref⋅(CS1+Cs2+Cs4)

[0042] In Fig. 3D illustrates the excitation pattern 300(4) for the precharge phase of a sensing operation in the context of the sensor array 321, wherein one sensor element ("Cs4") is coupled to the positive bus 305 (e.g., to receive an excitation signal with a positive polarity) and the remaining sensor elements ("Cs1," "Cs2," and "Cs3") are coupled to the negative bus 307, which is coupled to ground (e.g., to receive an excitation signal with a different polarity). According to the MPSC sensing techniques described herein, in the charge-transfer phase of the sensing operation, all sensor elements (e.g., "Cs1," "Cs2," "Cs3," "Cs4") are coupled together, and sensor logic (not shown) is configured to measure the collective charge Q sum4to measure the collective charge Q accumulated by all sensor elements during the pre-charge phase. sum4 is represented by equation (12) below: Qsum4=Cs4(VDDA−Vref)−Vref(Cs1Cs2Cs3)

[0043] Fig. 4 shows the timing diagram 400 illustrating voltage waveforms for the excitation patterns 300(1) and 300(2), respectively, according to the exemplary embodiment of Fig. 3A-B. In the timing diagram 400, “VCs1,” “VCs2,” “VCs3,” and “VCs4” each represent the voltages of the excitation signals in a preparation phase (“Ph0”) for the four sensor elements of the sensor array, and “Vref” represents the reference voltage used by the CSD modulator circuit of the sensor logic, which is set to V ref = ½ VDDA is set.

[0044] According to the MPSC sampling techniques described herein, a sensor logic performs a sampling operation in the above two-phase manner for each sensor element “i” in the sensor array to obtain and store a corresponding measurement representing the collective charge Q sum1 which is accumulated by the sensor elements in the specific sampling process. After the sampling processes have been performed, there are four equations and four variables. The excitation matrix representing these sampling processes can therefore be written according to the system of equation (13) below: [Qsum1Qsum2Qsum3Qsum4]=[VDDA−Vref−Vref−Vref−Vref−VrefVDDA−Vref−Vref−Vref−Vref−VrefVDDA−Vref−Vref−Vref−Vref−VrefVDDA−Vref]×[Cs1Cs2Cs3Cs4]

[0045] A processing logic (and / or a component thereof) can then solve the system of equations (13) to obtain the data values ​​(“Cs1”, “Cs2”, “Cs3” and “Cs4”) representing the capacitances of the sensor elements of the array, according to the system of equations (14) below: [Cs1Cs2Cs3Cs4]=[VDDA−3⋅VrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDD A⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVDDA−3⋅VrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVref VDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVDDA−3⋅VrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VD DA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVrefVDDA2−4⋅VDDA⋅VrefVDDA−3⋅VrefVDDA2−4⋅VDDA⋅Vref]×[Qsum1Qsum2Qsum3Qsum4]

[0046] In an embodiment where the reference voltage used by the CSD modulator circuit of the sensor logic is set to V ref= ½ VDDA, the processing logic can use the system of equations (14) to calculate the measured charge (raw data counts) Q sum1 , Q sum2 Q sum3 and Q sum4 into data values ​​(also referred to as “code” or digital data values) representing the self-capacitances of the sensor elements, as expressed in the system of equations (15) below: [Cs1Cs2Cs3Cs4]=[0.25−0.25−0.25−0.25−0.250.25−0.25−0.25−0.25−0.250.25−0.25−0.25−0.25−0.250.25]×[Qsum1Qsum2Qsum3Qsum4]

[0047] In this embodiment, the noise reduction ratio of the FIR filter of the system K ns = 2. A noise reduction ratio K nsequal to “2” means that the white noise level in MPSC sampling according to the techniques described herein is two (2) times lower than the noise rejection ratio for conventional single-phase sampling using the same sampling time and the same excitation voltage “Vref” for a sensor array with the same number and type of sensor elements.

[0048] Various embodiments may use a reference voltage that is not substantially equal to half the VDDA voltage, and in such embodiments, the deconvolution coefficients (e.g., in the middle matrix of the system of equations 15) do not have equal absolute values. For example, if the reference voltage used by the CSD modulator circuit of the sensor logic is set to V ref = ⅓ VDDA, the system of equations (14) can be transformed into the system of equations (16) below: [Cs1Cs2Cs3Cs4]=[0−0.33−0.33−0.33−0.330−0.33−0.33−0.33−0.330−0.33−0.33−0.33−0.330]×[Qsum1Qsum2Qsum3Qsum4]

[0049] In an embodiment using the above system of equations (16), the noise reduction ratio of the system K ns= 1.75. Thus, while this embodiment is less effective for noise reduction than an embodiment using a reference voltage substantially equal to half the VDDA voltage, this embodiment illustrates that the techniques described herein for MPSC sampling can be implemented with various electronic components and comparators using different reference voltages. It should be noted, however, that as a general rule of the techniques described herein, a sum of the row values ​​of the excitation / deconvolution matrix cannot be equal to zero / a zero value, as the matrix would become singular and thus unsolvable.For example, if the reference voltage "Vref" is equal to one-quarter of the VDDA voltage, the corresponding excitation / deconvolution matrix would be singular, and processing logic would therefore not be able to simply calculate a solution based on the measurements received from the corresponding sampling processes. That is, the processing logic would not be able to deconvolution the received measurements into data values ​​according to the self-capacitances of the underlying sensor elements.

[0050] In some embodiments, the MPSC sampling techniques described herein may utilize longer multi-phase sequence controls within the sensor logic, which uses any full-wave converter to convert the entire excitation voltage waveform into an excitation signal of constant polarity (positive or negative). An example of such a full-wave converter is a CSD channel architecture that uses two integration capacitors. In exemplary embodiments using such a channel architecture, the sequence control of the sensor logic may be configured to operate according to four phases.

[0051] Fig.5A-5B are block diagrams illustrating the phases of MPSC sampling operations in such a four-phase architecture according to an exemplary embodiment. In such an embodiment, the precharge and charge-sharing phases of a sampling operation are intertwined, but the precharge phases (of successive sampling operations) are performed according to excitation patterns that differ from the excitation patterns used in a two-phase architecture. For example, according to the four-phase excitation patterns, the "negative" and "positive" groups of sensor elements are swapped in the precharge phases of successive sampling operations.During the charge sharing phases, the sensor elements are still coupled and sensed together, but the integration capacitors "Cint" used by the four-phase sensor logic are different from the modulation capacitors "Cmod" used in the sensor logic for the two-phase architecture.

[0052] Fig.Figure 5A illustrates the first two phases ("Ph0" and "Ph1") of a four-phase MSCP sampling operation. In the precharge phase 502 ("Ph0") of a first sampling operation, one of the sensor elements ("Cs1") of the sensor array 521 is coupled to the positive bus 505 to receive an excitation signal based on the supply voltage "VDDA," while the remaining sensor elements ("Cs2," "Cs3," and "Cs4") are coupled to the negative bus 507, which is coupled to ground. In the charge transfer phase 504 (“Ph1”) of the first sampling operation, the sensor logic 501 couples (or causes to couple) all sensor elements (e.g., “Cs1,” “Cs2,” “Cs3,” “Cs4”) together to the same node 513 (e.g., by using a suitable multiplexer).The sensor logic (or the components of the sensing channel thereof) then measures a signal representing the accumulated charge of all sensor elements based on a first integration capacitor with capacitance ("Cint1") coupled to a positive supply voltage source. Fig.Figure 5B illustrates the last two phases ("Ph2" and "Ph3") of the four-phase MSCP sampling operation. In the precharge phase 506 ("Ph2") of a second sampling operation, the coupling of the sensor elements is swapped—that is, the sensor element ("Cs1") previously coupled to the positive bus 505 is now coupled to the negative bus 507, while the remaining sensor elements ("Cs2," "Cs3," and "Cs4") are now coupled to the positive bus 505. Thereafter, in the charge transfer phase 508 (“Ph3”) of the second sampling operation, the sensor logic 501 couples (or causes to couple) all sensor elements (e.g., “Cs1,” “Cs2,” “Cs3,” “Cs4”) together to the same node 513 (e.g., by using a suitable multiplexer).The sensor logic (or the components of the sensing channel thereof) then measures a signal representing the accumulated charge of all sensor elements based on a second integration capacitor with capacitance (“Cint2”) coupled to a negative voltage supply source.

[0053] Fig. 6 shows the timing diagram 600 illustrating voltage waveforms for two of the excitation patterns according to the exemplary embodiment of Fig. 5A-5B. As illustrated in the timing diagram 600, while the reference voltage used by the sensor logic is still at V ref= ½ VDDA, the full wave of the excitation signal voltages ("VCs1", "VCs2", "VCs3", and "VCs4") during the precharge phases "Ph0" and "Ph2" is used. It should be noted that other excitation patterns according to the four-phase architecture can be formed in a similar way. Furthermore, a processing logic uses a system of equations similar to (14) to calculate the data values ​​(e.g., "Cs1", "Cs2", "Cs3", and "Cs4") representing the self-capacitances of the sensor elements of the sensor array 521, except that the coefficients in the deconvolution matrix are a sum of the absolute values ​​of the measured charges Q sum1 , Q sum2 , Q sum3 and Q sum4 which are inserted into each of the two integration capacitors with capacities C int1 or C int2 be fed in.

[0054] Various embodiments of the MPSC sensing techniques described herein may utilize various sensor arrays having multiple sensor elements and sensor logic having a receive / sense channel. Typically, mutual capacitance appears during operation between the sensor elements in the sensor arrays of such embodiments. Such mutual capacitance is parasitic in nature when self-capacitance sensing is used, and the techniques described herein effectively eliminate the effects of mutual capacitance in such embodiments. In this context, Fig. 7A a fragment of an exemplary sensor array with multiple sensor elements and Fig. 7B, 8A-8C show exemplary schemes to illustrate the elimination of the effects of mutual capacitance.

[0055] Fig.Figure 7A illustrates the structure of a fragment of a sensor array with self-capacitance sensor elements. Fig. 7A, the sensor array 721 is formed with row electrodes, such as electrodes 721(1) and 721(2), and column electrodes, such as electrodes 721(3) and 721(4). While in the sensor array fragment of Fig.7A, only two row electrodes and two column electrodes are shown, it should be noted that a sensor array may have any number (e.g., up to 71) of row and column electrodes. In the sensor array 721, the row electrodes 721(1)-721(2) are electrically isolated from each other and from each of the column electrodes 721(3)-721(4), which are also electrically isolated from each other. During operation, therefore, the row electrode 721(1) may have a self-capacitance "Cs1," the row electrode 721(2) may have a self-capacitance "Cs2," the column electrode 721(3) may have a self-capacitance "Cs3," and the column electrode 721(4) may have a self-capacitance "Cs4." However, as shown by the equivalent schemes 732 of Fig.7B, during the process, the row electrodes 721(1)-721(2) and the column electrodes 721(3)-721(4) may also be subject to capacitive coupling with each other. For example, a mutual capacitance "Cm1" may be formed between the row electrode 721(1) and the column electrode 721(3), a mutual capacitance "Cm2" may be formed between the row electrode 721(2) and the column electrode 721(3), a mutual capacitance "Cm3" may be formed between the row electrode 721(1) and the column electrode 721(4), and a mutual capacitance "Cm4" may be formed between the row electrode 721(2) and the column electrode 721(4). The elimination, according to the MPSC sensing techniques described herein, of these unwanted mutual capacitances is described in Fig. 8A-8C illustrated.

[0056] Fig.8A shows a scheme 832 that is equivalent to a precharge phase of a sensing operation on a sensor array, such as sensor array 721 of Fig. 7A. As in Fig. As illustrated in Figure 8A, during the precharge phase 802, all parasitic counter capacitors “Cm” collect the same charge and therefore have the same capacitance. Fig. 8B-8C illustrate a schematic 842 of the charge sharing phase 804 of the sensing process, in which all sensor elements of the sensor array are coupled together at node 813 (e.g., through a suitable multiplexer) and the sensor logic 801 is coupled thereto to measure the collective charge accumulated by the sensor elements. During the charge sharing phase 804, all "Cm" capacitors are themselves short-circuited (as indicated by reference numeral 815 in Fig.8C) when the sensor logic 801 samples the sensor elements of the sensor array, meaning that the "Cm" capacitors do not affect the accumulated charge value measured by the sensor logic 801 at node 813. In this way, the MPSC sampling techniques described herein provide for elimination of parasitic mutual capacitances that may occur during self-capacitance sampling of the sensor array.

[0057] In various embodiments, the MPSC sensing techniques described herein provide for the avoidance of some of the disadvantages that may be caused by conventional single-phase self-capacitance sensing. For example, in some embodiments, the techniques described herein provide for low EM emissions (e.g., by avoiding the use of an active shield signal), high sensitivity to determine the presence, position, and / or movement of conductive objects (e.g., by simultaneously sensing all sensor elements of a sensor array), and / or water-resistant operation (e.g., by eliminating the mutual capacitance side effect of water that may be present on the sensor array).Furthermore, in some embodiments, the techniques described herein reduce the sampling time with a constant SNR or increase the SNR if the sampling time is kept constant / consistent with conventional self-capacitance sampling techniques.

[0058] Various embodiments of the techniques described herein for MPSC sensing of sensor arrays may include various operations. These operations may be performed by hardware components, firmware / software, or a combination thereof. As used herein, the terms "coupled to" and "coupled with" mean directly coupled or indirectly coupled via one or more intermediate components. Any of the signals described herein provided via various buses may be time-multiplexed with other signals and provided via one or more common buses. Additionally, the interconnection between circuit components or blocks may be shown as buses or as individual signal lines. Each of the buses may alternatively be one or more individual signal lines, and each of the individual signal lines may alternatively be buses.

[0059] Certain embodiments may be implemented as a computer program product comprising instructions stored on a non-transitory computer-readable medium, such as, for example, volatile memory and / or non-volatile storage. These instructions may be used to program one or more devices comprising one or more general-purpose or special-purpose processors (such as, for example, central processing units or CPUs) or equivalents thereof (such as, for example, processing cores, processing engines, microcontrollers, and the like) such that, when executed by the processor(s) or equivalents thereof, the instructions cause the device(s) to perform the operations described herein for MPSC scanning of sensor arrays. The non-transitory computer-readable storage medium may include, but is not limited to, an electromagnetic storage medium (e.g.,floppy disks, hard disks, and the like), an optical storage medium (e.g., CD-ROM), a magneto-optical storage medium, a read-only memory (ROM), a random access memory (RAM), an erasable programmable memory (e.g., EPROM and EEPROM), a flash memory, or any other type of medium now known or later developed that is suitable for storing information.

[0060] Although the acts of the method(s) may be shown and described herein in a specific order, the order of each method may be changed so that certain acts may be performed in a reverse order or so that certain acts may be performed, at least in part, concurrently with other acts. In other embodiments, instructions or sub-acts of separate acts may be performed in an intermittent and / or alternating manner.

[0061] In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It should be understood, however, that various modifications and changes may be made thereto without departing from the scope of the invention as set forth in the appended claims. Accordingly, the specification and drawings are to be considered as illustrative and not restrictive.

Claims

[1] A device (110) comprising: a sensor logic (101) configured to couple a plurality of sensor elements (121(1) - 121(N)) from a sensor array (121) together and simultaneously sense them in each of a plurality of self-capacitance sampling operations to obtain a plurality of measurements, each measurement representing a collective charge of the plurality of sensor elements accumulated during a corresponding self-capacitance sampling operation of the plurality of self-capacitance sampling operations; and processing logic (102) configured to determine, based on the plurality of measurements, data values ​​each representing self-capacitances for each of the plurality of sensor elements (121(1) - 121(N)). [2] The apparatus (110) of claim 1, wherein during a particular self-capacitance sensing operation of the plurality of self-capacitance sensing operations, the sensor logic (101) is configured to excite a particular group of one or more sensor elements with a signal having an opposite polarity to signals coupled to the remaining sensor elements of the plurality of sensor elements (121(1) - 121(N)). [3] The device (110) of claim 1, wherein the sensor logic (101) is configured to excite the plurality of sensor elements (121(1) - 121(N)) according to an excitation matrix representing a plurality of excitation patterns corresponding to the plurality of self-capacitance sampling operations. [4] The apparatus (110) of claim 3, further including a multiplexer (113) configured to couple the sensor logic (101) to the plurality of sensor elements (121(1) - 121(N)) in accordance with the plurality of excitation patterns. [5] The apparatus (110) of claim 1, wherein in each of the plurality of self-capacitance sensing operations, the sensor logic (101) is configured to energize the plurality of sensor elements (121(1) - 121(N)) during a pre-charge phase and to measure the collective charge of the plurality of sensor elements (121(1) - 121(N)) during a charge-sharing phase. [6] The apparatus (110) of claim 1, wherein the sensor logic (101) includes a self-capacitance sensing channel, the self-capacitance sensing channel comprising one of a capacitance sigma-delta (CSD) modulator, a full-wave CSD modulator, and a slope converter. [7] The apparatus (110) of claim 1, wherein the processing logic (102) is configured to determine the data values ​​based on a matrix of deconvolution coefficients corresponding to the plurality of self-capacitance sampling operations. [8] The apparatus (110) of claim 1, wherein the plurality of measurements are representative of a conductive object in contact with or in proximity to the sensor array (121). [9] The apparatus (110) of claim 8, wherein the processing logic (102) is further configured to determine a position of the conductive object on the sensor array (121) based on the data values. [10] A method for multiphase self-capacitance sensing of a sensor array (121), the method comprising: Obtaining a plurality of measurements from a corresponding plurality of self-capacitance sampling operations on the sensor array (121), wherein obtaining a measurement from a corresponding Self-capacitance sensing process includes: coupling a plurality of sensor elements (121(1) - 121(N)) of the sensor array (121) together; and simultaneously detecting the plurality of sensor elements (121(1) - 121(N)); wherein the measurement represents a collective charge of the plurality of sensor elements (121(1) - 121(N)) accumulated during the corresponding self-capacitance sensing operation; and Determining, based on the plurality of measurements, data values ​​each representing self-capacitances for each of the plurality of sensor elements (121(1) - 121(N)). [11] The method of claim 10, further comprising energizing a particular group of one or more sensor elements during a particular self-capacitance sensing operation of the plurality of self-capacitance sensing operations with a signal having an opposite polarity to signals coupled to the remaining sensor elements of the plurality of sensor elements (121(1) - 121(N)). [12] The method of claim 10, further comprising exciting the plurality of sensor elements (121(1) - 121(N)) according to an excitation matrix representing a plurality of excitation patterns corresponding to the plurality of self-capacitance sampling operations. [13] The method of claim 10, further comprising energizing the plurality of sensor elements (121(1) - 121(N)) during a precharge phase in each of the plurality of self-capacitance sampling operations, wherein the simultaneous sensing of the plurality of sensor elements (121(1) - 121(N)) comprises measuring the collective charge of the plurality of sensor elements (121(1) - 121(N)) during a charge sharing phase. [14] The method of claim 10, wherein determining the data values ​​includes transforming the plurality of measurements based on a matrix of deconvolution coefficients corresponding to the plurality of self-capacitance sampling operations. [15] The method of claim 10, wherein the plurality of measurements are representative of a conductive object in contact with or proximate to the sensor array (121), and the method further includes determining a position of the conductive object on the sensor array (121) based on the data values. [16] A system (100) comprising: A sensor array (121) including a plurality of sensor elements (121(1) - 121(N)); A sensor logic (101) coupled to the sensor array (121), wherein the sensor logic (101) is configured to couple the plurality of sensor elements (121(1) - 121(N)) together and simultaneously sense them in each of a plurality of self-capacitance sampling operations to obtain a plurality of measurements, each measurement representing a collective charge of the plurality of sensor elements (121(1) - 121(N)) accumulated during a corresponding self-capacitance sampling operation of the plurality of self-capacitance sampling operations; and Processing logic (102) coupled to the sensor logic (101), the processing logic configured to determine, based on the plurality of measurements, data values ​​each representing self-capacitances for each of the plurality of sensor elements (121(1) - 121(N)). [17] The system (100) of claim 16, wherein during a particular self-capacitance sensing operation of the plurality of self-capacitance sensing operations, the sensor logic (101) is configured to excite a particular group of one or more sensor elements with a signal having an opposite polarity to signals coupled to the remaining sensor elements of the plurality of sensor elements (121(1) - 121(N)). [18] The system (100) of claim 16, wherein the plurality of sensor elements (121(1) - 121(N)) are a plurality of row electrodes or a plurality of column electrodes of the sensor array (121). [19] The system (100) of claim 16, further including a multiplexer (113) configured to couple the sensor logic (101) to the plurality of sensor elements (121(1) - 121(N)) in accordance with a plurality of excitation patterns corresponding to the plurality of sampling operations. [20] The system (100) of claim 16, wherein the plurality of measurements are representative of a conductive object in contact with or proximate to the sensor array (121), and the processing logic is further configured to determine a position of the conductive object on the sensor array (121) based on the data values.

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