DISPLAY DEVICE

Abstract

Display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) comprising: a substrate (21); a plurality of pixels (Pix) arranged in an array on the substrate (21) and configured to display different colors; an inorganic light-emitting element (3) provided for each of the pixels (Pix); a flattening film (27) surrounding at least one side surface of the inorganic light-emitting element (3); and an inorganic film (5) covering the flattening film (27) and the inorganic light-emitting element (3); a transistor (Tr1, Tr2, TrG) provided on a first surface of the substrate (21); an insulating film covering the transistor (Tr1, Tr2, TrG); and a cathode wiring (26) provided on the first surface of the substrate (21) and electrically coupled to a cathode of the inorganic light-emitting element (3), wherein the flattening film (27) and the inorganic film (5) are provided on an upper side of the insulating film from a display zone provided with a plurality of the inorganic light-emitting elements (3) to a peripheral zone positioned outside the display zone, the cathode wiring (26) is exposed at the bottom of a contact hole formed in the peripheral zone of the insulating film, and the inorganic film (5) covers a side surface of the flattening film (27) and is in contact with the cathode wiring (26) at the bottom of the contact hole.

Description

Field of InterestThe present invention relates to a display device.BackgroundInorganic electroluminescence (EL) displays provided with inorganic light emitting diodes (micro LEDs) serving as display elements have recently attracted attention (for example, see Patent Literature 1). In inorganic EL displays, a plurality of light emitting elements that emit light in different colors are arrayed on an array substrate. Inorganic EL displays do not require a light source because they are provided with self-emitting elements and have a higher light utilization efficiency because light is output without passing through a color filter. Inorganic EL displays have higher environmental resistance than organic EL displays provided with organic light emitting diodes (OLEDs) serving as display elements.Patent Literature 2 describes light emitting devices and methods for integrating micro LED devices into light emitting devices. In an embodiment of Patent Literature 2, a light emitting device includes a reflective bank structure inside a bank layer and a conductive line on the bank layer and raises above the reflective bank structure. A micro LED device is located within the reflective bank structure, and a passivation layer is located within the reflective bank structure over the bank layer and laterally around the micro LED device. A portion of the micro LED device and a conductive line on the bank layer protrude beyond an upper surface of the passivation layer.List of ReferencesPatent LiteraturePatent Literature 1: JP 2017-529 557 APatent Literature 2: US 2014 / 0 367 705 A1SummaryTechnical ProblemWhen moisture enters inorganic light emitting elements in inorganic EL displays, it may possibly cause corrosion in various types of electrodes, wiring, and other components coupled to the inorganic light emitting elements. In display devices provided with inorganic LEDs, the invasion of moisture may possibly decrease the luminous efficiency, thereby degrading the display characteristics.It is an object of the present invention to provide a display device that can prevent moisture from entering inorganic light emitting elements.Solution of the ProblemThe object is achieved according to the appended claims, preferred developments being described in the dependent claims.Brief Description of the DrawingsFIG. 1 is a plan view schematically illustrating a display device according to a first embodiment helpful for understanding the present invention and not reflected by the claims. FIG. 2 is a plan view of a plurality of pixels. FIG. 3 is a circuit diagram of the pixel circuit. FIG. 4 is a sectional view taken along the line IV--IV' of FIG. 1. FIG. 5 is a sectional view of a light emitting element according to the first embodiment. FIG. 6 is a sectional view of the display device according to a first modification of the first embodiment. FIG. 7 is a sectional view of the display device according to a second modification of the first embodiment, which is helpful for understanding the present invention and is not reflected by the claims. FIG. 8 is a sectional view of the display device according to a second embodiment. FIG. 9 is a sectional view of the light emitting element according to the second embodiment. FIG. 10 is a sectional view of the display device according to a modification of the second embodiment. FIG. 11 is a sectional view of the display device according to a third embodiment. FIG. 12 is a plan view of a plurality of pixels of the display device according to a fourth embodiment helpful for understanding the present invention and not reflected by the claims. FIG. 13 is a sectional view of the display device according to the fourth embodiment. FIG. 14 is a plan view of a plurality of pixels of the display device according to a modification of the fourth embodiment helpful for understanding the present invention and not reflected by the claims. FIG. 15 is a sectional view of the display device according to the modification of the fourth embodiment. DESCRIPTION OF EMBODIMENTSExamples of aspects (embodiments) for embodying the present invention will be described in more detail below with reference to the accompanying drawings. The contents described in the embodiments are not intended to limit the present invention. Components described below include components that are readily envisioned by those skilled in the art and components substantially identical thereto. For convenience of explanation, the drawings may more schematically illustrate the width, thickness, shape, and other elements of each unit than the actual aspect. However, these elements are given by way of example only and are not intended to limit the scope of the present invention. In the present specification and the figures, components similar to those described above with reference to previous figures are denoted by similar reference numerals, and the detailed explanation thereof may be omitted as appropriate.First EmbodimentFIG. 1 is a plan view schematically illustrating a display device according to a first embodiment. As illustrated in FIG. 1, a display device 1 includes an array substrate 2, a plurality of pixels Pix, driving circuits 12, a driving integration circuit (IC) 200, and a cathode wiring 26. The array substrate 2 is provided with, for example, a substrate 21, first transistors Tr 1, second transistors Tr 2, transistors TrG (see FIG. 4 ), and various types of wiring. The first transistors Tr 1, the second transistors Tr 2, and the other transistors are switching elements provided for the respective pixels Pix. The transistors TrG are switching elements included in the drive circuits 12.As illustrated in FIG. 1, the display device 1 has a display zone AA and a peripheral zone GA. The display region AA is provided overlapping the pixels Pix and displays an image. The peripheral region GA does not overlap the pixels Pix and is disposed outside the display region AA.The pixels Pix are arranged in an array in a first direction Dx and a second direction Dy in the display region AA of the substrate 21. The pixels Pix each include a light emitting element 3. The display device 1 displays an image by outputting light of different colors from the respective light emitting elements 3. The light emitting element 3 is an inorganic light emitting diode (LED) chip having a size of about 3 μm to 300 μm in plan view, and is referred to as a micro LED. A display device including the micro LEDs in the respective pixels is also referred to as a micro LED display device. The term "micro" of the micro LED is not intended to limit the size of the light emitting element 3.The first direction Dx and the second direction Dy are parallel to the surface of the substrate 21, and the first direction Dx is orthogonal to the second direction Dy. The first direction Dx may intersect the second direction Dy without being orthogonal thereto. A third direction Dz is orthogonal to the first direction Dx and the second direction Dy.The drive circuits 12 drive a plurality of gate lines (first gate lines GCL 1 and second gate lines GCL 2 (see FIG. 3 )) on the basis of various control signals received from the drive IC 200. The drive circuits 12 sequentially or simultaneously select a plurality of gate lines and supply gate drive signals to the selected gate lines. As a result, the drive circuits 12 select a plurality of pixels Pix coupled to the gate lines.The driving IC 200 is a circuit that controls the display on the display device 1. The driving IC 200 is mounted on the peripheral region GA of the substrate 21 by chip-on-glass (COG) bonding. The mounting shape of the driving IC 200 is not limited thereto, and the driving IC 200 may be mounted on FPCs or a rigid substrate coupled to the peripheral region GA of the substrate 21 by chip-on-film (COF) bonding.The cathode wiring 26 is provided in the peripheral region GA of the substrate 21. The cathode wiring 26 is provided by surrounding the pixels Pix in the display region AA and the driving circuits 12 in the peripheral region GA. Cathodes of a plurality of light emitting elements 3 are coupled to the common cathode wiring 26 and are supplied with, for example, a ground potential.FIG. 2 is a plan view of a plurality of pixels. As illustrated in FIG. 2, the pixels Pix each include the light emitting element 3, a second electrode 23, and a pixel circuit 28. the light emitting elements 3 are provided corresponding to the respective pixels Pix, and include first light emitting elements 3R, second light emitting elements 3G, and third light emitting elements 3B that output light in different colors. The first light emitting element 3R outputs red light. The second light emitting element 3G outputs green light. The third light emitting element 3B outputs blue light. In the following description, the first light emitting element 3R, the second light emitting element 3G, and the third light emitting element 3B are simply referred to as the light emitting elements 3 when they do not need to be distinguished from each other. The light emitting elements 3 may output light in four or more different colors.The pixels Pix including the first light emitting element 3R, the pixels Pix including the second light emitting element 3G, and the pixels Pix including the third light emitting element 3B are repeatedly arrayed in this order in the first direction Dx. In other words, the first light emitting element 3R, the second light emitting element 3G, and the third light emitting element 3B are repeatedly arrayed in this order in the first direction Dx. The first light emitting elements 3R, the second light emitting elements 3G, and the third light emitting elements 3B are each arrayed in the second direction Dy. In other words, in the example illustrated in FIG. 2, the light emitting elements 3 are respectively arranged side by side with other light emitting elements 3 that output light in different colors in the first direction Dx. The light emitting elements 3 are arranged side by side with other light emitting elements 3 that emit light of the same color, respectively, in the second direction Dy.FIG. 3 is a circuit diagram of the pixel circuit. The pixel circuit 28 is a driving circuit that drives the light emitting element 3. As illustrated in FIG. 3, the pixel circuit 28 includes a plurality of switching elements (the first transistor Tr 1, the second transistor Tr 2, a third transistor Tr 3 and a fourth transistor Tr 4), the first gate line GLC 1, the second gate line GLC 2, a signal line SGL, and a power supply line LVdd. The transistors are thin film transistors (TFTs).The first transistor Tr 1 is a driving TFT. The second transistor Tr 2 is a switching TFT for switching a light emission period and a non-light emission period. The third transistor Tr 3 and the fourth transistor Tr 4 are current switching TFTs. The signal line SGL is coupled to a constant current source. The power supply line LVdd is coupled to a constant voltage source.The holding capacitance CS 1 is formed between the drain of the second transistor Tr 2 and the anode of the light emitting element 3. The holding capacitance CS 2 is formed between the anode of the light emitting element 3 and the power supply line LVdd. With the holding capacitance CS 1 and CS 2, the pixel circuit 28 can prevent variations in a gate voltage due to a parasitic capacitance and a leakage current of the second transistor Tr 2.In the non-light emission period, the drive circuits 12 (see FIG. 1 ) switch the electric potential of the first gate line GCL 1 to the high level and switch the electric potential of the second gate line GCL 2 to the low level. As a result, the second transistor Tr 2 and the third transistor Tr 3 are turned ON, and the fourth transistor Tr 4 is turned OFF. An electric current Idata is supplied from the signal line SGL to the anode of the light emitting element 3.In the light emission period, the driving circuits 12 (see FIG. 1 ) switch the electric potential of the first gate line GCL 1 to the low level and switch the electric potential of the second gate line GCL 2 to the high level. As a result, the second transistor Tr 2 and the third transistor Tr 3 are turned OFF, and the fourth transistor Tr 4 is turned ON. To the anode of the light emitting element 3, an electric current Id is supplied from the power supply line LVdd. The configuration illustrated in FIG. 3 is given only as an example, and the configuration of the pixel circuit 28 and the operations of the display device 1 may be appropriately modified.FIG. 4 is a sectional view taken along line IV-IV' of FIG. 1. The array substrate 2 includes the substrate 21, the switching elements such as the first transistors Tr 1 and the second transistors Tr 2, the various types of wiring, and the various types of insulating films. In the peripheral region GA of the substrate 21, the transistors TrG included in the driving circuits 12 are provided as a plurality of transistors. The substrate 21 is an insulating substrate, and is, for example, a glass substrate, a resin substrate, or a resin film.In the present specification, a direction from the substrate 21 to an upper surface 27 aof a flattening film 27 in a direction perpendicular to the surface of the substrate 21 is referred to as an "upper side". A direction from the upper surface 27 aof a flattening film 27 to the substrate 21 is referred to as a "lower side". The "plan view" shows a view as viewed from the direction perpendicular to the surface of the substrate 21.The first transistors Tr 1, the second transistors Tr 2, and the transistors TrG are provided on a first surface of the substrate 21. The first transistor Tr 1 includes a semiconductor 61, a source electrode 62, a drain electrode 63, a first gate electrode 64A, and a second gate electrode 64B. The first gate electrode 64A is provided on the substrate 21 with a first insulating film 91 interposed therebetween. The insulating films including the first insulating film 91 are made of an inorganic insulating material such as a silicon oxide (SiO) film, a silicon nitride (SiN) film, and a silicon oxynitride (SiON) film. The inorganic insulating films are not limited to single layers, and may be multilayer films.A second insulating film 92 is provided on the first insulating film 91 to cover the first gate electrode 64A. The semiconductor 61 is provided on the second insulating film 92. A third insulating film 93 is provided on the second insulating film 92 to cover the semiconductor 61. The second gate electrode 64B is provided on the third insulating film 93. The semiconductor 61 is provided between the first gate electrode 64A and the second gate electrode 64B in the direction perpendicular to the substrate 21 (hereinafter referred to as a third direction Dz). In the semiconductor 61, a channel region is formed as a part between the first gate electrode 64A and the second gate electrode 64B.In the example illustrated in FIG. 4, the first transistor Tr 1 has what is referred to as a dual gate structure. The first transistor Tr 1 may have a bottom gate structure including the first gate electrode 64A and not including the second gate electrode 64B. Alternatively, the first transistor Tr 1 may have a top gate structure including the second gate electrode 64B alone and not including the first gate electrode 64A.The semiconductor 61 is made of, for example, amorphous silicon, a microcrystalline oxide semiconductor, amorphous oxide semiconductor, polycrystalline silicon, low-temperature polycrystalline silicon (LTPS), or gallium nitride (GaN). Examples of the oxide semiconductor include, but are not limited to, IGZO, zinc oxide (ZnO), ITZO, etc. IGZO is indium gallium zinc oxide, and ITZO is indium tin zinc oxide.A fourth insulating film 94 is provided on the third insulating film 93 to cover the second gate electrode 64B. The source electrode 62 and the drain electrode 63 are provided on the fourth insulating film 94. The source electrode 62 according to the present embodiment is electrically coupled to the semiconductor 61 through a contact hole H 5. The drain electrode 63 is electrically coupled to the semiconductor 61 through a contact hole H3.A fifth insulating film 95 is provided on the fourth insulating film 94 to cover the source electrode 62 and the drain electrode 63. The fifth insulating film 95 is a flattening film that flattens unevenness formed by the first transistor Tr 1 and the various types of wirings.The second transistor Tr 2 includes a semiconductor 65, a source electrode 66, a drain electrode 67, a first gate electrode 68A, and a second gate electrode 68B. The detailed explanation of the second transistor Tr 2 is omitted because it has a layer configuration similar to that of the first transistor Tr 1. The drain electrode 67 of the second transistor Tr2 is coupled to a coupling wiring 69 through a contact hole H8. The coupling wiring 69 is coupled to the first gate electrode 64A and the second gate electrode 64B of the first transistor Tr 1.Although the semiconductor 65, the source electrode 66, the drain electrode 67, the first gate electrode 68A, and the second gate electrode 68B are provided on the same layers as those of the semiconductor 61, the source electrode 62, the drain electrode 63, the first gate electrode 64A, and the second gate electrode 64B of the first transistor Tr 1, respectively, they may be provided on other layers.The transistor TrG includes a semiconductor 71, a source electrode 72, a drain electrode 73, a first gate electrode 74A, and a second gate electrode 74B. The transistor TrG is a switching element included in the drive circuits 12. The detailed explanation of the transistor TrG is omitted because it has a layer configuration similar to that of the first transistor Tr 1. The third transistor Tr 3 and the fourth transistor Tr 4 (see FIG. 3 ) also have a layer configuration similar to that of the first transistor Tr 1.The light emitting element 3 is provided on the fifth insulating film 95 with a sixth insulating film 96 interposed therebetween. The light emitting element 3 has what is called a face-down structure in which the anode and the cathode are provided on the lower side. The light emitting element 3 may be a commonly known LED chip. FIG. 5 is a sectional view of the light emitting element according to the first embodiment. In the light emitting element 3, as illustrated in FIG. 5, a buffer layer 32, an n-type cladding layer 33, an active layer 34, a p-type cladding layer 35, and a p-type electrode 36 are laminated on a light transmissive substrate 31 in this order. In the light emitting element 3, the light transmissive substrate 31 is provided on the upper side, and a p-type electrode 36 is provided on the lower side. The surface of the n-type cladding layer 33 facing a first electrode 22 has a region exposed from the active layer 34. This region is provided with an n-type electrode 38.The p-type electrode 36 is made of a material having metallic luster that reflects light from the light emitting layers. The p-type electrode 36 is coupled to the second electrode 23 with a bump 39A interposed therebetween. The n-type electrode 38 is coupled to the first electrode 22 with a bump 39B interposed therebetween.The n-type cladding layer 33, the active layer 34, and the p-type cladding layer 35 are light emitting layers and are made of a compound semiconductor such as gallium nitride (GaN) and aluminum indium phosphorus (AlInP).As illustrated in FIG. 4, the display device 1 further includes the first electrode 22, the second electrode 23, a third electrode 24, a fourth electrode 25, the flattening film 27, and an inorganic film 5. the first electrode 22 and the second electrode 23 are provided between the substrate 21 and the light emitting element 3. The first electrode 22 is a cathode electrode coupled to the cathode of the light emitting element 3. The first electrode 22 is provided on the sixth insulating film 96 and electrically coupled to the cathode wiring 26 provided in the peripheral region GA.A second electrode 23 is an anode electrode coupled to the anode of the light emitting element 3. The second electrode 23 is provided on the sixth insulating film 96 and coupled to a third electrode 24 through a contact hole H 7. The third electrode 24 is provided on the fifth insulating film 95 and coupled to the drain electrode 63 through a contact hole H 2. As described above, the second electrode 23 and the third electrode 24 couple the anode of the light emitting element 3 and the drain electrode 63 of the first transistor Tr 1. A fourth electrode 25 is provided on the same layer as that of the third electrode 24, and is coupled to the source electrode 62 through a contact hole H4.The fourth electrode 25 extends on the fifth insulating film 95 and faces the first electrode 22 with the sixth insulating film 96 interposed therebetween in the third direction Dz. With this configuration, a capacitance is formed between the first electrode 22 and the fourth electrode 25. The capacitance formed between the first electrode 22 and the fourth electrode 25 is used as the holding capacitance CS of a pixel circuit 28.A seventh insulating film 97 is provided on the sixth insulating film 96 in a manner that a part of the first electrode 22 and the second electrode 23 is covered. The flattening film 27 is provided on the seventh insulating film 97 in a manner surrounding at least the side surfaces 3 aof the light emitting element 3. The flattening film 27 is provided on the seventh insulating film 97 from the display region AA to the peripheral region GA. An upper surface 3 bof the light emitting element 3 is exposed from the flattening film 27 and in contact with the inorganic film 5. The flattening film 27 is a light-transmissive organic insulating film. The flattening film 27 is made of a resin material such as silicone resin, epoxy resin, acrylic resin and polyimide resin.The inorganic film 5 is provided by covering the flattening film 27 and the light emitting element 3, and is in contact with the upper surface 27 aof the flattening film 27 and the upper surface 3 bof the light emitting element 3. The inorganic film 5 is a dense film that can prevent moisture from entering therein, and is continuously formed without a through hole or an opening. The inorganic film 5 is provided on the seventh insulating film 97 from the display region AA to the peripheral region GA. Although a light emitting element 3 is illustrated in FIG. 4, the inorganic film 5 is provided by covering the entire region of the display region AA and a part of the peripheral region GA. The inorganic film 5 covers the upper surfaces 3 bof the light emitting elements 3 provided for the respective pixels Pix.The thickness of the inorganic film 5 is 50 nm or larger, and is more preferably 100 nm or larger. The thickness of the inorganic film 5 is, for example, about 200 nm. The inorganic film 5 is a light-transmissive insulating film and is made of an inorganic material including, for example, one or more of silicon nitride (SiN x), aluminum oxide (Al x O y) and aluminum oxynitride (Al x O y N z) as a main component. The inorganic film 5 is made of non-metal material. The inorganic film 5 may be a single-layer or multi-layer film.In the display device 1, the array substrate 2 includes the layers from the substrate 21 to the first electrode 22 and the second electrode 23. the array substrate 2 does not include the flattening film 27, the light emitting element 3, or the inorganic film 5.As described above, the display device 1 according to the present embodiment includes the substrate 21, a plurality of pixels Pix, the light emitting elements 3 (inorganic light emitting elements), the flattening film 27, and the inorganic film 5. The light emitting elements 3 are provided for the respective pixels Pix. The flattening film 27 surrounds at least the side surfaces 3 aof the light emitting elements 3. the inorganic film 5 covers the flattening film 27 and the light emitting elements 3.With the inorganic film 5, the display device 1 can prevent moisture from entering at least from the upper surface 27 aof the flattening film 27 and the upper surfaces 3 bof the light emitting elements 3. The display device 1 can prevent moisture from entering the light emitting elements 3 through the flattening film 27. As a result, the display device 1 can prevent various electrodes such as the first electrode 22 and the second electrode 23 and various types of wiring from being corroded by moisture. Accordingly, the display device 1 can prevent a reduction in the luminous efficiency of the light emitting elements 3 due to the invasion of moisture and the deterioration of the display characteristics.The display device 1 also includes the transistors (e.g., the first transistors Tr 1 and the second transistors Tr 2), the insulating layers (the fifth insulating film 95, the sixth insulating film 96, and the seventh insulating film 97), and the cathode wiring 26. The insulating layers cover the transistors. The cathode wiring 26 is provided on the first surface of the substrate 21 and electrically coupled to the cathodes of the light emitting elements 3. The flattening film 27 and the inorganic film 5 are provided on the upper side of the insulating layers (the fifth insulating film 95, the sixth insulating film 96, and the seventh insulating film 97) from the display region AA provided with the light emitting elements 3 to the peripheral region GA positioned outside the display region AA. With this configuration, the display device 1 can satisfactorily prevent moisture from entering the light emitting elements 3 because the inorganic film 5 is provided from the display region AA to the peripheral region GA.The upper surfaces 3 bof the light emitting elements 3 are exposed from the flattening film 27 and are in contact with the inorganic film 5. With this configuration, the display device 1 can increase extraction efficiency of light output from the light emitting elements 3 because the flattening film 27 is not provided on the upper surfaces 3 bof the light emitting elements 3.First Modification of the First EmbodimentFIG. 6 is a sectional view of the display device according to a first modification of the first embodiment. In the following description, the components described in the above embodiment are denoted by similar reference numerals, and an explanation thereof is omitted.As illustrated in FIG. 6, a display device 1A according to the present modification has a contact hole H 1 in the fifth insulating film 95. a top surface 26 aof the cathode wiring 26 is exposed at the bottom of the contact hole H 1. The flattening film 27 is provided not only on the seventh insulating film 97 but also covering a part of the cathode wiring 26 in the contact hole H 1. A side surface 27 bof the flattening film 27 is in contact with the cathode wiring 26. The upper surface 26 aof the cathode wiring 26 is exposed from the flattening film 27 on the side closer to the outer periphery of the substrate 21 than the part where the side surface 27 bof the flattening film 27 is in contact with the cathode wiring 26. In other words, the flattening film 27 is not provided on the side closer to the outer periphery of the substrate 21 than the part where the side surface 27 bof the flattening film 27 is in contact with the cathode wiring 26.The inorganic film 5 is continuously provided by covering the upper surface 27 aand the side surface 27 bof the flattening film 27. The inorganic film 5 is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact hole H 1. The inorganic film 5 is in contact with the sixth insulating film 96 on the side surface of the contact hole H 1. The inorganic film 5 extends to the side closer to the outer periphery of the substrate 21 than the contact hole H 1, and is provided on the seventh insulating film 97.The inorganic film 5 according to the present modification covers the upper surface 27 aand the side surface 27 bof the flattening film 27 and is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact hole H 1. With this configuration, since the side surface 27 bof the flattening film 27 is not exposed, the inorganic film 5 can prevent moisture from entering from the upper surface 27 aand the side surface 27 bof the flattening film 27. Accordingly, the display device 1A can prevent moisture from entering the light emitting elements 3 through the flattening film 27.Second Modification of the First EmbodimentFIG. 7 is a sectional view of the display device according to a second modification of the first embodiment. As illustrated in FIG. 7, the flattening film 27 of a display device 1B according to the present modification is provided by covering the side surfaces 3 aand the upper surface 3 bof the light emitting element 3. The inorganic film 5 is provided on the upper surface 27 aof the flattening film 27 to cover the light emitting element 3. In the third direction Dz, the flattening film 27 is provided between the upper surface 3 bof the light emitting element 3 and the inorganic film 5.In the present modification, the thickness of the flattening film 27 is larger than the height of the light emitting element 3. in the display device 1B, the thickness of the flattening film 27 does not need to be equal to the height of the light emitting element 3, thereby reducing the restrictions on the flattening film 27 due to the height of the light emitting element 3. Accordingly, the flattening film 27 of the display device 1B can be manufactured at a lower cost. When an LED chip in which the first light emitting element 3R, the second light emitting element 3G, and the third light emitting element 3B have different heights is used, for example, the flattening film 27 can be manufactured more easily.Second EmbodimentFIG. 8 is a sectional view of the display device according to a second embodiment. FIG. 9 is a sectional view of the light emitting element according to the second embodiment. In a display device 1C according to the present embodiment, a light emitting element 3A has what is referred to as a face-up structure in which the anode is provided on the lower side and the cathode is provided on the upper side.As illustrated in FIG. 9, the light emitting element 3A includes a plurality of sub light emitting elements 3 s, a protection layer 39, a p-type electrode 37, and an n-type electrode 38. The sub light emitting elements 3 shave a pillar shape and are provided between the p-type electrode 37 and the n-type electrode 38. The sub-light emitting elements 3 seach include an n-type cladding layer 33, an active layer 34, and a p-type cladding layer 35. The p-type electrode 37 is electrically coupled to the p-type cladding layer 35. The p-type cladding layer 35, the active layer 34, and the n-type cladding layer 33 are layered in this order on the p-type electrode 37.The n-type electrode 38 is made of a light-transmissive conductive material such as indium tin oxide (ITO). The n-type electrode 38 serves as a cathode of the light emitting element 3A and is coupled to the first electrode 22. The p-type electrode 37 serves as an anode of the light emitting element 3A, and includes a Pt layer 37 aand a thick Au layer 37 bgenerated by plating. The thick Au layer 37 bis coupled to a placement surface 23 aof the second electrode 23.The protective layer 39 is, for example, a spin-on glass (SOG). The side surfaces of the protection layer 39 correspond to the side surfaces 3 aof the light emitting element 3A. The flattening film 27 is provided by surrounding the side surfaces of the protective layer 39.As illustrated in FIG. 8, the second electrode 23 is provided between the substrate 21 and the light emitting element 3A. Specifically, the second electrode 23 is provided on the sixth insulating film 96 and coupled to the third electrode 24 through a contact hole H 7. The fourth electrode 25 extends on the fifth insulating film 95 and faces the second electrode 23 with the sixth insulating film 96 interposed therebetween in the third direction Dz. With this configuration, the capacitance is formed between the second electrode 23 and the fourth electrode 25.The first electrode 22 is coupled to the cathode of the light emitting element 3A and provided on the light emitting element 3A and the flattening film 27. The first electrode 22 is provided from the display region AA to the peripheral region GA and is provided along the upper surface 27 aand the side surface 27 bof the flattening film 27. The flattening film 27 has a contact hole H1a at a position overlapping the contact hole H1. The upper surface 26a of the cathode wiring 26 is exposed from the flattening film 27 at the bottom of the contact holes H1 and H1a. The first electrode 22 is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact holes H 1 and H 1 a. The first electrode 22 according to the present embodiment is made of a light-transmissive conductive material such as ITO.The inorganic film 5 is provided on the first electrode 22. Specifically, the inorganic film 5 covers an upper surface 22 aand a side surface 22 bof the first electrode 22. in other words, the first electrode 22 is provided between the inorganic film 5 and the upper surface 27 aof the flattening film 27 and between the inorganic film 5 and the side surface 27 bof the flattening film 27. At the bottom of the contact hole H1a, the first electrode 22 and the inorganic film 5 are layered on the cathode wiring 26 in this order.The inorganic film 5 is less hygroscopic than the first electrode made of, for example, ITO, and can prevent moisture from permeating therethrough. Also in the configuration where the first electrode 22 is provided on the flattening film 27 as illustrated in FIG. 8, the display device 1C can prevent moisture from passing through the first electrode 22 and the flattening film 27 and entering the light emitting elements 3.Modification of the Second EmbodimentFIG. 10 is a sectional view of the display device according to a modification of the second embodiment. In a display device 1D according to the present modification, the first electrode 22 is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact hole H 1. One end 22 cof the first electrode 22 is provided at a position overlapping the upper surface 26 aof the cathode wiring 26.In other words, the upper surface 26 aof the cathode wiring 26 is exposed from the first electrode 22 on the side closer to the outer periphery of the substrate 21 than the part where the end 22 cof the first electrode 22 is in contact with the cathode wiring 26.The inorganic film 5 covers the upper surface 22 aand the side surface 22 bof the first electrode 22, and the inorganic film 5 covers the end 22 cof the first electrode 22 and is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact hole H 1.With this configuration, the part where the first electrode 22 is in contact with the cathode wiring 26 and the part where the first electrode 22 is in contact with the flattening film 27 are covered with the inorganic film 5 and are not exposed to the outside. With the inorganic film 5 blocking a path through which moisture penetrates from the outside, the display device 1D can prevent moisture from passing through the first electrodes 22 and the flattening film 27 and penetrating into the light emitting elements 3.Third EmbodimentFIG. 11 is a sectional view of the display device according to a third embodiment. In a display device 1E according to the present embodiment, the flattening film 27 includes a first flattening film 27A and a second flattening film 27B provided on the first flattening film 27A.The first flattening film 27A and the second flattening film 27B are provided by surrounding the side surfaces 3 aof the light emitting element 3. The upper surface 3 bof the light emitting element 3 is exposed from an upper surface 27Ba of the second flattening film 27B.The first flattening film 27A is provided from the display region AA to the peripheral region GA, and a side surface 27Ab of the first flattening film 27A is provided in the contact hole H 1. A side surface 27B of the second flattening film 27B is provided at a position overlapping an upper surface 27Aa of the first flattening film 27A. In other words, the side surface 27B of the second flattening film 27B is provided at a position closer to the display region AA than is the side surface 27Ab of the first flattening film 27A. With this configuration, a step is formed by the upper surface 27Ba and the side surface 27B of the second flattening film 27B and the upper surface 27Aa of the part of the first flattening film 27A that is not provided with the second flattening film 27B. A step is also formed by the upper surface 27Aa and the side surface 27Ab of the first flattening film 27A and the upper surface 26 aof the cathode wiring 26.The first electrode 22 is provided by covering the first flattening film 27A, the second flattening film 27B, and the light emitting element 3. Specifically, the first electrode 22 covers the upper surface 27Ba and the side surface 27B of the second flattening film 27B, and the upper surface 27Aa of the part of the first flattening film 27A not provided with the second flattening film 27B and the side surface 27Ab. As described above, the first electrode 22 is provided along the steps formed by the first flattening film 27A and the second flattening film 27B.The inorganic film 5 covers a first upper surface 22 a 1, a first side surface 22 b 1, a second upper surface 22 a 2, and a second side surface 22 b 2 of the first electrode 22. The first side surface 22 b 1 is a part extending along the side surface 27B of the second flattening film 27B. The second upper surface 22 a 2 is a part extending along the upper surface 27Aa of the part of the first flattening film 27A that is not provided with the second flattening film 27B. The second side surface 22 b 2 is a part extending along the side surface 27Ab of the first flattening film 27A. The inorganic film 5 covers the end 22 cof the first electrode 22 and is in contact with the upper surface 26 aof the cathode wiring 26 at the bottom of the contact hole H 1.The display device 1E according to the present embodiment includes the first flattening film 27A and the second flattening film 27B, and has a plurality of steps. In the display device 1E, the heights of the respective steps can be made smaller than those of a step corresponding to the height of the light emitting element 3A. For example, when the height of the light emitting element 3A is about 5 μm to 10 μm, the display device 1E can prevent the generation of cracks and detachment of the steps in the first electrode 22 and the inorganic film 5.The flattening film 27 may comprise three or more layers. The configuration according to the present embodiment can be applied to the display devices 1, 1A, and 1B according to the first embodiment. In this case, the inorganic film 5 is provided in contact with the upper surface 27Ba and the side surface 27B of the second flattening film 27B and the upper surface 27Aa of the part of the first flattening film 27A not provided with the second flattening film 27B and the side surface 27Ab. The configuration according to the present embodiment can also be applied to the display devices 1F and 1G according to a fourth embodiment.Fourth EmbodimentFIG. 12 is a plan view of a plurality of pixels of the display device according to a fourth embodiment. FIG. 13 is a sectional view of the display device according to the fourth embodiment. For the sake of simplifying the drawing, FIG. 12 does not illustrate the inorganic film 5.As illustrated in FIG. 12, in a display device 1F according to the present embodiment, the pixels Pix including the second light emitting element 3G and the pixels Pix including the third light emitting element 3B are arranged side by side in the second direction Dy. The two pixels Pix arranged side by side in the second direction Dy are arranged side by side, one pixel Pix including the first light emitting element 3R in the first direction Dx. In this case, the first light emitting element 3R and the second light emitting element 3G are arranged side by side in the first direction Dx. The second light emitting element 3G and the third light emitting element 3B are arranged side by side in the second direction Dy. The first light emitting element 3R may be arranged side by side with the third light emitting element 3B in the first direction Dx.A plurality of flattening films 27 are provided for the respective light emitting elements 3. The flattening films 27 respectively surround the side surfaces 3 aof the first light emitting element 3R, the side surfaces 3 aof the second light emitting element 3G, or the side surfaces 3 aof the third light emitting element 3B. The flattening film 27 surrounding the first light emitting element 3R is separated from the flattening film 27 surrounding the second light emitting element 3G in the first direction Dx. The flattening film 27 surrounding the third light emitting element 3B is separated from the flattening film 27 surrounding the second light emitting element 3G in the second direction Dy. The flattening film 27 surrounding the first light emitting element 3R is separated from the flattening film 27 surrounding the third light emitting element 3B in the first direction Dx and the second direction Dy. The flattening films 27 may be formed and deposited by, for example, ink jet printing.A width W 1 of the flattening film 27 in the first direction Dx is larger than a width W 3 of the light emitting element 3 in the first direction Dx in plan view. A width W 2 of the flattening film 27 in the second direction Dy is larger than a width W 4 of the light emitting element 3 in the second direction Dy.As illustrated in FIG. 13, the light emitting element 3 according to the present embodiment has a face-down structure. The flattening film 27 is provided by surrounding the side surfaces 3 aof the light emitting element 3 and overlapping a part of the seventh insulating film 97. The upper surface 3 bof the light emitting element 3 is exposed from the flattening film 27. The inorganic film 5 covers the upper surface 27 aand the side surfaces 27 bof the flattening film 27 and the upper surface 3 bof the light emitting element 3, and is provided on the seventh insulating film 97 exposed from the flattening film 27. the inorganic film 5 is provided by surrounding the side surfaces 27 bof the flattening film 27. The inorganic film 5 extends from the display region AA to the peripheral region GA. The inorganic film 5 is provided between the light emitting elements 3 and between the flattening films 27 illustrated in FIG. 12.In the display device 1F according to the present embodiment, the flattening films 27 are provided for the respective light emitting elements 3. With this configuration, the region not provided with any light emitting element 3 has a higher light transmittance. The display device 1F can be used for what is called a transparent display having a translucent display device through which the opposite side of the screen can be seen.The array of pixels Pix illustrated in FIG. 12 is given only as an example, and the present embodiment can be applied to the array of pixels Pix illustrated in FIG. 2.Modification of the Fourth EmbodimentFIG. 14 is a plan view of a plurality of pixels of the display device according to a modification of the fourth embodiment. FIG. 15 is a sectional view of the display device according to the modification of the fourth embodiment.In a display device 1G according to the present modification, the light emitting element 3 has a face-up structure. As illustrated in FIGS. 14 and 15, the first electrode 22 is provided by covering the upper surface 27 aand the side surfaces 27 bof the flattening film 27 and the upper surface 3 bof the light emitting element 3. As illustrated in FIG. 14, the first electrodes 22 are provided for the respective light emitting elements 3, and are provided on the light emitting element 3 and the flattening film 27, respectively. The first electrode 22 is provided by covering the entire upper surface 27 aof the flattening film 27. The first electrode 22 may be provided for a part of the upper surface 27 aof the flattening film 27 or a part of the side surfaces 27 b.As illustrated in FIG. 15, the first electrodes 22 are respectively coupled to the cathode of the corresponding light emitting element 3 and to the cathode coupling wiring LC provided on the seventh insulating film 97. The cathode coupling wiring LC extends from the display region AA to the peripheral region GA and is coupled to the cathode wiring 26 exposed at the bottom of the contact hole H 1.The inorganic film 5 is provided by covering the upper surfaces and the side surfaces of the first electrodes 22. The inorganic film 5 is provided by surrounding the side surfaces of the first electrodes 22. The inorganic film 5 is provided on the seventh insulating film 97 in a manner to cover the cathode coupling wiring LC. The inorganic film 5 is provided from the display region AA to the peripheral region GA. The inorganic film 5 covers at the end LCa of the cathode coupling wiring LC and is in contact with the cathode wiring 26 at the bottom of the contact hole H 1.With this configuration, the part where the cathode coupling wiring LC is in contact with the cathode wiring 26 and the part where the first electrode 22 is in contact with the flattening film 27 are covered with the inorganic film 5 and are not exposed to the outside. With the inorganic film 5 blocking a path through which moisture penetrates from the outside, the display device 1G can prevent moisture from entering the light emitting elements 3.Reference Character List1, 1A, 1B, 1C, 1D, 1E, 1F, 1G display device 2 array substrate 3, 3 light emitting element 3 aside surface 3 bover surface 5 inorganic film 12 driving circuit 21 substrate 22 first electrode 22 aover surface 22 a1first upper surface 22 a2second upper surface 22 bside surface 22 b 1 first side surface 22 b 2 second side surface 22 cend 23 second electrode 23 aposition surface 24 third electrode 25 fourth electrode 26 cathode wiring 27 flattening film 27 a, 27Aa, 27Ba upper surface 27 b, 27Ab, 27B side surface 27A first flattening film 27B second flattening film 28 pixel circuit LC cathode coupling wiring LCA end Pix pixel

Claims

A display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) comprising: a substrate (21); a plurality of pixels (Pix) arrayed on the substrate (21) and configured to display different colors; an inorganic light emitting element (3) provided for each of the pixels (Pix); a flattening film (27) surrounding at least one side surface of the inorganic light emitting element (3); and an inorganic film (5) covering the flattening film (27) and the inorganic light emitting element (3); a transistor (Tr1, Tr2, TrG) provided on a first surface of the substrate (21); an insulating film covering the transistor (Tr1, Tr2, TrG); A cathode wiring (26) provided on the first surface of the substrate (21) and electrically coupled to a cathode of the inorganic light emitting element (3), wherein the flattening film (27) and the inorganic film (5) are provided on an upper side of the insulating film from a display region provided with a plurality of the inorganic light emitting elements (3) to a peripheral region positioned outside the display region, the cathode wiring (26) is exposed at the bottom of a contact hole formed in the peripheral region of the insulating film, and the inorganic film (5) covers a side surface of the flattening film (27) and is in contact with the cathode wiring (26) at the bottom of the contact hole.The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 1, wherein an upper surface of the inorganic light emitting element (3) is exposed from the flattening film (27) and is in contact with the inorganic film (5).The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 1, further comprising: a first electrode (22) coupled to the cathode of the inorganic light emitting element (3); and a second electrode (23) coupled to an anode of the inorganic light emitting element (3), wherein the first electrode (22) and the second electrode (23) are provided between the substrate (21) and the inorganic light emitting element (3).The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 1, further comprising: a first electrode (22) coupled to a cathode of the inorganic light emitting element (3); and a second electrode (23) coupled to an anode of the inorganic light emitting element (3), wherein the first electrode (22) is provided on the inorganic light emitting element (3) and the flattening film (27), the second electrode (23) is provided between the substrate (21) and the inorganic light emitting element (3), and the inorganic film (5) is provided on the first electrode (22).The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 4, wherein the first electrode (22) is provided along the side surface of the flattening film (27) and is in contact with the cathode wiring (26) at the bottom of the contact hole.The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 5, wherein an end of the first electrode (22) is provided at a position overlapping the cathode wiring (26) at the bottom of the contact hole, and the inorganic film (5) covers the end of the first electrode (22) and is in contact with the cathode wiring (26) at the bottom of the contact hole.The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to claim 1, wherein the flattening film (27) includes a first flattening film (27A) and a second flattening film (27B) provided on the first flattening film (27A), a side surface of the second flattening film (27B) is provided at a position overlapping an upper surface of the first flattening film (27A), and the inorganic film (5) is provided along a step formed by the upper surface of the first flattening film (27A) and an upper surface of the second flattening film (27B).The display device (1, 1A, 1B, 1C, 1D, 1E, 1F, 1G) according to any one of claims 1 to 7, wherein the inorganic film (5) is a light-transmissive inorganic insulating film having one or more of silicon nitride, aluminum oxide, and aluminum oxynitride as a main component.

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