METHOD FOR PRODUCING A SEMICONDUCTOR ELEMENT
An adhesive protection layer enhances the strength of semiconductor elements during thickness reduction and peeling, addressing defects and improving yield by stabilizing circuit elements during processing.
Patent Information
- Application Number
- DE112019006915
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2019-02-25
- Publication Date
- 2025-10-23
- Estimated Expiration
- 2039-02-25
AI Technical Summary
The reduction in thickness of semiconductor substrates to 20 μm or less leads to increased defects such as cracks, breakage, and delamination in circuit elements during division and peeling, reducing the yield of non-defective semiconductor elements.
Formation of an adhesive protection layer on the semiconductor substrate to enhance the strength and stability of circuit elements during thickness reduction, polishing, and peeling processes, using a combination of adhesive and peeling layers to facilitate controlled separation and transfer to a heat dissipation substrate.
The adhesive protection layer effectively suppresses defects in semiconductor elements, improving yield and reducing damage during processing, especially for high-frequency circuit elements.
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Abstract
Description
TECHNICAL AREA
[0001] The present invention relates to a method for manufacturing a semiconductor element. STATE OF THE ART
[0002] In the semiconductor industry, high-density packing for miniaturization, a reduction in the thickness of semiconductor elements, and improved heat dissipation for high performance are required. Reducing thickness involves mechanically and chemically polishing the back surface of a semiconductor substrate on which circuit elements, such as semiconductor structures, are formed.
[0003] To reduce the thickness, after bonding the front surface on which the semiconductor circuit elements are formed and a substrate, it is necessary to prevent cracking or damage to the circuit elements not only during the polishing step, but also during the substrate removal step and the parting (cutting) step after the polishing step.
[0004] The conventional steps for adhesive application, polishing, parting, and removal involve the following: (i) adhesively attaching a front surface on which a plurality of circuit elements are formed to a carrier substrate using an adhesive material such as a low melting point wax, an organic adhesive, an inorganic adhesive or an adhesive strip, (ii) Transferring to bond the majority of circuit elements to another substrate from the back surface after reducing the thickness (polishing) of the semiconductor substrate, (iii) Sharing the majority of circuit elements, (iv) Detaching the carrier substrate from the circuit elements by photon irradiation, heating, chemical etching and the like (see, for example, patent documents 1 and 2).
[0005] Patent document 3 discloses a method for manufacturing devices containing microelectromechanical systems (MEMS) using UV-curable tapes, comprising providing a silicon substrate with a MEMS layer. A first UV-curable tape is deposited onto the MEMS layer. At least one operation is performed on the substrate over an opposite side of the substrate. A second UV-curable tape is deposited on the opposite side of the substrate, and the first tape is removed by irradiation with UV light. At least one operation is performed on the MEMS layer to form individual MEMS chips, which can be individually removed from the second UV-curable tape by localized irradiation of the tape with UV light. DOCUMENTS OF THE STATE OF TECHNOLOGY Patent documents Patent document 1: Japanese patent application disclosure JP 2003-203 886 A Patent document 2: Japanese patent application disclosure JP 2005-159 155 A Patent document 3: DE 601 25 943 T2 SHORT DESCRIPTION Problem to be solved with the invention
[0006] As described above, the thickness of the back surface of the semiconductor substrate is reduced after the front surface of the semiconductor substrate, on which a plurality of circuit elements are formed, and the support substrate have been bonded together. If the thickness of the semiconductor substrate after this reduction is 50 µm or greater, the semiconductor elements can be manufactured without defects, such as damage to the circuit elements.
[0007] However, if the thickness of the semiconductor substrate is 20 µm or less after a reduction in thickness, the semiconductor substrate supporting the circuit elements is almost eliminated, and the strength of the circuit elements is reduced. In this case, defects such as cracks, breakage, and layer delamination are likely to occur in the circuit elements during the cutting and peeling process; therefore, the problem is that the number of defective semiconductor elements has increased and the number of non-defective elements has decreased.
[0008] The present invention was conceived with regard to the above problem and aims to provide a technique by which such defects in semiconductor elements can be prevented. Means to solve the problem
[0009] The problem underlying the invention is solved by a method for manufacturing a semiconductor element with the features of independent claim 1. Advantageous embodiments of the invention are specified in dependent claims 2 to 7. Effects of the invention
[0010] According to the present invention, defects in a semiconductor element can be prevented by forming an adhesive protective layer.
[0011] The objectives, features, aspects and advantages of the present invention will become even clearer from the following detailed description and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The figures show: Fig. 1 a flowchart illustrating the manufacturing steps for a semiconductor element according to embodiment 1; Fig. 2 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 3 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 4 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 5 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 6 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 7 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 8 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 9 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 10 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 11 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 12 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 1; Fig. 13 a flowchart illustrating the manufacturing steps for a semiconductor element according to embodiment 2; Fig. 14 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 2; Fig. 15 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 2; Fig. 16 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 2; Fig. 17 a cross-sectional view showing the manufacturing steps for the semiconductor element according to embodiment 2. DESCRIPTION OF EXECUTION FORMS Execution form 1
[0013] Next, a method for manufacturing the semiconductor unit according to embodiment 1 is described. Fig. Figure 1 is a flowchart illustrating the manufacturing steps for a semiconductor element according to embodiment 1. Fig. Figures 2 to 12 are cross-sectional views illustrating the manufacturing steps. In embodiment 1, the following steps are performed: forming an adhesive layer and an adhesive layer on a semiconductor substrate on which a plurality of circuit elements are formed; bonding the adhesive layer and a carrier substrate to each other; reducing the thickness of the substrate (polishing); dividing (cutting) by chip singulation or the like; bonding a transfer substrate; removing the carrier substrate; removing the adhesive layer; and removing the adhesive layer in that order.
[0014] The following describes, as an example, a manufacturing process for producing a semiconductor element with high output power and heat dissipation efficiency, which is improved by reducing the thickness (by polishing) of the back surface of the semiconductor substrate on which a high-frequency circuit element consisting of a gallium nitride semiconductor is formed, and by transferring the high-frequency circuit element to a substrate on which a diamond layer is formed as a heat-dissipating substrate.
[0015] An increase in thermal conductivity is required to improve the heat dissipation efficiency of the circuit element and achieve high output power. To this end, it is conceivable to remove the semiconductor substrate, except for the area where the circuit element is formed, by reducing its thickness. However, if the thickness of the circuit element becomes approximately 10 µm, its strength decreases, making the circuit element, and consequently the semiconductor element, susceptible to defects due to breakage or similar issues during the cutting, bonding, and detachment processes.
[0016] In embodiment 1, described below, the prevention of such defects in the semiconductor element is ensured. The following embodiment 1 is not limited to the following manufacturing process and can be used in any process for manufacturing a semiconductor element that involves reducing the thickness (polishing) of a semiconductor circuit element.
[0017] As in Fig. As shown in Figure 2, a plurality of circuit elements 2 are first formed on a first main surface (a front surface) of a semiconductor substrate 1, such as a silicon wafer or a silicon carbide wafer (SiC wafer). A circuit element 2 has, for example, a metal electrode, a defect region in the semiconductor substrate 1, and the like. It should be noted that the plurality of circuit elements 2 in Fig. 2 and the like is simplified and the area in which the majority of circuit elements 2 are formed is shown.
[0018] As in Fig. As shown in Figure 3, an adhesive protective layer 3 is next formed by application to the first main surface of the semiconductor substrate 1, and the circuit elements 2 are covered with the adhesive protective layer 3 (step S1 in Figure 3). Fig. 1) The adhesive protective layer 3 is a layer for reinforcing the layer strength in order to prevent the circuit elements 2, whose thickness is reduced in a later step, from being deformed or damaged due to layer stresses or the like, and it is a layer with a comparatively strong adhesive strength towards the circuit elements 2.
[0019] If the circuit element 2 is a high-frequency circuit element that has an electrode (not shown) with a hollow structure, such as an air bridge structure, the electrode is protected by an adhesive protective layer 3 so that it is not damaged in a later step for removal or the like.
[0020] The adhesive protective layer 3, for example, comprises an adhesive containing a material that includes an organic solvent and a thermosetting resin or a photon-curable resin, and which can be removed by chemical treatment. The material includes, for example, an acrylic resin, an olefin resin, a phenolic resin, a polypropylene resin, a polyethylene resin, and the like.
[0021] One method for applying the adhesive protective layer 3 is, for example, a spin coating process in which the adhesive, which is to become the adhesive protective layer 3, is applied to the first main surface of the semiconductor substrate 1, on which the circuit elements 2 are formed, and then rotated at high speed about the center in the plane of the semiconductor substrate 1. The coating thickness of the adhesive protective layer 3 is, for example, 5 µm to 8 µm.
[0022] The method for applying the adhesive protective layer 3 can also be a printing process, a spraying process, or the like. By heating the applied adhesive protective layer 3 to 90 °C to 120 °C on a hot plate or the like, the solvent component of the adhesive protective layer evaporates, and the adhesive protective layer 3 is cured. If the adhesive protective layer 3 contains a photon-curable resin, the dried adhesive protective layer 3 can be irradiated with photons to cure it.
[0023] As in Fig. As shown in 4, a deposition layer 5 is then formed separately from the semiconductor substrate 1 on a support substrate 6 to form a first structure (step S2 in Fig. 1), which has been processed in the previous steps. The release layer 5, for example, has an adhesive consisting of a resin made from an organic solvent and a carbon material, which absorbs heat and thermally decomposes when irradiated with photons.
[0024] The release layer 5 is formed, for example, by application using a spin coating process, a printing process, a spraying process, or the like, followed by heating and drying. A hard and translucent wafer, such as alkali-free glass or sapphire glass, is used for the support substrate 5.
[0025] As in Fig. As shown in section 4, a second structure is also formed on the adhesive protection layer 3 (step S2 in Fig. 1), in which the adhesive layer 4 is formed. In embodiment 1, the adhesive layer 4 comprises an adhesive consisting of an ultraviolet-curable resin, such as urethane acrylate, acrylic resin acrylate, or epoxy acrylate, and an organic solvent. The adhesive layer 4 is formed, for example, by application using a spin coating process, a printing process, a spraying process, or the like, followed by heating and drying.
[0026] As in Fig. As shown in Figure 5, the first and second structures are placed on top of each other to bring the release layer 5 and the adhesive layer 3 into contact. In this state, the first and second structures are bonded together by irradiating the adhesive layer 4 with ultraviolet radiation from the side of the translucent support substrate 5 to cure the resin of the adhesive layer 4 (step S3 in Figure 5). Fig. 1).
[0027] It is not necessary for the adhesive layer 3 to contain a resin curable by ultraviolet radiation. However, if the adhesive layer 4 contains a resin curable by ultraviolet radiation, as in embodiment 1, the adhesive layer 4 can be cured in a comparatively short time, so that a reduction in process time and the prevention of misalignment during positioning can be expected.
[0028] If, at the time of the aforementioned adhesive application (bonding), air or similar material is trapped in the adhesive layer 4 and the release layer 5, this area will be unbonded and will cause a reduction in bond strength. Therefore, if the adhesive layer 4 and the release layer 5 are degassed in a vacuum before the adhesive application and the application is carried out afterward, the unbonded areas can be reduced, thus preventing a reduction in bond strength.
[0029] As described above, a laminated body is formed in which the adhesive protective layer 3, the adhesive layer 4, the release layer 5, and the support substrate 6 are arranged in that order on the first main surface of the semiconductor substrate 1, on which the majority of circuit elements 2 are formed. The formation of this laminated body is not limited to the above. For example, the laminated body can also be formed by forming the adhesive protective layer 3, the adhesive layer 4, the release layer 5, and the support substrate 6 in that order on the first main surface of the semiconductor substrate 1.
[0030] As in Fig. As shown in Figure 6, the semiconductor substrate 1, with the exception of the area in which the majority of circuit elements 2 are formed, is next removed from the second main surface (the back surface) opposite the first main surface by reducing the thickness, which has a polishing effect (step S4 in Figure 6). Fig. 1).
[0031] The thickness of the semiconductor substrate 1 before polishing is, for example, 500 µm, and the thickness of the semiconductor substrate 1 after polishing is, for example, 20 µm. Polishing methods for the semiconductor substrate 1 include, for example, mechanical polishing, chemical polishing, mechanochemical polishing, and the like. The thickness of the semiconductor substrate 1 is then further reduced, for example, by a dry etching process such as reactive ion etching (RIE), to reduce the thickness of the semiconductor substrate 1 to, for example, 10 µm.
[0032] As in the Fig. 7 and Fig. As shown in Figure 8, the majority of circuit elements 2, the adhesive protection layer 3, the adhesive layer 4, the release layer 5, and the carrier substrate 6 are then separated into chips by means of a separation step (a cutting step) by chip singulation or the like (step S5 in Figure 8). Fig. 1) Accordingly, each of the plurality of circuit elements 2 is isolated. Chip isolation methods used include, for example, mechanical chip isolation using a chip isolation blade, laser chip isolation, plasma chip isolation, and the like.
[0033] In a manufacturing process where the adhesive protective layer 3 is not applied, the semiconductor substrate 1, which contains the majority of circuit elements 2, is largely removed, thus reducing the layer strength and allowing a deformation force to act due to remaining layer stresses. For this reason, cracking, delamination, chipping, or flaking of the layer, and the like, can occur during the separation process, and the circuit elements 2 can become defective.
[0034] In embodiment 1, the circuit elements 2, which have a reduced thickness, adhere firmly to the adhesive protective layer 3, and the layer strength of the circuit elements 2 and the like is improved by the adhesive protective layer 3, thus preventing deformation of the circuit elements 2 due to the remaining layer stresses. Therefore, the prevention of defects in the circuit elements 2 due to cracking, detachment, chipping, or spalling during the separation process, and ultimately defects in the semiconductor element, is ensured.
[0035] As in Fig. As shown in Figure 9, the area in which the circuit elements 2 are formed is next bonded to the transfer substrate 7 for heat dissipation (step S6 in Figure 9). Fig. 1) In embodiment 1, the circuit elements 2 are bonded to the transfer plate 7 for each individual circuit element 2. For example, a substrate is used as the transfer substrate 7 in which a diamond layer with a thickness of 100 µm is formed on a silicon substrate and the surface roughness (for example, the root mean square value or RMS value of the roughness Rq) of the diamond layer is reduced to 1 nm or less by a precision polishing process.
[0036] For bonding the circuit elements 2 and the transfer substrate 7, for example, bonding at room temperature is used. In particular, the polished surface on the side of the circuit elements 2 and the diamond bonding surface on the side of the transfer substrate 7 are irradiated with an argon ion beam in a vacuum chamber to remove the oxides on these surfaces (to clean them).
[0037] Subsequently, the surfaces from which the oxides have been removed are aligned relative to each other, and the surfaces are brought into contact under vacuum and pressurized to perform bonding at room temperature. Bonding at room temperature is advantageous in that deformation, such as warping or distortion of the circuit elements 2, can be prevented, since heating, which induces thermal stresses, is not required for the support substrate 6 and the transfer substrate 7.
[0038] The steps described below (steps S7 to S9 in Fig. 1) The carrier substrate 6, the release layer 5, the adhesive layer 4 and the adhesive protective layer 3 are then detached (removed) from the structure formed in the previous steps.
[0039] As in Fig. As shown in Figure 10, the detachment layer 5 and the support substrate 6 are first detached by irradiating the detachment layer 5 with photons to thermally decompose it (step S7 in Figure 10). Fig. 1) In embodiment 1, the resin of the release layer 5 is thermally decomposed by photon irradiation of the structure formed in the previous steps from the side of the support substrate 6, and the support substrate 6 is detached together with the release layer 5. For the photon irradiation, for example, a laser is used that scans the entire surface of the release layer 5.
[0040] When the release layer 5 is irradiated with a laser, carbon and similar materials in the release layer 5 absorb light, are heated, and thermally decompose. As a result, the adhesion (the adhesive strength, the degree of adhesion) between the support substrate 6 and the adhesive layer 4 is reduced, so that the release layer 5 and the support substrate 6 can be easily detached.
[0041] As in Fig. As shown in Figure 11, the next step is to remove the adhesive layer 4 by means of a heat treatment (step S8 in Figure 11). Fig. 1) The adhesive layer 4 adheres firmly to the protective adhesive layer 3; therefore, the adhesive layer 4 cannot be removed with an adhesive strip. Therefore, a heat treatment is carried out to reduce the adhesion between the adhesive layer 4 and the protective adhesive layer 3 in order to remove it.
[0042] The heat treatment releases the organic component as a gas from the adhesion promoter layer 4 and the adhesion promoter protective layer 3, and reduces the adhesion between the adhesion promoter layer 4 and the adhesion promoter protective layer 3, allowing the adhesion promoter layer 4 to be detached.
[0043] The heat treatment temperature can be equal to or higher than the curing temperature at which the adhesion promoter layer 3 is formed. For example, if the adhesion promoter layer 3, which is cured at 90 °C using a hot plate in step S1, is heated for 10 minutes on the hot plate set to 200 °C, the adhesion promoter layer 4 can be easily removed. If the heating temperature for removing the adhesion promoter layer 4 is lower than 150 °C, the gas is released in such small quantities that the aforementioned adhesion is not significantly reduced, and considerable force is required to remove the adhesion promoter layer 4.
[0044] However, if the heating temperature for removing the adhesive layer 4 significantly exceeds 220 °C, the circuit element 2 will be deformed, for example, warped or distorted, causing damage or cracks in the subsequent removal step. Therefore, the heating temperature for removing the adhesive layer 4 is preferably, for example, between 170 °C and 220 °C. By applying an adhesive strip to the adhesive layer 4 after the heat treatment, the adhesive layer 4 can be easily removed without leaving any residue.
[0045] As in Fig. As shown in 12, the adhesive protective layer 3 is finally removed by means of a chemical treatment (step S9 in Fig. 1) Removal is carried out by immersing the adhesive protective layer 3 in a removal solution, such as an alkaline, acidic, or organic solvent, and decomposing it. After removal of the adhesive protective layer 3, the semiconductor elements, consisting of the circuit elements 2 and the transfer substrate 7, can be fabricated by cleaning and drying them. Effects of embodiment 1
[0046] In the method for manufacturing a semiconductor element according to embodiment 1, as described above, defects in a semiconductor element, such as an element of a high-frequency circuit arrangement, can be prevented by forming the adhesive protective layer 3. Design 2
[0047] Next, a method for manufacturing a semiconductor unit according to embodiment 2 is described. Fig. Figure 13 is a flowchart illustrating the manufacturing steps for a semiconductor element according to embodiment 2, and the Fig. Figures 14 to 17 are cross-sectional views illustrating each of the manufacturing steps. In the following, components according to embodiment 2 are identified as the same or similar components as those described above, using the same or similar reference numerals, and mainly differing components are described.
[0048] The manufacturing steps according to Fig. 13 are the same as the manufacturing steps in the manufacturing steps according to embodiment 1 ( Fig. 1), wherein step S5 is inserted between steps S8 and S9. In embodiment 2, the following is carried out: forming an adhesive layer and an adhesive layer on a semiconductor substrate on which a plurality of circuit elements are formed, bonding the adhesive layer and a carrier substrate to each other, reducing the thickness of the substrate (polishing), bonding a transfer substrate, removing the carrier substrate, removing the adhesive layer, separating (cutting) by means of chip singulation or the like, and removing the adhesive layer in this order.
[0049] In embodiment 2, the following steps are carried out first, S1 to S4, according to Fig. 13 the same steps as steps S1 to S4 according to Fig. 1. Performed (the steps of Fig. 2 to 6), which are described in embodiment 1. Then, steps similar to steps S6 to S8 described in embodiment 1 are carried out according to Fig. 1. The following describes only the main content relating to steps that follow step S6.
[0050] As in Fig. As shown in Figure 14, the area in which the majority of circuit elements 2 are formed is first bonded to the transfer substrate 7 for heat dissipation (step S6 in Figure 14). Fig. 13). For bonding the circuit elements 2 and the transfer substrate 7, for example, bonding at normal temperature is used.
[0051] As in Fig. As shown in Figure 15, the detachment layer 5 and the support substrate 6 are next detached from the structure formed in the previous steps by irradiating the detachment layer 5 with photons to thermally decompose it (step S7 in Figure 15). Fig. 13). As in Fig. As shown in 16, the adhesive layer 4 is then removed by means of a heat treatment (step S8 in Fig. 13).
[0052] As in the Fig. 17 and Fig. As shown in Figure 11, the majority of circuit elements 2, the adhesive protection layer 3, and the transfer substrate 7 are next separated into chips by means of a separation step (a cutting step) by chip singulation or the like (step S5 in Figure 11). Fig. 13) For chip singulation, for example, laser chip singulation is used, in which the transfer substrate 7 is irradiated with a laser. This is because the transfer substrate 7, which is made from a diamond layer with high hardness, cannot be separated (cut) using the mechanical chip singulation method with a chip singulation blade.
[0053] It should be noted that the relatively high output power of the laser could affect the circuit elements 2. Therefore, performing the separation step before removing the adhesive layer 3 prevents damage, such as chipping, flaking, or tearing, to the circuit elements 2 and the adhesive layer 3. However, if the effect of the laser power on the circuit element 2 is low, the separation step can be performed after removing the adhesive layer 3.
[0054] As in Fig. As shown in 12, the adhesive protective layer 3 is finally removed by means of a chemical treatment (step S9 in Fig. 13); thereby producing the semiconductor elements consisting of the circuit elements 2 and the transfer substrate 7. Effects of embodiment 2
[0055] As in embodiment 1, defects in a semiconductor element, such as an element of a high-frequency circuit arrangement, can also be prevented in embodiment 2 by forming the adhesive protective layer 3.
[0056] Furthermore, in embodiment 1, the transfer substrate 7, which has the same dimensions as the circuit element 2, is bonded to the circuit element 2, which was separated into individual chips by the separation step ( Fig. 9) In embodiment 2, the transfer substrate 7 is first bonded to the circuit elements 2, the adhesive layer 4 and the like are removed, and then the separation step is carried out. In the manufacturing process according to embodiment 2, as described above, the majority of circuit elements 2 can, for example, be bonded collectively to the transfer substrate 7. Therefore, the process time can be shortened, and the carrier substrate can be reused, thus reducing process costs.
[0057] Furthermore, process costs can be reduced because the diamond layer, which serves as the heat transfer substrate 7, can be processed uniformly on the large substrate. Additionally, the removal step of the release layer 5 and the adhesive layer 4 can be performed simultaneously; therefore, the layer strength of the circuit elements 2 at the time of removal is improved compared to when the layers are removed from circuit elements 2 that have been separated into individual chips. This ensures that damage to the circuit element 2 during the removal step is prevented. embodiment 3
[0058] The adhesive layer 4 and the protective adhesive layer 3 adhere firmly to each other and hardly separate during the polishing and separation steps; therefore, no damage or the like is caused to the circuit elements 2. However, the adhesive layer 4 does not detach easily and cannot be easily removed using the removal method with an attached removal strip.
[0059] Therefore, the organic solvent component is removed during the heat treatment of step S8 ( Fig. 1 and Fig. 13) of embodiments 1 and 2 are released from the adhesive protective layer 3, and the bonding force at the boundary layer between the adhesive layer 4 and the adhesive protective layer 3 is reduced; therefore, the removal of the adhesive layer 4 by the removal process or the like is ensured.
[0060] Now, a large portion of the organic component of the adhesion promoter layer 3 evaporates during its formation step; however, it does not evaporate completely, and it evaporates almost completely upon heating to an even higher temperature. It is assumed that an organic solvent with a boiling point of 120 °C to 200 °C should be used for the adhesion promoter layer 3.
[0061] The use of an organic solvent with a comparatively low boiling point for the adhesion promoter layer 3 reduces the strength of the adhesion promoter layer 3, which contributes to the delamination of the adhesion promoter layer 4. Conversely, the use of an organic solvent with a high boiling point for the adhesion promoter layer 3 results in an adhesion promoter layer 3 with low layer strength, since the organic solvent does not evaporate unless the drying temperature is increased.
[0062] Therefore, in embodiment 3 of the present invention, the adhesive protective layer 3 contains a plurality of types of organic solvent components with different boiling points. As a result, even at the same drying temperature, a larger quantity of the solvent with a high boiling point remains than the solvent with a low boiling point, thus increasing the amount of organic components in the adhesive protective layer 3 that evaporate when the adhesive layer 4 is removed; therefore, the removal of the adhesive layer 4 is easily accomplished. Meanwhile, the adhesive protective layer 3 can be formed with a high layer strength.
[0063] For the organic solvent of the adhesion promoter protective layer 3, a solvent is used in which two or more types of the following solvents are mixed, for example polypropylene glycol, monomethyl ether, 3-methoxybutyl acetate, ethyl lactate, 2-ethoxyethyl acetate, N-butyl acetate, xylene, toluene and the like. Effects of embodiment 3
[0064] In the method for manufacturing the semiconductor unit according to embodiment 3, as described above, the adhesive layer 4 can be removed more easily. modification
[0065] In the manufacturing process of embodiment 1 ( Fig. 1) The separation step (step S5) is performed between the thickness reduction step (step S4), which involves polishing the semiconductor substrate 1, and the joining step (step S6) of the transfer substrate 7. In the manufacturing process of embodiment 2 ( Fig.13) The separation step (step S5) is performed between the removal step (step S8) of the adhesive layer 4 and the removal step (step S9) of the adhesive protective layer 3. However, the present invention is not limited to this, and the separation step (step S5) can be performed after the thickness reduction step (step S4).
[0066] It should be noted that embodiments of the present invention can be combined with one another in any way and modified in a suitable manner, and features can be omitted without deviating from the scope of the invention.
[0067] Although the invention is described in detail, the foregoing description is in all aspects illustrative and non-restrictive. It is understood that numerous further modifications and variations can be conceived without deviating from the scope of the invention. EXPLANATION OF REFERENCE MARKS 1 Semiconductor substrate 2 Circuit element 3. Adhesive protective layer 4. Adhesive layer 5 Detachment layer 6 Carrier substrate 7 Transfer substrate
Claims
[1] Method for manufacturing a semiconductor device comprising the following steps: (a) Adherence of an adhesive protective layer (3) to a release layer (5) by means of an adhesive layer (4) which is different from the release layer (5) to form a laminated body in which the adhesive protective layer (3), the adhesive layer (4), the release layer (5) and a support substrate (6) are arranged in that order on a first main surface of a semiconductor substrate (1) on which a plurality of circuit elements (2) is formed; (b) Removing the semiconductor substrate (1) except for an area in which the majority of circuit elements (2) are formed by polishing the semiconductor substrate (1) from a second main surface opposite the first main surface; (c) Bonding the area in which the majority of circuit elements (2) are formed to a transfer substrate (7); (d) Removal of the detachment layer (5) and the support substrate (6) by means of photon irradiation of the detachment layer (5); (e) Removal of the adhesive layer (4) by means of heat treatment; (f) Removal of the adhesive protective layer (3) by means of a chemical treatment; and (g) Separating the majority of circuit elements (2). [2] Method according to claim 1, wherein step (g) is performed between step (b) and step (c) or between step (e) and step (f). [3] Method according to claim 1 or 2, wherein the temperature during the heat treatment in step (e) is higher than the temperature for forming the adhesive protective layer (3) in step (a). [4] Method according to any one of claims 1 to 3, wherein the circuit elements (2) comprise an electrode with an air bridge structure. [5] Method according to any one of claims 1 to 4, wherein step (c) comprises bonding at normal temperature in which the circuit elements (2) are bonded to the transfer substrate (7). [6] Method according to any one of claims 1 to 5, wherein the adhesive protective layer (3) contains a plurality of types of organic solvent components having different boiling points. [7] Method according to any one of claims 1 to 6, wherein the adhesive layer (4) contains a resin that can be cured by ultraviolet radiation.
Citation Information
Patent Citations
PROCESS FOR MANUFACTURE OF COMPONENTS CONTAINING MICROELECTRO-MECHANICAL SYSTEMS USING UV-CURING TAPE
DE60125943T2