Voltage monitoring circuit and voltage monitoring method

Abstract

The present invention makes it possible to determine the normality or abnormality of the monitored voltage and a voltage monitoring circuit using the output of the voltage monitoring circuit, without requiring a separate circuit for detecting abnormalities of the voltage monitoring circuit. This voltage monitoring circuit comprises: a reference voltage generation unit that generates a fluctuating reference voltage that periodically alternates between a first reference voltage and a second reference voltage that is smaller than the first reference voltage; and a comparator unit that compares the fluctuating reference voltage and the monitored voltage and switches the output level based on the relative magnitudes of the fluctuating reference voltage and the monitored voltage.The reference voltage generation unit can generate the first and second reference voltages by varying the resistance division ratio of a constant voltage. The comparator unit can comprise a plurality of comparators, each receiving a plurality of monitored voltage inputs.

Description

TECHNICAL FIELD

[0001] The present invention relates to a voltage monitoring circuit and a voltage monitoring method for comparing a reference voltage with a monitored voltage to switch an output level based on relative magnitudes of the reference voltage and the monitored voltage. BACKGROUND

[0002] For example, a voltage monitoring circuit is described in Patent Document 1 and Patent Document 2. Patent Document 1 describes an abnormality detection device for detecting abnormalities of a plurality of voltage monitoring devices. The plurality of voltage monitoring devices are each provided for a plurality of battery blocks of a battery pack and include comparison units that compare a threshold value with block voltages of the battery blocks, and control units that control the threshold value. The abnormality detection device includes a detection unit, a decision unit, an output unit, and an acquisition unit. The detection unit receives the block voltages. The decision unit decides the threshold value based on the block voltages.In order for an operating signal corresponding to the threshold value to be output from a terminal of the control unit, the output unit outputs an indication signal indicating a signal level of the operating signal to the control unit. The detection unit detects an abnormality of the voltage monitoring devices according to a result of the comparison that the comparison unit performs based on the threshold value.

[0003] Patent Document 2 describes a voltage monitoring circuit for a power source, which includes an abnormality detection unit and a voltage change unit. The abnormality detection unit detects a voltage corresponding to a power source voltage and detects an abnormality of the power source voltage based on a comparison result between the detected voltage and a reference voltage. The voltage change unit changes the detected voltage or the reference voltage into a voltage based on which an abnormality can be detected within a detection range of the abnormality detection unit. Citation listPatent document Patent Document 1: Japanese Unexamined Patent Application Publication No. 2019-60657 Patent Document 2: Japanese Unexamined Patent Application Publication No. 2016-142597 Problems to be solved by the invention

[0004] A voltage monitoring circuit that compares a reference voltage with a monitored voltage to switch an output level (between an "H" level and an "L" level) based on the relative magnitudes of the reference voltage and the monitored voltage detects that the monitored voltage is abnormal, for example, when the monitored voltage becomes equal to or lower than the reference voltage and the output level switches from an "H" level to an "L" level. However, the switching of the output level of the voltage monitoring circuit is also caused by an abnormality of the voltage monitoring circuit. Therefore, it is not possible to determine whether the switching of the output level of the voltage monitoring circuit was caused by an abnormality of the monitored voltage or an abnormality of the voltage monitoring circuit.A voltage monitoring circuit's abnormality detection circuit may be provided separately, resulting in increased costs. Therefore, a voltage monitoring circuit and voltage monitoring method capable of determining the normality / abnormality of a monitored voltage and the voltage monitoring circuit without requiring another voltage monitoring circuit's abnormality detection circuit separate from the voltage monitoring circuit are desired. Means to solve the problems

[0005] (1) A first aspect of the present disclosure is a voltage monitoring circuit, wherein the voltage monitoring circuit includes a reference voltage generation unit configured to generate a variable reference voltage, the variable reference voltage periodically alternating between a first reference voltage and a second reference voltage lower than the first reference voltage; and a comparison unit configured to compare the variable reference voltage with a monitored voltage and switch an output level based on relative magnitudes of the variable reference voltage and the monitored voltage.

[0006] (2) A second aspect of the present disclosure is a voltage monitoring method of a voltage monitoring circuit, the voltage monitoring method comprising causing a switching element to input a periodically changing variable reference voltage to a comparison unit by switching between a first reference voltage and a second reference voltage lower than the first reference voltage; and causing a comparison unit to compare the variable reference voltage with a monitored voltage and switch an output level based on relative magnitudes of the variable reference voltage and the monitored voltage. Effects of the invention

[0007] According to each aspect of the present disclosure, it becomes possible to determine the normality / abnormality of a monitored voltage and a voltage monitoring circuit by an output of the voltage monitoring circuit without having another circuit for detecting the abnormality of the voltage monitoring circuit separate from the voltage monitoring circuit. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing a voltage monitoring circuit of a first embodiment of the present disclosure. Fig. 2 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure. Fig. 3 is a block diagram showing a voltage monitoring circuit to be described as a comparative example. Fig. 4 is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example. Fig. 5 is a block diagram illustrating a fault occurring in the voltage monitoring circuit of the comparative example. Fig. 6 is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example when a failure has occurred in the voltage monitoring circuit of the comparative example. Fig. 7 is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example when a failure has occurred in the voltage monitoring circuit of the comparative example. Fig. 8 is a block diagram illustrating a fault occurring in the voltage monitoring circuit of the present embodiment of the present disclosure. Fig. 9 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when a failure has occurred in the voltage monitoring circuit of the first embodiment. Fig. 10 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when a failure has occurred in the voltage monitoring circuit of the first embodiment. Fig. 11 is a block diagram showing a voltage monitoring circuit of a second embodiment of the present disclosure. Fig. 12 is a waveform diagram showing the operation of the voltage monitoring circuit of the second embodiment of the present disclosure. Fig. 13 is a block diagram showing a modification of the voltage monitoring circuit of the second embodiment of the present disclosure. Fig. 14 is a block diagram showing a voltage monitoring circuit of a third embodiment of the present disclosure. Fig. 15 is a waveform diagram showing the operation of the voltage monitoring circuit of the third embodiment of the present disclosure. Fig. 16 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when a reference voltage Vref1 is set to a value exceeding an upper limit of a fluctuation range of a monitored voltage Vx. Fig. 17 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when a reference voltage Vref2 is set to a value below a lower limit of the fluctuation range of a monitored voltage Vx. PREFERRED EMBODIMENT OF THE INVENTION

[0008] Embodiments of the present disclosure will be described in detail below with reference to the drawings. (First embodiment)

[0009] Fig. 1 is a block diagram showing a voltage monitoring circuit of a first embodiment of the present disclosure. Fig. Figure 2 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure. A voltage monitoring circuit 10 is provided with a reference voltage generation unit 10A and a comparison unit 10B. The reference voltage generation unit 10A includes a shunt regulator SR, resistors R1, R2, R3, and R4, and a MOS transistor Tr acting as a switching element. The comparison unit 20B includes a comparator CP and a resistor R5. The comparison unit 20B switches an output level based on the relative magnitudes of a variable reference voltage and a monitored voltage, as described later.

[0010] The shunt regulator SR applies voltages to the terminals at both ends of the resistor R1 and the resistor R2, which are connected in series, so that the terminal of the resistor R2 serves as GND and the voltage at the terminal of the resistor R1 becomes a constant voltage Vr. The terminal of the resistor R1 to which the constant voltage Vr is applied is connected to one terminal of the resistor R4. A voltage V1 is applied to the other terminal of the resistor R4. A junction point between the resistor R1 and the resistor R2 is connected to one terminal of the resistor R3 and an inverter input terminal (-) of the comparator CP. The other terminal of the resistor R3 is connected to the drain of the MOS transistor Tr. The source of the MOS transistor Tr is connected to GND. The MOS transistor Tr is controlled on / off by an oscillation signal input to the gate.

[0011] A variable reference voltage Vref input to the inverter input terminal (-) of the comparator CP periodically switches between a reference voltage Vref1 serving as a first reference voltage and a reference voltage Vref2 serving as a second reference voltage according to the switching of the rotary processing of the MOS transistor Tr. Specifically, the reference voltage Vref1 is applied to the inverter input terminal (-) of the comparator CP when the MOS transistor Tr is off. The reference voltage Vref1 is a voltage generated by resistance-dividing the constant voltage Vr with the resistor R1 and the resistor R2. When the MOS transistor Tr is on, the reference voltage Vref2 (Vref2 < Vref1) is input to the inverter input terminal (-) of the comparator CP.The reference voltage Vref2 is a voltage generated by resistance-dividing the constant voltage Vr with resistor R1 and the combined resistance of resistors R2 and R3 connected in parallel. The reference voltage Vref1 and the reference voltage Vref2 are represented by Formula 1 (Formula 1 below). The reference voltage Vref1 and the reference voltage Vref2 are generated by changing the resistance-dividing ratio for the constant voltage Vr. Vref1=Vr×R2(R1+R2) Vref2=Vr×(R2×R3R2+R3)(R1+R2×R3R2+R3)

[0012] The comparator CP compares the variable reference voltage Vref input to the inverter input terminal (-) with a monitored voltage Vx input to a non-inverter input terminal (+). One terminal of resistor R5 is connected to the output side of the comparator CP, and a voltage V2 is applied to the other terminal of resistor R5. An output voltage Vout is output from the comparator CP. As shown in Fig. As shown in Figure 2, the output voltage Vout has a pulse waveform when the monitored voltage Vx is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1 > Vx > Vref2). When the monitored voltage Vx is equal to or higher than the reference voltage Vref1 (Vx ≥ Vref1), the output voltage Vout is a fixed voltage with an "H" level. When the monitored voltage Vx is equal to or lower than the reference voltage Vref2 (Vx ≤ Vref2), the output voltage Vout is a fixed voltage at an "L" level (GND).

[0013] In the present operation, the voltage monitoring circuit 10 operates such that when both the monitored voltage Vx and the voltage monitoring circuit are normal, the output voltage Vout has a pulse waveform, and when an abnormality of the monitored voltage Vx or an abnormality of the voltage monitoring circuit itself occurs, the output voltage Vout becomes a fixed voltage at the "H" level or the "L" level.

[0014] Next, the operation of the voltage monitoring circuit of the present embodiment will be further described in comparison with a voltage monitoring circuit not provided with the resistor R3 or the MOS transistor Tr.

[0015] First, the operation of the voltage monitoring circuit not provided with the resistor R3 or the MOS transistor Tr will be described as a comparative example. Fig. 3 is a block diagram showing the voltage monitoring circuit as a comparative example. Fig. Figure 4 is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example. Fig. The voltage monitoring circuit 20 shown in Figure 3 differs from that shown in Fig. 1 shown voltage monitoring circuit 10 in that the Fig. 1 is replaced by a reference voltage generation unit 20A from which the resistor R3 and the MOS transistor Tr are removed, and that a reference voltage is a fixed reference voltage VrefA. In the voltage monitoring circuit 20, the comparator CP compares the reference voltage VrefA with the monitored voltage Vx, and when the monitored voltage Vx is equal to or higher than the reference voltage VrefA, the comparison unit 10B outputs the output voltage Vout at the "H" level. When the monitored voltage Vx is lower than the reference voltage VrefA, the comparison unit 10B outputs the output voltage Vout at the "L" level (GND). If the output voltage Vout is at the "H" level, the monitored voltage Vx is judged to be normal. If the output voltage Vout is at the "L" level (GND), the monitored voltage Vx is judged to be abnormal.

[0016] However, as described below, there may be a case where, when a fault occurs in the voltage monitoring circuit 20, the output voltage Vout is at the "H" level even if the monitored voltage Vx becomes lower than the reference voltage VrefA, and the monitored voltage Vx is determined to be normal. As shown in Fig. 5, there may be a case where a character marked by “×” in Fig. 5 occurs in the reference voltage generating unit 20A of the voltage monitoring circuit 20 and the reference voltage VrefA becomes equal to a reference voltage VrefB (VredB = 0 V). Fig. Figure 5 shows a case where, in the reference voltage generation unit 20A, an open fault, indicated by "×" in the diagram, has occurred in the resistor R1 and / or the resistor R4 due to an implementation error or open destruction, or a short-circuit fault, indicated by "×" in the diagram, has occurred in the resistor R2 due to a solder bridge. When the reference voltage VrefB is applied to the inverter input terminal (-) of the comparator CP, the monitored voltage Vx is equal to or higher than the reference voltage VrefB, even if it is lower than the reference voltage VrefA to which it should originally be set, and the output voltage Vout is at the "H" level, as shown in Fig. 6. Therefore, the monitored voltage Vx is considered normal.

[0017] Furthermore, as in Fig. 5, an error shown by “×” in the diagram may occur in the comparison unit 10B of the voltage monitoring circuit 20, and the output voltage Vout rises to the level “H”. Fig. Figure 5 shows a case where a soldering error occurred on the output side of the comparator CP of the comparison unit 10B, and an open fault, represented by "×" in the diagram, occurred. When an open fault occurs on the output side of the comparator CP, the output voltage Vout is at the "H" level, regardless of the comparison result between the monitored voltage Vx and the reference voltage VrefA, as shown in Fig. 7, and the monitored voltage Vx is considered normal.

[0018] Next, the operation of the voltage monitoring circuit of the present embodiment will be described. By setting a reference voltage to the variable reference voltage Vref, which periodically switches between the reference voltage Vref1 and the reference voltage Vref2, the voltage monitoring circuit 10 of the present embodiment causes the output voltage Vout to have a pulse waveform when the monitored voltage Vx is within a normal range and the voltage monitoring circuit is normal. When the monitored voltage Vx is outside the normal range or when an abnormality occurs in the voltage monitoring circuit, the output voltage Vout has a fixed waveform, and an abnormality in the monitored voltage Vx or an abnormality in the voltage monitoring circuit can be detected. In this way, safe operation of the equipment can be ensured.

[0019] As in Fig. 8, there may be a case where an error shown by “×” in the diagram occurs in the reference voltage generating unit 10A of the voltage monitoring circuit 10 similar to the voltage monitoring circuit 20 of the Fig. 5, and the reference voltage Vref becomes 0 V. Fig. Figure 8 shows a case where an open fault, indicated by "×" in the diagram, is caused in the reference voltage generation unit 10A by an implementation error or open destruction in the resistor R1 and / or the resistor R4, or a short-circuit fault, indicated by "×" in the diagram, is caused by a solder bridge of the resistor R2. When a fault, indicated by "×" in the diagram, occurs in the reference voltage generation unit 10A of the voltage monitoring circuit 10 and the voltage of the connection point between the resistor R1 and the resistor R2 becomes 0 V, 0 V (GND) is applied to the inverter input terminal (-) of the comparator CP even when the MOS transistor Tr is turned on / off. Since the monitored voltage Vx is greater than 0 V, the output voltage Vout becomes a fixed voltage at the "H" level, as shown in Fig. 9. Therefore, it is determined that the monitored voltage Vx is outside the normal range or that there is an abnormality in the voltage monitoring circuit.

[0020] Furthermore, as in Fig. 8, there may be a case where an error shown by “×” in the diagram occurs in the comparison unit 10B of the voltage monitoring circuit 10 and the output voltage Vout rises to the level “H”, similar to the comparison example. Fig. Figure 8 shows a case where a soldering defect has occurred on the output side of the comparator CP of the comparison unit 10B, and an open fault, represented by "×" in the diagram, has occurred. When an open fault occurs on the output side of the comparator CP, the output voltage Vout becomes a fixed voltage at level "H" regardless of the comparison result between the monitored voltage Vx and the variable reference voltage Vref, as shown in Fig. 10, and it is determined that the monitored voltage Vx is outside the normal range or that there is an abnormality in the voltage monitoring circuit.

[0021] If the error in the voltage monitoring circuit 10, represented by “×” in Fig. 8, does not occur and the monitored voltage Vx becomes equal to or lower than the reference voltage Vref2, the output voltage Vout becomes a fixed voltage at the level “L”, and it is determined that there is an abnormality in the monitored voltage Vx.

[0022] According to the voltage monitoring circuit of the present embodiment described above, it is possible to detect an abnormality of the monitored voltage Vx or the voltage monitoring circuit and ensure safe operation of the equipment. According to the voltage monitoring circuit of the present embodiment, it is possible to realize a periodic change between the two reference voltages Vref1 and Vref2 by adding resistors and a switching element and using a square wave of a switching power source or the like as the oscillation waveform. Therefore, it is possible to realize the comparison between the monitored voltage Vx and the two reference voltages Vref1 and Vref2 by a comparator.The voltage monitoring circuit of the present embodiment has the advantage of reducing the number of comparators used, which can cause a failure, compared to the case where the comparison between the monitored voltage Vx and the two reference voltages Vref1 and Vref2 is performed with two comparators. Furthermore, it is possible to verify the normal operation of the voltage monitoring circuit without adding a circuit for verifying the normal operation of the voltage monitoring circuit. (Second embodiment)

[0023] The voltage monitoring circuit 10 of the first embodiment operates such that when both the monitored voltage Vx and the voltage monitoring circuit are normal, the output voltage Vout has a pulse waveform. When an abnormality occurs in the monitored voltage Vx or an abnormality in the voltage monitoring circuit, the output voltage Vout becomes a fixed voltage at the "H" level or the "L" level. A voltage monitoring circuit of the present embodiment includes a determination circuit for determining whether the output voltage Vout is a pulse waveform voltage or a fixed voltage.

[0024] Fig. Fig. 11 is a block diagram showing the voltage monitoring circuit of the second embodiment of the present disclosure. A voltage monitoring circuit 11 of the present embodiment includes a determination circuit 10C in the subsequent step of the comparison unit 10B of the Fig. 1, and the determination circuit 10C determines whether the output voltage Vout is a pulse waveform voltage or a fixed voltage. The determination circuit 10C includes an AC coupling capacitor C1, a diode D, a resistor R6, and a smoothing capacitor C2. One terminal of the AC coupling capacitor C1 is connected to an output terminal of the comparator CP and one terminal of the resistor R5, and the other terminal is connected to an anode terminal of the diode D. A cathode terminal of the diode D is connected to one terminal of the resistor R6 and one terminal of the smoothing capacitor C2. The other terminal of the resistor R6 and the other terminal of the smoothing capacitor C2 are connected to GND.

[0025] The AC coupling capacitor C1 allows a current to flow when the output voltage Vout changes, and the diode D allows a current to flow when the electric potential of the anode terminal reaches the "H" level. When the output voltage Vout becomes a pulse voltage and changes from GND to the "H" level, a current flows through the AC coupling capacitor C1 and the diode D, and the voltage at one terminal of the smoothing capacitor C2 rises to the "H" level. When the output voltage Vout is a fixed voltage, the AC coupling capacitor C1 does not cause any current to flow. Therefore, one terminal of the smoothing capacitor C2 serves as GND via the resistor R6.

[0026] As in Fig. As shown in Figure 12, the output voltage Vout has a pulse waveform when both the monitored voltage Vx and the voltage monitoring circuit are normal. When an abnormality of the monitored voltage Vx or an abnormality of the voltage monitoring circuit itself occurs, the output voltage Vout becomes a fixed voltage at the "H" level or the "L" level. Therefore, a determination signal Vsig output from one terminal of the smoothing capacitor C2 indicates the "H" level when both the monitored voltage Vx and the voltage monitoring circuit are normal, and indicates GND when an abnormality of the monitored voltage Vx or an abnormality of the voltage monitoring circuit itself occurs. (Modification of the determination circuit)

[0027] The determination circuit is not limited to the Fig. 11, the configuration of the determination circuit 10C is limited, and other configurations are also possible. Fig. Fig. 13 is a block diagram showing a modification of the voltage monitoring circuit of the second embodiment of the present disclosure. A voltage monitoring circuit 12 of the present embodiment includes a determination circuit 10D instead of the determination circuit 10C of the Fig. 11. The determination circuit 10D comprises a counter IC 100. The counter IC 100 counts the number of pulses of the output voltage Vout fed in and is reset when no more pulses are fed in. A determination signal Vsig output by the counter IC 100 has the same waveform as that shown in Fig. 12 shown determination signal Vsig. (Third embodiment)

[0028] The voltage monitoring circuit 10 of the first embodiment was described with reference to the case where the monitored voltage Vx and the variable reference voltage Vref are input to the comparator CP. A voltage monitoring circuit 13 of the present embodiment inputs two different monitored voltages to the non-inverter input terminals (+) of two comparators and inputs the common variable reference voltage Vref to the inverter input terminals (-) of the two comparators.

[0029] Fig. 14 is a block diagram showing the voltage monitoring circuit of the third embodiment of the present disclosure. Fig. 15 is a waveform diagram showing the operation of the voltage monitoring circuit of the third embodiment of the present disclosure. In the voltage monitoring circuit 13 of the Fig. 14, the same components as in the voltage monitoring circuit 10 of the Fig. 1 are provided with the same reference numerals, and their description is omitted. The voltage monitoring circuit 13 of the present embodiment includes the reference voltage generation unit 10A, a comparison unit 13B, and a monitored voltage generation unit 13C.

[0030] The comparison unit 13B includes a first comparison unit provided with a comparator CP1 and a resistor R11, and a second comparison unit provided with a comparator CP2 and a resistor R12. The monitored voltage generation unit 13C includes resistors R7 and R8 for generating a monitored voltage Vx1, and resistors R9 and R10 for generating a monitored voltage Vx2. The monitored voltage Vx1 is a voltage generated by resistance-dividing a monitored voltage Vx3 with the resistor R7 and the resistor R8. The monitored voltage Vx2 is a voltage generated by resistance-dividing a monitored voltage Vx4 with the resistor R9 and the resistor R10. The voltage monitoring circuit 13 supplies the monitored voltage Vx1 and the monitored voltage Vx2 to a non-inverter input terminal (+) of the comparator CP1 and the non-inverter input terminal (+) of the comparator CP2, respectively.a non-inverter input terminal (+) of comparator CP2 and supplies the variable reference voltage Vref to an inverter input terminal (-) of comparator CP1 or an inverter input terminal (-) of comparator CP2. Comparator CP1 compares the variable reference voltage Vref input to the inverter input terminal (-) with the monitored voltage Vx1 input to the non-inverter input terminal (+). Comparator CP2 compares the variable reference voltage Vref applied to the inverter input terminal (-) with the monitored voltage Vx2 applied to the non-inverter input terminal (+). One terminal of resistor R11 is connected to the output of comparator CP1, and voltage V2 is applied to the other terminal of resistor R11. One terminal of the resistor R12 is connected to the output side of the comparator CP2, and the voltage V2 is applied to the other terminal of the resistor R12.The output voltages Vout1 and Vout2 are output by the comparators CP1 and CP2, respectively.

[0031] As in Fig. As shown in Figure 15, when the monitored voltage Vx1 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1>Vx1>Vref2), the output voltage Vout1 has a pulse waveform between the output voltages. When the monitored voltage Vx1 is equal to or higher than the reference voltage Vref1 (Vx1≥Vref1), the output voltage Vout1 is a fixed voltage at the "H" level. When the monitored voltage Vx1 is equal to or lower than the reference voltage Vref2 (Vx1≤Vref2), the output voltage Vout1 is a fixed voltage at the "L" level (GND).

[0032] Furthermore, as in Fig. As shown in Figure 15, when the monitored voltage Vx2 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1 > Vx2 > Vref2), the output voltage Vout2 has a pulse waveform between the output voltages. When the monitored voltage Vx2 is equal to or higher than the reference voltage Vref1 (Vx2 ≥ Vref1), the output voltage Vout2 is a fixed voltage at the "H" level. When the monitored voltage Vx2 is equal to or lower than the reference voltage Vref2 (Vx2 ≤ Vref2), the output voltage Vout2 is a fixed voltage at the "L" level (GND).

[0033] In the present embodiment, since the voltage monitoring circuit 13 inputs the variable reference voltage Vref to the inverter input terminal (-) of the comparator CP1 and the inverter input terminal (-) of the comparator CP2 together, it is only necessary to provide one reference voltage generation unit, and it is possible to reduce the number of parts compared with the case where two reference voltage generation units are provided to input reference voltages to the comparator CP1 and the comparator CP2.

[0034] Although the present embodiments are preferred embodiments of the present invention, the scope of the present invention is not limited to the present embodiments only. It is possible to practice the present invention in a form obtained by various modifications within a range that does not deviate from the spirit of the present invention.

[0035] For example, although in the above embodiments, two threshold values ​​of the reference voltage Vref1 and the reference voltage Vref2 are provided as threshold values ​​for the variable reference voltage Vref and compared with the monitored voltage Vx, either of the reference voltage Vref1 and the reference voltage Vref2 may be set as the threshold value. When the reference voltage Vref1 is set to a value that exceeds an upper limit of a fluctuation range of the monitored voltage Vx, the reference voltage Vref2 is set as the threshold value. Fig. 16 is a graph showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when the reference voltage Vref1 is set to a value that exceeds the upper limit of the fluctuation range of the monitored voltage Vx. As shown in Fig. As shown in Figure 16, the output voltage Vout has a pulse waveform in a range of Vx > Vref2 and is GND when the monitored voltage Vx is equal to or lower than the reference voltage Vref2.

[0036] Furthermore, when the reference voltage Vref2 is set to a value below a lower limit of the fluctuation range of the monitored voltage Vx, the reference voltage Vref1 is set as a threshold. Fig. 17 is a waveform diagram showing the operation of the voltage monitoring circuit of the present embodiment of the disclosure when the reference voltage Vref1 is set as the threshold value for the reference voltage. As shown in Fig. 17, the output voltage Vout has a pulse waveform in a range of Vx <Vref1 auf und befindet sich auf dem „H“-Pegel, wenn die überwachte Spannung Vx gleich oder niedriger als die Bezugsspannung Vref1 ist.

[0037] The voltage monitoring circuit and the voltage monitoring method according to the present disclosure may adopt various embodiments with configurations as described below, including the embodiments described above.

[0038] (1) A voltage monitoring circuit (for example, the voltage monitoring circuit 10, 11, 12, or 13) includes a reference voltage generation unit (for example, the reference voltage generation unit 10A) that generates a variable reference voltage, the variable reference voltage periodically alternating between a first reference voltage and a second reference voltage lower than the first reference voltage; and a comparison unit (for example, the comparison unit 10B) that compares the variable reference voltage with a monitored voltage to switch an output level based on relative magnitudes of the variable reference voltage and the monitored voltage.

[0039] According to the power source monitoring circuit, it becomes possible to determine the normality / abnormality of a monitored voltage and the voltage monitoring circuit by an output signal of the voltage monitoring circuit without having another circuit for detecting the abnormality of the voltage monitoring circuit separate from the voltage monitoring circuit.

[0040] (2) The voltage monitoring circuit according to (1) above, wherein the reference voltage generating unit generates the first reference voltage and the second reference voltage by changing a resistance dividing ratio of a constant voltage.

[0041] (3) The voltage monitoring generation unit according to (2), wherein the reference voltage generation unit includes a first resistor (for example, resistor R1); a second resistor (for example, resistor R2) connected in series with the first resistor; a third resistor (for example, resistor R3) having one terminal connected to a connection point between the first resistor and the second resistor; and a switching element (for example, MOS transistor Tr) connected to the other terminal of the third resistor; the reference voltage generation unit generates the first reference voltage by turning off the switching element for turning and resistance-dividing the constant voltage with the first resistor and the second resistor.and the reference voltage generation unit generates the second reference voltage by turning on the switching element for turning and performing resistance division of the constant voltage with the first resistor and a combined resistance of the second resistor and the third resistor connected in parallel.;

[0042] (4) The voltage monitoring circuit according to any one of the above items (1) to (3), wherein the comparison unit comprises a plurality of comparators (for example, comparators CP1 and CP2) to each of which a plurality of monitored voltages are input; and the variable reference voltage is commonly input to the plurality of comparators.

[0043] (5) The voltage monitoring circuit according to any one of (1) to (3) above, wherein the comparison unit is connected to a determination circuit; and the determination circuit (for example, the determination circuit 10C or 10D) determines the monitored voltage as normal when a voltage in a pulse waveform is output from the comparison unit, and determines that there is an abnormality in at least one of the monitored voltage and the voltage monitoring circuit when a fixed voltage is output.

[0044] (6) A voltage monitoring method of a voltage monitoring circuit (for example, the voltage monitoring circuit 10, 11, 12, or 13), the voltage monitoring method comprising causing a switching element (for example, the MOS transistor Tr) to input a periodically changing variable reference voltage to a comparison unit (for example, the comparison unit 10B) by switching between a first reference voltage and a second reference voltage lower than the first reference voltage; and causing the comparison unit to compare the variable reference voltage with a monitored voltage to switch an output level based on relative magnitudes of the variable reference voltage and the monitored voltage.

[0045] According to the current source monitoring method, it becomes possible to determine the normality / abnormality of a monitored voltage and a voltage monitoring circuit by an output signal of the voltage monitoring circuit without having another circuit for detecting the abnormality of the voltage monitoring circuit separate from the voltage monitoring circuit. REFERENCE SYMBOL 10, 11, 12, 13 Voltage monitoring circuit 10A reference voltage generation unit SR shunt regulator R1, R2, R3, R4 resistor Tr MOS transistor 10B, 13B comparison unit CP, CP1, CP2 comparator R5 resistor 10C, 10D Determination circuit 13C Monitored voltage generation unit QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 2019-60657

[0003] JP 2016-142597

[0003]

Claims

[1] Voltage monitoring circuit comprising: a reference voltage generating unit configured to generate a variable reference voltage, the variable reference voltage periodically changing between a first reference voltage and a second reference voltage lower than the first reference voltage; and a comparison unit configured to compare the variable reference voltage with a monitored voltage and to switch an output level based on the relative magnitudes of the variable reference voltage and the monitored voltage. [2] The voltage monitoring circuit according to claim 1, wherein the reference voltage generating unit generates the first reference voltage and the second reference voltage by changing a resistance division ratio of a constant voltage. [3] A voltage monitoring circuit according to claim 2, wherein the reference voltage generating unit comprises a first resistance; a second resistor connected in series with the first resistor; a third resistor having a terminal connected to a connection point between the first resistor and the second resistor; and a switching element connected to another terminal of the third resistor, wherein the reference voltage generation unit generates the first reference voltage by switching the switching element and performing resistance division of the constant voltage with the first resistor and the second resistor, and wherein the reference voltage generation unit generates the second reference voltage by turning on the switching element and performing resistance division of the constant voltage with the first resistor and a combined resistance of the second resistor and the third resistor connected in parallel. [4] Voltage monitoring circuit according to one of claims 1 to 3, wherein the comparison unit comprises a plurality of comparators, each of which is input with a plurality of monitored voltages, and the variable reference voltage is input together into the plurality of comparators. [5] Voltage monitoring circuit according to one of claims 1 to 3, wherein the comparison unit is connected to a determination circuit; and the determination circuit determines the monitored voltage as normal when a voltage in a pulse waveform is output from the comparison unit, and determines that there is an abnormality in at least one of the monitored voltage or the voltage monitoring circuit when a fixed voltage is output. [6] A voltage monitoring method for a voltage monitoring circuit, the voltage monitoring method comprising: Causing a switching element to input a periodically changing variable reference voltage to a comparison unit by switching between a first reference voltage and a second reference voltage lower than the first reference voltage; and Cause the comparison unit to compare the variable reference voltage with a monitored voltage and to switch an output level based on the relative magnitudes of the variable reference voltage and the monitored voltage.

Images