Irregularly shaped capacitive sensors and locations of touch events on them

Abstract

A method includes: changing a geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; and obtaining executable instructions to convert a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry.

Description

CROSS-REFERENCE TO RELATED REGISTRATION

[0001] This application claims the benefit of the priority date of the preliminary US patent application No. 63 / 366,682, filed on June 20, 2022, entitled “CAPACITIVE SENSOR GEOMETRY DISTORTION TO DESIGN A CAPACITIVE SENSOR HAVING AN IRREGULAR GEOMETRY, AND CAPACITIVE SENSORS HAVING IRREGULAR GEOMETRIES”, the entire contents and disclosure of which are hereby incorporated by reference. AREA

[0002] Examples include capacitive sensors, irregularly shaped capacitive sensors, and reporting the locations of touch events using them. BACKGROUND

[0003] Capacitive sensors are used in a variety of operating contexts, such as touchscreens, touchpads and capacitive buttons, without limitation. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] To make it easy to identify the discussion of a specific element or action, the principal number(s) in a reference sign refer to the figure number in which that element is first introduced. Fig. 1A is a schematic diagram that provides a graphical representation of a design of a capacitive sensor, and more precisely, a design of a capacitive sensor to be distorted according to one or more examples. Fig. Figure 1B is a schematic diagram that provides a graphical representation of a design of a capacitive sensor and, in particular, a distorted design of a capacitive sensor according to one or more examples. Fig. Figure 2 is a flowchart that illustrates a process for distorting the geometry of a capacitive sensor design from a first, regular geometry to a second, irregular geometry according to one or more examples. Fig. Figure 3 is a flowchart that illustrates a process for distorting the geometry of a capacitive sensor design according to one or more examples. Fig. Figure 4 is a flowchart that illustrates a process for changing the geometry of a capacitive sensor design from a first geometry to a second geometry according to one or more examples. Fig. Figure 5 is a flowchart that illustrates a process for mapping the geometry of the reference design to the geometry of the target design according to one or more examples. Fig. Figure 6 is a flowchart that illustrates a process for adjusting the respective node areas of the depicted reference design to a uniform size according to one or more examples. Fig. Figure 7 is a flowchart that illustrates a process for scaling the dimensions of respective node surfaces of the reference design shown, according to the scaling factor, as shown in one or more examples. Fig. Figure 8 is a flowchart that illustrates a process for completing the respective sensor node geometries of the reference design shown, according to one or more examples. Fig. 9A and Fig. Figure 9B shows graphical representations of an outline of a target design of a capacitive sensor with an irregular geometry. Fig. 10A is a graphical representation of a basic grid according to one or more examples. Fig. 10B is a graphical representation of the basic grid of Fig. 10A, which has been remapped according to one or more examples. Fig. 10C is a graphical representation of the basic pattern of the touch sensor field (TSP pattern), which corresponds to the basic grid of Fig. 10A corresponds to, according to one or more examples. Fig. 10D is a graphical representation of the TSP pattern of Fig. 10C, which has been remapped according to one or more examples. Fig. 11A is a graphical representation of a basic grid with a horizontal ratio of 0.7 according to one or more examples. Fig. 11B is a graphical representation of the basic grid with a horizontal ratio of 0.7 to Fig. 11A, which has been redrawn according to one or more examples. Fig. 11C is a graphical representation of a basic TSP pattern with a horizontal ratio of 0.7 according to one or more examples. Fig. 11D is a graphical representation of the TSP pattern with a horizontal ratio of 0.7. Fig. 11C, which has been remapped according to one or more examples. Fig. 12A, Fig. 12B and Fig. Figure 12C are graphical representations that depict rough sensor node geometries for a 2-layer sensor node design according to one or more examples. Fig. 13A and Fig. Figure 13B are graphical representations that depict a distorted design of a capacitive sensor, including sensor nodes with constructed geometries according to one or more examples. Fig. 14A, Fig. 14B and Fig. 14C are schematic designs that represent parts of sensor nodes including interfaces of electrodes and crossing elements according to one or more examples. Fig. Figure 15 is a graphic representation depicting a completed, distorted design of a capacitive sensor according to one or more examples. Fig. Figure 16 is a block diagram that represents a system for distorting the geometry of a capacitive sensor design from a first, regular geometry to a second, irregular geometry according to one or more examples. Fig. Figure 17 is a block diagram that represents a system according to one or more examples for detecting touches on an irregularly shaped sensor. Fig. Figure 18 is a flowchart that illustrates a process for detecting a touch event by an irregularly shaped capacitive sensor, according to one or more examples. Fig. Figure 19 is a block diagram of a switching logic that can be used in some examples to implement various functions, operations, actions, processes or procedures disclosed herein. METHODS OF EXECUTING THE INVENTION

[0005] The following detailed description refers to the accompanying drawings, which form part of this document and illustrate specific examples of embodiments in which the present disclosure can be exercised. These embodiments are described in sufficient detail to enable a person skilled in the art to put the present disclosure into practice. However, other embodiments may also be used, and changes to the structure, material, and process may be made without altering the scope of protection of the disclosure.

[0006] The illustrations shown herein are not intended to be actual views of any particular method or system, or of any particular device or structure, but are merely idealized representations used to describe the embodiments of the present disclosure. The drawings shown herein are not necessarily to scale. Similar structures or components in the various drawings may retain the same or similar numbering for the convenience of the reader; however, the similarity in numbering does not imply that the structures or components are necessarily identical in size, composition, configuration, or any other characteristic.

[0007] The following description may include examples to enable a person skilled in the art to carry out the disclosed embodiments. The use of the terms "by way of example", "as an example", and "for instance" means that the accompanying description is explanatory, and although the scope of protection of the disclosure is intended to include the examples and their legal equivalents, the use of such terms is not intended to limit the scope of protection of any embodiment or of this disclosure to the specified components, steps, features, functions, or the like.

[0008] It is self-evident that the components of the embodiments, as generally described herein and illustrated in the drawing, can be arranged and designed in a multitude of different configurations. Therefore, the following description of various embodiments is not intended to limit the scope of protection of the present disclosure, but is merely representative of different embodiments. While the various aspects of the embodiments may be illustrated in drawings, the drawings are not necessarily drawn to scale unless expressly stated otherwise.

[0009] Furthermore, the specific implementations shown and described are only examples and should not be interpreted as the only way to implement the present disclosure unless otherwise stated herein. Elements, circuits, and functions may be shown in block diagram form to avoid obscuring the present disclosure with unnecessary details. Conversely, the specific implementations shown and described are only examples and should not be interpreted as the only way to implement the present disclosure unless otherwise stated herein. Additionally, block definitions and the distribution of logic between different blocks are examples of a specific implementation. It is readily apparent to those skilled in the art that the present disclosure can be implemented in practice through numerous other distribution solutions.Details concerning timing considerations and the like have been largely omitted, insofar as such details are not necessary for a complete understanding of the present disclosure and are within the capabilities of those skilled in the art.

[0010] Experts will understand that information and signals can be represented using a variety of different technologies and techniques. Some drawings may illustrate signals as a single signal for the clarity of representation and description. Experts will understand that the signal can represent a bus of signals, where the bus can have a variety of bit widths, and that the present disclosure can be implemented with any number of data signals, including a single data signal.

[0011] The various illustrative logic blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or carried out using a general-purpose processor, a special-purpose processor, a digital signal processor (DSP), an integrated circuit (IC), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein.A general-purpose processor (which may also be referred to herein as a host processor or simply as a host) may be a microprocessor, but alternatively it may be any conventional processor, control unit, microcontroller, or state machine. A processor may also be implemented as a combination of data processing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. A general-purpose computer including a processor is considered a special-purpose computer, while the general-purpose computer is configured to execute computational instructions (e.g., software code) relating to embodiments of the present disclosure.

[0012] The embodiments may be described in terms of a process represented as a flowchart, flow diagram, structure diagram, or block diagram. Although a flowchart may describe operational actions as a sequential process, many of these actions may be performed in a different sequence, in parallel, or substantially simultaneously. Furthermore, the order of the actions may be changed. A process may, without limitation, correspond to a method, a thread, a function, a procedure, a subroutine, or a subprogram. Moreover, the methods disclosed herein may be implemented in hardware, software, or both. When implemented in software, the functions may be stored or transmitted as one or more instructions or as code on computer-readable media.Computer-readable media include both computer storage media and communication media, including all media that support the transfer of a computer program from one location to another.

[0013] Any reference to an element herein using a label such as "first," "second," etc., does not restrict the set or order of such elements unless such restriction is expressly stated. Rather, these labels herein may be used as a convenient method for distinguishing between two or more elements or instances of an element. Thus, a reference to a first and a second element does not mean that only two elements may be inserted there, or that the first element must in any way precede the second element. Furthermore, unless otherwise stated, a set of elements may comprise one or more elements.

[0014] In the sense used herein, the term "essentially" means, with respect to a given parameter, property, or condition, and includes, to an extent understandable to a person skilled in the art, that the given parameter, property, or condition is satisfied with a small degree of variance, such as within acceptable manufacturing tolerances. For example, depending on the specified parameter, property, or condition that is substantially satisfied, the parameter, property, or condition may be satisfied to at least 90%, at least 95%, or even at least 99%.

[0015] In this description, the term "coupled" and its derivatives may be used to indicate that two elements work together or interact with each other. When an element is described as "coupled" to another element, the elements may be in direct physical or electrical contact, or intermediate elements or layers may be present. Conversely, when an element is described as "directly coupled" to another element, no intermediate elements or layers are present. The terms "attached" and "connected" may be used interchangeably with the term "coupled" in this description and have the same meaning unless expressly stated otherwise or the context would indicate otherwise to a person skilled in the art.

[0016] The term "geometry" as used herein refers to the shape and relative arrangement of the parts of something. The term "irregular geometry" as used herein refers to a geometric shape that is not rectangular. Non-restrictive examples include geometric shapes with unequal sides, unequal angles, or unequal curves. The term "irregularly shaped" as used herein means "having an irregular geometry" unless expressly stated otherwise or the specific context in which the term is used herein indicates otherwise to an average person in the field.

[0017] In a typical capacitive sensor setup for capacitance sensing, the electrodes are arranged in a grid of rows and columns (sometimes called "X electrodes" and "Y electrodes"), and the intersections of the X and Y electrodes are called "sensor nodes." When an alternating current stimulus is applied to the capacitive sensor, the electrodes measure a capacitance. If a conductive object, such as a finger or a pen, is in suitable proximity to a sensor node (e.g., near or touching a sensor node, but not restricted to it), at least some of the electrodes will measure a different capacitance—that is, the measured capacitance of those electrodes changes. Capacitance sensing involves detecting such changes in the measured capacitance.

[0018] In a typical two-dimensional (2D) arrangement of a capacitive sensor ("sensor"), the grid has a rectangular shape, and the individual sensor nodes of the sensor have a uniform rectangular shape. A typical touch controller is preconfigured to detect capacitance changes at a rectangular sensor. Symmetry is advantageous for capacitive sensing (especially mutual capacitance sensing) because it compensates for the effects of capacitive loads (e.g., a conductive object in close proximity to a sensor node).

[0019] Sometimes it may be desirable to have a sensor with a non-rectangular shape (e.g., trapezoidal or elliptical, and regular or irregular, without restriction). As a non-restrictive example, a non-rectangular sensor could be paired with a non-rectangular display, touchpad, button, or slider.

[0020] A touch controller preconfigured to detect capacitance changes on a rectangular sensor may produce incorrect or inaccurate results when used with a non-rectangular sensor. For example, a touch controller that generates Cartesian coordinates ("coordinates") associated with the location of a touch event on a sensor may produce coordinates that differ from the actual coordinates of the location of a touch event on a non-rectangular sensor.

[0021] One or more examples generally relate to the distortion of the geometry of a capacitive sensor design from a first, regular geometry to a second, irregular geometry, as well as to methods, devices, and systems for carrying this out. A distorted capacitive sensor design can dictate the dimensions of a physical capacitive sensor that is manufactured based on the design.

[0022] One or more examples generally relate to the generation of a location identifier (e.g., Cartesian coordinates, without limitation) for a touch event on a capacitive sensor with an irregular geometry, the configuration of controllers to generate location identifiers for a touch event on a capacitive sensor with an irregular geometry, and methods, devices, and systems for performing these actions. The controller may be preconfigured to generate a location identifier for a capacitive sensor with a regular geometry, and one or more examples may relate to changing a location identifier for a capacitive sensor with a regular geometry to a location identifier for a capacitive sensor with an irregular geometry.

[0023] One or more examples generally refer to a controller configured to generate a location identifier for a touch event on a capacitive sensor with irregular geometry, as well as capacitive sensing systems using this.

[0024] Fig. 1A and Fig. 1B are graphical representations of the design of a capacitive sensor before distortion (a “capacitive sensor design to be distorted”) and after distortion (a “distorted capacitive sensor design”) according to one or more examples.

[0025] Fig. 1A and Fig. Figure 1B represents an X-axis and a Y-axis, defining an XY plane. The numbers on the X-axis and Y-axis increase from the origin on a linear scale. XY pairs of these numbers can be used to designate the locations of specific points on the XY plane as unique coordinates according to a coordinate system. These numbers can be used to represent distances from the origin. In a Cartesian coordinate system, the interval between the numbers is uniform. The distance between the numbers is defined by the in Fig. 1A and Fig. The coordinate system defined by the X-axis and Y-axis shown in Figure 1B is a Cartesian coordinate system. By convention, the height is the distance along the Y-axis and the width is the distance along the X-axis, but this convention is used here only for the sake of simplicity and is not intended to limit the scope of this disclosure in any way.

[0026] Fig. Figure 1A is a graphical representation of a design of a capacitive sensor 100a, which is to be distorted according to one or more examples, and may also be referred to herein as the design of a capacitive sensor 100a to be distorted. A design of a capacitive sensor to be distorted may also be referred to herein as the "reference design of a capacitive sensor" or simply as the "reference design".

[0027] The design of a capacitive sensor 100a to be distorted includes the sensor 102. The sensor 102 includes X-electrodes and Y-electrodes arranged in a grid. The X-electrodes and the Y-electrodes can be located in the same layer, in different layers, or they can form layers, with one lying above the other. The respective intersection points 104 of the X-electrodes and Y-electrodes form the respective sensor nodes 106 of the sensor 102.

[0028] Sensor 102 has a regular geometry. In particular, sensor 102 has uniform dimensions: its height is 25, its width is 25, the length of each electrode column is 25, and the length of each electrode row is 25. Furthermore, the respective rows and columns of sensor 102 have the same number of sensor nodes, and the respective sensor nodes have the same area (the respective areas of the nodes constitute a "node area"). The coordinate plane of the design to be distorted, a capacitive sensor 100a, and its geometry is the XY plane, which is defined by the outline of sensor 102.

[0029] Since the node areas and the number of sensor nodes of sensor node 106 are uniform, the respective capacitances and capacitance values ​​(e.g., a value generated in response to a capacitance measurement, without restriction) of the nodes of sensor 102 can be determined in the absence of a contact event (i.e., absence of an object in suitable proximity to one or more sensor nodes to influence capacitance measurements) by the uniform formula for parallel plate capacitors C=∈Ad=∈0∈rAd represented where C is the capacitance in farads, A is the area of ​​one of the parallel plates in square meters, and ∈ is the permittivity of the electrolyte (material between the plates, e.g., air), which is multiplied by the vacuum permittivity ∈0 and the relative permittivity ∈ r is defined and d is the distance between the parallel plates (usually the thickness of a touch cover).

[0030] Fig. Figure 1B is a graphical representation of a design of a capacitive sensor 100b that is distorted according to one or more examples and may also be referred to herein as the distorted design of a capacitive sensor 100b. The distorted design of a capacitive sensor 100b was generated by distorting the geometry of sensor 102 of the design of a capacitive sensor 100a to be distorted, as discussed below. In one or more examples, a distorted design of a capacitive sensor may correspond to a target design of a capacitive sensor. A target design of a capacitive sensor may also be referred to herein as the “target design”.

[0031] The distorted design of a capacitive sensor 100b includes a distorted sensor 108, which comprises X-electrodes and Y-electrodes arranged in a grid. The X-electrodes and Y-electrodes can be located in the same layer, in different layers, or they can form layers, with one lying above the other. The respective intersection points of the X-electrodes and Y-electrodes of the distorted sensor 108 form the respective sensor nodes of the distorted sensor 108.

[0032] The distorted sensor 108 has an irregular geometry. More precisely, the distorted sensor 108 does not have uniform dimensions. The upper width is approximately 20 and the lower width approximately 25, and the length of the respective sensor rows 102 increases from the lower row, which has a width of approximately 25, to the upper row, which has a width of approximately 20. The lengths of the left and right sides of the distorted sensor 108 are different and can be determined using the formula for calculating the side lengths of a right triangle, n = √(l 2 + m 2 ) where “n” is the length of the hypotonus and “1” and “m” are the lengths of the other sides of the right-angled triangle.

[0033] Positions of points within an area defined by the distorted sensor 108 can be represented according to the Cartesian coordinate system of the distorted design of a capacitive sensor 100a, and can also be represented according to another coordinate system that is a distorted version of the coordinate system of the distorted design of a capacitive sensor 100a. In the distorted coordinate system, the interval spacings on the X and Y axes are not uniform. The interval spacing of the distorted coordinate system is defined by the interval spacing in the X and Y directions between the intersection points of the X and Y electrodes of the distorted design of a capacitive sensor 100b, which are not aligned with either the interval spacings of the intersection points of the X and Y electrodes of the distorted design of a capacitive sensor 100a or with the interval spacings of the numbers on the X and Y axes.

[0034] The distorted design of a capacitive sensor 100b is based on the Cartesian coordinate system of Fig. 1A is assigned and it is also assigned to a different coordinate system than the design to be distorted of a capacitive sensor 100a.

[0035] The respective areas of the sensor nodes of the distorted sensor 108 are essentially uniform (i.e., node areas are essentially uniform if the difference between the minimum area and the maximum area is < 25%), and the respective geometries of the sensor nodes are different in at least some cases (e.g., the respective heights or widths of the sensor nodes are different, without limitation) and are therefore possibly not essentially uniform. In the Fig. In the specific, non-restrictive example shown in Figure 1B, the geometry of sensor node 110 differs from the geometry of sensor node 112. The widths of sensor node 110 and sensor node 112 are different, and the heights of sensor node 110 and sensor node 112 are different. Notably, the respective node areas of sensor node 110 and sensor node 112 are essentially the same (i.e., uniform, as discussed below).

[0036] The number of sensor nodes in each row of the distorted sensor 108 is uniform, and the respective node areas of the sensor nodes of the distorted sensor 108 are essentially uniform. The respective capacitances and capacitance values ​​of the X and Y electrodes of the distorted sensor 108 are essentially uniform in the absence of touch (the capacitances are essentially uniform if the difference between the minimum capacitance and the maximum capacitance is ≤ 20%, although some deviations above or below may be permissible depending on specific operating conditions), based on the formula for parallel-plate capacitors (set out above). Since the capacitances are essentially uniform, the capacitive response to touch is also essentially uniform (i.e., here the capacitive response to touch is essentially uniform if the difference between the minimum capacitive response and the maximum capacitance is ≤ 20%).(capacitive response < XYZ %). Since the capacitive response to a touch is essentially uniform, a touch controller configured to detect touch events on a sensor with regular geometry can reliably detect touch events on the distorted sensor 108.

[0037] The visual differences discussed above between the distorted design of a capacitive sensor 100a and the distorted design of a capacitive sensor 100b are representative of the distortion applied to the distorted design of a capacitive sensor 100a, as discussed below.

[0038] If a touch controller configured to detect touches on sensor 102 were used to detect touches on the distorted sensor 108, the coordinates used to represent the locations of the touch events detected by the touch controller would be mapped to the coordinate plane of the distorted design of a capacitive sensor 100a. For example, in the case of a touch event at the upper right corner of the distorted sensor 108, such a touch controller would output XY coordinates (25,25), but the actual XY coordinates would be (24,25).

[0039] Since the coordinate planes are known for both a distorted design of a capacitive sensor 100a and a distorted design of a capacitive sensor 100b, transformations to change coordinates associated with the coordinate plane of the distorted design of a capacitive sensor 100a into coordinates associated with the coordinate plane of the distorted design of a capacitive sensor 100b can be determined as discussed below.

[0040] Fig. Figure 2 is a flowchart that depicts a process 200 for distorting the geometry of a capacitive sensor design from a first, regular geometry to a second, irregular geometry, according to one or more examples. Process 200 is a non-restrictive example of a process for distorting a capacitive sensor design 100a to a distorted capacitive sensor design 100b.

[0041] Although the exemplary process 200 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection afforded by this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially impair the function of process 200. In other examples, different components of an exemplary device or system implementing process 200 can perform functions essentially simultaneously or in a specific sequence.

[0042] According to one or more examples, process 200 involves changing the geometry of a capacitive sensor design from a first geometry to a second geometry, where the second geometry differs from the first geometry in process 202. In one or more examples, the first geometry may be regular and the second geometry may be irregular.

[0043] According to one or more examples, process 200 includes obtaining executable instructions (e.g., software, firmware, machine-executable instructions, without limitation) to convert a contact event location identifier from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry in process 204. Obtaining executable instructions includes, without limitation, generating executable instructions. In one or more examples, the respective location identifiers are XY coordinates according to a Cartesian coordinate system. In one or more examples, the first location identifier is associated with the first geometry because it is associated with a coordinate plane of the first geometry.In one or more examples, the second location identifier is assigned to the second geometry because it is assigned to a coordinate plane of the second geometry based on the applied transformation.

[0044] Fig. Figure 3 is a flowchart that depicts a process 300 for distorting a geometry of a design of a capacitive sensor according to one or more examples.

[0045] Although the exemplary process 300 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 300. In other examples, different components of an exemplary device or system implementing process 300 can perform functions essentially at the same time or in a specific sequence.

[0046] According to one or more examples, process 300 includes stretching, narrowing, or skew the geometry of the design of a capacitive sensor or the respective geometries of one or more sensor nodes thereof in process 302. In one or more examples, stretching, narrowing, or skew the geometry of the design of a capacitive sensor may include increasing or decreasing the height, width, or both of an area corresponding to the design of a capacitive sensor or its sensor nodes; increasing or decreasing the length of a respective column or row of the design of a capacitive sensor or its sensor nodes; rotating an area corresponding to the design of a capacitive sensor or sensor nodes thereof on an axis perpendicular to it; or combinations and subcombinations thereof.

[0047] According to one or more examples, process 300 includes maintaining an equal number of sensor nodes in the design of a capacitive sensor between the first geometry and the second geometry in process 304.

[0048] According to one or more examples, process 300 includes maintaining the respective node areas of the one or more sensor nodes of the design of a capacitive sensor substantially uniformly in process 306.

[0049] Fig. Figure 4 is a flowchart that depicts a process 400 for changing a geometry of a design of a capacitive sensor from a first geometry to a second geometry according to one or more examples.

[0050] Although the exemplary process 400 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 400. In other examples, different components of an exemplary device or system implementing process 400 can perform functions essentially at the same time or in a specific sequence.

[0051] According to one or more examples, process 400 includes obtaining a reference design of a capacitive sensor and a target design of a capacitive sensor in process 402. The geometry of the reference design of a capacitive sensor is a first geometry, and the geometry of the target design of a capacitive sensor is a second geometry. The first and second geometries are different and can be, as a non-restrictive example, regular and irregular geometries, respectively. The reference design of a capacitive sensor is a design of a capacitive sensor that is to be distorted. The target design of a capacitive sensor specifies the requirements for the distorted design of a capacitive sensor. Theoretically, the distorted design of a capacitive sensor should match the target design of a capacitive sensor.The extent to which a distorted design of a capacitive sensor corresponds to a target design of a capacitive sensor is a matter of design choice and may, as a non-limiting example, depend on a specific application or certain operating conditions of a system that includes a capacitive sensor according to a distorted design of a capacitive sensor.

[0052] According to one or more examples, process 400 includes mapping the geometry of the reference design of a capacitive sensor onto the geometry of a target design of a capacitive sensor in process 404.

[0053] According to one or more examples, process 400 essentially uniformly includes the setting of the respective node surfaces of the depicted design of a capacitive sensor in process 406.

[0054] According to one or more examples, process 400 includes completing the respective sensor node geometries of the illustrated reference design of a capacitive sensor in process 408. "Completing" refers to the actions taken, if any, to refine and complete the shape, fit, or function of the sensor node geometry.

[0055] Fig. Figure 5 is a flowchart that represents a process 500 for mapping the geometry of the reference design to the geometry of the target design according to one or more examples.

[0056] Although the exemplary process 500 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 500. In other examples, different components of an exemplary device or system implementing process 500 can perform functions essentially at the same time or in a specific sequence.

[0057] According to one or more examples, process 500 includes obtaining a reference design of a capacitive sensor and a target design of a capacitive sensor in process 502. A geometry of the reference design of a capacitive sensor is a first geometry, and a geometry of the target design of a capacitive sensor is a second geometry. The first and second geometries are different and can be, as non-restrictive examples, a regular and an irregular geometry, respectively.

[0058] According to one or more examples, process 500 includes identifying, in the geometry of the target design of a capacitive sensor, constituent geometries that match the predetermined geometries in process 504.

[0059] According to one or more examples, the procedure in Operation 506 involves dividing the geometry of the reference design of a capacitive sensor into rectangular sub-geometries. The respective rectangular sub-geometries encompass the respective identified constituent geometries of the target design of a capacitive sensor.

[0060] According to one or more examples, process 500 includes, for each Y-coordinate, the calculation of the respective X-coordinates of the constituent geometries in process 508.

[0061] According to one or more examples, process 500 in operation 510 includes determining functions that describe relationships between the X-coordinates of the constituent geometries and the Y-coordinates of the rectangular sub-geometries.

[0062] According to one or more examples, process 500 includes returning XY coordinates for the geometry of the target design of a capacitive sensor and the functions for determining them in process 512. The functions for determining the X and Y coordinates are the coordinate transformations.

[0063] Fig. Figure 6 is a flowchart that represents a process 600 for setting respective node surfaces of the depicted reference design essentially uniformly according to one or more examples.

[0064] Although the exemplary process 600 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 600. In other examples, different components of an exemplary device or system implementing process 600 can perform functions essentially at the same time or in a specific sequence.

[0065] According to one or more examples, the procedure includes obtaining a scaling factor in operation 602.

[0066] According to one or more examples, the procedure includes scaling the dimensions of the respective node surfaces of the depicted reference design according to the scaling factor in operation 604.

[0067] Fig. Figure 7 is a flowchart that represents a process 700 for scaling the dimensions of respective node surfaces of the depicted reference design according to the scaling factor as shown in one or more examples.

[0068] Although the exemplary process 700 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 700. In other examples, different components of an exemplary device or system implementing process 700 can perform functions essentially at the same time or in a specific sequence.

[0069] According to one or more examples, process 700 includes receiving a ratio value and an increment value at operation 702.

[0070] According to one or more examples, process 700 includes applying the ratio value to the height of the bottom row of the reference design in process 704.

[0071] According to one or more examples, process 700 includes incrementing the ratio value by the increment value at operation 706.

[0072] According to one or more examples, process 700 includes applying the incremented ratio value to the height of the next row of the reference design at process 708.

[0073] According to one or more examples, process 700 includes determining whether all rows have been distributed in decision block 710. If process 700 determines "No" in response to decision block 710, it returns to process 706 to increment the ratio by one increment value, and so on. If process 700 determines "Yes" in response to decision block 710, process 700 proceeds to decision block 712.

[0074] According to one or more examples, process 700 includes calculating a largest sensor node area, a smallest sensor node area, and a maximum area difference at decision block 712. The maximum area difference is calculated as the difference between the calculated largest sensor node area and the calculated smallest sensor node area. The largest sensor node area is the area of ​​a given sensor node with the largest area calculated by process 700, and the smallest sensor node area is the area of ​​another given sensor node with the smallest area calculated by process 700.

[0075] According to one or more examples, process 700 includes determining whether the maximum area difference in decision block 714 is acceptable. In one or more examples, determining whether a maximum area difference is acceptable includes comparing a maximum area difference to a predetermined threshold, and if the maximum area difference is greater than the predetermined threshold, then determining "Yes," and if the maximum area difference is less than the predetermined threshold, then determining "No."

[0076] In some examples, the loops of process 700 may appear infinite because repeated iterations of process 700 do not result in an acceptable maximum area difference (e.g., below the predetermined threshold, without constraint). In one or more examples, process 700 may include a counter and proceed to return an error state if decision block 712 does not return "yes" within a predetermined number of count pulses (i.e., current counter > predetermined count threshold).

[0077] If process 700 determines "no" in decision block 714, process 700 goes to operation 716.

[0078] According to one or more examples, process 700 involves obtaining a new ratio value at operation 716 and then returning to operation 704. Any suitable technique can be used to calculate a new ratio value. As a non-restrictive example, a new ratio value can be calculated by increasing or decreasing the current ratio value according to a function or a specified step size. As another non-restrictive example, a new ratio value can be obtained from a lookup table (LUT) that links ratio values ​​to current ratio values.

[0079] If process 700 determines "yes" in decision block 714, process 700 goes to operation 718.

[0080] According to one or more examples, process 700 includes the return of a scaled, remapped reference design of a capacitive sensor at process 718.

[0081] Fig. Figure 8 is a flowchart that represents a process 800 for completing respective sensor node geometries of the illustrated reference design of a capacitive sensor according to one or more examples.

[0082] Although the exemplary process 800 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection of this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially affect the function of process 800. In other examples, different components of an exemplary device or system implementing process 800 can perform functions essentially at the same time or in a specific sequence.

[0083] According to one or more examples, the procedure in Procedure 802 includes the construction of coarse sensor node geometries for distorted sensor nodes.

[0084] According to one or more examples, the procedure includes smoothing curves of intersection lines of coarse node geometries in process 804.

[0085] According to one or more examples, the procedure includes aligning the respective crossing elements of the respective sensor node geometries in step 806. At the intersection of an X-electrode and a Y-electrode, one or both electrodes typically enclose a discontinuity at the intersection point. Crossing elements are a mass of conductive material arranged to provide a physical and electrical connection across a space created by the discontinuity between the portions of the electrode exhibiting the discontinuity.

[0086] According to one or more examples, the procedure in operation 808 includes cutting gaps in cutting lines.

[0087] According to one or more examples, the procedure includes returning completed sensor node geometries in operation 810. The sensor node geometries have been smoothed, aligned, and trimmed to refine and complete their shape, fit, or function. The number of actions required to refine and complete the shape, fit, or function of the sensor node geometries, as well as the quality of the results, depend on the specific operating conditions.

[0088] Fig. 9A, Fig. 9B, Fig. 10A, Fig. 10B, Fig. 11A, Fig. 11B, Fig. 12A, Fig. 12B, Fig. 12C, Fig. 13A and Fig. 13B together provide specific, non-restrictive examples of graphic intermediate representations of a design of a capacitive sensor that is distorted, according to one or more examples.

[0089] Fig. 9A and Fig. 9B are graphical representations of a constituent geometry of a target design of a capacitive sensor, which was determined when mapping the geometry of a reference design of a capacitive sensor onto the geometry of a target design of a capacitive sensor, as described in relation to Fig. 5 and process 500 discussed.

[0090] The outline (via the line from point (15,25) to point (25,0)) is set on an XY axis according to the Cartesian coordinate system, and the Cartesian coordinates (0,0), (0,25), (15,25), (25,0), and (25,25) are shown. The height of the target design of a capacitive sensor is the length from (0,0) to (0,25). The bottom length (bot_length) is the length from (0,0) to (25,0). The difference in the X-direction between the upper right corner (coordinate (25,25)) and point 902 is "X_diff." The coordinates of point 902 are (15,25), so X_diff = 10.

[0091] Fig. 9A and Fig. Section 9B presents aspects for determining a function that defines a relationship between a given X-coordinate of the constituent geometry and an X-coordinate of a regular rectangular subgeometry of a reference design of a capacitive sensor.

[0092] In this example, new coordinates are calculated for the XY coordinates (10, 12,5).

[0093] A parameter “x_diff_over” is calculated using the expression x_diff_over = (x_diff / (y_height / y)). Here, “y_height” is the y-coordinate of the point using the original y-coordinates, “y” is the height of the point using the constituent geometry, and “x_diff” is the difference between the x-coordinate of the upper right corner of the constituent geometry and an x-coordinate of a regular, rectangular subgeometry of a reference design of a capacitive sensor, which is to be distorted to arrive at the constituent geometry of the target design of a capacitive sensor. With the values ​​of these parameters, the expression x_diff_over = (10 / (25 / 12.5)) = 5.

[0094] A factor is calculated using the expression factor=bot_length / (bot_lengthx_diff_ over), where "bot_length" is the length of the underside of the constituent geometry of the target design of a capacitive sensor.

[0095] "factor" is a function (hereinafter also referred to as a "transformation function") that defines a relationship between the respective x-coordinate of the constituent geometry and the x-coordinate of the rectangular sub-geometry. In one or more examples, the factor is stored (e.g., in a lookup table, without restriction) and can be used by a coordinate transformation to change coordinates associated with a first geometry (the regular geometry) into coordinates associated with a second geometry (the irregular geometry).

[0096] With the values ​​of bot_length and x_diff_over in the expression, factor = 25 / (25-5) = 1.25.

[0097] The new X-coordinate is calculated using the expression X / factor, where "X" is the original X-coordinate. Substituting this into the values, the new X-coordinate is (10 / 1.666) = 8. The new XY-coordinate is (8, 12, 5).

[0098] If a touch event occurs at point 902 of a sensor generated from a distorted capacitive sensor design as discussed herein, a touch controller configured to detect touches on a sensor with regular geometry would output XY coordinates (25,25). This is because the sensor nodes of the reference capacitive sensor design are compressed in the x-direction to generate the distorted capacitive sensor design. The distorted capacitive sensor design has the same number of sensor nodes as the reference capacitive sensor design, only arranged more compactly.

[0099] Applying the transformation functions to the output coordinates changes the coordinates to a non-uniform Cartesian coordinate plane. Additionally or alternatively, the XY coordinates associated with the irregular geometry can be stored in a lookup table (LUT) and searched using these XY coordinates.

[0100] Fig. 10A is a graphical representation of a basic grid according to one or more examples. Fig. 10B is a graphical representation of the basic grid of Fig. 10A, which, as discussed above, has been remapped.

[0101] The in Fig. Figure 10B, the newly mapped basic grid, represents an outline of a target design for a capacitive sensor with irregular geometry. The centers of the respective grid cells correspond to sensor nodes; that is, the centers of the grid cells correspond to the intersections of the X and Y electrodes. While the basic grid and the newly mapped basic grid enclose the same number of cells, the cells of the newly mapped basic grid are not regular but rather irregular (e.g., parallelograms and trapezoids).

[0102] It is noteworthy that in the newly generated grid, there is a difference of 104% between the minimum and maximum area of ​​the cells in the newly generated grid. As mentioned above, it is desirable to reduce or eliminate differences in the respective areas of the sensor nodes, where the sensor nodes are represented by the grid cells.

[0103] Fig. Figure 10C is a graphical representation of a basic touch sensor field pattern (TSP pattern). Fig. 10D is a graphical representation of the TSP pattern of Fig. 10C, which was remapped as discussed above.

[0104] The underlying TSP pattern of Fig. 10C corresponds to that in Fig. The basic grid shown in 10A and the newly assigned TSP pattern from Fig. 10D corresponds to the one in Fig. 10B newly depicted basic grid.

[0105] The locations of the intersection points of the X and Y electrodes, which are in Fig. 10C and Fig. The 10D representations correspond to the centers of the cells of the grid and the newly mapped grid, which are shown in Fig. 10A or Fig. 10B are shown.

[0106] Remarkably, the number of sensor nodes and intersections in the newly mapped TSP pattern is the same as the number of sensor nodes and intersections in the basic TSP pattern.

[0107] As mentioned above, it is desirable to reduce or eliminate differences in the respective areas of the sensor nodes.

[0108] Fig. 11A is a graphical representation of an exemplary basic grid with a horizontal ratio of 0.7. Fig. 11B is a graphical representation of the basic grid of Fig. 11A, re-imaged with a horizontal ratio of 0.7. The in Fig. 11A or Fig. The basic grid shown in 11B and the newly assigned basic grid with the horizontal ratio of 0.7 can be used as a non-restrictive example by applying a scaling process, such as process 700, without restriction. Fig. 10A and Fig. 10B will be received.

[0109] The vertical ratio is the ratio of the height of the bottom row of cells to Fig. 11A to the height of the bottom row of cells before scaling, i.e. in Fig. 10A. Here, the ratio is 0.7, so the height of the bottom row of cells is 0.7H1. While this example uses adjustments to the vertical ratio, adjustments to the horizontal ratio can be made in the same way. Furthermore, adjustments can be made to both the vertical and horizontal ratios.

[0110] Fig. 11C is a graphical representation of an example of an underlying TSP pattern with a horizontal ratio of 0.7. Fig. Figure 11C is a graphical representation of the exemplary underlying TSP pattern of Fig. 11C, re-imaged with a horizontal ratio of 0.7. The in Fig. 11C or Fig. The underlying TSP pattern shown in Figure 11D and the newly depicted TSP pattern with the horizontal ratio of 0.7 can be used as a non-restrictive example by applying a scaling process, such as Process 700, without restriction. Fig. 10C and Fig. 10D will be received.

[0111] At the sensor nodes of the in Fig. In the example shown in Figure 11D, gaps were retained, but the node areas and geometries of the crossing elements are not uniform across the different sensor nodes, which can lead to significant differences in the capacitance values ​​for the respective sensor nodes. By making the node areas and geometries of the sensor nodes in the depicted capacitive sensor design essentially uniform, differences in the capacitance values ​​for the respective sensor nodes are generally reduced.

[0112] Fig. 12A, Fig. 12B and Fig. Figure 12C are graphical representations that depict rough sensor node geometries for a 2-layer sensor node design according to one or more examples.

[0113] The in Fig. 12A, Fig. 12B and Fig. The geometries shown in 12C can be obtained, as a non-restrictive example, by performing some or all of the operations of process 800.

[0114] Fig. 12A represents an example of an underlying sensor node geometry for an underlying sensor node design.

[0115] Fig. Figure 12B represents an example of a crude sensor node geometry for a first example of a distorted sensor node design.

[0116] Fig. Figure 12C shows an example of a coarse sensor node geometry for a second example of a distorted sensor node design that differs from the first.

[0117] The in Fig. The exemplary rough sensor node geometries shown in Figure 12A were constructed using the 4-corner point construction method used in computer-aided layout design, but this disclosure is not limited to that method and any suitable method may be used without restriction, including the edge-centered construction method used in computer-aided layout design.

[0118] Other coarse sensor node geometries can also be created; these are merely specific, non-restrictive examples that would fit some of the sensor nodes in the newly depicted TSP pattern shown in Fig. 11B is shown.

[0119] Fig. 13A and Fig. Figure 13B are graphical representations depicting a distorted design of a capacitive sensor, including sensor nodes with geometries constructed as discussed herein. The sensor nodes of the in Fig. The distorted design of a capacitive sensor shown in Figure 13A was constructed using a corner-centering design method, and the sensor nodes of the sensor shown in Figure 13A were designed using a corner-centering design method. Fig. The distorted designs of a capacitive sensor shown in Figure 13B were constructed using a 4-corner point construction method.

[0120] The geometries of the crossing elements are found in the distorted designs of a capacitive sensor, which are in Fig. 13A and Fig. The sensor nodes shown in Figure 13B are not consistently aligned, which can lead to significant differences in the capacity values ​​of the sensor nodes.

[0121] Fig. 14A, Fig. 14B and Fig. 14C are schematic designs that represent parts of sensor nodes including electrode interfaces and crossing elements. Fig. Figure 14A illustrates a case where the crossing elements of the sensor nodes do not show a uniform orientation with respect to the segment tips, as discussed below.

[0122] As in Fig. As shown in Figure 14A, a crossing element 1404 is arranged in a direction indicated by the arrow 1406, which extends from the center point 1410 of the crossing element 1404 through the center point of a line segment defining one side of a box representing the crossing element 1404. A desired orientation is represented by the alignment line 1402, which extends from the center point 1410 to the segment tip 1408 and represents the direction in which the crossing element 1404 should be oriented. Any identical side of the boxes representing the crossing elements can be chosen for alignment, as long as the crossing elements have the same geometry.

[0123] As in Fig. As shown in Figure 14B, the crossing element 1404 is rotated about an axis (the axis runs through the center point 1410 perpendicular to the side) in the direction shown by arrow 1414 until it is aligned in the direction shown by arrow 1412, which is a ray from the center point 1410 passing through a midline of the edge of 1404 to the segment tip 1408. In this alignment, the crossing element 1404 is aligned with the segment tip 1408. Generally, it is desirable for the crossing elements to exhibit a uniform alignment, whether with respect to the segment tips or some other similar reference.

[0124] Fig. 14C represents several sensor node sections that include crossing elements uniformly aligned with the segment tips, as discussed above.

[0125] Fig. Figure 15 is a graphic representation showing an example of a distorted design pattern of a capacitive sensor, completed as discussed above.

[0126] Fig. Figure 16 is a block diagram that represents a System 1600 for distorting a geometry of a design of a capacitive sensor from a first, regular geometry to a second, irregular geometry according to one or more examples.

[0127] System 1600 includes the sensor design application 1602. The sensor design application 1602 includes a geometry distorter 1604, a transformer calculator 1606, a distorted reference design 1612, and a coordinate transformer 1614.

[0128] Sensor design application 1602 can be, as non-restrictive examples, a software application running on a local or remote computer, or a service hosted on a server computer or in a cloud computing environment.

[0129] The geometry distorter 1604 can be, as non-restrictive examples, a software module, a routine, a subroutine, or a package of the sensor design application 1602. The geometry distorter 1604 receives a reference design 1608 and a target design 1610, which are designs of a capacitive sensor, and generates a distorted reference design 1612 that responds at least partially to the reference design 1608 and the target design 1610. As a non-restrictive example, the geometry distorter 1604 can produce a distorted reference design 1612 in response to the performance of some or all of the operations discussed in relation to process 200, process 300, process 400, process 500, process 600, process 700, or process 800, or any combination or subcombination thereof.

[0130] The transformer computer 1606 can be, as non-restrictive examples, a software module, routine, subroutine, or package of the sensor design application 1602 or the geometry distorter 1604. The transformer computer 1606 receives the distorted reference design 1612 and generates the coordinate transformer 1614. As a non-restrictive example, the transformer computer 1606 can generate the coordinate transformer 1614 in response to the performance of some or all of the operations discussed with reference to Process 500, or any combination or subcombination thereof.

[0131] The coordinate transformer 1614 is a set of executable instructions for changing a coordinate set generated by a touch controller, configured for use with a regularly shaped sensor, into coordinates corresponding to an irregularly shaped sensor. In one or more examples, a coordinate transformer 1614 generated by the transformer computer 1606 can be software, firmware, or microcode, which can be executed, at least in part, by a processing core of a microcontroller or, more generally, by an integrated circuit (IC).

[0132] Fig. Figure 17 is a block diagram illustrating a System 1700 according to one or more examples for detecting touches on an irregularly shaped capacitive sensor.

[0133] System 1700 includes a touch controller 1702 and an irregularly shaped capacitive sensor 1704. The touch controller 1702 includes firmware 1710, which in turn includes a regularly shaped sensor detector 1706 and a sensor coordinate transformer 1708. The regularly shaped sensor detector 1706 is firmware for performing touch measurements and detection on the touch controller 1702. In general terms, the regularly shaped sensor detector 1706 detects a touch on a regularly shaped capacitive sensor and generates coordinates for a Cartesian coordinate system. The coordinate transformer 1708 is firmware for changing coordinates generated by a touch controller (e.g., a sensor).The coordinate transformer 1708 can be a coordinate transformer 1614 generated by the transformer computer 1606. As non-restrictive examples, the coordinate transformer 1708 can be a non-restrictive example of a coordinate transformer 1614 generated by the transformer computer 1606 or by a process 500.

[0134] Fig. Figure 18 is a flowchart depicting a process 1800 for detecting a touch event by an irregularly shaped capacitive sensor and reporting its location, according to one or more examples. Some or all of the operations of process 1800 can, as a non-restrictive example, be performed by system 1700.

[0135] Although the exemplary process 1800 illustrates a specific sequence of operations, this sequence can be modified without deviating from the scope of protection afforded by this disclosure. For example, some of the illustrated operations can be performed in parallel or in a different sequence that does not substantially impair the function of process 1800. In other examples, different components of an exemplary device or system implementing process 1800 can perform functions essentially simultaneously or in a specific sequence.

[0136] According to some examples, the procedure includes receiving measurement signals from an irregularly shaped capacitive sensor during a capacitive measurement process in operation 1802.

[0137] According to some examples, the procedure includes detecting capacitive changes, which in process 1804 indicate a touch event on the irregularly shaped capacitive sensor.

[0138] According to some examples, the procedure includes generating a location identifier that is assigned to a location of the contact event in process 1806.

[0139] According to some embodiments, the method in step 1808 includes changing the location identifier from a first location identifier value to a second location identifier value, wherein the first location identifier value is associated with a regular geometry and the second location identifier value is associated with an irregular geometry. In one or more examples, changing the location identifier from the first location identifier value to the second location identifier value may include assigning new coordinate values ​​or generating another location identifier with the second location identifier value. In one or more examples, a modified location identifier or, optionally, another location identifier may be used to report the contact event.

[0140] It is understood by experts that functional elements of the examples disclosed herein (e.g., functions, operations, actions, processes and / or procedures) can be implemented in any suitable hardware, software, firmware or combinations thereof. Fig. Section 19 illustrates non-restrictive examples of implementations of functional elements disclosed herein. In some examples, some or all sections of the functional elements disclosed herein can be performed by hardware capable of executing the functional elements.

[0141] Fig.Figure 19 is a block diagram of a switching logic that can be used in some examples to implement various functions, operations, actions, processes, or procedures disclosed herein. The switching logic includes one or more processors 1902 (hereafter sometimes referred to as "processors 1902") operationally coupled to one or more data storage devices 1904 (hereafter sometimes referred to as "memories 1904"). The memory 1904 includes machine-executable code 1906 stored thereon, and the processors 1902 include a logic circuit 1908. The machine-executable code 1906 includes information describing functional elements that can be implemented (e.g., performed) by the logic circuit 1908. The logic circuit 1908 is equipped to implement (e.g., perform) the functional elements described by the machine-executable code 1906.The switching logic should be considered as special hardware configured to execute the functional elements described by machine-executable code 1906. In some examples, the 1902 processors can execute the functional elements described by machine-executable code 1906 sequentially, concurrently (e.g., on one or more different hardware platforms), or in one or more parallel process streams.

[0142] When the machine-executable code 1906 is implemented by the logic circuit 1908 of the processors 1902, it adapts the processors 1902 to perform operations from examples disclosed herein. As a non-limiting example, the machine-executable code 1906 can adapt the processors 1902 to perform some or all of the operations of one or more of Process 200, Process 300, Process 400, Process 500, Process 600, Process 700, Process 800, or Process 1800.

[0143] Also as a non-limiting example, the machine-executable code 1906 can adapt the processors 1902 to perform some or all of the features, functions, or operations disclosed herein for one or more of: the distorting design of a capacitive sensor 100a, the distorted design of a capacitive sensor 100b, System 1600, and System 1700. In particular, the features, functions, or operations disclosed herein for one or more of: sensor design application 1602, geometry distorter 1604, or transformer computer 1606; and touch control 1702, firmware 1710, irregularly shaped capacitive sensor 1704, regularly shaped sensor detector 1706, and coordinate transformer 1708.

[0144] The processors 1902 may include a general-purpose processor, a special-purpose processor, a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, another programmable device, or any combination thereof designed to perform the functions disclosed herein. A general-purpose computer, including a processor, is considered a special-purpose computer, while the general-purpose computer executes functional elements corresponding to the machine-executable code 1906 (e.g., software code, firmware code, hardware descriptions) that refers to examples in the present disclosure.It should be noted that a general-purpose processor (which may also be referred to herein as the host processor or simply the host) can be a microprocessor, but alternatively, the Processors 1902 can include any conventional processor, conventional controller, conventional microcontroller, or conventional state machine. The Processors 1902 can also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0145] In some examples, Storage 1904 includes volatile data storage (e.g., random access memory (RAM)), non-volatile data storage (e.g., flash memory, a hard disk drive, a solid-state drive, erasable programmable read-only memory (EPROM), without limitation). In some examples, the Processors 1902 and the Storage 1904 can be implemented in a single device (e.g., in a semiconductor device product, in a system-on-chip (SoC), without limitation). In some examples, the Processors 1902 and the Storage 1904 can be implemented in separate devices.

[0146] In some examples, the machine-executable code 1906 may include computer-readable instructions (e.g., software code, firmware code). As a non-restrictive example, the computer-readable instructions may be stored in memory 1904, which the processors 1902 can access directly, and executed by the processors 1902 using at least logic circuit 1908. Also as a non-restrictive example, the computer-readable instructions may be stored in memory 1904, transferred to a storage device (not shown) for execution, and executed by the processors 1902 using at least logic circuit 1908. Accordingly, in some examples, logic circuit 1908 includes an electrically configurable logic circuit 1908.

[0147] In some examples, the machine-executable code 1906 can describe hardware (e.g., switching logic) that is to be implemented in the logic circuit 1908 to perform the functional elements. This hardware can be described at a variety of abstraction levels, from low-level transistor layouts to high-level description languages. At a high abstraction level, a hardware description language (HDL), such as an IEEE standard hardware description language (HDL), can be used. Non-restrictive examples include Verilog, SystemVerilog, or Very Large Scale Integration (VLSI) hardware description languages ​​(VHDL).

[0148] HDL descriptions can be transformed at will into descriptions at any of numerous other levels of abstraction. As a non-restrictive example, a high-level description can be transformed into a logic-level description, such as a register-transfer language (RTL), a gate-level (GL), a layout-level, or a mask-level description. Another non-restrictive example is the transformation of microoperations performed by hardware logic circuits (e.g.,The operation of the logic circuit 1908 (gates, flip-flops, registers, without limitation) is to be carried out in an RTL and then converted into a GL description by a synthesis tool. The GL description can be converted into a layout-level description corresponding to a physical layout of an integrated circuit, a programmable logic device, discrete gate or transistor logic, discrete hardware components, or combinations thereof by a placement and routing tool. Accordingly, the machine-executable code 1906 in some examples may include an HDL, an RTL, a GL description, a mask-level description, another hardware description, or any combination thereof.

[0149] In examples where the machine-executable code 1906 includes a hardware description (at any level of abstraction), a system (not shown, but including memory 1904) implements the hardware description provided by the machine-executable code 1906. As a non-restrictive example, the processors 1902 may include a programmable logic device (e.g., an FPGA or a PLC), and the logic circuit 1908 may be electrically controlled to implement switching logic in the logic circuit 1908 that corresponds to the hardware description. Also as a non-restrictive example, the logic circuit 1908 may include hard-wired logic that is manufactured by a production system (not shown, but including memory 1904) according to the hardware description of the machine-executable code 1906.

[0150] Regardless of whether the machine-executable code 1906 includes computer-readable instructions or a hardware description, the logic circuit 1908 is designed to perform the functional elements described by the machine-executable code 1906 when the functional elements of the machine-executable code 1906 are implemented. It should be noted that, although a hardware description may not directly describe functional elements, a hardware description indirectly describes functional elements that can perform the hardware elements described by the hardware description.

[0151] Terms used in the present disclosure and in particular in the accompanying claims (e.g. contents of the accompanying claims) are generally intended to be “open” terms (e.g. the term “including” should be interpreted as “including but not limited to”, the term “having” should be interpreted as “having at least”, the term “includes” should be interpreted as “includes but is not limited to”, etc.).

[0152] Furthermore, if a specific number of introduced claim terms is intended, this intention will be expressly stated in the claim, and in the absence of such a statement, no such intention exists. For example, the following attached claims may contain the use of the introductory phrases "at least one" and "one or more" to introduce claim terms. However, the use of such phrases should not be interpreted as implying that introducing a claim term by the indefinite articles "one" or "a" limits a particular claim containing such an introduced claim term to embodiments containing only one such term, even if the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "one" and / or "a" (e.g.,“A” and / or “an” should be interpreted as meaning “at least one” or “one or more”); the same applies to the use of certain articles used to introduce claim statements.

[0153] Furthermore, even if a specific number of introduced claim statements is explicitly mentioned, those skilled in the art will recognize that such a statement should be interpreted as meaning at least the specified number (e.g., the mere mention of 'two statements' without any other modifiers means at least two statements or two or more statements). Moreover, in cases where a convention is used analogously to 'at least one of A, B, and C, etc.' or 'one or more of A, B, and C, etc.', such a structure is generally intended to include A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together, etc. As used herein, 'each' means some or all, and 'each and each one' means all.

[0154] Furthermore, any disjunctive word or phrase representing two or more alternative terms, whether in the description, claims, or drawings, should be understood as including either term, either term, or both terms. For example, the phrase "A or B" should be understood to include the possibilities of "A" or "B" or "A and B".

[0155] Other non-restrictive examples include: Example 1: A method comprising: changing a geometry of a capacitive sensor design from a first geometry to a second geometry, wherein the second geometry differs from the first geometry; and obtaining executable instructions to convert a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry. Example 2: The procedure according to Example 1, where the first geometry is a regular geometry and the second geometry is an irregular geometry. Example 3: The method according to one of Examples 1 and 2, wherein changing the geometry of the design of a capacitive sensor from the first geometry to the second geometry comprises: obtaining a reference design of a capacitive sensor and a target design of a capacitive sensor, wherein the geometry of the reference design of a capacitive sensor is the first geometry and the geometry of the target design of a capacitive sensor is the second geometry; mapping the geometry of the reference design of a capacitive sensor onto the geometry of the target design of a capacitive sensor; and setting the respective nodal surfaces of the mapped reference design of a capacitive sensor as substantially uniform. Example 4: The method according to any of Examples 1 to 3, wherein mapping the geometry of the reference design onto the geometry of the target design comprises: identifying, in the geometry of the target design of a capacitive sensor, constituent geometries that correspond to predetermined geometries; dividing the geometry of the reference design of a capacitive sensor into rectangular sub-geometries, each rectangular sub-geometrie including identified constituent geometries of the target design of a capacitive sensor; for the respective Y-coordinates, calculating the respective X-coordinates of the identified constituent geometries; determining functions that describe relationships between the X-coordinates of the constituent geometries and the X-coordinates of the rectangular sub-geometries; and returning the X- and Y-coordinates for the second geometry and the functions. Example 5: The method according to one of Examples 1 to 4, wherein setting the respective node surfaces of the illustrated reference design comprises: obtaining a scaling factor; and scaling the dimensions of the respective node surfaces of the illustrated reference design of a capacitive sensor according to the scaling factor. Example 6: The procedure according to one of Examples 1 to 5, comprising: completing the respective sensor node geometries of the illustrated reference design of a capacitive sensor. Example 7: The procedure according to any of Examples 1 to 6, wherein completion comprises: constructing rough sensor node geometries; smoothing curves of intersection lines of rough node geometries; aligning the respective crossing details of the respective sensor node geometries; trimming gaps in intersection lines; and returning completed sensor node geometries. Example 8: Method according to one of Examples 1 to 7, wherein a scale of a reference coordinate line of the first geometry differs from a scale of a reference coordinate line of the second geometry. Example 9: The method according to any of Examples 1 to 8, comprising: maintaining an equal number of sensor nodes of the design of a capacitive sensor between the first geometry and the second geometry; and maintaining the respective node areas of the one or more sensor nodes of the design of a capacitive sensor substantially uniform. Example 10: Method according to any of Examples 1 to 9, wherein changing the geometry of the design of a capacitive sensor comprises: stretching, narrowing or skew the geometry of the design of a capacitive sensor or respective geometries of one or more sensor nodes thereof. Example 11: The method according to one of Examples 1 to 10, comprising: Defining the second geometry according to a geometry of a target contact surface. Example 12: A device comprising: a storage device; and at least one processor for executing machine-executable instructions stored on the storage device, wherein the machine-executable instructions cause the at least one processor to: change a geometry of a capacitive sensor design from a first geometry to a second geometry, the second geometry being different from the first geometry; and receive executable instructions to convert a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry. Example 13: A method comprising: receiving measurement signals from an irregularly shaped capacitive sensor during a capacitive measurement process; detecting capacitive changes indicating a touch event on the irregularly shaped capacitive sensor; generating a location identifier associated with a location of the touch event; and changing the location identifier from a first location identifier value to a second location identifier value, wherein the first location identifier value is associated with a regular geometry and the second location identifier value is associated with an irregular geometry. Example 14: The procedure according to one of Example 13, wherein changing the location identifier from a first location identifier value to a second location identifier value includes: generating another location identifier that has the second location identifier value that is assigned to the irregular geometry. Example 15: The procedure according to one of Examples 13 and 14, comprising: Calculating the second location identifier value by applying a transformation function to the first location identifier value. Example 16: The procedure according to one of Examples 13 to 15, where the first location identifier value and the second location identifier value are XY coordinates. Example 17: The method according to one of Examples 13 to 16, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor. Example 18: The method according to one of Examples 13 to 17, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area. Example 19: The method according to one of Examples 13 to 18, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry. Example 20: The method according to one of Examples 13 to 19, wherein the distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform. Example 21: The method according to one of Examples 13 to 20, wherein the number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform. Example 22: The method according to any of Examples 13 to 21, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area; sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform; and a number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform. Example 23: A device comprising: a memory; and at least one processor for executing instructions stored in memory, wherein the instructions cause the at least one processor to: receive measurement signals from an irregularly shaped capacitive sensor during a capacitive measurement process; detect capacitive changes indicating a touch event on the irregularly shaped capacitive sensor; generate a location identifier associated with a location of the touch event; and change the location identifier from a first location identifier value to a second location identifier value, wherein the first location identifier value is associated with a regular geometry and the second location identifier value is associated with an irregular geometry. Example 24: The setup according to one of Example 23, wherein instructions that cause the at least one processor to change the location identifier from a first location identifier value to a second location identifier value include instructions to: generate another location identifier that has the second location identifier value that is associated with the irregular geometry. Example 25: The setup according to one of Examples 23 and 24, wherein instructions that cause the at least one processor to change the location identifier from a first location identifier value to a second location identifier value include instructions for: calculating the second location identifier value by applying a transformation function to the first location identifier value. Example 26: A system comprising: an irregularly shaped capacitive sensor; and a touch controller associated with the irregularly shaped capacitive sensor, the touch controller including: a first firmware enabling the touch controller to generate a first location identifier for a touch event associated with a regularly shaped capacitive sensor; and a second firmware enabling the touch controller to generate a second location identifier for the touch event associated with the irregularly shaped capacitive sensor, at least partially based on the first location identifier. Example 27: System according to one of the examples 26, wherein a surface of the irregularly shaped capacitive sensor has an irregular geometry. Example 28: System according to one of Examples 26 and 27, wherein the irregular geometry of the irregularly shaped capacitive sensor is a non-rectangular geometry. Example 29: The system according to one of Examples 26 to 28, where the first location identifier value and the second location identifier value are XY coordinates. Example 30: The system according to one of Examples 26 to 29, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor. Example 31: The system according to one of Examples 26 to 30, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area. Example 32: The system according to one of Examples 26 to 31, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry. Example 33: The system according to one of Examples 26 to 32, wherein the distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform. Example 34: The system according to one of Examples 26 to 33, wherein the number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform. Example 35: The system according to any of Examples 26 to 34, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area; sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform; and a number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform.

[0156] Although the present disclosure has been described herein with respect to certain illustrated examples, persons skilled in the art will recognize and understand that the present invention is not limited to these. Rather, many additions, omissions, and modifications can be made to the illustrated and described examples without departing from the scope of protection of the invention as claimed below together with its legal equivalents. Furthermore, features of one example can be combined with features of another example and still remain within the scope of protection of the invention as envisaged by the inventor. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] US 63 / 366,682

[0001]

Claims

[1] Method comprising: Changing a geometry of a capacitive sensor design from a first geometry to a second geometry, wherein the second geometry is different from the first geometry; and Obtaining executable instructions to convert a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry. [2] The method of claim 1, wherein the first geometry is a regular geometry and the second geometry is an irregular geometry. [3] The method of claim 1, wherein changing the geometry of the design of a capacitive sensor from the first geometry to the second geometry comprises: Obtaining a capacitive sensor reference design and a capacitive sensor target design, wherein the geometry of the capacitive sensor reference design is the first geometry and the geometry of the capacitive sensor target design is the second geometry; Mapping the geometry of the reference design of a capacitive sensor to the geometry of the target design of a capacitive sensor; and Setting the respective node surfaces of the depicted capacitive sensor reference design to be substantially uniform. [4] The method of claim 3, wherein mapping the geometry of the reference design to the geometry of the target design comprises: Identifying, in the geometry of the target design of a capacitive sensor, constituent geometries that match predetermined geometries; Dividing the geometry of the reference design of a capacitive sensor into rectangular sub-geometries, wherein the respective rectangular sub-geometries each include identified ones of the constituent geometries of the target design of a capacitive sensor; for the respective Y-coordinates, calculating the respective X-coordinates of the identified constituent geometries; Determining functions that describe relationships between the X-coordinates of the constituent geometries and the X-coordinates of the rectangular sub-geometries; and Return the X and Y coordinates for the second geometry and functions. [5] The method of claim 3, wherein setting the respective nodal surfaces of the mapped reference design as uniform comprises: Obtaining a scaling factor; and Scaling the dimensions of the respective node surfaces of the depicted capacitive sensor reference design according to the scaling factor. [6] The method of claim 3, comprising: completing the respective sensor node geometries of the mapped capacitive sensor reference design. [7] The method of claim 6, wherein said completing comprises: Constructing rough sensor node geometries; Smoothing curves of intersection lines of coarse node geometries; Aligning the respective crossing details of the respective sensor node geometries; Cutting gaps in cutting lines; and Returning completed sensor node geometries. [8] The method of claim 1, wherein a scale of a reference coordinate line of the first geometry differs from a scale of a reference coordinate line of the second geometry. [9] A method according to claim 1, comprising: Maintaining an equal number of sensor nodes of the capacitive sensor design between the first geometry and the second geometry; and Maintaining the respective node areas of the one or more sensor nodes of the capacitive sensor design substantially uniform. [10] The method of claim 1, wherein changing the geometry of the capacitive sensor design comprises one or more of: stretching, narrowing, or skewing the geometry of the capacitive sensor design or respective geometries of one or more sensor nodes thereof. [11] A method according to claim 1, comprising: Defining the second geometry according to a geometry of a target contact surface. [12] Facility comprising: a storage device; and at least one processor for executing machine-executable instructions stored on the storage device, wherein the machine-executable instructions cause the at least one processor to: Changing a geometry of a capacitive sensor design from a first geometry to a second geometry, wherein the second geometry is different from the first geometry; and Obtaining executable instructions to convert a location identifier of a touch event from a first location identifier associated with the first geometry to a second location identifier associated with the second geometry. [13] Method comprising: Receiving measurement signals from an irregularly shaped capacitive sensor during a capacitive measurement process; Detecting capacitive changes indicative of a touch event at the irregularly shaped capacitive sensor; Generating a location identifier associated with a location of the touch event; and Changing the location identifier from a first location identifier value to a second location identifier value, wherein the first location identifier value is associated with a regular geometry and the second location identifier value is associated with an irregular geometry. [14] The method of claim 13, wherein changing the location identifier from a first location identifier value to a second location identifier value comprises: Generating another location identifier having the second location identifier value associated with the irregular geometry. [15] A method according to claim 13, comprising: Calculating the second location identifier value by applying a transformation function to the first location identifier value. [16] The method of claim 13, wherein the first location identifier value and the second location identifier value are XY coordinates. [17] The method of claim 13, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor. [18] The method of claim 13, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area. [19] The method of claim 13, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry. [20] The method of claim 13, wherein a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform. [21] The method of claim 13, wherein the number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform. [22] The method of claim 13, wherein: Sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensing area; Sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform; and a number of sensor nodes in respective rows of the irregularly shaped capacitive sensor is uniform. [23] Facility comprising: a memory; and at least one processor for executing instructions stored in memory, the instructions causing the at least one processor to: Receiving measurement signals from an irregularly shaped capacitive sensor during a capacitive measurement process; Detecting capacitive changes indicative of a touch event at the irregularly shaped capacitive sensor; Generating a location identifier associated with a location of the touch event; and Changing the location identifier from a first location identifier value to a second location identifier value, wherein the first location identifier value is associated with a regular geometry and the second location identifier value is associated with an irregular geometry. [24] The apparatus of claim 23, wherein instructions causing the at least one processor to change the location identifier from a first location identifier value to a second location identifier value include instructions to: Generating another location identifier having the second location identifier value associated with the irregular geometry. [25] The apparatus of claim 23, wherein instructions causing the at least one processor to change the location identifier from a first location identifier value to a second location identifier value include instructions to: Calculating the second location identifier value by applying a transformation function to the first location identifier value. [26] System comprising: an irregularly shaped capacitive sensor; and a touch control associated with the irregularly shaped capacitive sensor, the touch control including: a first firmware that enables the touch controller to generate a first location identifier for a touch event associated with a regularly shaped capacitive sensor; and a second firmware enabling the touch controller to generate a second location identifier for the touch event associated with the irregularly shaped capacitive sensor based at least in part on the first location identifier. [27] The system of claim 26, wherein a surface of the irregularly shaped capacitive sensor has an irregular geometry. [28] The system of claim 26, wherein the irregular geometry of the irregularly shaped capacitive sensor is a non-rectangular geometry. [29] The system of claim 26, wherein the first location identifier value and the second location identifier value are XY coordinates. [30] The system of claim 26, wherein the irregularly shaped capacitive sensor is a non-rectangular capacitive sensor. [31] The system of claim 26, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensor area. [32] The system of claim 26, wherein sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry. [33] The system of claim 26, wherein a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform. [34] The system of claim 26, wherein the number of sensor nodes in the respective rows of the irregularly shaped capacitive sensor is uniform. [35] The system of claim 26, wherein: Sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially uniform sensing area; Sensor nodes of the irregularly shaped capacitive sensor exhibit a substantially non-uniform geometry; a distance between sensor nodes of the irregularly shaped capacitive sensor is not uniform; and a number of sensor nodes in respective rows of the irregularly shaped capacitive sensor is uniform.

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